| 1 | /* Common code for ARM software single stepping support. |
| 2 | |
| 3 | Copyright (C) 1988-2017 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | #ifndef ARM_GET_NEXT_PCS_H |
| 21 | #define ARM_GET_NEXT_PCS_H 1 |
| 22 | #include "gdb_vecs.h" |
| 23 | |
| 24 | /* Forward declaration. */ |
| 25 | struct arm_get_next_pcs; |
| 26 | |
| 27 | /* get_next_pcs operations. */ |
| 28 | struct arm_get_next_pcs_ops |
| 29 | { |
| 30 | ULONGEST (*read_mem_uint) (CORE_ADDR memaddr, int len, int byte_order); |
| 31 | CORE_ADDR (*syscall_next_pc) (struct arm_get_next_pcs *self); |
| 32 | CORE_ADDR (*addr_bits_remove) (struct arm_get_next_pcs *self, CORE_ADDR val); |
| 33 | int (*is_thumb) (struct arm_get_next_pcs *self); |
| 34 | |
| 35 | /* Fix up PC if needed. */ |
| 36 | CORE_ADDR (*fixup) (struct arm_get_next_pcs *self, CORE_ADDR pc); |
| 37 | }; |
| 38 | |
| 39 | /* Context for a get_next_pcs call on ARM. */ |
| 40 | struct arm_get_next_pcs |
| 41 | { |
| 42 | /* Operations implementations. */ |
| 43 | struct arm_get_next_pcs_ops *ops; |
| 44 | /* Byte order for data. */ |
| 45 | int byte_order; |
| 46 | /* Byte order for code. */ |
| 47 | int byte_order_for_code; |
| 48 | /* Whether the target has 32-bit thumb-2 breakpoint defined or |
| 49 | not. */ |
| 50 | int has_thumb2_breakpoint; |
| 51 | /* Registry cache. */ |
| 52 | struct regcache *regcache; |
| 53 | }; |
| 54 | |
| 55 | /* Initialize arm_get_next_pcs. */ |
| 56 | void arm_get_next_pcs_ctor (struct arm_get_next_pcs *self, |
| 57 | struct arm_get_next_pcs_ops *ops, |
| 58 | int byte_order, |
| 59 | int byte_order_for_code, |
| 60 | int has_thumb2_breakpoint, |
| 61 | struct regcache *regcache); |
| 62 | |
| 63 | /* Find the next possible PCs after the current instruction executes. */ |
| 64 | VEC (CORE_ADDR) *arm_get_next_pcs (struct arm_get_next_pcs *self); |
| 65 | |
| 66 | #endif /* ARM_GET_NEXT_PCS_H */ |