| 1 | /* GNU/Linux on ARM target support. |
| 2 | |
| 3 | Copyright (C) 1999-2012 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | #include "defs.h" |
| 21 | #include "target.h" |
| 22 | #include "value.h" |
| 23 | #include "gdbtypes.h" |
| 24 | #include "floatformat.h" |
| 25 | #include "gdbcore.h" |
| 26 | #include "frame.h" |
| 27 | #include "regcache.h" |
| 28 | #include "doublest.h" |
| 29 | #include "solib-svr4.h" |
| 30 | #include "osabi.h" |
| 31 | #include "regset.h" |
| 32 | #include "trad-frame.h" |
| 33 | #include "tramp-frame.h" |
| 34 | #include "breakpoint.h" |
| 35 | #include "auxv.h" |
| 36 | |
| 37 | #include "arm-tdep.h" |
| 38 | #include "arm-linux-tdep.h" |
| 39 | #include "linux-tdep.h" |
| 40 | #include "glibc-tdep.h" |
| 41 | #include "arch-utils.h" |
| 42 | #include "inferior.h" |
| 43 | #include "gdbthread.h" |
| 44 | #include "symfile.h" |
| 45 | |
| 46 | #include "gdb_string.h" |
| 47 | |
| 48 | /* This is defined in <elf.h> on ARM GNU/Linux systems. */ |
| 49 | #define AT_HWCAP 16 |
| 50 | |
| 51 | extern int arm_apcs_32; |
| 52 | |
| 53 | /* Under ARM GNU/Linux the traditional way of performing a breakpoint |
| 54 | is to execute a particular software interrupt, rather than use a |
| 55 | particular undefined instruction to provoke a trap. Upon exection |
| 56 | of the software interrupt the kernel stops the inferior with a |
| 57 | SIGTRAP, and wakes the debugger. */ |
| 58 | |
| 59 | static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef }; |
| 60 | |
| 61 | static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 }; |
| 62 | |
| 63 | /* However, the EABI syscall interface (new in Nov. 2005) does not look at |
| 64 | the operand of the swi if old-ABI compatibility is disabled. Therefore, |
| 65 | use an undefined instruction instead. This is supported as of kernel |
| 66 | version 2.5.70 (May 2003), so should be a safe assumption for EABI |
| 67 | binaries. */ |
| 68 | |
| 69 | static const char eabi_linux_arm_le_breakpoint[] = { 0xf0, 0x01, 0xf0, 0xe7 }; |
| 70 | |
| 71 | static const char eabi_linux_arm_be_breakpoint[] = { 0xe7, 0xf0, 0x01, 0xf0 }; |
| 72 | |
| 73 | /* All the kernels which support Thumb support using a specific undefined |
| 74 | instruction for the Thumb breakpoint. */ |
| 75 | |
| 76 | static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01}; |
| 77 | |
| 78 | static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde}; |
| 79 | |
| 80 | /* Because the 16-bit Thumb breakpoint is affected by Thumb-2 IT blocks, |
| 81 | we must use a length-appropriate breakpoint for 32-bit Thumb |
| 82 | instructions. See also thumb_get_next_pc. */ |
| 83 | |
| 84 | static const char arm_linux_thumb2_be_breakpoint[] = { 0xf7, 0xf0, 0xa0, 0x00 }; |
| 85 | |
| 86 | static const char arm_linux_thumb2_le_breakpoint[] = { 0xf0, 0xf7, 0x00, 0xa0 }; |
| 87 | |
| 88 | /* Description of the longjmp buffer. The buffer is treated as an array of |
| 89 | elements of size ARM_LINUX_JB_ELEMENT_SIZE. |
| 90 | |
| 91 | The location of saved registers in this buffer (in particular the PC |
| 92 | to use after longjmp is called) varies depending on the ABI (in |
| 93 | particular the FP model) and also (possibly) the C Library. |
| 94 | |
| 95 | For glibc, eglibc, and uclibc the following holds: If the FP model is |
| 96 | SoftVFP or VFP (which implies EABI) then the PC is at offset 9 in the |
| 97 | buffer. This is also true for the SoftFPA model. However, for the FPA |
| 98 | model the PC is at offset 21 in the buffer. */ |
| 99 | #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE |
| 100 | #define ARM_LINUX_JB_PC_FPA 21 |
| 101 | #define ARM_LINUX_JB_PC_EABI 9 |
| 102 | |
| 103 | /* |
| 104 | Dynamic Linking on ARM GNU/Linux |
| 105 | -------------------------------- |
| 106 | |
| 107 | Note: PLT = procedure linkage table |
| 108 | GOT = global offset table |
| 109 | |
| 110 | As much as possible, ELF dynamic linking defers the resolution of |
| 111 | jump/call addresses until the last minute. The technique used is |
| 112 | inspired by the i386 ELF design, and is based on the following |
| 113 | constraints. |
| 114 | |
| 115 | 1) The calling technique should not force a change in the assembly |
| 116 | code produced for apps; it MAY cause changes in the way assembly |
| 117 | code is produced for position independent code (i.e. shared |
| 118 | libraries). |
| 119 | |
| 120 | 2) The technique must be such that all executable areas must not be |
| 121 | modified; and any modified areas must not be executed. |
| 122 | |
| 123 | To do this, there are three steps involved in a typical jump: |
| 124 | |
| 125 | 1) in the code |
| 126 | 2) through the PLT |
| 127 | 3) using a pointer from the GOT |
| 128 | |
| 129 | When the executable or library is first loaded, each GOT entry is |
| 130 | initialized to point to the code which implements dynamic name |
| 131 | resolution and code finding. This is normally a function in the |
| 132 | program interpreter (on ARM GNU/Linux this is usually |
| 133 | ld-linux.so.2, but it does not have to be). On the first |
| 134 | invocation, the function is located and the GOT entry is replaced |
| 135 | with the real function address. Subsequent calls go through steps |
| 136 | 1, 2 and 3 and end up calling the real code. |
| 137 | |
| 138 | 1) In the code: |
| 139 | |
| 140 | b function_call |
| 141 | bl function_call |
| 142 | |
| 143 | This is typical ARM code using the 26 bit relative branch or branch |
| 144 | and link instructions. The target of the instruction |
| 145 | (function_call is usually the address of the function to be called. |
| 146 | In position independent code, the target of the instruction is |
| 147 | actually an entry in the PLT when calling functions in a shared |
| 148 | library. Note that this call is identical to a normal function |
| 149 | call, only the target differs. |
| 150 | |
| 151 | 2) In the PLT: |
| 152 | |
| 153 | The PLT is a synthetic area, created by the linker. It exists in |
| 154 | both executables and libraries. It is an array of stubs, one per |
| 155 | imported function call. It looks like this: |
| 156 | |
| 157 | PLT[0]: |
| 158 | str lr, [sp, #-4]! @push the return address (lr) |
| 159 | ldr lr, [pc, #16] @load from 6 words ahead |
| 160 | add lr, pc, lr @form an address for GOT[0] |
| 161 | ldr pc, [lr, #8]! @jump to the contents of that addr |
| 162 | |
| 163 | The return address (lr) is pushed on the stack and used for |
| 164 | calculations. The load on the second line loads the lr with |
| 165 | &GOT[3] - . - 20. The addition on the third leaves: |
| 166 | |
| 167 | lr = (&GOT[3] - . - 20) + (. + 8) |
| 168 | lr = (&GOT[3] - 12) |
| 169 | lr = &GOT[0] |
| 170 | |
| 171 | On the fourth line, the pc and lr are both updated, so that: |
| 172 | |
| 173 | pc = GOT[2] |
| 174 | lr = &GOT[0] + 8 |
| 175 | = &GOT[2] |
| 176 | |
| 177 | NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little |
| 178 | "tight", but allows us to keep all the PLT entries the same size. |
| 179 | |
| 180 | PLT[n+1]: |
| 181 | ldr ip, [pc, #4] @load offset from gotoff |
| 182 | add ip, pc, ip @add the offset to the pc |
| 183 | ldr pc, [ip] @jump to that address |
| 184 | gotoff: .word GOT[n+3] - . |
| 185 | |
| 186 | The load on the first line, gets an offset from the fourth word of |
| 187 | the PLT entry. The add on the second line makes ip = &GOT[n+3], |
| 188 | which contains either a pointer to PLT[0] (the fixup trampoline) or |
| 189 | a pointer to the actual code. |
| 190 | |
| 191 | 3) In the GOT: |
| 192 | |
| 193 | The GOT contains helper pointers for both code (PLT) fixups and |
| 194 | data fixups. The first 3 entries of the GOT are special. The next |
| 195 | M entries (where M is the number of entries in the PLT) belong to |
| 196 | the PLT fixups. The next D (all remaining) entries belong to |
| 197 | various data fixups. The actual size of the GOT is 3 + M + D. |
| 198 | |
| 199 | The GOT is also a synthetic area, created by the linker. It exists |
| 200 | in both executables and libraries. When the GOT is first |
| 201 | initialized , all the GOT entries relating to PLT fixups are |
| 202 | pointing to code back at PLT[0]. |
| 203 | |
| 204 | The special entries in the GOT are: |
| 205 | |
| 206 | GOT[0] = linked list pointer used by the dynamic loader |
| 207 | GOT[1] = pointer to the reloc table for this module |
| 208 | GOT[2] = pointer to the fixup/resolver code |
| 209 | |
| 210 | The first invocation of function call comes through and uses the |
| 211 | fixup/resolver code. On the entry to the fixup/resolver code: |
| 212 | |
| 213 | ip = &GOT[n+3] |
| 214 | lr = &GOT[2] |
| 215 | stack[0] = return address (lr) of the function call |
| 216 | [r0, r1, r2, r3] are still the arguments to the function call |
| 217 | |
| 218 | This is enough information for the fixup/resolver code to work |
| 219 | with. Before the fixup/resolver code returns, it actually calls |
| 220 | the requested function and repairs &GOT[n+3]. */ |
| 221 | |
| 222 | /* The constants below were determined by examining the following files |
| 223 | in the linux kernel sources: |
| 224 | |
| 225 | arch/arm/kernel/signal.c |
| 226 | - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN |
| 227 | include/asm-arm/unistd.h |
| 228 | - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */ |
| 229 | |
| 230 | #define ARM_LINUX_SIGRETURN_INSTR 0xef900077 |
| 231 | #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad |
| 232 | |
| 233 | /* For ARM EABI, the syscall number is not in the SWI instruction |
| 234 | (instead it is loaded into r7). We recognize the pattern that |
| 235 | glibc uses... alternatively, we could arrange to do this by |
| 236 | function name, but they are not always exported. */ |
| 237 | #define ARM_SET_R7_SIGRETURN 0xe3a07077 |
| 238 | #define ARM_SET_R7_RT_SIGRETURN 0xe3a070ad |
| 239 | #define ARM_EABI_SYSCALL 0xef000000 |
| 240 | |
| 241 | /* OABI syscall restart trampoline, used for EABI executables too |
| 242 | whenever OABI support has been enabled in the kernel. */ |
| 243 | #define ARM_OABI_SYSCALL_RESTART_SYSCALL 0xef900000 |
| 244 | #define ARM_LDR_PC_SP_12 0xe49df00c |
| 245 | #define ARM_LDR_PC_SP_4 0xe49df004 |
| 246 | |
| 247 | static void |
| 248 | arm_linux_sigtramp_cache (struct frame_info *this_frame, |
| 249 | struct trad_frame_cache *this_cache, |
| 250 | CORE_ADDR func, int regs_offset) |
| 251 | { |
| 252 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
| 253 | CORE_ADDR base = sp + regs_offset; |
| 254 | int i; |
| 255 | |
| 256 | for (i = 0; i < 16; i++) |
| 257 | trad_frame_set_reg_addr (this_cache, i, base + i * 4); |
| 258 | |
| 259 | trad_frame_set_reg_addr (this_cache, ARM_PS_REGNUM, base + 16 * 4); |
| 260 | |
| 261 | /* The VFP or iWMMXt registers may be saved on the stack, but there's |
| 262 | no reliable way to restore them (yet). */ |
| 263 | |
| 264 | /* Save a frame ID. */ |
| 265 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); |
| 266 | } |
| 267 | |
| 268 | /* There are a couple of different possible stack layouts that |
| 269 | we need to support. |
| 270 | |
| 271 | Before version 2.6.18, the kernel used completely independent |
| 272 | layouts for non-RT and RT signals. For non-RT signals the stack |
| 273 | began directly with a struct sigcontext. For RT signals the stack |
| 274 | began with two redundant pointers (to the siginfo and ucontext), |
| 275 | and then the siginfo and ucontext. |
| 276 | |
| 277 | As of version 2.6.18, the non-RT signal frame layout starts with |
| 278 | a ucontext and the RT signal frame starts with a siginfo and then |
| 279 | a ucontext. Also, the ucontext now has a designated save area |
| 280 | for coprocessor registers. |
| 281 | |
| 282 | For RT signals, it's easy to tell the difference: we look for |
| 283 | pinfo, the pointer to the siginfo. If it has the expected |
| 284 | value, we have an old layout. If it doesn't, we have the new |
| 285 | layout. |
| 286 | |
| 287 | For non-RT signals, it's a bit harder. We need something in one |
| 288 | layout or the other with a recognizable offset and value. We can't |
| 289 | use the return trampoline, because ARM usually uses SA_RESTORER, |
| 290 | in which case the stack return trampoline is not filled in. |
| 291 | We can't use the saved stack pointer, because sigaltstack might |
| 292 | be in use. So for now we guess the new layout... */ |
| 293 | |
| 294 | /* There are three words (trap_no, error_code, oldmask) in |
| 295 | struct sigcontext before r0. */ |
| 296 | #define ARM_SIGCONTEXT_R0 0xc |
| 297 | |
| 298 | /* There are five words (uc_flags, uc_link, and three for uc_stack) |
| 299 | in the ucontext_t before the sigcontext. */ |
| 300 | #define ARM_UCONTEXT_SIGCONTEXT 0x14 |
| 301 | |
| 302 | /* There are three elements in an rt_sigframe before the ucontext: |
| 303 | pinfo, puc, and info. The first two are pointers and the third |
| 304 | is a struct siginfo, with size 128 bytes. We could follow puc |
| 305 | to the ucontext, but it's simpler to skip the whole thing. */ |
| 306 | #define ARM_OLD_RT_SIGFRAME_SIGINFO 0x8 |
| 307 | #define ARM_OLD_RT_SIGFRAME_UCONTEXT 0x88 |
| 308 | |
| 309 | #define ARM_NEW_RT_SIGFRAME_UCONTEXT 0x80 |
| 310 | |
| 311 | #define ARM_NEW_SIGFRAME_MAGIC 0x5ac3c35a |
| 312 | |
| 313 | static void |
| 314 | arm_linux_sigreturn_init (const struct tramp_frame *self, |
| 315 | struct frame_info *this_frame, |
| 316 | struct trad_frame_cache *this_cache, |
| 317 | CORE_ADDR func) |
| 318 | { |
| 319 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 320 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 321 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
| 322 | ULONGEST uc_flags = read_memory_unsigned_integer (sp, 4, byte_order); |
| 323 | |
| 324 | if (uc_flags == ARM_NEW_SIGFRAME_MAGIC) |
| 325 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
| 326 | ARM_UCONTEXT_SIGCONTEXT |
| 327 | + ARM_SIGCONTEXT_R0); |
| 328 | else |
| 329 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
| 330 | ARM_SIGCONTEXT_R0); |
| 331 | } |
| 332 | |
| 333 | static void |
| 334 | arm_linux_rt_sigreturn_init (const struct tramp_frame *self, |
| 335 | struct frame_info *this_frame, |
| 336 | struct trad_frame_cache *this_cache, |
| 337 | CORE_ADDR func) |
| 338 | { |
| 339 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 340 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 341 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
| 342 | ULONGEST pinfo = read_memory_unsigned_integer (sp, 4, byte_order); |
| 343 | |
| 344 | if (pinfo == sp + ARM_OLD_RT_SIGFRAME_SIGINFO) |
| 345 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
| 346 | ARM_OLD_RT_SIGFRAME_UCONTEXT |
| 347 | + ARM_UCONTEXT_SIGCONTEXT |
| 348 | + ARM_SIGCONTEXT_R0); |
| 349 | else |
| 350 | arm_linux_sigtramp_cache (this_frame, this_cache, func, |
| 351 | ARM_NEW_RT_SIGFRAME_UCONTEXT |
| 352 | + ARM_UCONTEXT_SIGCONTEXT |
| 353 | + ARM_SIGCONTEXT_R0); |
| 354 | } |
| 355 | |
| 356 | static void |
| 357 | arm_linux_restart_syscall_init (const struct tramp_frame *self, |
| 358 | struct frame_info *this_frame, |
| 359 | struct trad_frame_cache *this_cache, |
| 360 | CORE_ADDR func) |
| 361 | { |
| 362 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 363 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, ARM_SP_REGNUM); |
| 364 | CORE_ADDR pc = get_frame_memory_unsigned (this_frame, sp, 4); |
| 365 | CORE_ADDR cpsr = get_frame_register_unsigned (this_frame, ARM_PS_REGNUM); |
| 366 | ULONGEST t_bit = arm_psr_thumb_bit (gdbarch); |
| 367 | int sp_offset; |
| 368 | |
| 369 | /* There are two variants of this trampoline; with older kernels, the |
| 370 | stub is placed on the stack, while newer kernels use the stub from |
| 371 | the vector page. They are identical except that the older version |
| 372 | increments SP by 12 (to skip stored PC and the stub itself), while |
| 373 | the newer version increments SP only by 4 (just the stored PC). */ |
| 374 | if (self->insn[1].bytes == ARM_LDR_PC_SP_4) |
| 375 | sp_offset = 4; |
| 376 | else |
| 377 | sp_offset = 12; |
| 378 | |
| 379 | /* Update Thumb bit in CPSR. */ |
| 380 | if (pc & 1) |
| 381 | cpsr |= t_bit; |
| 382 | else |
| 383 | cpsr &= ~t_bit; |
| 384 | |
| 385 | /* Remove Thumb bit from PC. */ |
| 386 | pc = gdbarch_addr_bits_remove (gdbarch, pc); |
| 387 | |
| 388 | /* Save previous register values. */ |
| 389 | trad_frame_set_reg_value (this_cache, ARM_SP_REGNUM, sp + sp_offset); |
| 390 | trad_frame_set_reg_value (this_cache, ARM_PC_REGNUM, pc); |
| 391 | trad_frame_set_reg_value (this_cache, ARM_PS_REGNUM, cpsr); |
| 392 | |
| 393 | /* Save a frame ID. */ |
| 394 | trad_frame_set_id (this_cache, frame_id_build (sp, func)); |
| 395 | } |
| 396 | |
| 397 | static struct tramp_frame arm_linux_sigreturn_tramp_frame = { |
| 398 | SIGTRAMP_FRAME, |
| 399 | 4, |
| 400 | { |
| 401 | { ARM_LINUX_SIGRETURN_INSTR, -1 }, |
| 402 | { TRAMP_SENTINEL_INSN } |
| 403 | }, |
| 404 | arm_linux_sigreturn_init |
| 405 | }; |
| 406 | |
| 407 | static struct tramp_frame arm_linux_rt_sigreturn_tramp_frame = { |
| 408 | SIGTRAMP_FRAME, |
| 409 | 4, |
| 410 | { |
| 411 | { ARM_LINUX_RT_SIGRETURN_INSTR, -1 }, |
| 412 | { TRAMP_SENTINEL_INSN } |
| 413 | }, |
| 414 | arm_linux_rt_sigreturn_init |
| 415 | }; |
| 416 | |
| 417 | static struct tramp_frame arm_eabi_linux_sigreturn_tramp_frame = { |
| 418 | SIGTRAMP_FRAME, |
| 419 | 4, |
| 420 | { |
| 421 | { ARM_SET_R7_SIGRETURN, -1 }, |
| 422 | { ARM_EABI_SYSCALL, -1 }, |
| 423 | { TRAMP_SENTINEL_INSN } |
| 424 | }, |
| 425 | arm_linux_sigreturn_init |
| 426 | }; |
| 427 | |
| 428 | static struct tramp_frame arm_eabi_linux_rt_sigreturn_tramp_frame = { |
| 429 | SIGTRAMP_FRAME, |
| 430 | 4, |
| 431 | { |
| 432 | { ARM_SET_R7_RT_SIGRETURN, -1 }, |
| 433 | { ARM_EABI_SYSCALL, -1 }, |
| 434 | { TRAMP_SENTINEL_INSN } |
| 435 | }, |
| 436 | arm_linux_rt_sigreturn_init |
| 437 | }; |
| 438 | |
| 439 | static struct tramp_frame arm_linux_restart_syscall_tramp_frame = { |
| 440 | NORMAL_FRAME, |
| 441 | 4, |
| 442 | { |
| 443 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, |
| 444 | { ARM_LDR_PC_SP_12, -1 }, |
| 445 | { TRAMP_SENTINEL_INSN } |
| 446 | }, |
| 447 | arm_linux_restart_syscall_init |
| 448 | }; |
| 449 | |
| 450 | static struct tramp_frame arm_kernel_linux_restart_syscall_tramp_frame = { |
| 451 | NORMAL_FRAME, |
| 452 | 4, |
| 453 | { |
| 454 | { ARM_OABI_SYSCALL_RESTART_SYSCALL, -1 }, |
| 455 | { ARM_LDR_PC_SP_4, -1 }, |
| 456 | { TRAMP_SENTINEL_INSN } |
| 457 | }, |
| 458 | arm_linux_restart_syscall_init |
| 459 | }; |
| 460 | |
| 461 | /* Core file and register set support. */ |
| 462 | |
| 463 | #define ARM_LINUX_SIZEOF_GREGSET (18 * INT_REGISTER_SIZE) |
| 464 | |
| 465 | void |
| 466 | arm_linux_supply_gregset (const struct regset *regset, |
| 467 | struct regcache *regcache, |
| 468 | int regnum, const void *gregs_buf, size_t len) |
| 469 | { |
| 470 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
| 471 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 472 | const gdb_byte *gregs = gregs_buf; |
| 473 | int regno; |
| 474 | CORE_ADDR reg_pc; |
| 475 | gdb_byte pc_buf[INT_REGISTER_SIZE]; |
| 476 | |
| 477 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) |
| 478 | if (regnum == -1 || regnum == regno) |
| 479 | regcache_raw_supply (regcache, regno, |
| 480 | gregs + INT_REGISTER_SIZE * regno); |
| 481 | |
| 482 | if (regnum == ARM_PS_REGNUM || regnum == -1) |
| 483 | { |
| 484 | if (arm_apcs_32) |
| 485 | regcache_raw_supply (regcache, ARM_PS_REGNUM, |
| 486 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
| 487 | else |
| 488 | regcache_raw_supply (regcache, ARM_PS_REGNUM, |
| 489 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); |
| 490 | } |
| 491 | |
| 492 | if (regnum == ARM_PC_REGNUM || regnum == -1) |
| 493 | { |
| 494 | reg_pc = extract_unsigned_integer (gregs |
| 495 | + INT_REGISTER_SIZE * ARM_PC_REGNUM, |
| 496 | INT_REGISTER_SIZE, byte_order); |
| 497 | reg_pc = gdbarch_addr_bits_remove (gdbarch, reg_pc); |
| 498 | store_unsigned_integer (pc_buf, INT_REGISTER_SIZE, byte_order, reg_pc); |
| 499 | regcache_raw_supply (regcache, ARM_PC_REGNUM, pc_buf); |
| 500 | } |
| 501 | } |
| 502 | |
| 503 | void |
| 504 | arm_linux_collect_gregset (const struct regset *regset, |
| 505 | const struct regcache *regcache, |
| 506 | int regnum, void *gregs_buf, size_t len) |
| 507 | { |
| 508 | gdb_byte *gregs = gregs_buf; |
| 509 | int regno; |
| 510 | |
| 511 | for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++) |
| 512 | if (regnum == -1 || regnum == regno) |
| 513 | regcache_raw_collect (regcache, regno, |
| 514 | gregs + INT_REGISTER_SIZE * regno); |
| 515 | |
| 516 | if (regnum == ARM_PS_REGNUM || regnum == -1) |
| 517 | { |
| 518 | if (arm_apcs_32) |
| 519 | regcache_raw_collect (regcache, ARM_PS_REGNUM, |
| 520 | gregs + INT_REGISTER_SIZE * ARM_CPSR_GREGNUM); |
| 521 | else |
| 522 | regcache_raw_collect (regcache, ARM_PS_REGNUM, |
| 523 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); |
| 524 | } |
| 525 | |
| 526 | if (regnum == ARM_PC_REGNUM || regnum == -1) |
| 527 | regcache_raw_collect (regcache, ARM_PC_REGNUM, |
| 528 | gregs + INT_REGISTER_SIZE * ARM_PC_REGNUM); |
| 529 | } |
| 530 | |
| 531 | /* Support for register format used by the NWFPE FPA emulator. */ |
| 532 | |
| 533 | #define typeNone 0x00 |
| 534 | #define typeSingle 0x01 |
| 535 | #define typeDouble 0x02 |
| 536 | #define typeExtended 0x03 |
| 537 | |
| 538 | void |
| 539 | supply_nwfpe_register (struct regcache *regcache, int regno, |
| 540 | const gdb_byte *regs) |
| 541 | { |
| 542 | const gdb_byte *reg_data; |
| 543 | gdb_byte reg_tag; |
| 544 | gdb_byte buf[FP_REGISTER_SIZE]; |
| 545 | |
| 546 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; |
| 547 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; |
| 548 | memset (buf, 0, FP_REGISTER_SIZE); |
| 549 | |
| 550 | switch (reg_tag) |
| 551 | { |
| 552 | case typeSingle: |
| 553 | memcpy (buf, reg_data, 4); |
| 554 | break; |
| 555 | case typeDouble: |
| 556 | memcpy (buf, reg_data + 4, 4); |
| 557 | memcpy (buf + 4, reg_data, 4); |
| 558 | break; |
| 559 | case typeExtended: |
| 560 | /* We want sign and exponent, then least significant bits, |
| 561 | then most significant. NWFPE does sign, most, least. */ |
| 562 | memcpy (buf, reg_data, 4); |
| 563 | memcpy (buf + 4, reg_data + 8, 4); |
| 564 | memcpy (buf + 8, reg_data + 4, 4); |
| 565 | break; |
| 566 | default: |
| 567 | break; |
| 568 | } |
| 569 | |
| 570 | regcache_raw_supply (regcache, regno, buf); |
| 571 | } |
| 572 | |
| 573 | void |
| 574 | collect_nwfpe_register (const struct regcache *regcache, int regno, |
| 575 | gdb_byte *regs) |
| 576 | { |
| 577 | gdb_byte *reg_data; |
| 578 | gdb_byte reg_tag; |
| 579 | gdb_byte buf[FP_REGISTER_SIZE]; |
| 580 | |
| 581 | regcache_raw_collect (regcache, regno, buf); |
| 582 | |
| 583 | /* NOTE drow/2006-06-07: This code uses the tag already in the |
| 584 | register buffer. I've preserved that when moving the code |
| 585 | from the native file to the target file. But this doesn't |
| 586 | always make sense. */ |
| 587 | |
| 588 | reg_data = regs + (regno - ARM_F0_REGNUM) * FP_REGISTER_SIZE; |
| 589 | reg_tag = regs[(regno - ARM_F0_REGNUM) + NWFPE_TAGS_OFFSET]; |
| 590 | |
| 591 | switch (reg_tag) |
| 592 | { |
| 593 | case typeSingle: |
| 594 | memcpy (reg_data, buf, 4); |
| 595 | break; |
| 596 | case typeDouble: |
| 597 | memcpy (reg_data, buf + 4, 4); |
| 598 | memcpy (reg_data + 4, buf, 4); |
| 599 | break; |
| 600 | case typeExtended: |
| 601 | memcpy (reg_data, buf, 4); |
| 602 | memcpy (reg_data + 4, buf + 8, 4); |
| 603 | memcpy (reg_data + 8, buf + 4, 4); |
| 604 | break; |
| 605 | default: |
| 606 | break; |
| 607 | } |
| 608 | } |
| 609 | |
| 610 | void |
| 611 | arm_linux_supply_nwfpe (const struct regset *regset, |
| 612 | struct regcache *regcache, |
| 613 | int regnum, const void *regs_buf, size_t len) |
| 614 | { |
| 615 | const gdb_byte *regs = regs_buf; |
| 616 | int regno; |
| 617 | |
| 618 | if (regnum == ARM_FPS_REGNUM || regnum == -1) |
| 619 | regcache_raw_supply (regcache, ARM_FPS_REGNUM, |
| 620 | regs + NWFPE_FPSR_OFFSET); |
| 621 | |
| 622 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
| 623 | if (regnum == -1 || regnum == regno) |
| 624 | supply_nwfpe_register (regcache, regno, regs); |
| 625 | } |
| 626 | |
| 627 | void |
| 628 | arm_linux_collect_nwfpe (const struct regset *regset, |
| 629 | const struct regcache *regcache, |
| 630 | int regnum, void *regs_buf, size_t len) |
| 631 | { |
| 632 | gdb_byte *regs = regs_buf; |
| 633 | int regno; |
| 634 | |
| 635 | for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++) |
| 636 | if (regnum == -1 || regnum == regno) |
| 637 | collect_nwfpe_register (regcache, regno, regs); |
| 638 | |
| 639 | if (regnum == ARM_FPS_REGNUM || regnum == -1) |
| 640 | regcache_raw_collect (regcache, ARM_FPS_REGNUM, |
| 641 | regs + INT_REGISTER_SIZE * ARM_FPS_REGNUM); |
| 642 | } |
| 643 | |
| 644 | /* Support VFP register format. */ |
| 645 | |
| 646 | #define ARM_LINUX_SIZEOF_VFP (32 * 8 + 4) |
| 647 | |
| 648 | static void |
| 649 | arm_linux_supply_vfp (const struct regset *regset, |
| 650 | struct regcache *regcache, |
| 651 | int regnum, const void *regs_buf, size_t len) |
| 652 | { |
| 653 | const gdb_byte *regs = regs_buf; |
| 654 | int regno; |
| 655 | |
| 656 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) |
| 657 | regcache_raw_supply (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); |
| 658 | |
| 659 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) |
| 660 | if (regnum == -1 || regnum == regno) |
| 661 | regcache_raw_supply (regcache, regno, |
| 662 | regs + (regno - ARM_D0_REGNUM) * 8); |
| 663 | } |
| 664 | |
| 665 | static void |
| 666 | arm_linux_collect_vfp (const struct regset *regset, |
| 667 | const struct regcache *regcache, |
| 668 | int regnum, void *regs_buf, size_t len) |
| 669 | { |
| 670 | gdb_byte *regs = regs_buf; |
| 671 | int regno; |
| 672 | |
| 673 | if (regnum == ARM_FPSCR_REGNUM || regnum == -1) |
| 674 | regcache_raw_collect (regcache, ARM_FPSCR_REGNUM, regs + 32 * 8); |
| 675 | |
| 676 | for (regno = ARM_D0_REGNUM; regno <= ARM_D31_REGNUM; regno++) |
| 677 | if (regnum == -1 || regnum == regno) |
| 678 | regcache_raw_collect (regcache, regno, |
| 679 | regs + (regno - ARM_D0_REGNUM) * 8); |
| 680 | } |
| 681 | |
| 682 | /* Return the appropriate register set for the core section identified |
| 683 | by SECT_NAME and SECT_SIZE. */ |
| 684 | |
| 685 | static const struct regset * |
| 686 | arm_linux_regset_from_core_section (struct gdbarch *gdbarch, |
| 687 | const char *sect_name, size_t sect_size) |
| 688 | { |
| 689 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 690 | |
| 691 | if (strcmp (sect_name, ".reg") == 0 |
| 692 | && sect_size == ARM_LINUX_SIZEOF_GREGSET) |
| 693 | { |
| 694 | if (tdep->gregset == NULL) |
| 695 | tdep->gregset = regset_alloc (gdbarch, arm_linux_supply_gregset, |
| 696 | arm_linux_collect_gregset); |
| 697 | return tdep->gregset; |
| 698 | } |
| 699 | |
| 700 | if (strcmp (sect_name, ".reg2") == 0 |
| 701 | && sect_size == ARM_LINUX_SIZEOF_NWFPE) |
| 702 | { |
| 703 | if (tdep->fpregset == NULL) |
| 704 | tdep->fpregset = regset_alloc (gdbarch, arm_linux_supply_nwfpe, |
| 705 | arm_linux_collect_nwfpe); |
| 706 | return tdep->fpregset; |
| 707 | } |
| 708 | |
| 709 | if (strcmp (sect_name, ".reg-arm-vfp") == 0 |
| 710 | && sect_size == ARM_LINUX_SIZEOF_VFP) |
| 711 | { |
| 712 | if (tdep->vfpregset == NULL) |
| 713 | tdep->vfpregset = regset_alloc (gdbarch, arm_linux_supply_vfp, |
| 714 | arm_linux_collect_vfp); |
| 715 | return tdep->vfpregset; |
| 716 | } |
| 717 | |
| 718 | return NULL; |
| 719 | } |
| 720 | |
| 721 | /* Core file register set sections. */ |
| 722 | |
| 723 | static struct core_regset_section arm_linux_fpa_regset_sections[] = |
| 724 | { |
| 725 | { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" }, |
| 726 | { ".reg2", ARM_LINUX_SIZEOF_NWFPE, "FPA floating-point" }, |
| 727 | { NULL, 0} |
| 728 | }; |
| 729 | |
| 730 | static struct core_regset_section arm_linux_vfp_regset_sections[] = |
| 731 | { |
| 732 | { ".reg", ARM_LINUX_SIZEOF_GREGSET, "general-purpose" }, |
| 733 | { ".reg-arm-vfp", ARM_LINUX_SIZEOF_VFP, "VFP floating-point" }, |
| 734 | { NULL, 0} |
| 735 | }; |
| 736 | |
| 737 | /* Determine target description from core file. */ |
| 738 | |
| 739 | static const struct target_desc * |
| 740 | arm_linux_core_read_description (struct gdbarch *gdbarch, |
| 741 | struct target_ops *target, |
| 742 | bfd *abfd) |
| 743 | { |
| 744 | CORE_ADDR arm_hwcap = 0; |
| 745 | |
| 746 | if (target_auxv_search (target, AT_HWCAP, &arm_hwcap) != 1) |
| 747 | return NULL; |
| 748 | |
| 749 | if (arm_hwcap & HWCAP_VFP) |
| 750 | { |
| 751 | /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support |
| 752 | Neon with VFPv3-D32. */ |
| 753 | if (arm_hwcap & HWCAP_NEON) |
| 754 | return tdesc_arm_with_neon; |
| 755 | else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3) |
| 756 | return tdesc_arm_with_vfpv3; |
| 757 | else |
| 758 | return tdesc_arm_with_vfpv2; |
| 759 | } |
| 760 | |
| 761 | return NULL; |
| 762 | } |
| 763 | |
| 764 | |
| 765 | /* Copy the value of next pc of sigreturn and rt_sigrturn into PC, |
| 766 | return 1. In addition, set IS_THUMB depending on whether we |
| 767 | will return to ARM or Thumb code. Return 0 if it is not a |
| 768 | rt_sigreturn/sigreturn syscall. */ |
| 769 | static int |
| 770 | arm_linux_sigreturn_return_addr (struct frame_info *frame, |
| 771 | unsigned long svc_number, |
| 772 | CORE_ADDR *pc, int *is_thumb) |
| 773 | { |
| 774 | /* Is this a sigreturn or rt_sigreturn syscall? */ |
| 775 | if (svc_number == 119 || svc_number == 173) |
| 776 | { |
| 777 | if (get_frame_type (frame) == SIGTRAMP_FRAME) |
| 778 | { |
| 779 | ULONGEST t_bit = arm_psr_thumb_bit (frame_unwind_arch (frame)); |
| 780 | CORE_ADDR cpsr |
| 781 | = frame_unwind_register_unsigned (frame, ARM_PS_REGNUM); |
| 782 | |
| 783 | *is_thumb = (cpsr & t_bit) != 0; |
| 784 | *pc = frame_unwind_caller_pc (frame); |
| 785 | return 1; |
| 786 | } |
| 787 | } |
| 788 | return 0; |
| 789 | } |
| 790 | |
| 791 | /* When FRAME is at a syscall instruction, return the PC of the next |
| 792 | instruction to be executed. */ |
| 793 | |
| 794 | static CORE_ADDR |
| 795 | arm_linux_syscall_next_pc (struct frame_info *frame) |
| 796 | { |
| 797 | CORE_ADDR pc = get_frame_pc (frame); |
| 798 | CORE_ADDR return_addr = 0; |
| 799 | int is_thumb = arm_frame_is_thumb (frame); |
| 800 | ULONGEST svc_number = 0; |
| 801 | |
| 802 | if (is_thumb) |
| 803 | { |
| 804 | svc_number = get_frame_register_unsigned (frame, 7); |
| 805 | return_addr = pc + 2; |
| 806 | } |
| 807 | else |
| 808 | { |
| 809 | struct gdbarch *gdbarch = get_frame_arch (frame); |
| 810 | enum bfd_endian byte_order_for_code = |
| 811 | gdbarch_byte_order_for_code (gdbarch); |
| 812 | unsigned long this_instr = |
| 813 | read_memory_unsigned_integer (pc, 4, byte_order_for_code); |
| 814 | |
| 815 | unsigned long svc_operand = (0x00ffffff & this_instr); |
| 816 | if (svc_operand) /* OABI. */ |
| 817 | { |
| 818 | svc_number = svc_operand - 0x900000; |
| 819 | } |
| 820 | else /* EABI. */ |
| 821 | { |
| 822 | svc_number = get_frame_register_unsigned (frame, 7); |
| 823 | } |
| 824 | |
| 825 | return_addr = pc + 4; |
| 826 | } |
| 827 | |
| 828 | arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb); |
| 829 | |
| 830 | /* Addresses for calling Thumb functions have the bit 0 set. */ |
| 831 | if (is_thumb) |
| 832 | return_addr |= 1; |
| 833 | |
| 834 | return return_addr; |
| 835 | } |
| 836 | |
| 837 | |
| 838 | /* Insert a single step breakpoint at the next executed instruction. */ |
| 839 | |
| 840 | static int |
| 841 | arm_linux_software_single_step (struct frame_info *frame) |
| 842 | { |
| 843 | struct gdbarch *gdbarch = get_frame_arch (frame); |
| 844 | struct address_space *aspace = get_frame_address_space (frame); |
| 845 | CORE_ADDR next_pc; |
| 846 | |
| 847 | if (arm_deal_with_atomic_sequence (frame)) |
| 848 | return 1; |
| 849 | |
| 850 | next_pc = arm_get_next_pc (frame, get_frame_pc (frame)); |
| 851 | |
| 852 | /* The Linux kernel offers some user-mode helpers in a high page. We can |
| 853 | not read this page (as of 2.6.23), and even if we could then we couldn't |
| 854 | set breakpoints in it, and even if we could then the atomic operations |
| 855 | would fail when interrupted. They are all called as functions and return |
| 856 | to the address in LR, so step to there instead. */ |
| 857 | if (next_pc > 0xffff0000) |
| 858 | next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM); |
| 859 | |
| 860 | arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc); |
| 861 | |
| 862 | return 1; |
| 863 | } |
| 864 | |
| 865 | /* Support for displaced stepping of Linux SVC instructions. */ |
| 866 | |
| 867 | static void |
| 868 | arm_linux_cleanup_svc (struct gdbarch *gdbarch, |
| 869 | struct regcache *regs, |
| 870 | struct displaced_step_closure *dsc) |
| 871 | { |
| 872 | CORE_ADDR from = dsc->insn_addr; |
| 873 | ULONGEST apparent_pc; |
| 874 | int within_scratch; |
| 875 | |
| 876 | regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc); |
| 877 | |
| 878 | within_scratch = (apparent_pc >= dsc->scratch_base |
| 879 | && apparent_pc < (dsc->scratch_base |
| 880 | + DISPLACED_MODIFIED_INSNS * 4 + 4)); |
| 881 | |
| 882 | if (debug_displaced) |
| 883 | { |
| 884 | fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after " |
| 885 | "SVC step ", (unsigned long) apparent_pc); |
| 886 | if (within_scratch) |
| 887 | fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n"); |
| 888 | else |
| 889 | fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n"); |
| 890 | } |
| 891 | |
| 892 | if (within_scratch) |
| 893 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC); |
| 894 | } |
| 895 | |
| 896 | static int |
| 897 | arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs, |
| 898 | struct displaced_step_closure *dsc) |
| 899 | { |
| 900 | CORE_ADDR return_to = 0; |
| 901 | |
| 902 | struct frame_info *frame; |
| 903 | unsigned int svc_number = displaced_read_reg (regs, dsc, 7); |
| 904 | int is_sigreturn = 0; |
| 905 | int is_thumb; |
| 906 | |
| 907 | frame = get_current_frame (); |
| 908 | |
| 909 | is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number, |
| 910 | &return_to, &is_thumb); |
| 911 | if (is_sigreturn) |
| 912 | { |
| 913 | struct symtab_and_line sal; |
| 914 | |
| 915 | if (debug_displaced) |
| 916 | fprintf_unfiltered (gdb_stdlog, "displaced: found " |
| 917 | "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n", |
| 918 | (unsigned long) get_frame_pc (frame)); |
| 919 | |
| 920 | if (debug_displaced) |
| 921 | fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. " |
| 922 | "Setting momentary breakpoint.\n", (unsigned long) return_to); |
| 923 | |
| 924 | gdb_assert (inferior_thread ()->control.step_resume_breakpoint |
| 925 | == NULL); |
| 926 | |
| 927 | sal = find_pc_line (return_to, 0); |
| 928 | sal.pc = return_to; |
| 929 | sal.section = find_pc_overlay (return_to); |
| 930 | sal.explicit_pc = 1; |
| 931 | |
| 932 | frame = get_prev_frame (frame); |
| 933 | |
| 934 | if (frame) |
| 935 | { |
| 936 | inferior_thread ()->control.step_resume_breakpoint |
| 937 | = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame), |
| 938 | bp_step_resume); |
| 939 | |
| 940 | /* set_momentary_breakpoint invalidates FRAME. */ |
| 941 | frame = NULL; |
| 942 | |
| 943 | /* We need to make sure we actually insert the momentary |
| 944 | breakpoint set above. */ |
| 945 | insert_breakpoints (); |
| 946 | } |
| 947 | else if (debug_displaced) |
| 948 | fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous " |
| 949 | "frame to set momentary breakpoint for " |
| 950 | "sigreturn/rt_sigreturn\n"); |
| 951 | } |
| 952 | else if (debug_displaced) |
| 953 | fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn " |
| 954 | "SVC call not in signal trampoline frame\n"); |
| 955 | |
| 956 | |
| 957 | /* Preparation: If we detect sigreturn, set momentary breakpoint at resume |
| 958 | location, else nothing. |
| 959 | Insn: unmodified svc. |
| 960 | Cleanup: if pc lands in scratch space, pc <- insn_addr + 4 |
| 961 | else leave pc alone. */ |
| 962 | |
| 963 | |
| 964 | dsc->cleanup = &arm_linux_cleanup_svc; |
| 965 | /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next |
| 966 | instruction. */ |
| 967 | dsc->wrote_to_pc = 1; |
| 968 | |
| 969 | return 0; |
| 970 | } |
| 971 | |
| 972 | |
| 973 | /* The following two functions implement single-stepping over calls to Linux |
| 974 | kernel helper routines, which perform e.g. atomic operations on architecture |
| 975 | variants which don't support them natively. |
| 976 | |
| 977 | When this function is called, the PC will be pointing at the kernel helper |
| 978 | (at an address inaccessible to GDB), and r14 will point to the return |
| 979 | address. Displaced stepping always executes code in the copy area: |
| 980 | so, make the copy-area instruction branch back to the kernel helper (the |
| 981 | "from" address), and make r14 point to the breakpoint in the copy area. In |
| 982 | that way, we regain control once the kernel helper returns, and can clean |
| 983 | up appropriately (as if we had just returned from the kernel helper as it |
| 984 | would have been called from the non-displaced location). */ |
| 985 | |
| 986 | static void |
| 987 | cleanup_kernel_helper_return (struct gdbarch *gdbarch, |
| 988 | struct regcache *regs, |
| 989 | struct displaced_step_closure *dsc) |
| 990 | { |
| 991 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC); |
| 992 | displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC); |
| 993 | } |
| 994 | |
| 995 | static void |
| 996 | arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from, |
| 997 | CORE_ADDR to, struct regcache *regs, |
| 998 | struct displaced_step_closure *dsc) |
| 999 | { |
| 1000 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1001 | |
| 1002 | dsc->numinsns = 1; |
| 1003 | dsc->insn_addr = from; |
| 1004 | dsc->cleanup = &cleanup_kernel_helper_return; |
| 1005 | /* Say we wrote to the PC, else cleanup will set PC to the next |
| 1006 | instruction in the helper, which isn't helpful. */ |
| 1007 | dsc->wrote_to_pc = 1; |
| 1008 | |
| 1009 | /* Preparation: tmp[0] <- r14 |
| 1010 | r14 <- <scratch space>+4 |
| 1011 | *(<scratch space>+8) <- from |
| 1012 | Insn: ldr pc, [r14, #4] |
| 1013 | Cleanup: r14 <- tmp[0], pc <- tmp[0]. */ |
| 1014 | |
| 1015 | dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM); |
| 1016 | displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4, |
| 1017 | CANNOT_WRITE_PC); |
| 1018 | write_memory_unsigned_integer (to + 8, 4, byte_order, from); |
| 1019 | |
| 1020 | dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */ |
| 1021 | } |
| 1022 | |
| 1023 | /* Linux-specific displaced step instruction copying function. Detects when |
| 1024 | the program has stepped into a Linux kernel helper routine (which must be |
| 1025 | handled as a special case), falling back to arm_displaced_step_copy_insn() |
| 1026 | if it hasn't. */ |
| 1027 | |
| 1028 | static struct displaced_step_closure * |
| 1029 | arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch, |
| 1030 | CORE_ADDR from, CORE_ADDR to, |
| 1031 | struct regcache *regs) |
| 1032 | { |
| 1033 | struct displaced_step_closure *dsc |
| 1034 | = xmalloc (sizeof (struct displaced_step_closure)); |
| 1035 | |
| 1036 | /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and |
| 1037 | stop at the return location. */ |
| 1038 | if (from > 0xffff0000) |
| 1039 | { |
| 1040 | if (debug_displaced) |
| 1041 | fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper " |
| 1042 | "at %.8lx\n", (unsigned long) from); |
| 1043 | |
| 1044 | arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc); |
| 1045 | } |
| 1046 | else |
| 1047 | { |
| 1048 | /* Override the default handling of SVC instructions. */ |
| 1049 | dsc->u.svc.copy_svc_os = arm_linux_copy_svc; |
| 1050 | |
| 1051 | arm_process_displaced_insn (gdbarch, from, to, regs, dsc); |
| 1052 | } |
| 1053 | |
| 1054 | arm_displaced_init_closure (gdbarch, from, to, dsc); |
| 1055 | |
| 1056 | return dsc; |
| 1057 | } |
| 1058 | |
| 1059 | static void |
| 1060 | arm_linux_init_abi (struct gdbarch_info info, |
| 1061 | struct gdbarch *gdbarch) |
| 1062 | { |
| 1063 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 1064 | |
| 1065 | linux_init_abi (info, gdbarch); |
| 1066 | |
| 1067 | tdep->lowest_pc = 0x8000; |
| 1068 | if (info.byte_order == BFD_ENDIAN_BIG) |
| 1069 | { |
| 1070 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
| 1071 | tdep->arm_breakpoint = eabi_linux_arm_be_breakpoint; |
| 1072 | else |
| 1073 | tdep->arm_breakpoint = arm_linux_arm_be_breakpoint; |
| 1074 | tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint; |
| 1075 | tdep->thumb2_breakpoint = arm_linux_thumb2_be_breakpoint; |
| 1076 | } |
| 1077 | else |
| 1078 | { |
| 1079 | if (tdep->arm_abi == ARM_ABI_AAPCS) |
| 1080 | tdep->arm_breakpoint = eabi_linux_arm_le_breakpoint; |
| 1081 | else |
| 1082 | tdep->arm_breakpoint = arm_linux_arm_le_breakpoint; |
| 1083 | tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint; |
| 1084 | tdep->thumb2_breakpoint = arm_linux_thumb2_le_breakpoint; |
| 1085 | } |
| 1086 | tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint); |
| 1087 | tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint); |
| 1088 | tdep->thumb2_breakpoint_size = sizeof (arm_linux_thumb2_le_breakpoint); |
| 1089 | |
| 1090 | if (tdep->fp_model == ARM_FLOAT_AUTO) |
| 1091 | tdep->fp_model = ARM_FLOAT_FPA; |
| 1092 | |
| 1093 | switch (tdep->fp_model) |
| 1094 | { |
| 1095 | case ARM_FLOAT_FPA: |
| 1096 | tdep->jb_pc = ARM_LINUX_JB_PC_FPA; |
| 1097 | break; |
| 1098 | case ARM_FLOAT_SOFT_FPA: |
| 1099 | case ARM_FLOAT_SOFT_VFP: |
| 1100 | case ARM_FLOAT_VFP: |
| 1101 | tdep->jb_pc = ARM_LINUX_JB_PC_EABI; |
| 1102 | break; |
| 1103 | default: |
| 1104 | internal_error |
| 1105 | (__FILE__, __LINE__, |
| 1106 | _("arm_linux_init_abi: Floating point model not supported")); |
| 1107 | break; |
| 1108 | } |
| 1109 | tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE; |
| 1110 | |
| 1111 | set_solib_svr4_fetch_link_map_offsets |
| 1112 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
| 1113 | |
| 1114 | /* Single stepping. */ |
| 1115 | set_gdbarch_software_single_step (gdbarch, arm_linux_software_single_step); |
| 1116 | |
| 1117 | /* Shared library handling. */ |
| 1118 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
| 1119 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); |
| 1120 | |
| 1121 | /* Enable TLS support. */ |
| 1122 | set_gdbarch_fetch_tls_load_module_address (gdbarch, |
| 1123 | svr4_fetch_objfile_link_map); |
| 1124 | |
| 1125 | tramp_frame_prepend_unwinder (gdbarch, |
| 1126 | &arm_linux_sigreturn_tramp_frame); |
| 1127 | tramp_frame_prepend_unwinder (gdbarch, |
| 1128 | &arm_linux_rt_sigreturn_tramp_frame); |
| 1129 | tramp_frame_prepend_unwinder (gdbarch, |
| 1130 | &arm_eabi_linux_sigreturn_tramp_frame); |
| 1131 | tramp_frame_prepend_unwinder (gdbarch, |
| 1132 | &arm_eabi_linux_rt_sigreturn_tramp_frame); |
| 1133 | tramp_frame_prepend_unwinder (gdbarch, |
| 1134 | &arm_linux_restart_syscall_tramp_frame); |
| 1135 | tramp_frame_prepend_unwinder (gdbarch, |
| 1136 | &arm_kernel_linux_restart_syscall_tramp_frame); |
| 1137 | |
| 1138 | /* Core file support. */ |
| 1139 | set_gdbarch_regset_from_core_section (gdbarch, |
| 1140 | arm_linux_regset_from_core_section); |
| 1141 | set_gdbarch_core_read_description (gdbarch, arm_linux_core_read_description); |
| 1142 | |
| 1143 | if (tdep->have_vfp_registers) |
| 1144 | set_gdbarch_core_regset_sections (gdbarch, arm_linux_vfp_regset_sections); |
| 1145 | else if (tdep->have_fpa_registers) |
| 1146 | set_gdbarch_core_regset_sections (gdbarch, arm_linux_fpa_regset_sections); |
| 1147 | |
| 1148 | set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); |
| 1149 | |
| 1150 | /* Displaced stepping. */ |
| 1151 | set_gdbarch_displaced_step_copy_insn (gdbarch, |
| 1152 | arm_linux_displaced_step_copy_insn); |
| 1153 | set_gdbarch_displaced_step_fixup (gdbarch, arm_displaced_step_fixup); |
| 1154 | set_gdbarch_displaced_step_free_closure (gdbarch, |
| 1155 | simple_displaced_step_free_closure); |
| 1156 | set_gdbarch_displaced_step_location (gdbarch, displaced_step_at_entry_point); |
| 1157 | |
| 1158 | /* Reversible debugging, process record. */ |
| 1159 | set_gdbarch_process_record (gdbarch, arm_process_record); |
| 1160 | |
| 1161 | tdep->syscall_next_pc = arm_linux_syscall_next_pc; |
| 1162 | |
| 1163 | /* Syscall record. */ |
| 1164 | tdep->arm_swi_record = NULL; |
| 1165 | } |
| 1166 | |
| 1167 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
| 1168 | extern initialize_file_ftype _initialize_arm_linux_tdep; |
| 1169 | |
| 1170 | void |
| 1171 | _initialize_arm_linux_tdep (void) |
| 1172 | { |
| 1173 | gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX, |
| 1174 | arm_linux_init_abi); |
| 1175 | } |