| 1 | /* Target-dependent code for Atmel AVR, for GDB. |
| 2 | |
| 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
| 4 | 2006, 2007, 2008 Free Software Foundation, Inc. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 20 | |
| 21 | /* Contributed by Theodore A. Roth, troth@openavr.org */ |
| 22 | |
| 23 | /* Portions of this file were taken from the original gdb-4.18 patch developed |
| 24 | by Denis Chertykov, denisc@overta.ru */ |
| 25 | |
| 26 | #include "defs.h" |
| 27 | #include "frame.h" |
| 28 | #include "frame-unwind.h" |
| 29 | #include "frame-base.h" |
| 30 | #include "trad-frame.h" |
| 31 | #include "gdbcmd.h" |
| 32 | #include "gdbcore.h" |
| 33 | #include "gdbtypes.h" |
| 34 | #include "inferior.h" |
| 35 | #include "symfile.h" |
| 36 | #include "arch-utils.h" |
| 37 | #include "regcache.h" |
| 38 | #include "gdb_string.h" |
| 39 | #include "dis-asm.h" |
| 40 | |
| 41 | /* AVR Background: |
| 42 | |
| 43 | (AVR micros are pure Harvard Architecture processors.) |
| 44 | |
| 45 | The AVR family of microcontrollers have three distinctly different memory |
| 46 | spaces: flash, sram and eeprom. The flash is 16 bits wide and is used for |
| 47 | the most part to store program instructions. The sram is 8 bits wide and is |
| 48 | used for the stack and the heap. Some devices lack sram and some can have |
| 49 | an additional external sram added on as a peripheral. |
| 50 | |
| 51 | The eeprom is 8 bits wide and is used to store data when the device is |
| 52 | powered down. Eeprom is not directly accessible, it can only be accessed |
| 53 | via io-registers using a special algorithm. Accessing eeprom via gdb's |
| 54 | remote serial protocol ('m' or 'M' packets) looks difficult to do and is |
| 55 | not included at this time. |
| 56 | |
| 57 | [The eeprom could be read manually via ``x/b <eaddr + AVR_EMEM_START>'' or |
| 58 | written using ``set {unsigned char}<eaddr + AVR_EMEM_START>''. For this to |
| 59 | work, the remote target must be able to handle eeprom accesses and perform |
| 60 | the address translation.] |
| 61 | |
| 62 | All three memory spaces have physical addresses beginning at 0x0. In |
| 63 | addition, the flash is addressed by gcc/binutils/gdb with respect to 8 bit |
| 64 | bytes instead of the 16 bit wide words used by the real device for the |
| 65 | Program Counter. |
| 66 | |
| 67 | In order for remote targets to work correctly, extra bits must be added to |
| 68 | addresses before they are send to the target or received from the target |
| 69 | via the remote serial protocol. The extra bits are the MSBs and are used to |
| 70 | decode which memory space the address is referring to. */ |
| 71 | |
| 72 | #undef XMALLOC |
| 73 | #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE))) |
| 74 | |
| 75 | #undef EXTRACT_INSN |
| 76 | #define EXTRACT_INSN(addr) extract_unsigned_integer(addr,2) |
| 77 | |
| 78 | /* Constants: prefixed with AVR_ to avoid name space clashes */ |
| 79 | |
| 80 | enum |
| 81 | { |
| 82 | AVR_REG_W = 24, |
| 83 | AVR_REG_X = 26, |
| 84 | AVR_REG_Y = 28, |
| 85 | AVR_FP_REGNUM = 28, |
| 86 | AVR_REG_Z = 30, |
| 87 | |
| 88 | AVR_SREG_REGNUM = 32, |
| 89 | AVR_SP_REGNUM = 33, |
| 90 | AVR_PC_REGNUM = 34, |
| 91 | |
| 92 | AVR_NUM_REGS = 32 + 1 /*SREG*/ + 1 /*SP*/ + 1 /*PC*/, |
| 93 | AVR_NUM_REG_BYTES = 32 + 1 /*SREG*/ + 2 /*SP*/ + 4 /*PC*/, |
| 94 | |
| 95 | AVR_PC_REG_INDEX = 35, /* index into array of registers */ |
| 96 | |
| 97 | AVR_MAX_PROLOGUE_SIZE = 64, /* bytes */ |
| 98 | |
| 99 | /* Count of pushed registers. From r2 to r17 (inclusively), r28, r29 */ |
| 100 | AVR_MAX_PUSHES = 18, |
| 101 | |
| 102 | /* Number of the last pushed register. r17 for current avr-gcc */ |
| 103 | AVR_LAST_PUSHED_REGNUM = 17, |
| 104 | |
| 105 | AVR_ARG1_REGNUM = 24, /* Single byte argument */ |
| 106 | AVR_ARGN_REGNUM = 25, /* Multi byte argments */ |
| 107 | |
| 108 | AVR_RET1_REGNUM = 24, /* Single byte return value */ |
| 109 | AVR_RETN_REGNUM = 25, /* Multi byte return value */ |
| 110 | |
| 111 | /* FIXME: TRoth/2002-01-??: Can we shift all these memory masks left 8 |
| 112 | bits? Do these have to match the bfd vma values?. It sure would make |
| 113 | things easier in the future if they didn't need to match. |
| 114 | |
| 115 | Note: I chose these values so as to be consistent with bfd vma |
| 116 | addresses. |
| 117 | |
| 118 | TRoth/2002-04-08: There is already a conflict with very large programs |
| 119 | in the mega128. The mega128 has 128K instruction bytes (64K words), |
| 120 | thus the Most Significant Bit is 0x10000 which gets masked off my |
| 121 | AVR_MEM_MASK. |
| 122 | |
| 123 | The problem manifests itself when trying to set a breakpoint in a |
| 124 | function which resides in the upper half of the instruction space and |
| 125 | thus requires a 17-bit address. |
| 126 | |
| 127 | For now, I've just removed the EEPROM mask and changed AVR_MEM_MASK |
| 128 | from 0x00ff0000 to 0x00f00000. Eeprom is not accessible from gdb yet, |
| 129 | but could be for some remote targets by just adding the correct offset |
| 130 | to the address and letting the remote target handle the low-level |
| 131 | details of actually accessing the eeprom. */ |
| 132 | |
| 133 | AVR_IMEM_START = 0x00000000, /* INSN memory */ |
| 134 | AVR_SMEM_START = 0x00800000, /* SRAM memory */ |
| 135 | #if 1 |
| 136 | /* No eeprom mask defined */ |
| 137 | AVR_MEM_MASK = 0x00f00000, /* mask to determine memory space */ |
| 138 | #else |
| 139 | AVR_EMEM_START = 0x00810000, /* EEPROM memory */ |
| 140 | AVR_MEM_MASK = 0x00ff0000, /* mask to determine memory space */ |
| 141 | #endif |
| 142 | }; |
| 143 | |
| 144 | /* Prologue types: |
| 145 | |
| 146 | NORMAL and CALL are the typical types (the -mcall-prologues gcc option |
| 147 | causes the generation of the CALL type prologues). */ |
| 148 | |
| 149 | enum { |
| 150 | AVR_PROLOGUE_NONE, /* No prologue */ |
| 151 | AVR_PROLOGUE_NORMAL, |
| 152 | AVR_PROLOGUE_CALL, /* -mcall-prologues */ |
| 153 | AVR_PROLOGUE_MAIN, |
| 154 | AVR_PROLOGUE_INTR, /* interrupt handler */ |
| 155 | AVR_PROLOGUE_SIG, /* signal handler */ |
| 156 | }; |
| 157 | |
| 158 | /* Any function with a frame looks like this |
| 159 | ....... <-SP POINTS HERE |
| 160 | LOCALS1 <-FP POINTS HERE |
| 161 | LOCALS0 |
| 162 | SAVED FP |
| 163 | SAVED R3 |
| 164 | SAVED R2 |
| 165 | RET PC |
| 166 | FIRST ARG |
| 167 | SECOND ARG */ |
| 168 | |
| 169 | struct avr_unwind_cache |
| 170 | { |
| 171 | /* The previous frame's inner most stack address. Used as this |
| 172 | frame ID's stack_addr. */ |
| 173 | CORE_ADDR prev_sp; |
| 174 | /* The frame's base, optionally used by the high-level debug info. */ |
| 175 | CORE_ADDR base; |
| 176 | int size; |
| 177 | int prologue_type; |
| 178 | /* Table indicating the location of each and every register. */ |
| 179 | struct trad_frame_saved_reg *saved_regs; |
| 180 | }; |
| 181 | |
| 182 | struct gdbarch_tdep |
| 183 | { |
| 184 | /* FIXME: TRoth: is there anything to put here? */ |
| 185 | int foo; |
| 186 | }; |
| 187 | |
| 188 | /* Lookup the name of a register given it's number. */ |
| 189 | |
| 190 | static const char * |
| 191 | avr_register_name (struct gdbarch *gdbarch, int regnum) |
| 192 | { |
| 193 | static char *register_names[] = { |
| 194 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 195 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 196 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
| 197 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
| 198 | "SREG", "SP", "PC" |
| 199 | }; |
| 200 | if (regnum < 0) |
| 201 | return NULL; |
| 202 | if (regnum >= (sizeof (register_names) / sizeof (*register_names))) |
| 203 | return NULL; |
| 204 | return register_names[regnum]; |
| 205 | } |
| 206 | |
| 207 | /* Return the GDB type object for the "standard" data type |
| 208 | of data in register N. */ |
| 209 | |
| 210 | static struct type * |
| 211 | avr_register_type (struct gdbarch *gdbarch, int reg_nr) |
| 212 | { |
| 213 | if (reg_nr == AVR_PC_REGNUM) |
| 214 | return builtin_type_uint32; |
| 215 | if (reg_nr == AVR_SP_REGNUM) |
| 216 | return builtin_type_void_data_ptr; |
| 217 | else |
| 218 | return builtin_type_uint8; |
| 219 | } |
| 220 | |
| 221 | /* Instruction address checks and convertions. */ |
| 222 | |
| 223 | static CORE_ADDR |
| 224 | avr_make_iaddr (CORE_ADDR x) |
| 225 | { |
| 226 | return ((x) | AVR_IMEM_START); |
| 227 | } |
| 228 | |
| 229 | /* FIXME: TRoth: Really need to use a larger mask for instructions. Some |
| 230 | devices are already up to 128KBytes of flash space. |
| 231 | |
| 232 | TRoth/2002-04-8: See comment above where AVR_IMEM_START is defined. */ |
| 233 | |
| 234 | static CORE_ADDR |
| 235 | avr_convert_iaddr_to_raw (CORE_ADDR x) |
| 236 | { |
| 237 | return ((x) & 0xffffffff); |
| 238 | } |
| 239 | |
| 240 | /* SRAM address checks and convertions. */ |
| 241 | |
| 242 | static CORE_ADDR |
| 243 | avr_make_saddr (CORE_ADDR x) |
| 244 | { |
| 245 | return ((x) | AVR_SMEM_START); |
| 246 | } |
| 247 | |
| 248 | static CORE_ADDR |
| 249 | avr_convert_saddr_to_raw (CORE_ADDR x) |
| 250 | { |
| 251 | return ((x) & 0xffffffff); |
| 252 | } |
| 253 | |
| 254 | /* EEPROM address checks and convertions. I don't know if these will ever |
| 255 | actually be used, but I've added them just the same. TRoth */ |
| 256 | |
| 257 | /* TRoth/2002-04-08: Commented out for now to allow fix for problem with large |
| 258 | programs in the mega128. */ |
| 259 | |
| 260 | /* static CORE_ADDR */ |
| 261 | /* avr_make_eaddr (CORE_ADDR x) */ |
| 262 | /* { */ |
| 263 | /* return ((x) | AVR_EMEM_START); */ |
| 264 | /* } */ |
| 265 | |
| 266 | /* static int */ |
| 267 | /* avr_eaddr_p (CORE_ADDR x) */ |
| 268 | /* { */ |
| 269 | /* return (((x) & AVR_MEM_MASK) == AVR_EMEM_START); */ |
| 270 | /* } */ |
| 271 | |
| 272 | /* static CORE_ADDR */ |
| 273 | /* avr_convert_eaddr_to_raw (CORE_ADDR x) */ |
| 274 | /* { */ |
| 275 | /* return ((x) & 0xffffffff); */ |
| 276 | /* } */ |
| 277 | |
| 278 | /* Convert from address to pointer and vice-versa. */ |
| 279 | |
| 280 | static void |
| 281 | avr_address_to_pointer (struct type *type, gdb_byte *buf, CORE_ADDR addr) |
| 282 | { |
| 283 | /* Is it a code address? */ |
| 284 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC |
| 285 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD) |
| 286 | { |
| 287 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
| 288 | avr_convert_iaddr_to_raw (addr >> 1)); |
| 289 | } |
| 290 | else |
| 291 | { |
| 292 | /* Strip off any upper segment bits. */ |
| 293 | store_unsigned_integer (buf, TYPE_LENGTH (type), |
| 294 | avr_convert_saddr_to_raw (addr)); |
| 295 | } |
| 296 | } |
| 297 | |
| 298 | static CORE_ADDR |
| 299 | avr_pointer_to_address (struct type *type, const gdb_byte *buf) |
| 300 | { |
| 301 | CORE_ADDR addr = extract_unsigned_integer (buf, TYPE_LENGTH (type)); |
| 302 | |
| 303 | /* Is it a code address? */ |
| 304 | if (TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC |
| 305 | || TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_METHOD |
| 306 | || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type))) |
| 307 | return avr_make_iaddr (addr << 1); |
| 308 | else |
| 309 | return avr_make_saddr (addr); |
| 310 | } |
| 311 | |
| 312 | static CORE_ADDR |
| 313 | avr_read_pc (struct regcache *regcache) |
| 314 | { |
| 315 | ULONGEST pc; |
| 316 | regcache_cooked_read_unsigned (regcache, AVR_PC_REGNUM, &pc); |
| 317 | return avr_make_iaddr (pc); |
| 318 | } |
| 319 | |
| 320 | static void |
| 321 | avr_write_pc (struct regcache *regcache, CORE_ADDR val) |
| 322 | { |
| 323 | regcache_cooked_write_unsigned (regcache, AVR_PC_REGNUM, |
| 324 | avr_convert_iaddr_to_raw (val)); |
| 325 | } |
| 326 | |
| 327 | static int |
| 328 | avr_scan_arg_moves (int vpc, unsigned char *prologue) |
| 329 | { |
| 330 | unsigned short insn; |
| 331 | |
| 332 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
| 333 | { |
| 334 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 335 | if ((insn & 0xff00) == 0x0100) /* movw rXX, rYY */ |
| 336 | continue; |
| 337 | else if ((insn & 0xfc00) == 0x2c00) /* mov rXX, rYY */ |
| 338 | continue; |
| 339 | else |
| 340 | break; |
| 341 | } |
| 342 | |
| 343 | return vpc; |
| 344 | } |
| 345 | |
| 346 | /* Function: avr_scan_prologue |
| 347 | |
| 348 | This function decodes an AVR function prologue to determine: |
| 349 | 1) the size of the stack frame |
| 350 | 2) which registers are saved on it |
| 351 | 3) the offsets of saved regs |
| 352 | This information is stored in the avr_unwind_cache structure. |
| 353 | |
| 354 | Some devices lack the sbiw instruction, so on those replace this: |
| 355 | sbiw r28, XX |
| 356 | with this: |
| 357 | subi r28,lo8(XX) |
| 358 | sbci r29,hi8(XX) |
| 359 | |
| 360 | A typical AVR function prologue with a frame pointer might look like this: |
| 361 | push rXX ; saved regs |
| 362 | ... |
| 363 | push r28 |
| 364 | push r29 |
| 365 | in r28,__SP_L__ |
| 366 | in r29,__SP_H__ |
| 367 | sbiw r28,<LOCALS_SIZE> |
| 368 | in __tmp_reg__,__SREG__ |
| 369 | cli |
| 370 | out __SP_H__,r29 |
| 371 | out __SREG__,__tmp_reg__ |
| 372 | out __SP_L__,r28 |
| 373 | |
| 374 | A typical AVR function prologue without a frame pointer might look like |
| 375 | this: |
| 376 | push rXX ; saved regs |
| 377 | ... |
| 378 | |
| 379 | A main function prologue looks like this: |
| 380 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) |
| 381 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) |
| 382 | out __SP_H__,r29 |
| 383 | out __SP_L__,r28 |
| 384 | |
| 385 | A signal handler prologue looks like this: |
| 386 | push __zero_reg__ |
| 387 | push __tmp_reg__ |
| 388 | in __tmp_reg__, __SREG__ |
| 389 | push __tmp_reg__ |
| 390 | clr __zero_reg__ |
| 391 | push rXX ; save registers r18:r27, r30:r31 |
| 392 | ... |
| 393 | push r28 ; save frame pointer |
| 394 | push r29 |
| 395 | in r28, __SP_L__ |
| 396 | in r29, __SP_H__ |
| 397 | sbiw r28, <LOCALS_SIZE> |
| 398 | out __SP_H__, r29 |
| 399 | out __SP_L__, r28 |
| 400 | |
| 401 | A interrupt handler prologue looks like this: |
| 402 | sei |
| 403 | push __zero_reg__ |
| 404 | push __tmp_reg__ |
| 405 | in __tmp_reg__, __SREG__ |
| 406 | push __tmp_reg__ |
| 407 | clr __zero_reg__ |
| 408 | push rXX ; save registers r18:r27, r30:r31 |
| 409 | ... |
| 410 | push r28 ; save frame pointer |
| 411 | push r29 |
| 412 | in r28, __SP_L__ |
| 413 | in r29, __SP_H__ |
| 414 | sbiw r28, <LOCALS_SIZE> |
| 415 | cli |
| 416 | out __SP_H__, r29 |
| 417 | sei |
| 418 | out __SP_L__, r28 |
| 419 | |
| 420 | A `-mcall-prologues' prologue looks like this (Note that the megas use a |
| 421 | jmp instead of a rjmp, thus the prologue is one word larger since jmp is a |
| 422 | 32 bit insn and rjmp is a 16 bit insn): |
| 423 | ldi r26,lo8(<LOCALS_SIZE>) |
| 424 | ldi r27,hi8(<LOCALS_SIZE>) |
| 425 | ldi r30,pm_lo8(.L_foo_body) |
| 426 | ldi r31,pm_hi8(.L_foo_body) |
| 427 | rjmp __prologue_saves__+RRR |
| 428 | .L_foo_body: */ |
| 429 | |
| 430 | /* Not really part of a prologue, but still need to scan for it, is when a |
| 431 | function prologue moves values passed via registers as arguments to new |
| 432 | registers. In this case, all local variables live in registers, so there |
| 433 | may be some register saves. This is what it looks like: |
| 434 | movw rMM, rNN |
| 435 | ... |
| 436 | |
| 437 | There could be multiple movw's. If the target doesn't have a movw insn, it |
| 438 | will use two mov insns. This could be done after any of the above prologue |
| 439 | types. */ |
| 440 | |
| 441 | static CORE_ADDR |
| 442 | avr_scan_prologue (CORE_ADDR pc, struct avr_unwind_cache *info) |
| 443 | { |
| 444 | int i; |
| 445 | unsigned short insn; |
| 446 | int scan_stage = 0; |
| 447 | struct minimal_symbol *msymbol; |
| 448 | unsigned char prologue[AVR_MAX_PROLOGUE_SIZE]; |
| 449 | int vpc = 0; |
| 450 | |
| 451 | /* FIXME: TRoth/2003-06-11: This could be made more efficient by only |
| 452 | reading in the bytes of the prologue. The problem is that the figuring |
| 453 | out where the end of the prologue is is a bit difficult. The old code |
| 454 | tried to do that, but failed quite often. */ |
| 455 | read_memory (pc, prologue, AVR_MAX_PROLOGUE_SIZE); |
| 456 | |
| 457 | /* Scanning main()'s prologue |
| 458 | ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) |
| 459 | ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) |
| 460 | out __SP_H__,r29 |
| 461 | out __SP_L__,r28 */ |
| 462 | |
| 463 | if (1) |
| 464 | { |
| 465 | CORE_ADDR locals; |
| 466 | unsigned char img[] = { |
| 467 | 0xde, 0xbf, /* out __SP_H__,r29 */ |
| 468 | 0xcd, 0xbf /* out __SP_L__,r28 */ |
| 469 | }; |
| 470 | |
| 471 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 472 | /* ldi r28,lo8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
| 473 | if ((insn & 0xf0f0) == 0xe0c0) |
| 474 | { |
| 475 | locals = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
| 476 | insn = EXTRACT_INSN (&prologue[vpc + 2]); |
| 477 | /* ldi r29,hi8(<RAM_ADDR> - <LOCALS_SIZE>) */ |
| 478 | if ((insn & 0xf0f0) == 0xe0d0) |
| 479 | { |
| 480 | locals |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
| 481 | if (memcmp (prologue + vpc + 4, img, sizeof (img)) == 0) |
| 482 | { |
| 483 | info->prologue_type = AVR_PROLOGUE_MAIN; |
| 484 | info->base = locals; |
| 485 | return pc + 4; |
| 486 | } |
| 487 | } |
| 488 | } |
| 489 | } |
| 490 | |
| 491 | /* Scanning `-mcall-prologues' prologue |
| 492 | Classic prologue is 10 bytes, mega prologue is a 12 bytes long */ |
| 493 | |
| 494 | while (1) /* Using a while to avoid many goto's */ |
| 495 | { |
| 496 | int loc_size; |
| 497 | int body_addr; |
| 498 | unsigned num_pushes; |
| 499 | int pc_offset = 0; |
| 500 | |
| 501 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 502 | /* ldi r26,<LOCALS_SIZE> */ |
| 503 | if ((insn & 0xf0f0) != 0xe0a0) |
| 504 | break; |
| 505 | loc_size = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
| 506 | pc_offset += 2; |
| 507 | |
| 508 | insn = EXTRACT_INSN (&prologue[vpc + 2]); |
| 509 | /* ldi r27,<LOCALS_SIZE> / 256 */ |
| 510 | if ((insn & 0xf0f0) != 0xe0b0) |
| 511 | break; |
| 512 | loc_size |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
| 513 | pc_offset += 2; |
| 514 | |
| 515 | insn = EXTRACT_INSN (&prologue[vpc + 4]); |
| 516 | /* ldi r30,pm_lo8(.L_foo_body) */ |
| 517 | if ((insn & 0xf0f0) != 0xe0e0) |
| 518 | break; |
| 519 | body_addr = (insn & 0xf) | ((insn & 0x0f00) >> 4); |
| 520 | pc_offset += 2; |
| 521 | |
| 522 | insn = EXTRACT_INSN (&prologue[vpc + 6]); |
| 523 | /* ldi r31,pm_hi8(.L_foo_body) */ |
| 524 | if ((insn & 0xf0f0) != 0xe0f0) |
| 525 | break; |
| 526 | body_addr |= ((insn & 0xf) | ((insn & 0x0f00) >> 4)) << 8; |
| 527 | pc_offset += 2; |
| 528 | |
| 529 | msymbol = lookup_minimal_symbol ("__prologue_saves__", NULL, NULL); |
| 530 | if (!msymbol) |
| 531 | break; |
| 532 | |
| 533 | insn = EXTRACT_INSN (&prologue[vpc + 8]); |
| 534 | /* rjmp __prologue_saves__+RRR */ |
| 535 | if ((insn & 0xf000) == 0xc000) |
| 536 | { |
| 537 | /* Extract PC relative offset from RJMP */ |
| 538 | i = (insn & 0xfff) | (insn & 0x800 ? (-1 ^ 0xfff) : 0); |
| 539 | /* Convert offset to byte addressable mode */ |
| 540 | i *= 2; |
| 541 | /* Destination address */ |
| 542 | i += pc + 10; |
| 543 | |
| 544 | if (body_addr != (pc + 10)/2) |
| 545 | break; |
| 546 | |
| 547 | pc_offset += 2; |
| 548 | } |
| 549 | else if ((insn & 0xfe0e) == 0x940c) |
| 550 | { |
| 551 | /* Extract absolute PC address from JMP */ |
| 552 | i = (((insn & 0x1) | ((insn & 0x1f0) >> 3) << 16) |
| 553 | | (EXTRACT_INSN (&prologue[vpc + 10]) & 0xffff)); |
| 554 | /* Convert address to byte addressable mode */ |
| 555 | i *= 2; |
| 556 | |
| 557 | if (body_addr != (pc + 12)/2) |
| 558 | break; |
| 559 | |
| 560 | pc_offset += 4; |
| 561 | } |
| 562 | else |
| 563 | break; |
| 564 | |
| 565 | /* Resolve offset (in words) from __prologue_saves__ symbol. |
| 566 | Which is a pushes count in `-mcall-prologues' mode */ |
| 567 | num_pushes = AVR_MAX_PUSHES - (i - SYMBOL_VALUE_ADDRESS (msymbol)) / 2; |
| 568 | |
| 569 | if (num_pushes > AVR_MAX_PUSHES) |
| 570 | { |
| 571 | fprintf_unfiltered (gdb_stderr, _("Num pushes too large: %d\n"), |
| 572 | num_pushes); |
| 573 | num_pushes = 0; |
| 574 | } |
| 575 | |
| 576 | if (num_pushes) |
| 577 | { |
| 578 | int from; |
| 579 | |
| 580 | info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes; |
| 581 | if (num_pushes >= 2) |
| 582 | info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1; |
| 583 | |
| 584 | i = 0; |
| 585 | for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2); |
| 586 | from <= AVR_LAST_PUSHED_REGNUM; ++from) |
| 587 | info->saved_regs [from].addr = ++i; |
| 588 | } |
| 589 | info->size = loc_size + num_pushes; |
| 590 | info->prologue_type = AVR_PROLOGUE_CALL; |
| 591 | |
| 592 | return pc + pc_offset; |
| 593 | } |
| 594 | |
| 595 | /* Scan for the beginning of the prologue for an interrupt or signal |
| 596 | function. Note that we have to set the prologue type here since the |
| 597 | third stage of the prologue may not be present (e.g. no saved registered |
| 598 | or changing of the SP register). */ |
| 599 | |
| 600 | if (1) |
| 601 | { |
| 602 | unsigned char img[] = { |
| 603 | 0x78, 0x94, /* sei */ |
| 604 | 0x1f, 0x92, /* push r1 */ |
| 605 | 0x0f, 0x92, /* push r0 */ |
| 606 | 0x0f, 0xb6, /* in r0,0x3f SREG */ |
| 607 | 0x0f, 0x92, /* push r0 */ |
| 608 | 0x11, 0x24 /* clr r1 */ |
| 609 | }; |
| 610 | if (memcmp (prologue, img, sizeof (img)) == 0) |
| 611 | { |
| 612 | info->prologue_type = AVR_PROLOGUE_INTR; |
| 613 | vpc += sizeof (img); |
| 614 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
| 615 | info->saved_regs[0].addr = 2; |
| 616 | info->saved_regs[1].addr = 1; |
| 617 | info->size += 3; |
| 618 | } |
| 619 | else if (memcmp (img + 2, prologue, sizeof (img) - 2) == 0) |
| 620 | { |
| 621 | info->prologue_type = AVR_PROLOGUE_SIG; |
| 622 | vpc += sizeof (img) - 2; |
| 623 | info->saved_regs[AVR_SREG_REGNUM].addr = 3; |
| 624 | info->saved_regs[0].addr = 2; |
| 625 | info->saved_regs[1].addr = 1; |
| 626 | info->size += 3; |
| 627 | } |
| 628 | } |
| 629 | |
| 630 | /* First stage of the prologue scanning. |
| 631 | Scan pushes (saved registers) */ |
| 632 | |
| 633 | for (; vpc < AVR_MAX_PROLOGUE_SIZE; vpc += 2) |
| 634 | { |
| 635 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 636 | if ((insn & 0xfe0f) == 0x920f) /* push rXX */ |
| 637 | { |
| 638 | /* Bits 4-9 contain a mask for registers R0-R32. */ |
| 639 | int regno = (insn & 0x1f0) >> 4; |
| 640 | info->size++; |
| 641 | info->saved_regs[regno].addr = info->size; |
| 642 | scan_stage = 1; |
| 643 | } |
| 644 | else |
| 645 | break; |
| 646 | } |
| 647 | |
| 648 | if (vpc >= AVR_MAX_PROLOGUE_SIZE) |
| 649 | fprintf_unfiltered (gdb_stderr, |
| 650 | _("Hit end of prologue while scanning pushes\n")); |
| 651 | |
| 652 | /* Second stage of the prologue scanning. |
| 653 | Scan: |
| 654 | in r28,__SP_L__ |
| 655 | in r29,__SP_H__ */ |
| 656 | |
| 657 | if (scan_stage == 1 && vpc < AVR_MAX_PROLOGUE_SIZE) |
| 658 | { |
| 659 | unsigned char img[] = { |
| 660 | 0xcd, 0xb7, /* in r28,__SP_L__ */ |
| 661 | 0xde, 0xb7 /* in r29,__SP_H__ */ |
| 662 | }; |
| 663 | unsigned short insn1; |
| 664 | |
| 665 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) |
| 666 | { |
| 667 | vpc += 4; |
| 668 | scan_stage = 2; |
| 669 | } |
| 670 | } |
| 671 | |
| 672 | /* Third stage of the prologue scanning. (Really two stages) |
| 673 | Scan for: |
| 674 | sbiw r28,XX or subi r28,lo8(XX) |
| 675 | sbci r29,hi8(XX) |
| 676 | in __tmp_reg__,__SREG__ |
| 677 | cli |
| 678 | out __SP_H__,r29 |
| 679 | out __SREG__,__tmp_reg__ |
| 680 | out __SP_L__,r28 */ |
| 681 | |
| 682 | if (scan_stage == 2 && vpc < AVR_MAX_PROLOGUE_SIZE) |
| 683 | { |
| 684 | int locals_size = 0; |
| 685 | unsigned char img[] = { |
| 686 | 0x0f, 0xb6, /* in r0,0x3f */ |
| 687 | 0xf8, 0x94, /* cli */ |
| 688 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
| 689 | 0x0f, 0xbe, /* out 0x3f,r0 ; SREG */ |
| 690 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
| 691 | }; |
| 692 | unsigned char img_sig[] = { |
| 693 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
| 694 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
| 695 | }; |
| 696 | unsigned char img_int[] = { |
| 697 | 0xf8, 0x94, /* cli */ |
| 698 | 0xde, 0xbf, /* out 0x3e,r29 ; SPH */ |
| 699 | 0x78, 0x94, /* sei */ |
| 700 | 0xcd, 0xbf /* out 0x3d,r28 ; SPL */ |
| 701 | }; |
| 702 | |
| 703 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 704 | vpc += 2; |
| 705 | if ((insn & 0xff30) == 0x9720) /* sbiw r28,XXX */ |
| 706 | locals_size = (insn & 0xf) | ((insn & 0xc0) >> 2); |
| 707 | else if ((insn & 0xf0f0) == 0x50c0) /* subi r28,lo8(XX) */ |
| 708 | { |
| 709 | locals_size = (insn & 0xf) | ((insn & 0xf00) >> 4); |
| 710 | insn = EXTRACT_INSN (&prologue[vpc]); |
| 711 | vpc += 2; |
| 712 | locals_size += ((insn & 0xf) | ((insn & 0xf00) >> 4) << 8); |
| 713 | } |
| 714 | else |
| 715 | return pc + vpc; |
| 716 | |
| 717 | /* Scan the last part of the prologue. May not be present for interrupt |
| 718 | or signal handler functions, which is why we set the prologue type |
| 719 | when we saw the beginning of the prologue previously. */ |
| 720 | |
| 721 | if (memcmp (prologue + vpc, img_sig, sizeof (img_sig)) == 0) |
| 722 | { |
| 723 | vpc += sizeof (img_sig); |
| 724 | } |
| 725 | else if (memcmp (prologue + vpc, img_int, sizeof (img_int)) == 0) |
| 726 | { |
| 727 | vpc += sizeof (img_int); |
| 728 | } |
| 729 | if (memcmp (prologue + vpc, img, sizeof (img)) == 0) |
| 730 | { |
| 731 | info->prologue_type = AVR_PROLOGUE_NORMAL; |
| 732 | vpc += sizeof (img); |
| 733 | } |
| 734 | |
| 735 | info->size += locals_size; |
| 736 | |
| 737 | return pc + avr_scan_arg_moves (vpc, prologue); |
| 738 | } |
| 739 | |
| 740 | /* If we got this far, we could not scan the prologue, so just return the pc |
| 741 | of the frame plus an adjustment for argument move insns. */ |
| 742 | |
| 743 | return pc + avr_scan_arg_moves (vpc, prologue);; |
| 744 | } |
| 745 | |
| 746 | static CORE_ADDR |
| 747 | avr_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 748 | { |
| 749 | CORE_ADDR func_addr, func_end; |
| 750 | CORE_ADDR prologue_end = pc; |
| 751 | |
| 752 | /* See what the symbol table says */ |
| 753 | |
| 754 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 755 | { |
| 756 | struct symtab_and_line sal; |
| 757 | struct avr_unwind_cache info = {0}; |
| 758 | struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS]; |
| 759 | |
| 760 | info.saved_regs = saved_regs; |
| 761 | |
| 762 | /* Need to run the prologue scanner to figure out if the function has a |
| 763 | prologue and possibly skip over moving arguments passed via registers |
| 764 | to other registers. */ |
| 765 | |
| 766 | prologue_end = avr_scan_prologue (pc, &info); |
| 767 | |
| 768 | if (info.prologue_type == AVR_PROLOGUE_NONE) |
| 769 | return pc; |
| 770 | else |
| 771 | { |
| 772 | sal = find_pc_line (func_addr, 0); |
| 773 | |
| 774 | if (sal.line != 0 && sal.end < func_end) |
| 775 | return sal.end; |
| 776 | } |
| 777 | } |
| 778 | |
| 779 | /* Either we didn't find the start of this function (nothing we can do), |
| 780 | or there's no line info, or the line after the prologue is after |
| 781 | the end of the function (there probably isn't a prologue). */ |
| 782 | |
| 783 | return prologue_end; |
| 784 | } |
| 785 | |
| 786 | /* Not all avr devices support the BREAK insn. Those that don't should treat |
| 787 | it as a NOP. Thus, it should be ok. Since the avr is currently a remote |
| 788 | only target, this shouldn't be a problem (I hope). TRoth/2003-05-14 */ |
| 789 | |
| 790 | static const unsigned char * |
| 791 | avr_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR * pcptr, int *lenptr) |
| 792 | { |
| 793 | static unsigned char avr_break_insn [] = { 0x98, 0x95 }; |
| 794 | *lenptr = sizeof (avr_break_insn); |
| 795 | return avr_break_insn; |
| 796 | } |
| 797 | |
| 798 | /* Given a return value in `regbuf' with a type `valtype', |
| 799 | extract and copy its value into `valbuf'. |
| 800 | |
| 801 | Return values are always passed via registers r25:r24:... */ |
| 802 | |
| 803 | static void |
| 804 | avr_extract_return_value (struct type *type, struct regcache *regcache, |
| 805 | gdb_byte *valbuf) |
| 806 | { |
| 807 | ULONGEST r24, r25; |
| 808 | ULONGEST c; |
| 809 | int len; |
| 810 | if (TYPE_LENGTH (type) == 1) |
| 811 | { |
| 812 | regcache_cooked_read_unsigned (regcache, 24, &c); |
| 813 | store_unsigned_integer (valbuf, 1, c); |
| 814 | } |
| 815 | else |
| 816 | { |
| 817 | int i; |
| 818 | /* The MSB of the return value is always in r25, calculate which |
| 819 | register holds the LSB. */ |
| 820 | int lsb_reg = 25 - TYPE_LENGTH (type) + 1; |
| 821 | |
| 822 | for (i=0; i< TYPE_LENGTH (type); i++) |
| 823 | { |
| 824 | regcache_cooked_read (regcache, lsb_reg + i, |
| 825 | (bfd_byte *) valbuf + i); |
| 826 | } |
| 827 | } |
| 828 | } |
| 829 | |
| 830 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
| 831 | should be returned. If it is supposed to be returned in registers, |
| 832 | and READBUF is non-zero, read the appropriate value from REGCACHE, |
| 833 | and copy it into READBUF. If WRITEBUF is non-zero, write the value |
| 834 | from WRITEBUF into REGCACHE. */ |
| 835 | |
| 836 | enum return_value_convention |
| 837 | avr_return_value (struct gdbarch *gdbarch, struct type *func_type, |
| 838 | struct type *valtype, struct regcache *regcache, |
| 839 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 840 | { |
| 841 | int struct_return = ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
| 842 | || TYPE_CODE (valtype) == TYPE_CODE_UNION |
| 843 | || TYPE_CODE (valtype) == TYPE_CODE_ARRAY) |
| 844 | && !(TYPE_LENGTH (valtype) == 1 |
| 845 | || TYPE_LENGTH (valtype) == 2 |
| 846 | || TYPE_LENGTH (valtype) == 4 |
| 847 | || TYPE_LENGTH (valtype) == 8)); |
| 848 | |
| 849 | if (writebuf != NULL) |
| 850 | { |
| 851 | gdb_assert (!struct_return); |
| 852 | error (_("Cannot store return value.")); |
| 853 | } |
| 854 | |
| 855 | if (readbuf != NULL) |
| 856 | { |
| 857 | gdb_assert (!struct_return); |
| 858 | avr_extract_return_value (valtype, regcache, readbuf); |
| 859 | } |
| 860 | |
| 861 | if (struct_return) |
| 862 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 863 | else |
| 864 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 865 | } |
| 866 | |
| 867 | |
| 868 | /* Put here the code to store, into fi->saved_regs, the addresses of |
| 869 | the saved registers of frame described by FRAME_INFO. This |
| 870 | includes special registers such as pc and fp saved in special ways |
| 871 | in the stack frame. sp is even more special: the address we return |
| 872 | for it IS the sp for the next frame. */ |
| 873 | |
| 874 | struct avr_unwind_cache * |
| 875 | avr_frame_unwind_cache (struct frame_info *this_frame, |
| 876 | void **this_prologue_cache) |
| 877 | { |
| 878 | CORE_ADDR pc; |
| 879 | ULONGEST prev_sp; |
| 880 | ULONGEST this_base; |
| 881 | struct avr_unwind_cache *info; |
| 882 | int i; |
| 883 | |
| 884 | if ((*this_prologue_cache)) |
| 885 | return (*this_prologue_cache); |
| 886 | |
| 887 | info = FRAME_OBSTACK_ZALLOC (struct avr_unwind_cache); |
| 888 | (*this_prologue_cache) = info; |
| 889 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 890 | |
| 891 | info->size = 0; |
| 892 | info->prologue_type = AVR_PROLOGUE_NONE; |
| 893 | |
| 894 | pc = get_frame_func (this_frame); |
| 895 | |
| 896 | if ((pc > 0) && (pc < get_frame_pc (this_frame))) |
| 897 | avr_scan_prologue (pc, info); |
| 898 | |
| 899 | if ((info->prologue_type != AVR_PROLOGUE_NONE) |
| 900 | && (info->prologue_type != AVR_PROLOGUE_MAIN)) |
| 901 | { |
| 902 | ULONGEST high_base; /* High byte of FP */ |
| 903 | |
| 904 | /* The SP was moved to the FP. This indicates that a new frame |
| 905 | was created. Get THIS frame's FP value by unwinding it from |
| 906 | the next frame. */ |
| 907 | this_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM); |
| 908 | high_base = get_frame_register_unsigned (this_frame, AVR_FP_REGNUM+1); |
| 909 | this_base += (high_base << 8); |
| 910 | |
| 911 | /* The FP points at the last saved register. Adjust the FP back |
| 912 | to before the first saved register giving the SP. */ |
| 913 | prev_sp = this_base + info->size; |
| 914 | } |
| 915 | else |
| 916 | { |
| 917 | /* Assume that the FP is this frame's SP but with that pushed |
| 918 | stack space added back. */ |
| 919 | this_base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
| 920 | prev_sp = this_base + info->size; |
| 921 | } |
| 922 | |
| 923 | /* Add 1 here to adjust for the post-decrement nature of the push |
| 924 | instruction.*/ |
| 925 | info->prev_sp = avr_make_saddr (prev_sp+1); |
| 926 | |
| 927 | info->base = avr_make_saddr (this_base); |
| 928 | |
| 929 | /* Adjust all the saved registers so that they contain addresses and not |
| 930 | offsets. */ |
| 931 | for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++) |
| 932 | if (info->saved_regs[i].addr) |
| 933 | { |
| 934 | info->saved_regs[i].addr = (info->prev_sp - info->saved_regs[i].addr); |
| 935 | } |
| 936 | |
| 937 | /* Except for the main and startup code, the return PC is always saved on |
| 938 | the stack and is at the base of the frame. */ |
| 939 | |
| 940 | if (info->prologue_type != AVR_PROLOGUE_MAIN) |
| 941 | { |
| 942 | info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp; |
| 943 | } |
| 944 | |
| 945 | /* The previous frame's SP needed to be computed. Save the computed |
| 946 | value. */ |
| 947 | trad_frame_set_value (info->saved_regs, AVR_SP_REGNUM, info->prev_sp+1); |
| 948 | |
| 949 | return info; |
| 950 | } |
| 951 | |
| 952 | static CORE_ADDR |
| 953 | avr_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 954 | { |
| 955 | ULONGEST pc; |
| 956 | |
| 957 | pc = frame_unwind_register_unsigned (next_frame, AVR_PC_REGNUM); |
| 958 | |
| 959 | return avr_make_iaddr (pc); |
| 960 | } |
| 961 | |
| 962 | static CORE_ADDR |
| 963 | avr_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 964 | { |
| 965 | ULONGEST sp; |
| 966 | |
| 967 | sp = frame_unwind_register_unsigned (next_frame, AVR_SP_REGNUM); |
| 968 | |
| 969 | return avr_make_saddr (sp); |
| 970 | } |
| 971 | |
| 972 | /* Given a GDB frame, determine the address of the calling function's |
| 973 | frame. This will be used to create a new GDB frame struct. */ |
| 974 | |
| 975 | static void |
| 976 | avr_frame_this_id (struct frame_info *this_frame, |
| 977 | void **this_prologue_cache, |
| 978 | struct frame_id *this_id) |
| 979 | { |
| 980 | struct avr_unwind_cache *info |
| 981 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
| 982 | CORE_ADDR base; |
| 983 | CORE_ADDR func; |
| 984 | struct frame_id id; |
| 985 | |
| 986 | /* The FUNC is easy. */ |
| 987 | func = get_frame_func (this_frame); |
| 988 | |
| 989 | /* Hopefully the prologue analysis either correctly determined the |
| 990 | frame's base (which is the SP from the previous frame), or set |
| 991 | that base to "NULL". */ |
| 992 | base = info->prev_sp; |
| 993 | if (base == 0) |
| 994 | return; |
| 995 | |
| 996 | id = frame_id_build (base, func); |
| 997 | (*this_id) = id; |
| 998 | } |
| 999 | |
| 1000 | static struct value * |
| 1001 | avr_frame_prev_register (struct frame_info *this_frame, |
| 1002 | void **this_prologue_cache, int regnum) |
| 1003 | { |
| 1004 | struct avr_unwind_cache *info |
| 1005 | = avr_frame_unwind_cache (this_frame, this_prologue_cache); |
| 1006 | |
| 1007 | if (regnum == AVR_PC_REGNUM) |
| 1008 | { |
| 1009 | if (trad_frame_addr_p (info->saved_regs, regnum)) |
| 1010 | { |
| 1011 | /* Reading the return PC from the PC register is slightly |
| 1012 | abnormal. register_size(AVR_PC_REGNUM) says it is 4 bytes, |
| 1013 | but in reality, only two bytes (3 in upcoming mega256) are |
| 1014 | stored on the stack. |
| 1015 | |
| 1016 | Also, note that the value on the stack is an addr to a word |
| 1017 | not a byte, so we will need to multiply it by two at some |
| 1018 | point. |
| 1019 | |
| 1020 | And to confuse matters even more, the return address stored |
| 1021 | on the stack is in big endian byte order, even though most |
| 1022 | everything else about the avr is little endian. Ick! */ |
| 1023 | |
| 1024 | /* FIXME: number of bytes read here will need updated for the |
| 1025 | mega256 when it is available. */ |
| 1026 | |
| 1027 | ULONGEST pc; |
| 1028 | unsigned char tmp; |
| 1029 | unsigned char buf[2]; |
| 1030 | |
| 1031 | read_memory (info->saved_regs[regnum].addr, buf, 2); |
| 1032 | |
| 1033 | /* Convert the PC read from memory as a big-endian to |
| 1034 | little-endian order. */ |
| 1035 | tmp = buf[0]; |
| 1036 | buf[0] = buf[1]; |
| 1037 | buf[1] = tmp; |
| 1038 | |
| 1039 | pc = (extract_unsigned_integer (buf, 2) * 2); |
| 1040 | |
| 1041 | return frame_unwind_got_constant (this_frame, regnum, pc); |
| 1042 | } |
| 1043 | |
| 1044 | return frame_unwind_got_optimized (this_frame, regnum); |
| 1045 | } |
| 1046 | |
| 1047 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
| 1048 | } |
| 1049 | |
| 1050 | static const struct frame_unwind avr_frame_unwind = { |
| 1051 | NORMAL_FRAME, |
| 1052 | avr_frame_this_id, |
| 1053 | avr_frame_prev_register, |
| 1054 | NULL, |
| 1055 | default_frame_sniffer |
| 1056 | }; |
| 1057 | |
| 1058 | static CORE_ADDR |
| 1059 | avr_frame_base_address (struct frame_info *this_frame, void **this_cache) |
| 1060 | { |
| 1061 | struct avr_unwind_cache *info |
| 1062 | = avr_frame_unwind_cache (this_frame, this_cache); |
| 1063 | |
| 1064 | return info->base; |
| 1065 | } |
| 1066 | |
| 1067 | static const struct frame_base avr_frame_base = { |
| 1068 | &avr_frame_unwind, |
| 1069 | avr_frame_base_address, |
| 1070 | avr_frame_base_address, |
| 1071 | avr_frame_base_address |
| 1072 | }; |
| 1073 | |
| 1074 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy |
| 1075 | frame. The frame ID's base needs to match the TOS value saved by |
| 1076 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ |
| 1077 | |
| 1078 | static struct frame_id |
| 1079 | avr_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 1080 | { |
| 1081 | ULONGEST base; |
| 1082 | |
| 1083 | base = get_frame_register_unsigned (this_frame, AVR_SP_REGNUM); |
| 1084 | return frame_id_build (avr_make_saddr (base), get_frame_pc (this_frame)); |
| 1085 | } |
| 1086 | |
| 1087 | /* When arguments must be pushed onto the stack, they go on in reverse |
| 1088 | order. The below implements a FILO (stack) to do this. */ |
| 1089 | |
| 1090 | struct stack_item |
| 1091 | { |
| 1092 | int len; |
| 1093 | struct stack_item *prev; |
| 1094 | void *data; |
| 1095 | }; |
| 1096 | |
| 1097 | static struct stack_item * |
| 1098 | push_stack_item (struct stack_item *prev, const bfd_byte *contents, int len) |
| 1099 | { |
| 1100 | struct stack_item *si; |
| 1101 | si = xmalloc (sizeof (struct stack_item)); |
| 1102 | si->data = xmalloc (len); |
| 1103 | si->len = len; |
| 1104 | si->prev = prev; |
| 1105 | memcpy (si->data, contents, len); |
| 1106 | return si; |
| 1107 | } |
| 1108 | |
| 1109 | static struct stack_item *pop_stack_item (struct stack_item *si); |
| 1110 | static struct stack_item * |
| 1111 | pop_stack_item (struct stack_item *si) |
| 1112 | { |
| 1113 | struct stack_item *dead = si; |
| 1114 | si = si->prev; |
| 1115 | xfree (dead->data); |
| 1116 | xfree (dead); |
| 1117 | return si; |
| 1118 | } |
| 1119 | |
| 1120 | /* Setup the function arguments for calling a function in the inferior. |
| 1121 | |
| 1122 | On the AVR architecture, there are 18 registers (R25 to R8) which are |
| 1123 | dedicated for passing function arguments. Up to the first 18 arguments |
| 1124 | (depending on size) may go into these registers. The rest go on the stack. |
| 1125 | |
| 1126 | All arguments are aligned to start in even-numbered registers (odd-sized |
| 1127 | arguments, including char, have one free register above them). For example, |
| 1128 | an int in arg1 and a char in arg2 would be passed as such: |
| 1129 | |
| 1130 | arg1 -> r25:r24 |
| 1131 | arg2 -> r22 |
| 1132 | |
| 1133 | Arguments that are larger than 2 bytes will be split between two or more |
| 1134 | registers as available, but will NOT be split between a register and the |
| 1135 | stack. Arguments that go onto the stack are pushed last arg first (this is |
| 1136 | similar to the d10v). */ |
| 1137 | |
| 1138 | /* NOTE: TRoth/2003-06-17: The rest of this comment is old looks to be |
| 1139 | inaccurate. |
| 1140 | |
| 1141 | An exceptional case exists for struct arguments (and possibly other |
| 1142 | aggregates such as arrays) -- if the size is larger than WORDSIZE bytes but |
| 1143 | not a multiple of WORDSIZE bytes. In this case the argument is never split |
| 1144 | between the registers and the stack, but instead is copied in its entirety |
| 1145 | onto the stack, AND also copied into as many registers as there is room |
| 1146 | for. In other words, space in registers permitting, two copies of the same |
| 1147 | argument are passed in. As far as I can tell, only the one on the stack is |
| 1148 | used, although that may be a function of the level of compiler |
| 1149 | optimization. I suspect this is a compiler bug. Arguments of these odd |
| 1150 | sizes are left-justified within the word (as opposed to arguments smaller |
| 1151 | than WORDSIZE bytes, which are right-justified). |
| 1152 | |
| 1153 | If the function is to return an aggregate type such as a struct, the caller |
| 1154 | must allocate space into which the callee will copy the return value. In |
| 1155 | this case, a pointer to the return value location is passed into the callee |
| 1156 | in register R0, which displaces one of the other arguments passed in via |
| 1157 | registers R0 to R2. */ |
| 1158 | |
| 1159 | static CORE_ADDR |
| 1160 | avr_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 1161 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 1162 | int nargs, struct value **args, CORE_ADDR sp, |
| 1163 | int struct_return, CORE_ADDR struct_addr) |
| 1164 | { |
| 1165 | int i; |
| 1166 | unsigned char buf[2]; |
| 1167 | CORE_ADDR return_pc = avr_convert_iaddr_to_raw (bp_addr); |
| 1168 | int regnum = AVR_ARGN_REGNUM; |
| 1169 | struct stack_item *si = NULL; |
| 1170 | |
| 1171 | #if 0 |
| 1172 | /* FIXME: TRoth/2003-06-18: Not sure what to do when returning a struct. */ |
| 1173 | if (struct_return) |
| 1174 | { |
| 1175 | fprintf_unfiltered (gdb_stderr, "struct_return: 0x%lx\n", struct_addr); |
| 1176 | regcache_cooked_write_unsigned (regcache, argreg--, struct_addr & 0xff); |
| 1177 | regcache_cooked_write_unsigned (regcache, argreg--, (struct_addr >>8) & 0xff); |
| 1178 | } |
| 1179 | #endif |
| 1180 | |
| 1181 | for (i = 0; i < nargs; i++) |
| 1182 | { |
| 1183 | int last_regnum; |
| 1184 | int j; |
| 1185 | struct value *arg = args[i]; |
| 1186 | struct type *type = check_typedef (value_type (arg)); |
| 1187 | const bfd_byte *contents = value_contents (arg); |
| 1188 | int len = TYPE_LENGTH (type); |
| 1189 | |
| 1190 | /* Calculate the potential last register needed. */ |
| 1191 | last_regnum = regnum - (len + (len & 1)); |
| 1192 | |
| 1193 | /* If there are registers available, use them. Once we start putting |
| 1194 | stuff on the stack, all subsequent args go on stack. */ |
| 1195 | if ((si == NULL) && (last_regnum >= 8)) |
| 1196 | { |
| 1197 | ULONGEST val; |
| 1198 | |
| 1199 | /* Skip a register for odd length args. */ |
| 1200 | if (len & 1) |
| 1201 | regnum--; |
| 1202 | |
| 1203 | val = extract_unsigned_integer (contents, len); |
| 1204 | for (j=0; j<len; j++) |
| 1205 | { |
| 1206 | regcache_cooked_write_unsigned (regcache, regnum--, |
| 1207 | val >> (8*(len-j-1))); |
| 1208 | } |
| 1209 | } |
| 1210 | /* No registers available, push the args onto the stack. */ |
| 1211 | else |
| 1212 | { |
| 1213 | /* From here on, we don't care about regnum. */ |
| 1214 | si = push_stack_item (si, contents, len); |
| 1215 | } |
| 1216 | } |
| 1217 | |
| 1218 | /* Push args onto the stack. */ |
| 1219 | while (si) |
| 1220 | { |
| 1221 | sp -= si->len; |
| 1222 | /* Add 1 to sp here to account for post decr nature of pushes. */ |
| 1223 | write_memory (sp+1, si->data, si->len); |
| 1224 | si = pop_stack_item (si); |
| 1225 | } |
| 1226 | |
| 1227 | /* Set the return address. For the avr, the return address is the BP_ADDR. |
| 1228 | Need to push the return address onto the stack noting that it needs to be |
| 1229 | in big-endian order on the stack. */ |
| 1230 | buf[0] = (return_pc >> 8) & 0xff; |
| 1231 | buf[1] = return_pc & 0xff; |
| 1232 | |
| 1233 | sp -= 2; |
| 1234 | write_memory (sp+1, buf, 2); /* Add one since pushes are post decr ops. */ |
| 1235 | |
| 1236 | /* Finally, update the SP register. */ |
| 1237 | regcache_cooked_write_unsigned (regcache, AVR_SP_REGNUM, |
| 1238 | avr_convert_saddr_to_raw (sp)); |
| 1239 | |
| 1240 | return sp; |
| 1241 | } |
| 1242 | |
| 1243 | /* Initialize the gdbarch structure for the AVR's. */ |
| 1244 | |
| 1245 | static struct gdbarch * |
| 1246 | avr_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 1247 | { |
| 1248 | struct gdbarch *gdbarch; |
| 1249 | struct gdbarch_tdep *tdep; |
| 1250 | |
| 1251 | /* Find a candidate among the list of pre-declared architectures. */ |
| 1252 | arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1253 | if (arches != NULL) |
| 1254 | return arches->gdbarch; |
| 1255 | |
| 1256 | /* None found, create a new architecture from the information provided. */ |
| 1257 | tdep = XMALLOC (struct gdbarch_tdep); |
| 1258 | gdbarch = gdbarch_alloc (&info, tdep); |
| 1259 | |
| 1260 | /* If we ever need to differentiate the device types, do it here. */ |
| 1261 | switch (info.bfd_arch_info->mach) |
| 1262 | { |
| 1263 | case bfd_mach_avr1: |
| 1264 | case bfd_mach_avr2: |
| 1265 | case bfd_mach_avr3: |
| 1266 | case bfd_mach_avr4: |
| 1267 | case bfd_mach_avr5: |
| 1268 | break; |
| 1269 | } |
| 1270 | |
| 1271 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1272 | set_gdbarch_int_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1273 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1274 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 1275 | set_gdbarch_ptr_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1276 | set_gdbarch_addr_bit (gdbarch, 32); |
| 1277 | |
| 1278 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1279 | set_gdbarch_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1280 | set_gdbarch_long_double_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1281 | |
| 1282 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); |
| 1283 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); |
| 1284 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); |
| 1285 | |
| 1286 | set_gdbarch_read_pc (gdbarch, avr_read_pc); |
| 1287 | set_gdbarch_write_pc (gdbarch, avr_write_pc); |
| 1288 | |
| 1289 | set_gdbarch_num_regs (gdbarch, AVR_NUM_REGS); |
| 1290 | |
| 1291 | set_gdbarch_sp_regnum (gdbarch, AVR_SP_REGNUM); |
| 1292 | set_gdbarch_pc_regnum (gdbarch, AVR_PC_REGNUM); |
| 1293 | |
| 1294 | set_gdbarch_register_name (gdbarch, avr_register_name); |
| 1295 | set_gdbarch_register_type (gdbarch, avr_register_type); |
| 1296 | |
| 1297 | set_gdbarch_return_value (gdbarch, avr_return_value); |
| 1298 | set_gdbarch_print_insn (gdbarch, print_insn_avr); |
| 1299 | |
| 1300 | set_gdbarch_push_dummy_call (gdbarch, avr_push_dummy_call); |
| 1301 | |
| 1302 | set_gdbarch_address_to_pointer (gdbarch, avr_address_to_pointer); |
| 1303 | set_gdbarch_pointer_to_address (gdbarch, avr_pointer_to_address); |
| 1304 | |
| 1305 | set_gdbarch_skip_prologue (gdbarch, avr_skip_prologue); |
| 1306 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1307 | |
| 1308 | set_gdbarch_breakpoint_from_pc (gdbarch, avr_breakpoint_from_pc); |
| 1309 | |
| 1310 | frame_unwind_append_unwinder (gdbarch, &avr_frame_unwind); |
| 1311 | frame_base_set_default (gdbarch, &avr_frame_base); |
| 1312 | |
| 1313 | set_gdbarch_dummy_id (gdbarch, avr_dummy_id); |
| 1314 | |
| 1315 | set_gdbarch_unwind_pc (gdbarch, avr_unwind_pc); |
| 1316 | set_gdbarch_unwind_sp (gdbarch, avr_unwind_sp); |
| 1317 | |
| 1318 | return gdbarch; |
| 1319 | } |
| 1320 | |
| 1321 | /* Send a query request to the avr remote target asking for values of the io |
| 1322 | registers. If args parameter is not NULL, then the user has requested info |
| 1323 | on a specific io register [This still needs implemented and is ignored for |
| 1324 | now]. The query string should be one of these forms: |
| 1325 | |
| 1326 | "Ravr.io_reg" -> reply is "NN" number of io registers |
| 1327 | |
| 1328 | "Ravr.io_reg:addr,len" where addr is first register and len is number of |
| 1329 | registers to be read. The reply should be "<NAME>,VV;" for each io register |
| 1330 | where, <NAME> is a string, and VV is the hex value of the register. |
| 1331 | |
| 1332 | All io registers are 8-bit. */ |
| 1333 | |
| 1334 | static void |
| 1335 | avr_io_reg_read_command (char *args, int from_tty) |
| 1336 | { |
| 1337 | LONGEST bufsiz = 0; |
| 1338 | gdb_byte *buf; |
| 1339 | char query[400]; |
| 1340 | char *p; |
| 1341 | unsigned int nreg = 0; |
| 1342 | unsigned int val; |
| 1343 | int i, j, k, step; |
| 1344 | |
| 1345 | /* Find out how many io registers the target has. */ |
| 1346 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
| 1347 | "avr.io_reg", &buf); |
| 1348 | |
| 1349 | if (bufsiz <= 0) |
| 1350 | { |
| 1351 | fprintf_unfiltered (gdb_stderr, |
| 1352 | _("ERR: info io_registers NOT supported " |
| 1353 | "by current target\n")); |
| 1354 | return; |
| 1355 | } |
| 1356 | |
| 1357 | if (sscanf (buf, "%x", &nreg) != 1) |
| 1358 | { |
| 1359 | fprintf_unfiltered (gdb_stderr, |
| 1360 | _("Error fetching number of io registers\n")); |
| 1361 | xfree (buf); |
| 1362 | return; |
| 1363 | } |
| 1364 | |
| 1365 | xfree (buf); |
| 1366 | |
| 1367 | reinitialize_more_filter (); |
| 1368 | |
| 1369 | printf_unfiltered (_("Target has %u io registers:\n\n"), nreg); |
| 1370 | |
| 1371 | /* only fetch up to 8 registers at a time to keep the buffer small */ |
| 1372 | step = 8; |
| 1373 | |
| 1374 | for (i = 0; i < nreg; i += step) |
| 1375 | { |
| 1376 | /* how many registers this round? */ |
| 1377 | j = step; |
| 1378 | if ((i+j) >= nreg) |
| 1379 | j = nreg - i; /* last block is less than 8 registers */ |
| 1380 | |
| 1381 | snprintf (query, sizeof (query) - 1, "avr.io_reg:%x,%x", i, j); |
| 1382 | bufsiz = target_read_alloc (¤t_target, TARGET_OBJECT_AVR, |
| 1383 | query, &buf); |
| 1384 | |
| 1385 | p = buf; |
| 1386 | for (k = i; k < (i + j); k++) |
| 1387 | { |
| 1388 | if (sscanf (p, "%[^,],%x;", query, &val) == 2) |
| 1389 | { |
| 1390 | printf_filtered ("[%02x] %-15s : %02x\n", k, query, val); |
| 1391 | while ((*p != ';') && (*p != '\0')) |
| 1392 | p++; |
| 1393 | p++; /* skip over ';' */ |
| 1394 | if (*p == '\0') |
| 1395 | break; |
| 1396 | } |
| 1397 | } |
| 1398 | |
| 1399 | xfree (buf); |
| 1400 | } |
| 1401 | } |
| 1402 | |
| 1403 | extern initialize_file_ftype _initialize_avr_tdep; /* -Wmissing-prototypes */ |
| 1404 | |
| 1405 | void |
| 1406 | _initialize_avr_tdep (void) |
| 1407 | { |
| 1408 | register_gdbarch_init (bfd_arch_avr, avr_gdbarch_init); |
| 1409 | |
| 1410 | /* Add a new command to allow the user to query the avr remote target for |
| 1411 | the values of the io space registers in a saner way than just using |
| 1412 | `x/NNNb ADDR`. */ |
| 1413 | |
| 1414 | /* FIXME: TRoth/2002-02-18: This should probably be changed to 'info avr |
| 1415 | io_registers' to signify it is not available on other platforms. */ |
| 1416 | |
| 1417 | add_cmd ("io_registers", class_info, avr_io_reg_read_command, |
| 1418 | _("query remote avr target for io space register values"), |
| 1419 | &infolist); |
| 1420 | } |