| 1 | /* i387-specific utility functions, for the remote server for GDB. |
| 2 | Copyright (C) 2000-2015 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #include "server.h" |
| 20 | #include "i387-fp.h" |
| 21 | #include "x86-xstate.h" |
| 22 | |
| 23 | static const int num_mpx_bnd_registers = 4; |
| 24 | static const int num_mpx_cfg_registers = 2; |
| 25 | static const int num_avx512_k_registers = 8; |
| 26 | static const int num_avx512_zmmh_low_registers = 16; |
| 27 | static const int num_avx512_zmmh_high_registers = 16; |
| 28 | static const int num_avx512_ymmh_registers = 16; |
| 29 | static const int num_avx512_xmm_registers = 16; |
| 30 | |
| 31 | /* Note: These functions preserve the reserved bits in control registers. |
| 32 | However, gdbserver promptly throws away that information. */ |
| 33 | |
| 34 | /* These structs should have the proper sizes and alignment on both |
| 35 | i386 and x86-64 machines. */ |
| 36 | |
| 37 | struct i387_fsave { |
| 38 | /* All these are only sixteen bits, plus padding, except for fop (which |
| 39 | is only eleven bits), and fooff / fioff (which are 32 bits each). */ |
| 40 | unsigned short fctrl; |
| 41 | unsigned short pad1; |
| 42 | unsigned short fstat; |
| 43 | unsigned short pad2; |
| 44 | unsigned short ftag; |
| 45 | unsigned short pad3; |
| 46 | unsigned int fioff; |
| 47 | unsigned short fiseg; |
| 48 | unsigned short fop; |
| 49 | unsigned int fooff; |
| 50 | unsigned short foseg; |
| 51 | unsigned short pad4; |
| 52 | |
| 53 | /* Space for eight 80-bit FP values. */ |
| 54 | unsigned char st_space[80]; |
| 55 | }; |
| 56 | |
| 57 | struct i387_fxsave { |
| 58 | /* All these are only sixteen bits, plus padding, except for fop (which |
| 59 | is only eleven bits), and fooff / fioff (which are 32 bits each). */ |
| 60 | unsigned short fctrl; |
| 61 | unsigned short fstat; |
| 62 | unsigned short ftag; |
| 63 | unsigned short fop; |
| 64 | unsigned int fioff; |
| 65 | unsigned short fiseg; |
| 66 | unsigned short pad1; |
| 67 | unsigned int fooff; |
| 68 | unsigned short foseg; |
| 69 | unsigned short pad12; |
| 70 | |
| 71 | unsigned int mxcsr; |
| 72 | unsigned int pad3; |
| 73 | |
| 74 | /* Space for eight 80-bit FP values in 128-bit spaces. */ |
| 75 | unsigned char st_space[128]; |
| 76 | |
| 77 | /* Space for eight 128-bit XMM values, or 16 on x86-64. */ |
| 78 | unsigned char xmm_space[256]; |
| 79 | }; |
| 80 | |
| 81 | struct i387_xsave { |
| 82 | /* All these are only sixteen bits, plus padding, except for fop (which |
| 83 | is only eleven bits), and fooff / fioff (which are 32 bits each). */ |
| 84 | unsigned short fctrl; |
| 85 | unsigned short fstat; |
| 86 | unsigned short ftag; |
| 87 | unsigned short fop; |
| 88 | unsigned int fioff; |
| 89 | unsigned short fiseg; |
| 90 | unsigned short pad1; |
| 91 | unsigned int fooff; |
| 92 | unsigned short foseg; |
| 93 | unsigned short pad12; |
| 94 | |
| 95 | unsigned int mxcsr; |
| 96 | unsigned int mxcsr_mask; |
| 97 | |
| 98 | /* Space for eight 80-bit FP values in 128-bit spaces. */ |
| 99 | unsigned char st_space[128]; |
| 100 | |
| 101 | /* Space for eight 128-bit XMM values, or 16 on x86-64. */ |
| 102 | unsigned char xmm_space[256]; |
| 103 | |
| 104 | unsigned char reserved1[48]; |
| 105 | |
| 106 | /* The extended control register 0 (the XFEATURE_ENABLED_MASK |
| 107 | register). */ |
| 108 | unsigned long long xcr0; |
| 109 | |
| 110 | unsigned char reserved2[40]; |
| 111 | |
| 112 | /* The XSTATE_BV bit vector. */ |
| 113 | unsigned long long xstate_bv; |
| 114 | |
| 115 | unsigned char reserved3[56]; |
| 116 | |
| 117 | /* Space for eight upper 128-bit YMM values, or 16 on x86-64. */ |
| 118 | unsigned char ymmh_space[256]; |
| 119 | |
| 120 | unsigned char reserved4[128]; |
| 121 | |
| 122 | /* Space for 4 bound registers values of 128 bits. */ |
| 123 | unsigned char mpx_bnd_space[64]; |
| 124 | |
| 125 | /* Space for 2 MPX configuration registers of 64 bits |
| 126 | plus reserved space. */ |
| 127 | unsigned char mpx_cfg_space[16]; |
| 128 | |
| 129 | unsigned char reserved5[48]; |
| 130 | |
| 131 | /* Space for 8 OpMask register values of 64 bits. */ |
| 132 | unsigned char k_space[64]; |
| 133 | |
| 134 | /* Space for 16 256-bit zmm0-15. */ |
| 135 | unsigned char zmmh_low_space[512]; |
| 136 | |
| 137 | /* Space for 16 512-bit zmm16-31 values. */ |
| 138 | unsigned char zmmh_high_space[1024]; |
| 139 | }; |
| 140 | |
| 141 | void |
| 142 | i387_cache_to_fsave (struct regcache *regcache, void *buf) |
| 143 | { |
| 144 | struct i387_fsave *fp = (struct i387_fsave *) buf; |
| 145 | int i; |
| 146 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 147 | unsigned long val, val2; |
| 148 | |
| 149 | for (i = 0; i < 8; i++) |
| 150 | collect_register (regcache, i + st0_regnum, |
| 151 | ((char *) &fp->st_space[0]) + i * 10); |
| 152 | |
| 153 | collect_register_by_name (regcache, "fioff", &fp->fioff); |
| 154 | collect_register_by_name (regcache, "fooff", &fp->fooff); |
| 155 | |
| 156 | /* This one's 11 bits... */ |
| 157 | collect_register_by_name (regcache, "fop", &val2); |
| 158 | fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800); |
| 159 | |
| 160 | /* Some registers are 16-bit. */ |
| 161 | collect_register_by_name (regcache, "fctrl", &val); |
| 162 | fp->fctrl = val; |
| 163 | |
| 164 | collect_register_by_name (regcache, "fstat", &val); |
| 165 | val &= 0xFFFF; |
| 166 | fp->fstat = val; |
| 167 | |
| 168 | collect_register_by_name (regcache, "ftag", &val); |
| 169 | val &= 0xFFFF; |
| 170 | fp->ftag = val; |
| 171 | |
| 172 | collect_register_by_name (regcache, "fiseg", &val); |
| 173 | val &= 0xFFFF; |
| 174 | fp->fiseg = val; |
| 175 | |
| 176 | collect_register_by_name (regcache, "foseg", &val); |
| 177 | val &= 0xFFFF; |
| 178 | fp->foseg = val; |
| 179 | } |
| 180 | |
| 181 | void |
| 182 | i387_fsave_to_cache (struct regcache *regcache, const void *buf) |
| 183 | { |
| 184 | struct i387_fsave *fp = (struct i387_fsave *) buf; |
| 185 | int i; |
| 186 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 187 | unsigned long val; |
| 188 | |
| 189 | for (i = 0; i < 8; i++) |
| 190 | supply_register (regcache, i + st0_regnum, |
| 191 | ((char *) &fp->st_space[0]) + i * 10); |
| 192 | |
| 193 | supply_register_by_name (regcache, "fioff", &fp->fioff); |
| 194 | supply_register_by_name (regcache, "fooff", &fp->fooff); |
| 195 | |
| 196 | /* Some registers are 16-bit. */ |
| 197 | val = fp->fctrl & 0xFFFF; |
| 198 | supply_register_by_name (regcache, "fctrl", &val); |
| 199 | |
| 200 | val = fp->fstat & 0xFFFF; |
| 201 | supply_register_by_name (regcache, "fstat", &val); |
| 202 | |
| 203 | val = fp->ftag & 0xFFFF; |
| 204 | supply_register_by_name (regcache, "ftag", &val); |
| 205 | |
| 206 | val = fp->fiseg & 0xFFFF; |
| 207 | supply_register_by_name (regcache, "fiseg", &val); |
| 208 | |
| 209 | val = fp->foseg & 0xFFFF; |
| 210 | supply_register_by_name (regcache, "foseg", &val); |
| 211 | |
| 212 | /* fop has only 11 valid bits. */ |
| 213 | val = (fp->fop) & 0x7FF; |
| 214 | supply_register_by_name (regcache, "fop", &val); |
| 215 | } |
| 216 | |
| 217 | void |
| 218 | i387_cache_to_fxsave (struct regcache *regcache, void *buf) |
| 219 | { |
| 220 | struct i387_fxsave *fp = (struct i387_fxsave *) buf; |
| 221 | int i; |
| 222 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 223 | int xmm0_regnum = find_regno (regcache->tdesc, "xmm0"); |
| 224 | unsigned long val, val2; |
| 225 | /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */ |
| 226 | int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8; |
| 227 | |
| 228 | for (i = 0; i < 8; i++) |
| 229 | collect_register (regcache, i + st0_regnum, |
| 230 | ((char *) &fp->st_space[0]) + i * 16); |
| 231 | for (i = 0; i < num_xmm_registers; i++) |
| 232 | collect_register (regcache, i + xmm0_regnum, |
| 233 | ((char *) &fp->xmm_space[0]) + i * 16); |
| 234 | |
| 235 | collect_register_by_name (regcache, "fioff", &fp->fioff); |
| 236 | collect_register_by_name (regcache, "fooff", &fp->fooff); |
| 237 | collect_register_by_name (regcache, "mxcsr", &fp->mxcsr); |
| 238 | |
| 239 | /* This one's 11 bits... */ |
| 240 | collect_register_by_name (regcache, "fop", &val2); |
| 241 | fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800); |
| 242 | |
| 243 | /* Some registers are 16-bit. */ |
| 244 | collect_register_by_name (regcache, "fctrl", &val); |
| 245 | fp->fctrl = val; |
| 246 | |
| 247 | collect_register_by_name (regcache, "fstat", &val); |
| 248 | fp->fstat = val; |
| 249 | |
| 250 | /* Convert to the simplifed tag form stored in fxsave data. */ |
| 251 | collect_register_by_name (regcache, "ftag", &val); |
| 252 | val &= 0xFFFF; |
| 253 | val2 = 0; |
| 254 | for (i = 7; i >= 0; i--) |
| 255 | { |
| 256 | int tag = (val >> (i * 2)) & 3; |
| 257 | |
| 258 | if (tag != 3) |
| 259 | val2 |= (1 << i); |
| 260 | } |
| 261 | fp->ftag = val2; |
| 262 | |
| 263 | collect_register_by_name (regcache, "fiseg", &val); |
| 264 | fp->fiseg = val; |
| 265 | |
| 266 | collect_register_by_name (regcache, "foseg", &val); |
| 267 | fp->foseg = val; |
| 268 | } |
| 269 | |
| 270 | void |
| 271 | i387_cache_to_xsave (struct regcache *regcache, void *buf) |
| 272 | { |
| 273 | struct i387_xsave *fp = (struct i387_xsave *) buf; |
| 274 | int i; |
| 275 | unsigned long val, val2; |
| 276 | unsigned int clear_bv; |
| 277 | unsigned long long xstate_bv = 0; |
| 278 | char raw[64]; |
| 279 | char *p; |
| 280 | /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */ |
| 281 | int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8; |
| 282 | |
| 283 | /* The supported bits in `xstat_bv' are 1 byte. Clear part in |
| 284 | vector registers if its bit in xstat_bv is zero. */ |
| 285 | clear_bv = (~fp->xstate_bv) & x86_xcr0; |
| 286 | |
| 287 | /* Clear part in x87 and vector registers if its bit in xstat_bv is |
| 288 | zero. */ |
| 289 | if (clear_bv) |
| 290 | { |
| 291 | if ((clear_bv & X86_XSTATE_X87)) |
| 292 | for (i = 0; i < 8; i++) |
| 293 | memset (((char *) &fp->st_space[0]) + i * 16, 0, 10); |
| 294 | |
| 295 | if ((clear_bv & X86_XSTATE_SSE)) |
| 296 | for (i = 0; i < num_xmm_registers; i++) |
| 297 | memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16); |
| 298 | |
| 299 | if ((clear_bv & X86_XSTATE_AVX)) |
| 300 | for (i = 0; i < num_xmm_registers; i++) |
| 301 | memset (((char *) &fp->ymmh_space[0]) + i * 16, 0, 16); |
| 302 | |
| 303 | if ((clear_bv & X86_XSTATE_BNDREGS)) |
| 304 | for (i = 0; i < num_mpx_bnd_registers; i++) |
| 305 | memset (((char *) &fp->mpx_bnd_space[0]) + i * 16, 0, 16); |
| 306 | |
| 307 | if ((clear_bv & X86_XSTATE_BNDCFG)) |
| 308 | for (i = 0; i < num_mpx_cfg_registers; i++) |
| 309 | memset (((char *) &fp->mpx_cfg_space[0]) + i * 8, 0, 8); |
| 310 | |
| 311 | if ((clear_bv & X86_XSTATE_K)) |
| 312 | for (i = 0; i < num_avx512_k_registers; i++) |
| 313 | memset (((char *) &fp->k_space[0]) + i * 8, 0, 8); |
| 314 | |
| 315 | if ((clear_bv & X86_XSTATE_ZMM_H)) |
| 316 | for (i = 0; i < num_avx512_zmmh_low_registers; i++) |
| 317 | memset (((char *) &fp->zmmh_low_space[0]) + i * 32, 0, 32); |
| 318 | |
| 319 | if ((clear_bv & X86_XSTATE_ZMM)) |
| 320 | { |
| 321 | for (i = 0; i < num_avx512_zmmh_high_registers; i++) |
| 322 | memset (((char *) &fp->zmmh_low_space[0]) + 32 + i * 64, 0, 32); |
| 323 | for (i = 0; i < num_avx512_xmm_registers; i++) |
| 324 | memset (((char *) &fp->zmmh_high_space[0]) + i * 64, 0, 16); |
| 325 | for (i = 0; i < num_avx512_ymmh_registers; i++) |
| 326 | memset (((char *) &fp->zmmh_high_space[0]) + 16 + i * 64, 0, 16); |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | /* Check if any x87 registers are changed. */ |
| 331 | if ((x86_xcr0 & X86_XSTATE_X87)) |
| 332 | { |
| 333 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 334 | |
| 335 | for (i = 0; i < 8; i++) |
| 336 | { |
| 337 | collect_register (regcache, i + st0_regnum, raw); |
| 338 | p = ((char *) &fp->st_space[0]) + i * 16; |
| 339 | if (memcmp (raw, p, 10)) |
| 340 | { |
| 341 | xstate_bv |= X86_XSTATE_X87; |
| 342 | memcpy (p, raw, 10); |
| 343 | } |
| 344 | } |
| 345 | } |
| 346 | |
| 347 | /* Check if any SSE registers are changed. */ |
| 348 | if ((x86_xcr0 & X86_XSTATE_SSE)) |
| 349 | { |
| 350 | int xmm0_regnum = find_regno (regcache->tdesc, "xmm0"); |
| 351 | |
| 352 | for (i = 0; i < num_xmm_registers; i++) |
| 353 | { |
| 354 | collect_register (regcache, i + xmm0_regnum, raw); |
| 355 | p = ((char *) &fp->xmm_space[0]) + i * 16; |
| 356 | if (memcmp (raw, p, 16)) |
| 357 | { |
| 358 | xstate_bv |= X86_XSTATE_SSE; |
| 359 | memcpy (p, raw, 16); |
| 360 | } |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | /* Check if any AVX registers are changed. */ |
| 365 | if ((x86_xcr0 & X86_XSTATE_AVX)) |
| 366 | { |
| 367 | int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h"); |
| 368 | |
| 369 | for (i = 0; i < num_xmm_registers; i++) |
| 370 | { |
| 371 | collect_register (regcache, i + ymm0h_regnum, raw); |
| 372 | p = ((char *) &fp->ymmh_space[0]) + i * 16; |
| 373 | if (memcmp (raw, p, 16)) |
| 374 | { |
| 375 | xstate_bv |= X86_XSTATE_AVX; |
| 376 | memcpy (p, raw, 16); |
| 377 | } |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | /* Check if any bound register has changed. */ |
| 382 | if ((x86_xcr0 & X86_XSTATE_BNDREGS)) |
| 383 | { |
| 384 | int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw"); |
| 385 | |
| 386 | for (i = 0; i < num_mpx_bnd_registers; i++) |
| 387 | { |
| 388 | collect_register (regcache, i + bnd0r_regnum, raw); |
| 389 | p = ((char *) &fp->mpx_bnd_space[0]) + i * 16; |
| 390 | if (memcmp (raw, p, 16)) |
| 391 | { |
| 392 | xstate_bv |= X86_XSTATE_BNDREGS; |
| 393 | memcpy (p, raw, 16); |
| 394 | } |
| 395 | } |
| 396 | } |
| 397 | |
| 398 | /* Check if any status register has changed. */ |
| 399 | if ((x86_xcr0 & X86_XSTATE_BNDCFG)) |
| 400 | { |
| 401 | int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu"); |
| 402 | |
| 403 | for (i = 0; i < num_mpx_cfg_registers; i++) |
| 404 | { |
| 405 | collect_register (regcache, i + bndcfg_regnum, raw); |
| 406 | p = ((char *) &fp->mpx_cfg_space[0]) + i * 8; |
| 407 | if (memcmp (raw, p, 8)) |
| 408 | { |
| 409 | xstate_bv |= X86_XSTATE_BNDCFG; |
| 410 | memcpy (p, raw, 8); |
| 411 | } |
| 412 | } |
| 413 | } |
| 414 | |
| 415 | /* Check if any K registers are changed. */ |
| 416 | if ((x86_xcr0 & X86_XSTATE_K)) |
| 417 | { |
| 418 | int k0_regnum = find_regno (regcache->tdesc, "k0"); |
| 419 | |
| 420 | for (i = 0; i < num_avx512_k_registers; i++) |
| 421 | { |
| 422 | collect_register (regcache, i + k0_regnum, raw); |
| 423 | p = ((char *) &fp->k_space[0]) + i * 8; |
| 424 | if (memcmp (raw, p, 8) != 0) |
| 425 | { |
| 426 | xstate_bv |= X86_XSTATE_K; |
| 427 | memcpy (p, raw, 8); |
| 428 | } |
| 429 | } |
| 430 | } |
| 431 | |
| 432 | /* Check if any of ZMM0H-ZMM15H registers are changed. */ |
| 433 | if ((x86_xcr0 & X86_XSTATE_ZMM_H)) |
| 434 | { |
| 435 | int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h"); |
| 436 | |
| 437 | for (i = 0; i < num_avx512_zmmh_low_registers; i++) |
| 438 | { |
| 439 | collect_register (regcache, i + zmm0h_regnum, raw); |
| 440 | p = ((char *) &fp->zmmh_low_space[0]) + i * 32; |
| 441 | if (memcmp (raw, p, 32) != 0) |
| 442 | { |
| 443 | xstate_bv |= X86_XSTATE_ZMM_H; |
| 444 | memcpy (p, raw, 32); |
| 445 | } |
| 446 | } |
| 447 | } |
| 448 | |
| 449 | /* Check if any of ZMM16H-ZMM31H registers are changed. */ |
| 450 | if ((x86_xcr0 & X86_XSTATE_ZMM)) |
| 451 | { |
| 452 | int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h"); |
| 453 | |
| 454 | for (i = 0; i < num_avx512_zmmh_high_registers; i++) |
| 455 | { |
| 456 | collect_register (regcache, i + zmm16h_regnum, raw); |
| 457 | p = ((char *) &fp->zmmh_high_space[0]) + 32 + i * 64; |
| 458 | if (memcmp (raw, p, 32) != 0) |
| 459 | { |
| 460 | xstate_bv |= X86_XSTATE_ZMM; |
| 461 | memcpy (p, raw, 32); |
| 462 | } |
| 463 | } |
| 464 | } |
| 465 | |
| 466 | /* Check if any XMM_AVX512 registers are changed. */ |
| 467 | if ((x86_xcr0 & X86_XSTATE_ZMM)) |
| 468 | { |
| 469 | int xmm_avx512_regnum = find_regno (regcache->tdesc, "xmm16"); |
| 470 | |
| 471 | for (i = 0; i < num_avx512_xmm_registers; i++) |
| 472 | { |
| 473 | collect_register (regcache, i + xmm_avx512_regnum, raw); |
| 474 | p = ((char *) &fp->zmmh_high_space[0]) + i * 64; |
| 475 | if (memcmp (raw, p, 16) != 0) |
| 476 | { |
| 477 | xstate_bv |= X86_XSTATE_ZMM; |
| 478 | memcpy (p, raw, 16); |
| 479 | } |
| 480 | } |
| 481 | } |
| 482 | |
| 483 | /* Check if any YMMH_AVX512 registers are changed. */ |
| 484 | if ((x86_xcr0 & X86_XSTATE_ZMM)) |
| 485 | { |
| 486 | int ymmh_avx512_regnum = find_regno (regcache->tdesc, "ymm16h"); |
| 487 | |
| 488 | for (i = 0; i < num_avx512_ymmh_registers; i++) |
| 489 | { |
| 490 | collect_register (regcache, i + ymmh_avx512_regnum, raw); |
| 491 | p = ((char *) &fp->zmmh_high_space[0]) + 16 + i * 64; |
| 492 | if (memcmp (raw, p, 16) != 0) |
| 493 | { |
| 494 | xstate_bv |= X86_XSTATE_ZMM; |
| 495 | memcpy (p, raw, 16); |
| 496 | } |
| 497 | } |
| 498 | } |
| 499 | |
| 500 | /* Update the corresponding bits in xstate_bv if any SSE/AVX |
| 501 | registers are changed. */ |
| 502 | fp->xstate_bv |= xstate_bv; |
| 503 | |
| 504 | collect_register_by_name (regcache, "fioff", &fp->fioff); |
| 505 | collect_register_by_name (regcache, "fooff", &fp->fooff); |
| 506 | collect_register_by_name (regcache, "mxcsr", &fp->mxcsr); |
| 507 | |
| 508 | /* This one's 11 bits... */ |
| 509 | collect_register_by_name (regcache, "fop", &val2); |
| 510 | fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800); |
| 511 | |
| 512 | /* Some registers are 16-bit. */ |
| 513 | collect_register_by_name (regcache, "fctrl", &val); |
| 514 | fp->fctrl = val; |
| 515 | |
| 516 | collect_register_by_name (regcache, "fstat", &val); |
| 517 | fp->fstat = val; |
| 518 | |
| 519 | /* Convert to the simplifed tag form stored in fxsave data. */ |
| 520 | collect_register_by_name (regcache, "ftag", &val); |
| 521 | val &= 0xFFFF; |
| 522 | val2 = 0; |
| 523 | for (i = 7; i >= 0; i--) |
| 524 | { |
| 525 | int tag = (val >> (i * 2)) & 3; |
| 526 | |
| 527 | if (tag != 3) |
| 528 | val2 |= (1 << i); |
| 529 | } |
| 530 | fp->ftag = val2; |
| 531 | |
| 532 | collect_register_by_name (regcache, "fiseg", &val); |
| 533 | fp->fiseg = val; |
| 534 | |
| 535 | collect_register_by_name (regcache, "foseg", &val); |
| 536 | fp->foseg = val; |
| 537 | } |
| 538 | |
| 539 | static int |
| 540 | i387_ftag (struct i387_fxsave *fp, int regno) |
| 541 | { |
| 542 | unsigned char *raw = &fp->st_space[regno * 16]; |
| 543 | unsigned int exponent; |
| 544 | unsigned long fraction[2]; |
| 545 | int integer; |
| 546 | |
| 547 | integer = raw[7] & 0x80; |
| 548 | exponent = (((raw[9] & 0x7f) << 8) | raw[8]); |
| 549 | fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]); |
| 550 | fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16) |
| 551 | | (raw[5] << 8) | raw[4]); |
| 552 | |
| 553 | if (exponent == 0x7fff) |
| 554 | { |
| 555 | /* Special. */ |
| 556 | return (2); |
| 557 | } |
| 558 | else if (exponent == 0x0000) |
| 559 | { |
| 560 | if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer) |
| 561 | { |
| 562 | /* Zero. */ |
| 563 | return (1); |
| 564 | } |
| 565 | else |
| 566 | { |
| 567 | /* Special. */ |
| 568 | return (2); |
| 569 | } |
| 570 | } |
| 571 | else |
| 572 | { |
| 573 | if (integer) |
| 574 | { |
| 575 | /* Valid. */ |
| 576 | return (0); |
| 577 | } |
| 578 | else |
| 579 | { |
| 580 | /* Special. */ |
| 581 | return (2); |
| 582 | } |
| 583 | } |
| 584 | } |
| 585 | |
| 586 | void |
| 587 | i387_fxsave_to_cache (struct regcache *regcache, const void *buf) |
| 588 | { |
| 589 | struct i387_fxsave *fp = (struct i387_fxsave *) buf; |
| 590 | int i, top; |
| 591 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 592 | int xmm0_regnum = find_regno (regcache->tdesc, "xmm0"); |
| 593 | unsigned long val; |
| 594 | /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */ |
| 595 | int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8; |
| 596 | |
| 597 | for (i = 0; i < 8; i++) |
| 598 | supply_register (regcache, i + st0_regnum, |
| 599 | ((char *) &fp->st_space[0]) + i * 16); |
| 600 | for (i = 0; i < num_xmm_registers; i++) |
| 601 | supply_register (regcache, i + xmm0_regnum, |
| 602 | ((char *) &fp->xmm_space[0]) + i * 16); |
| 603 | |
| 604 | supply_register_by_name (regcache, "fioff", &fp->fioff); |
| 605 | supply_register_by_name (regcache, "fooff", &fp->fooff); |
| 606 | supply_register_by_name (regcache, "mxcsr", &fp->mxcsr); |
| 607 | |
| 608 | /* Some registers are 16-bit. */ |
| 609 | val = fp->fctrl & 0xFFFF; |
| 610 | supply_register_by_name (regcache, "fctrl", &val); |
| 611 | |
| 612 | val = fp->fstat & 0xFFFF; |
| 613 | supply_register_by_name (regcache, "fstat", &val); |
| 614 | |
| 615 | /* Generate the form of ftag data that GDB expects. */ |
| 616 | top = (fp->fstat >> 11) & 0x7; |
| 617 | val = 0; |
| 618 | for (i = 7; i >= 0; i--) |
| 619 | { |
| 620 | int tag; |
| 621 | if (fp->ftag & (1 << i)) |
| 622 | tag = i387_ftag (fp, (i + 8 - top) % 8); |
| 623 | else |
| 624 | tag = 3; |
| 625 | val |= tag << (2 * i); |
| 626 | } |
| 627 | supply_register_by_name (regcache, "ftag", &val); |
| 628 | |
| 629 | val = fp->fiseg & 0xFFFF; |
| 630 | supply_register_by_name (regcache, "fiseg", &val); |
| 631 | |
| 632 | val = fp->foseg & 0xFFFF; |
| 633 | supply_register_by_name (regcache, "foseg", &val); |
| 634 | |
| 635 | val = (fp->fop) & 0x7FF; |
| 636 | supply_register_by_name (regcache, "fop", &val); |
| 637 | } |
| 638 | |
| 639 | void |
| 640 | i387_xsave_to_cache (struct regcache *regcache, const void *buf) |
| 641 | { |
| 642 | struct i387_xsave *fp = (struct i387_xsave *) buf; |
| 643 | struct i387_fxsave *fxp = (struct i387_fxsave *) buf; |
| 644 | int i, top; |
| 645 | unsigned long val; |
| 646 | unsigned int clear_bv; |
| 647 | gdb_byte *p; |
| 648 | /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */ |
| 649 | int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8; |
| 650 | |
| 651 | /* The supported bits in `xstat_bv' are 1 byte. Clear part in |
| 652 | vector registers if its bit in xstat_bv is zero. */ |
| 653 | clear_bv = (~fp->xstate_bv) & x86_xcr0; |
| 654 | |
| 655 | /* Check if any x87 registers are changed. */ |
| 656 | if ((x86_xcr0 & X86_XSTATE_X87) != 0) |
| 657 | { |
| 658 | int st0_regnum = find_regno (regcache->tdesc, "st0"); |
| 659 | |
| 660 | if ((clear_bv & X86_XSTATE_X87) != 0) |
| 661 | { |
| 662 | for (i = 0; i < 8; i++) |
| 663 | supply_register_zeroed (regcache, i + st0_regnum); |
| 664 | } |
| 665 | else |
| 666 | { |
| 667 | p = (gdb_byte *) &fp->st_space[0]; |
| 668 | for (i = 0; i < 8; i++) |
| 669 | supply_register (regcache, i + st0_regnum, p + i * 16); |
| 670 | } |
| 671 | } |
| 672 | |
| 673 | if ((x86_xcr0 & X86_XSTATE_SSE) != 0) |
| 674 | { |
| 675 | int xmm0_regnum = find_regno (regcache->tdesc, "xmm0"); |
| 676 | |
| 677 | if ((clear_bv & X86_XSTATE_SSE)) |
| 678 | { |
| 679 | for (i = 0; i < num_xmm_registers; i++) |
| 680 | supply_register_zeroed (regcache, i + xmm0_regnum); |
| 681 | } |
| 682 | else |
| 683 | { |
| 684 | p = (gdb_byte *) &fp->xmm_space[0]; |
| 685 | for (i = 0; i < num_xmm_registers; i++) |
| 686 | supply_register (regcache, i + xmm0_regnum, p + i * 16); |
| 687 | } |
| 688 | } |
| 689 | |
| 690 | if ((x86_xcr0 & X86_XSTATE_AVX) != 0) |
| 691 | { |
| 692 | int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h"); |
| 693 | |
| 694 | if ((clear_bv & X86_XSTATE_AVX) != 0) |
| 695 | { |
| 696 | for (i = 0; i < num_xmm_registers; i++) |
| 697 | supply_register_zeroed (regcache, i + ymm0h_regnum); |
| 698 | } |
| 699 | else |
| 700 | { |
| 701 | p = (gdb_byte *) &fp->ymmh_space[0]; |
| 702 | for (i = 0; i < num_xmm_registers; i++) |
| 703 | supply_register (regcache, i + ymm0h_regnum, p + i * 16); |
| 704 | } |
| 705 | } |
| 706 | |
| 707 | if ((x86_xcr0 & X86_XSTATE_BNDREGS)) |
| 708 | { |
| 709 | int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw"); |
| 710 | |
| 711 | |
| 712 | if ((clear_bv & X86_XSTATE_BNDREGS) != 0) |
| 713 | { |
| 714 | for (i = 0; i < num_mpx_bnd_registers; i++) |
| 715 | supply_register_zeroed (regcache, i + bnd0r_regnum); |
| 716 | } |
| 717 | else |
| 718 | { |
| 719 | p = (gdb_byte *) &fp->mpx_bnd_space[0]; |
| 720 | for (i = 0; i < num_mpx_bnd_registers; i++) |
| 721 | supply_register (regcache, i + bnd0r_regnum, p + i * 16); |
| 722 | } |
| 723 | |
| 724 | } |
| 725 | |
| 726 | if ((x86_xcr0 & X86_XSTATE_BNDCFG)) |
| 727 | { |
| 728 | int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu"); |
| 729 | |
| 730 | if ((clear_bv & X86_XSTATE_BNDCFG) != 0) |
| 731 | { |
| 732 | for (i = 0; i < num_mpx_cfg_registers; i++) |
| 733 | supply_register_zeroed (regcache, i + bndcfg_regnum); |
| 734 | } |
| 735 | else |
| 736 | { |
| 737 | p = (gdb_byte *) &fp->mpx_cfg_space[0]; |
| 738 | for (i = 0; i < num_mpx_cfg_registers; i++) |
| 739 | supply_register (regcache, i + bndcfg_regnum, p + i * 8); |
| 740 | } |
| 741 | } |
| 742 | |
| 743 | if ((x86_xcr0 & X86_XSTATE_K) != 0) |
| 744 | { |
| 745 | int k0_regnum = find_regno (regcache->tdesc, "k0"); |
| 746 | |
| 747 | if ((clear_bv & X86_XSTATE_K) != 0) |
| 748 | { |
| 749 | for (i = 0; i < num_avx512_k_registers; i++) |
| 750 | supply_register_zeroed (regcache, i + k0_regnum); |
| 751 | } |
| 752 | else |
| 753 | { |
| 754 | p = (gdb_byte *) &fp->k_space[0]; |
| 755 | for (i = 0; i < num_avx512_k_registers; i++) |
| 756 | supply_register (regcache, i + k0_regnum, p + i * 8); |
| 757 | } |
| 758 | } |
| 759 | |
| 760 | if ((x86_xcr0 & X86_XSTATE_ZMM_H) != 0) |
| 761 | { |
| 762 | int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h"); |
| 763 | |
| 764 | if ((clear_bv & X86_XSTATE_ZMM_H) != 0) |
| 765 | { |
| 766 | for (i = 0; i < num_avx512_zmmh_low_registers; i++) |
| 767 | supply_register_zeroed (regcache, i + zmm0h_regnum); |
| 768 | } |
| 769 | else |
| 770 | { |
| 771 | p = (gdb_byte *) &fp->zmmh_low_space[0]; |
| 772 | for (i = 0; i < num_avx512_zmmh_low_registers; i++) |
| 773 | supply_register (regcache, i + zmm0h_regnum, p + i * 32); |
| 774 | } |
| 775 | } |
| 776 | |
| 777 | if ((x86_xcr0 & X86_XSTATE_ZMM) != 0) |
| 778 | { |
| 779 | int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h"); |
| 780 | int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h"); |
| 781 | int xmm16_regnum = find_regno (regcache->tdesc, "xmm16"); |
| 782 | |
| 783 | if ((clear_bv & X86_XSTATE_ZMM) != 0) |
| 784 | { |
| 785 | for (i = 0; i < num_avx512_zmmh_high_registers; i++) |
| 786 | supply_register_zeroed (regcache, i + zmm16h_regnum); |
| 787 | for (i = 0; i < num_avx512_ymmh_registers; i++) |
| 788 | supply_register_zeroed (regcache, i + ymm16h_regnum); |
| 789 | for (i = 0; i < num_avx512_xmm_registers; i++) |
| 790 | supply_register_zeroed (regcache, i + xmm16_regnum); |
| 791 | } |
| 792 | else |
| 793 | { |
| 794 | p = (gdb_byte *) &fp->zmmh_high_space[0]; |
| 795 | for (i = 0; i < num_avx512_zmmh_high_registers; i++) |
| 796 | supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64); |
| 797 | for (i = 0; i < num_avx512_ymmh_registers; i++) |
| 798 | supply_register (regcache, i + ymm16h_regnum, p + 16 + i * 64); |
| 799 | for (i = 0; i < num_avx512_xmm_registers; i++) |
| 800 | supply_register (regcache, i + xmm16_regnum, p + i * 64); |
| 801 | } |
| 802 | } |
| 803 | |
| 804 | supply_register_by_name (regcache, "fioff", &fp->fioff); |
| 805 | supply_register_by_name (regcache, "fooff", &fp->fooff); |
| 806 | supply_register_by_name (regcache, "mxcsr", &fp->mxcsr); |
| 807 | |
| 808 | /* Some registers are 16-bit. */ |
| 809 | val = fp->fctrl & 0xFFFF; |
| 810 | supply_register_by_name (regcache, "fctrl", &val); |
| 811 | |
| 812 | val = fp->fstat & 0xFFFF; |
| 813 | supply_register_by_name (regcache, "fstat", &val); |
| 814 | |
| 815 | /* Generate the form of ftag data that GDB expects. */ |
| 816 | top = (fp->fstat >> 11) & 0x7; |
| 817 | val = 0; |
| 818 | for (i = 7; i >= 0; i--) |
| 819 | { |
| 820 | int tag; |
| 821 | if (fp->ftag & (1 << i)) |
| 822 | tag = i387_ftag (fxp, (i + 8 - top) % 8); |
| 823 | else |
| 824 | tag = 3; |
| 825 | val |= tag << (2 * i); |
| 826 | } |
| 827 | supply_register_by_name (regcache, "ftag", &val); |
| 828 | |
| 829 | val = fp->fiseg & 0xFFFF; |
| 830 | supply_register_by_name (regcache, "fiseg", &val); |
| 831 | |
| 832 | val = fp->foseg & 0xFFFF; |
| 833 | supply_register_by_name (regcache, "foseg", &val); |
| 834 | |
| 835 | val = (fp->fop) & 0x7FF; |
| 836 | supply_register_by_name (regcache, "fop", &val); |
| 837 | } |
| 838 | |
| 839 | /* Default to SSE. */ |
| 840 | unsigned long long x86_xcr0 = X86_XSTATE_SSE_MASK; |