| 1 | /* Target-dependent code for the ia64. |
| 2 | |
| 3 | Copyright (C) 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | #ifndef IA64_TDEP_H |
| 21 | #define IA64_TDEP_H |
| 22 | |
| 23 | /* Register numbers of various important registers. */ |
| 24 | |
| 25 | /* General registers; there are 128 of these 64 bit wide registers. |
| 26 | The first 32 are static and the last 96 are stacked. */ |
| 27 | #define IA64_GR0_REGNUM 0 |
| 28 | #define IA64_GR1_REGNUM (IA64_GR0_REGNUM + 1) |
| 29 | #define IA64_GR2_REGNUM (IA64_GR0_REGNUM + 2) |
| 30 | #define IA64_GR3_REGNUM (IA64_GR0_REGNUM + 3) |
| 31 | #define IA64_GR4_REGNUM (IA64_GR0_REGNUM + 4) |
| 32 | #define IA64_GR5_REGNUM (IA64_GR0_REGNUM + 5) |
| 33 | #define IA64_GR6_REGNUM (IA64_GR0_REGNUM + 6) |
| 34 | #define IA64_GR7_REGNUM (IA64_GR0_REGNUM + 7) |
| 35 | #define IA64_GR8_REGNUM (IA64_GR0_REGNUM + 8) |
| 36 | #define IA64_GR9_REGNUM (IA64_GR0_REGNUM + 9) |
| 37 | #define IA64_GR10_REGNUM (IA64_GR0_REGNUM + 10) |
| 38 | #define IA64_GR11_REGNUM (IA64_GR0_REGNUM + 11) |
| 39 | #define IA64_GR12_REGNUM (IA64_GR0_REGNUM + 12) |
| 40 | #define IA64_GR31_REGNUM (IA64_GR0_REGNUM + 31) |
| 41 | #define IA64_GR32_REGNUM (IA64_GR0_REGNUM + 32) |
| 42 | #define IA64_GR127_REGNUM (IA64_GR0_REGNUM + 127) |
| 43 | |
| 44 | /* Floating point registers; 128 82-bit wide registers. */ |
| 45 | #define IA64_FR0_REGNUM 128 |
| 46 | #define IA64_FR1_REGNUM (IA64_FR0_REGNUM + 1) |
| 47 | #define IA64_FR2_REGNUM (IA64_FR0_REGNUM + 2) |
| 48 | #define IA64_FR8_REGNUM (IA64_FR0_REGNUM + 8) |
| 49 | #define IA64_FR9_REGNUM (IA64_FR0_REGNUM + 9) |
| 50 | #define IA64_FR10_REGNUM (IA64_FR0_REGNUM + 10) |
| 51 | #define IA64_FR11_REGNUM (IA64_FR0_REGNUM + 11) |
| 52 | #define IA64_FR12_REGNUM (IA64_FR0_REGNUM + 12) |
| 53 | #define IA64_FR13_REGNUM (IA64_FR0_REGNUM + 13) |
| 54 | #define IA64_FR14_REGNUM (IA64_FR0_REGNUM + 14) |
| 55 | #define IA64_FR15_REGNUM (IA64_FR0_REGNUM + 15) |
| 56 | #define IA64_FR16_REGNUM (IA64_FR0_REGNUM + 16) |
| 57 | #define IA64_FR31_REGNUM (IA64_FR0_REGNUM + 31) |
| 58 | #define IA64_FR32_REGNUM (IA64_FR0_REGNUM + 32) |
| 59 | #define IA64_FR127_REGNUM (IA64_FR0_REGNUM + 127) |
| 60 | |
| 61 | /* Predicate registers; There are 64 of these one bit registers. It'd |
| 62 | be more convenient (implementation-wise) to use a single 64 bit |
| 63 | word with all of these register in them. Note that there's also a |
| 64 | IA64_PR_REGNUM below which contains all the bits and is used for |
| 65 | communicating the actual values to the target. */ |
| 66 | #define IA64_PR0_REGNUM 256 |
| 67 | #define IA64_PR1_REGNUM (IA64_PR0_REGNUM + 1) |
| 68 | #define IA64_PR2_REGNUM (IA64_PR0_REGNUM + 2) |
| 69 | #define IA64_PR3_REGNUM (IA64_PR0_REGNUM + 3) |
| 70 | #define IA64_PR4_REGNUM (IA64_PR0_REGNUM + 4) |
| 71 | #define IA64_PR5_REGNUM (IA64_PR0_REGNUM + 5) |
| 72 | #define IA64_PR6_REGNUM (IA64_PR0_REGNUM + 6) |
| 73 | #define IA64_PR7_REGNUM (IA64_PR0_REGNUM + 7) |
| 74 | #define IA64_PR8_REGNUM (IA64_PR0_REGNUM + 8) |
| 75 | #define IA64_PR9_REGNUM (IA64_PR0_REGNUM + 9) |
| 76 | #define IA64_PR10_REGNUM (IA64_PR0_REGNUM + 10) |
| 77 | #define IA64_PR11_REGNUM (IA64_PR0_REGNUM + 11) |
| 78 | #define IA64_PR12_REGNUM (IA64_PR0_REGNUM + 12) |
| 79 | #define IA64_PR13_REGNUM (IA64_PR0_REGNUM + 13) |
| 80 | #define IA64_PR14_REGNUM (IA64_PR0_REGNUM + 14) |
| 81 | #define IA64_PR15_REGNUM (IA64_PR0_REGNUM + 15) |
| 82 | #define IA64_PR16_REGNUM (IA64_PR0_REGNUM + 16) |
| 83 | #define IA64_PR17_REGNUM (IA64_PR0_REGNUM + 17) |
| 84 | #define IA64_PR18_REGNUM (IA64_PR0_REGNUM + 18) |
| 85 | #define IA64_PR19_REGNUM (IA64_PR0_REGNUM + 19) |
| 86 | #define IA64_PR20_REGNUM (IA64_PR0_REGNUM + 20) |
| 87 | #define IA64_PR21_REGNUM (IA64_PR0_REGNUM + 21) |
| 88 | #define IA64_PR22_REGNUM (IA64_PR0_REGNUM + 22) |
| 89 | #define IA64_PR23_REGNUM (IA64_PR0_REGNUM + 23) |
| 90 | #define IA64_PR24_REGNUM (IA64_PR0_REGNUM + 24) |
| 91 | #define IA64_PR25_REGNUM (IA64_PR0_REGNUM + 25) |
| 92 | #define IA64_PR26_REGNUM (IA64_PR0_REGNUM + 26) |
| 93 | #define IA64_PR27_REGNUM (IA64_PR0_REGNUM + 27) |
| 94 | #define IA64_PR28_REGNUM (IA64_PR0_REGNUM + 28) |
| 95 | #define IA64_PR29_REGNUM (IA64_PR0_REGNUM + 29) |
| 96 | #define IA64_PR30_REGNUM (IA64_PR0_REGNUM + 30) |
| 97 | #define IA64_PR31_REGNUM (IA64_PR0_REGNUM + 31) |
| 98 | #define IA64_PR32_REGNUM (IA64_PR0_REGNUM + 32) |
| 99 | #define IA64_PR33_REGNUM (IA64_PR0_REGNUM + 33) |
| 100 | #define IA64_PR34_REGNUM (IA64_PR0_REGNUM + 34) |
| 101 | #define IA64_PR35_REGNUM (IA64_PR0_REGNUM + 35) |
| 102 | #define IA64_PR36_REGNUM (IA64_PR0_REGNUM + 36) |
| 103 | #define IA64_PR37_REGNUM (IA64_PR0_REGNUM + 37) |
| 104 | #define IA64_PR38_REGNUM (IA64_PR0_REGNUM + 38) |
| 105 | #define IA64_PR39_REGNUM (IA64_PR0_REGNUM + 39) |
| 106 | #define IA64_PR40_REGNUM (IA64_PR0_REGNUM + 40) |
| 107 | #define IA64_PR41_REGNUM (IA64_PR0_REGNUM + 41) |
| 108 | #define IA64_PR42_REGNUM (IA64_PR0_REGNUM + 42) |
| 109 | #define IA64_PR43_REGNUM (IA64_PR0_REGNUM + 43) |
| 110 | #define IA64_PR44_REGNUM (IA64_PR0_REGNUM + 44) |
| 111 | #define IA64_PR45_REGNUM (IA64_PR0_REGNUM + 45) |
| 112 | #define IA64_PR46_REGNUM (IA64_PR0_REGNUM + 46) |
| 113 | #define IA64_PR47_REGNUM (IA64_PR0_REGNUM + 47) |
| 114 | #define IA64_PR48_REGNUM (IA64_PR0_REGNUM + 48) |
| 115 | #define IA64_PR49_REGNUM (IA64_PR0_REGNUM + 49) |
| 116 | #define IA64_PR50_REGNUM (IA64_PR0_REGNUM + 50) |
| 117 | #define IA64_PR51_REGNUM (IA64_PR0_REGNUM + 51) |
| 118 | #define IA64_PR52_REGNUM (IA64_PR0_REGNUM + 52) |
| 119 | #define IA64_PR53_REGNUM (IA64_PR0_REGNUM + 53) |
| 120 | #define IA64_PR54_REGNUM (IA64_PR0_REGNUM + 54) |
| 121 | #define IA64_PR55_REGNUM (IA64_PR0_REGNUM + 55) |
| 122 | #define IA64_PR56_REGNUM (IA64_PR0_REGNUM + 56) |
| 123 | #define IA64_PR57_REGNUM (IA64_PR0_REGNUM + 57) |
| 124 | #define IA64_PR58_REGNUM (IA64_PR0_REGNUM + 58) |
| 125 | #define IA64_PR59_REGNUM (IA64_PR0_REGNUM + 59) |
| 126 | #define IA64_PR60_REGNUM (IA64_PR0_REGNUM + 60) |
| 127 | #define IA64_PR61_REGNUM (IA64_PR0_REGNUM + 61) |
| 128 | #define IA64_PR62_REGNUM (IA64_PR0_REGNUM + 62) |
| 129 | #define IA64_PR63_REGNUM (IA64_PR0_REGNUM + 63) |
| 130 | |
| 131 | /* Branch registers: 8 64-bit registers for holding branch targets. */ |
| 132 | #define IA64_BR0_REGNUM 320 |
| 133 | #define IA64_BR1_REGNUM (IA64_BR0_REGNUM + 1) |
| 134 | #define IA64_BR2_REGNUM (IA64_BR0_REGNUM + 2) |
| 135 | #define IA64_BR3_REGNUM (IA64_BR0_REGNUM + 3) |
| 136 | #define IA64_BR4_REGNUM (IA64_BR0_REGNUM + 4) |
| 137 | #define IA64_BR5_REGNUM (IA64_BR0_REGNUM + 5) |
| 138 | #define IA64_BR6_REGNUM (IA64_BR0_REGNUM + 6) |
| 139 | #define IA64_BR7_REGNUM (IA64_BR0_REGNUM + 7) |
| 140 | |
| 141 | /* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in |
| 142 | gcc/config/ia64/ia64.h. */ |
| 143 | #define IA64_VFP_REGNUM 328 |
| 144 | |
| 145 | /* Virtual return address pointer; this matches |
| 146 | IA64_RETURN_ADDRESS_POINTER_REGNUM in gcc/config/ia64/ia64.h. */ |
| 147 | #define IA64_VRAP_REGNUM 329 |
| 148 | |
| 149 | /* Predicate registers: There are 64 of these 1-bit registers. We |
| 150 | define a single register which is used to communicate these values |
| 151 | to/from the target. We will somehow contrive to make it appear |
| 152 | that IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */ |
| 153 | #define IA64_PR_REGNUM 330 |
| 154 | |
| 155 | /* Instruction pointer: 64 bits wide. */ |
| 156 | #define IA64_IP_REGNUM 331 |
| 157 | |
| 158 | /* Process Status Register. */ |
| 159 | #define IA64_PSR_REGNUM 332 |
| 160 | |
| 161 | /* Current Frame Marker (raw form may be the cr.ifs). */ |
| 162 | #define IA64_CFM_REGNUM 333 |
| 163 | |
| 164 | /* Application registers; 128 64-bit wide registers possible, but some |
| 165 | of them are reserved. */ |
| 166 | #define IA64_AR0_REGNUM 334 |
| 167 | #define IA64_KR0_REGNUM (IA64_AR0_REGNUM + 0) |
| 168 | #define IA64_KR7_REGNUM (IA64_KR0_REGNUM + 7) |
| 169 | |
| 170 | #define IA64_RSC_REGNUM (IA64_AR0_REGNUM + 16) |
| 171 | #define IA64_BSP_REGNUM (IA64_AR0_REGNUM + 17) |
| 172 | #define IA64_BSPSTORE_REGNUM (IA64_AR0_REGNUM + 18) |
| 173 | #define IA64_RNAT_REGNUM (IA64_AR0_REGNUM + 19) |
| 174 | #define IA64_FCR_REGNUM (IA64_AR0_REGNUM + 21) |
| 175 | #define IA64_EFLAG_REGNUM (IA64_AR0_REGNUM + 24) |
| 176 | #define IA64_CSD_REGNUM (IA64_AR0_REGNUM + 25) |
| 177 | #define IA64_SSD_REGNUM (IA64_AR0_REGNUM + 26) |
| 178 | #define IA64_CFLG_REGNUM (IA64_AR0_REGNUM + 27) |
| 179 | #define IA64_FSR_REGNUM (IA64_AR0_REGNUM + 28) |
| 180 | #define IA64_FIR_REGNUM (IA64_AR0_REGNUM + 29) |
| 181 | #define IA64_FDR_REGNUM (IA64_AR0_REGNUM + 30) |
| 182 | #define IA64_CCV_REGNUM (IA64_AR0_REGNUM + 32) |
| 183 | #define IA64_UNAT_REGNUM (IA64_AR0_REGNUM + 36) |
| 184 | #define IA64_FPSR_REGNUM (IA64_AR0_REGNUM + 40) |
| 185 | #define IA64_ITC_REGNUM (IA64_AR0_REGNUM + 44) |
| 186 | #define IA64_PFS_REGNUM (IA64_AR0_REGNUM + 64) |
| 187 | #define IA64_LC_REGNUM (IA64_AR0_REGNUM + 65) |
| 188 | #define IA64_EC_REGNUM (IA64_AR0_REGNUM + 66) |
| 189 | |
| 190 | /* NAT (Not A Thing) Bits for the general registers; there are 128 of |
| 191 | these. */ |
| 192 | #define IA64_NAT0_REGNUM 462 |
| 193 | #define IA64_NAT31_REGNUM (IA64_NAT0_REGNUM + 31) |
| 194 | #define IA64_NAT32_REGNUM (IA64_NAT0_REGNUM + 32) |
| 195 | #define IA64_NAT127_REGNUM (IA64_NAT0_REGNUM + 127) |
| 196 | |
| 197 | struct gdbarch_tdep |
| 198 | { |
| 199 | CORE_ADDR (*sigcontext_register_address) (CORE_ADDR, int); |
| 200 | int (*pc_in_sigtramp) (CORE_ADDR); |
| 201 | }; |
| 202 | |
| 203 | extern void ia64_write_pc (struct regcache *, CORE_ADDR); |
| 204 | |
| 205 | #endif /* ia64-tdep.h */ |