| 1 | /* Native support for the SGI Iris running IRIX version 5, for GDB. |
| 2 | |
| 3 | Copyright (C) 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, |
| 4 | 1999, 2000, 2001, 2002, 2004, 2006, 2007 Free Software Foundation, Inc. |
| 5 | |
| 6 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
| 7 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. |
| 8 | Implemented for Irix 4.x by Garrett A. Wollman. |
| 9 | Modified for Irix 5.x by Ian Lance Taylor. |
| 10 | |
| 11 | This file is part of GDB. |
| 12 | |
| 13 | This program is free software; you can redistribute it and/or modify |
| 14 | it under the terms of the GNU General Public License as published by |
| 15 | the Free Software Foundation; either version 2 of the License, or |
| 16 | (at your option) any later version. |
| 17 | |
| 18 | This program is distributed in the hope that it will be useful, |
| 19 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | GNU General Public License for more details. |
| 22 | |
| 23 | You should have received a copy of the GNU General Public License |
| 24 | along with this program; if not, write to the Free Software |
| 25 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
| 26 | Boston, MA 02110-1301, USA. */ |
| 27 | |
| 28 | #include "defs.h" |
| 29 | #include "inferior.h" |
| 30 | #include "gdbcore.h" |
| 31 | #include "target.h" |
| 32 | #include "regcache.h" |
| 33 | |
| 34 | #include "gdb_string.h" |
| 35 | #include <sys/time.h> |
| 36 | #include <sys/procfs.h> |
| 37 | #include <setjmp.h> /* For JB_XXX. */ |
| 38 | |
| 39 | /* Prototypes for supply_gregset etc. */ |
| 40 | #include "gregset.h" |
| 41 | #include "mips-tdep.h" |
| 42 | |
| 43 | static void fetch_core_registers (char *, unsigned int, int, CORE_ADDR); |
| 44 | |
| 45 | /* Size of elements in jmpbuf */ |
| 46 | |
| 47 | #define JB_ELEMENT_SIZE 4 |
| 48 | |
| 49 | /* |
| 50 | * See the comment in m68k-tdep.c regarding the utility of these functions. |
| 51 | * |
| 52 | * These definitions are from the MIPS SVR4 ABI, so they may work for |
| 53 | * any MIPS SVR4 target. |
| 54 | */ |
| 55 | |
| 56 | void |
| 57 | supply_gregset (gregset_t *gregsetp) |
| 58 | { |
| 59 | int regi; |
| 60 | greg_t *regp = &(*gregsetp)[0]; |
| 61 | int gregoff = sizeof (greg_t) - mips_isa_regsize (current_gdbarch); |
| 62 | static char zerobuf[32] = {0}; |
| 63 | |
| 64 | for (regi = 0; regi <= CTX_RA; regi++) |
| 65 | regcache_raw_supply (current_regcache, regi, |
| 66 | (char *) (regp + regi) + gregoff); |
| 67 | |
| 68 | regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->pc, |
| 69 | (char *) (regp + CTX_EPC) + gregoff); |
| 70 | regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->hi, |
| 71 | (char *) (regp + CTX_MDHI) + gregoff); |
| 72 | regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->lo, |
| 73 | (char *) (regp + CTX_MDLO) + gregoff); |
| 74 | regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->cause, |
| 75 | (char *) (regp + CTX_CAUSE) + gregoff); |
| 76 | |
| 77 | /* Fill inaccessible registers with zero. */ |
| 78 | regcache_raw_supply (current_regcache, mips_regnum (current_gdbarch)->badvaddr, zerobuf); |
| 79 | } |
| 80 | |
| 81 | void |
| 82 | fill_gregset (gregset_t *gregsetp, int regno) |
| 83 | { |
| 84 | int regi; |
| 85 | greg_t *regp = &(*gregsetp)[0]; |
| 86 | LONGEST regval; |
| 87 | |
| 88 | /* Under Irix6, if GDB is built with N32 ABI and is debugging an O32 |
| 89 | executable, we have to sign extend the registers to 64 bits before |
| 90 | filling in the gregset structure. */ |
| 91 | |
| 92 | for (regi = 0; regi <= CTX_RA; regi++) |
| 93 | if ((regno == -1) || (regno == regi)) |
| 94 | { |
| 95 | regcache_raw_read_signed (current_regcache, regi, ®val); |
| 96 | *(regp + regi) = regval; |
| 97 | } |
| 98 | |
| 99 | if ((regno == -1) || (regno == PC_REGNUM)) |
| 100 | { |
| 101 | regcache_raw_read_signed |
| 102 | (current_regcache, mips_regnum (current_gdbarch)->pc, ®val); |
| 103 | *(regp + CTX_EPC) = regval; |
| 104 | } |
| 105 | |
| 106 | if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->cause)) |
| 107 | { |
| 108 | regcache_raw_read_signed |
| 109 | (current_regcache, mips_regnum (current_gdbarch)->cause, ®val); |
| 110 | *(regp + CTX_CAUSE) = regval; |
| 111 | } |
| 112 | |
| 113 | if ((regno == -1) |
| 114 | || (regno == mips_regnum (current_gdbarch)->hi)) |
| 115 | { |
| 116 | regcache_raw_read_signed |
| 117 | (current_regcache, mips_regnum (current_gdbarch)->hi, ®val); |
| 118 | *(regp + CTX_MDHI) = regval; |
| 119 | } |
| 120 | |
| 121 | if ((regno == -1) || (regno == mips_regnum (current_gdbarch)->lo)) |
| 122 | { |
| 123 | regcache_raw_read_signed |
| 124 | (current_regcache, mips_regnum (current_gdbarch)->lo, ®val); |
| 125 | *(regp + CTX_MDLO) = regval; |
| 126 | } |
| 127 | } |
| 128 | |
| 129 | /* |
| 130 | * Now we do the same thing for floating-point registers. |
| 131 | * We don't bother to condition on FP0_REGNUM since any |
| 132 | * reasonable MIPS configuration has an R3010 in it. |
| 133 | * |
| 134 | * Again, see the comments in m68k-tdep.c. |
| 135 | */ |
| 136 | |
| 137 | void |
| 138 | supply_fpregset (fpregset_t *fpregsetp) |
| 139 | { |
| 140 | int regi; |
| 141 | static char zerobuf[32] = {0}; |
| 142 | char fsrbuf[8]; |
| 143 | |
| 144 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ |
| 145 | |
| 146 | for (regi = 0; regi < 32; regi++) |
| 147 | regcache_raw_supply (current_regcache, FP0_REGNUM + regi, |
| 148 | (char *) &fpregsetp->fp_r.fp_regs[regi]); |
| 149 | |
| 150 | /* We can't supply the FSR register directly to the regcache, |
| 151 | because there is a size issue: On one hand, fpregsetp->fp_csr |
| 152 | is 32bits long, while the regcache expects a 64bits long value. |
| 153 | So we use a buffer of the correct size and copy into it the register |
| 154 | value at the proper location. */ |
| 155 | memset (fsrbuf, 0, 4); |
| 156 | memcpy (fsrbuf + 4, &fpregsetp->fp_csr, 4); |
| 157 | |
| 158 | regcache_raw_supply (current_regcache, |
| 159 | mips_regnum (current_gdbarch)->fp_control_status, |
| 160 | fsrbuf); |
| 161 | |
| 162 | /* FIXME: how can we supply FCRIR? SGI doesn't tell us. */ |
| 163 | regcache_raw_supply (current_regcache, |
| 164 | mips_regnum (current_gdbarch)->fp_implementation_revision, |
| 165 | zerobuf); |
| 166 | } |
| 167 | |
| 168 | void |
| 169 | fill_fpregset (fpregset_t *fpregsetp, int regno) |
| 170 | { |
| 171 | int regi; |
| 172 | char *from, *to; |
| 173 | |
| 174 | /* FIXME, this is wrong for the N32 ABI which has 64 bit FP regs. */ |
| 175 | |
| 176 | for (regi = FP0_REGNUM; regi < FP0_REGNUM + 32; regi++) |
| 177 | { |
| 178 | if ((regno == -1) || (regno == regi)) |
| 179 | { |
| 180 | to = (char *) &(fpregsetp->fp_r.fp_regs[regi - FP0_REGNUM]); |
| 181 | regcache_raw_read (current_regcache, regi, to); |
| 182 | } |
| 183 | } |
| 184 | |
| 185 | if (regno == -1 |
| 186 | || regno == mips_regnum (current_gdbarch)->fp_control_status) |
| 187 | { |
| 188 | char fsrbuf[8]; |
| 189 | |
| 190 | /* We can't fill the FSR register directly from the regcache, |
| 191 | because there is a size issue: On one hand, fpregsetp->fp_csr |
| 192 | is 32bits long, while the regcache expects a 64bits long buffer. |
| 193 | So we use a buffer of the correct size and copy the register |
| 194 | value from that buffer. */ |
| 195 | regcache_raw_read (current_regcache, |
| 196 | mips_regnum (current_gdbarch)->fp_control_status, |
| 197 | fsrbuf); |
| 198 | |
| 199 | memcpy (&fpregsetp->fp_csr, fsrbuf + 4, 4); |
| 200 | } |
| 201 | } |
| 202 | |
| 203 | |
| 204 | /* Figure out where the longjmp will land. |
| 205 | We expect the first arg to be a pointer to the jmp_buf structure from which |
| 206 | we extract the pc (JB_PC) that we will land at. The pc is copied into PC. |
| 207 | This routine returns true on success. */ |
| 208 | |
| 209 | int |
| 210 | get_longjmp_target (CORE_ADDR *pc) |
| 211 | { |
| 212 | char *buf; |
| 213 | CORE_ADDR jb_addr; |
| 214 | |
| 215 | buf = alloca (TARGET_PTR_BIT / TARGET_CHAR_BIT); |
| 216 | jb_addr = read_register (MIPS_A0_REGNUM); |
| 217 | |
| 218 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, |
| 219 | TARGET_PTR_BIT / TARGET_CHAR_BIT)) |
| 220 | return 0; |
| 221 | |
| 222 | *pc = extract_unsigned_integer (buf, TARGET_PTR_BIT / TARGET_CHAR_BIT); |
| 223 | |
| 224 | return 1; |
| 225 | } |
| 226 | |
| 227 | /* Provide registers to GDB from a core file. |
| 228 | |
| 229 | CORE_REG_SECT points to an array of bytes, which were obtained from |
| 230 | a core file which BFD thinks might contain register contents. |
| 231 | CORE_REG_SIZE is its size. |
| 232 | |
| 233 | Normally, WHICH says which register set corelow suspects this is: |
| 234 | 0 --- the general-purpose register set |
| 235 | 2 --- the floating-point register set |
| 236 | However, for Irix 5, WHICH isn't used. |
| 237 | |
| 238 | REG_ADDR is also unused. */ |
| 239 | |
| 240 | static void |
| 241 | fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, |
| 242 | int which, CORE_ADDR reg_addr) |
| 243 | { |
| 244 | char *srcp = core_reg_sect; |
| 245 | int regsize = mips_isa_regsize (current_gdbarch); |
| 246 | int regno; |
| 247 | |
| 248 | /* If regsize is 8, this is a N32 or N64 core file. |
| 249 | If regsize is 4, this is an O32 core file. */ |
| 250 | if (core_reg_size != regsize * NUM_REGS) |
| 251 | { |
| 252 | warning (_("wrong size gregset struct in core file")); |
| 253 | return; |
| 254 | } |
| 255 | |
| 256 | for (regno = 0; regno < NUM_REGS; regno++) |
| 257 | { |
| 258 | regcache_raw_write (current_regcache, regno, srcp); |
| 259 | srcp += regsize; |
| 260 | } |
| 261 | } |
| 262 | |
| 263 | /* Register that we are able to handle irix5 core file formats. |
| 264 | This really is bfd_target_unknown_flavour */ |
| 265 | |
| 266 | static struct core_fns irix5_core_fns = |
| 267 | { |
| 268 | bfd_target_unknown_flavour, /* core_flavour */ |
| 269 | default_check_format, /* check_format */ |
| 270 | default_core_sniffer, /* core_sniffer */ |
| 271 | fetch_core_registers, /* core_read_registers */ |
| 272 | NULL /* next */ |
| 273 | }; |
| 274 | |
| 275 | void |
| 276 | _initialize_core_irix5 (void) |
| 277 | { |
| 278 | deprecated_add_core_fns (&irix5_core_fns); |
| 279 | } |