| 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
| 2 | |
| 3 | Copyright (C) 1999-2015 Free Software Foundation, Inc. |
| 4 | |
| 5 | Contributed by Stephane Carrez, stcarrez@nerim.fr |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 21 | |
| 22 | |
| 23 | #include "defs.h" |
| 24 | #include "frame.h" |
| 25 | #include "frame-unwind.h" |
| 26 | #include "frame-base.h" |
| 27 | #include "dwarf2-frame.h" |
| 28 | #include "trad-frame.h" |
| 29 | #include "symtab.h" |
| 30 | #include "gdbtypes.h" |
| 31 | #include "gdbcmd.h" |
| 32 | #include "gdbcore.h" |
| 33 | #include "value.h" |
| 34 | #include "inferior.h" |
| 35 | #include "dis-asm.h" |
| 36 | #include "symfile.h" |
| 37 | #include "objfiles.h" |
| 38 | #include "arch-utils.h" |
| 39 | #include "regcache.h" |
| 40 | #include "reggroups.h" |
| 41 | |
| 42 | #include "target.h" |
| 43 | #include "opcode/m68hc11.h" |
| 44 | #include "elf/m68hc11.h" |
| 45 | #include "elf-bfd.h" |
| 46 | |
| 47 | /* Macros for setting and testing a bit in a minimal symbol. |
| 48 | For 68HC11/68HC12 we have two flags that tell which return |
| 49 | type the function is using. This is used for prologue and frame |
| 50 | analysis to compute correct stack frame layout. |
| 51 | |
| 52 | The MSB of the minimal symbol's "info" field is used for this purpose. |
| 53 | |
| 54 | MSYMBOL_SET_RTC Actually sets the "RTC" bit. |
| 55 | MSYMBOL_SET_RTI Actually sets the "RTI" bit. |
| 56 | MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol. |
| 57 | MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */ |
| 58 | |
| 59 | #define MSYMBOL_SET_RTC(msym) \ |
| 60 | MSYMBOL_TARGET_FLAG_1 (msym) = 1 |
| 61 | |
| 62 | #define MSYMBOL_SET_RTI(msym) \ |
| 63 | MSYMBOL_TARGET_FLAG_2 (msym) = 1 |
| 64 | |
| 65 | #define MSYMBOL_IS_RTC(msym) \ |
| 66 | MSYMBOL_TARGET_FLAG_1 (msym) |
| 67 | |
| 68 | #define MSYMBOL_IS_RTI(msym) \ |
| 69 | MSYMBOL_TARGET_FLAG_2 (msym) |
| 70 | |
| 71 | enum insn_return_kind { |
| 72 | RETURN_RTS, |
| 73 | RETURN_RTC, |
| 74 | RETURN_RTI |
| 75 | }; |
| 76 | |
| 77 | |
| 78 | /* Register numbers of various important registers. */ |
| 79 | |
| 80 | #define HARD_X_REGNUM 0 |
| 81 | #define HARD_D_REGNUM 1 |
| 82 | #define HARD_Y_REGNUM 2 |
| 83 | #define HARD_SP_REGNUM 3 |
| 84 | #define HARD_PC_REGNUM 4 |
| 85 | |
| 86 | #define HARD_A_REGNUM 5 |
| 87 | #define HARD_B_REGNUM 6 |
| 88 | #define HARD_CCR_REGNUM 7 |
| 89 | |
| 90 | /* 68HC12 page number register. |
| 91 | Note: to keep a compatibility with gcc register naming, we must |
| 92 | not have to rename FP and other soft registers. The page register |
| 93 | is a real hard register and must therefore be counted by gdbarch_num_regs. |
| 94 | For this it has the same number as Z register (which is not used). */ |
| 95 | #define HARD_PAGE_REGNUM 8 |
| 96 | #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM) |
| 97 | |
| 98 | /* Z is replaced by X or Y by gcc during machine reorg. |
| 99 | ??? There is no way to get it and even know whether |
| 100 | it's in X or Y or in ZS. */ |
| 101 | #define SOFT_Z_REGNUM 8 |
| 102 | |
| 103 | /* Soft registers. These registers are special. There are treated |
| 104 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). |
| 105 | They are physically located in memory. */ |
| 106 | #define SOFT_FP_REGNUM 9 |
| 107 | #define SOFT_TMP_REGNUM 10 |
| 108 | #define SOFT_ZS_REGNUM 11 |
| 109 | #define SOFT_XY_REGNUM 12 |
| 110 | #define SOFT_UNUSED_REGNUM 13 |
| 111 | #define SOFT_D1_REGNUM 14 |
| 112 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
| 113 | #define M68HC11_MAX_SOFT_REGS 32 |
| 114 | |
| 115 | #define M68HC11_NUM_REGS (8) |
| 116 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) |
| 117 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) |
| 118 | |
| 119 | #define M68HC11_REG_SIZE (2) |
| 120 | |
| 121 | #define M68HC12_NUM_REGS (9) |
| 122 | #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1) |
| 123 | #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1) |
| 124 | |
| 125 | struct insn_sequence; |
| 126 | struct gdbarch_tdep |
| 127 | { |
| 128 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
| 129 | to the next push location. An offset of 1 must be applied to obtain |
| 130 | the address where the last value is saved. For 68hc12, the stack |
| 131 | pointer points to the last value pushed. No offset is necessary. */ |
| 132 | int stack_correction; |
| 133 | |
| 134 | /* Description of instructions in the prologue. */ |
| 135 | struct insn_sequence *prologue; |
| 136 | |
| 137 | /* True if the page memory bank register is available |
| 138 | and must be used. */ |
| 139 | int use_page_register; |
| 140 | |
| 141 | /* ELF flags for ABI. */ |
| 142 | int elf_flags; |
| 143 | }; |
| 144 | |
| 145 | #define STACK_CORRECTION(gdbarch) (gdbarch_tdep (gdbarch)->stack_correction) |
| 146 | #define USE_PAGE_REGISTER(gdbarch) (gdbarch_tdep (gdbarch)->use_page_register) |
| 147 | |
| 148 | struct m68hc11_unwind_cache |
| 149 | { |
| 150 | /* The previous frame's inner most stack address. Used as this |
| 151 | frame ID's stack_addr. */ |
| 152 | CORE_ADDR prev_sp; |
| 153 | /* The frame's base, optionally used by the high-level debug info. */ |
| 154 | CORE_ADDR base; |
| 155 | CORE_ADDR pc; |
| 156 | int size; |
| 157 | int prologue_type; |
| 158 | CORE_ADDR return_pc; |
| 159 | CORE_ADDR sp_offset; |
| 160 | int frameless; |
| 161 | enum insn_return_kind return_kind; |
| 162 | |
| 163 | /* Table indicating the location of each and every register. */ |
| 164 | struct trad_frame_saved_reg *saved_regs; |
| 165 | }; |
| 166 | |
| 167 | /* Table of registers for 68HC11. This includes the hard registers |
| 168 | and the soft registers used by GCC. */ |
| 169 | static char * |
| 170 | m68hc11_register_names[] = |
| 171 | { |
| 172 | "x", "d", "y", "sp", "pc", "a", "b", |
| 173 | "ccr", "page", "frame","tmp", "zs", "xy", 0, |
| 174 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
| 175 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", |
| 176 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", |
| 177 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", |
| 178 | "d29", "d30", "d31", "d32" |
| 179 | }; |
| 180 | |
| 181 | struct m68hc11_soft_reg |
| 182 | { |
| 183 | const char *name; |
| 184 | CORE_ADDR addr; |
| 185 | }; |
| 186 | |
| 187 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
| 188 | |
| 189 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
| 190 | |
| 191 | static int soft_min_addr; |
| 192 | static int soft_max_addr; |
| 193 | static int soft_reg_initialized = 0; |
| 194 | |
| 195 | /* Look in the symbol table for the address of a pseudo register |
| 196 | in memory. If we don't find it, pretend the register is not used |
| 197 | and not available. */ |
| 198 | static void |
| 199 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) |
| 200 | { |
| 201 | struct bound_minimal_symbol msymbol; |
| 202 | |
| 203 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
| 204 | if (msymbol.minsym) |
| 205 | { |
| 206 | reg->addr = BMSYMBOL_VALUE_ADDRESS (msymbol); |
| 207 | reg->name = xstrdup (name); |
| 208 | |
| 209 | /* Keep track of the address range for soft registers. */ |
| 210 | if (reg->addr < (CORE_ADDR) soft_min_addr) |
| 211 | soft_min_addr = reg->addr; |
| 212 | if (reg->addr > (CORE_ADDR) soft_max_addr) |
| 213 | soft_max_addr = reg->addr; |
| 214 | } |
| 215 | else |
| 216 | { |
| 217 | reg->name = 0; |
| 218 | reg->addr = 0; |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | /* Initialize the table of soft register addresses according |
| 223 | to the symbol table. */ |
| 224 | static void |
| 225 | m68hc11_initialize_register_info (void) |
| 226 | { |
| 227 | int i; |
| 228 | |
| 229 | if (soft_reg_initialized) |
| 230 | return; |
| 231 | |
| 232 | soft_min_addr = INT_MAX; |
| 233 | soft_max_addr = 0; |
| 234 | for (i = 0; i < M68HC11_ALL_REGS; i++) |
| 235 | { |
| 236 | soft_regs[i].name = 0; |
| 237 | } |
| 238 | |
| 239 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); |
| 240 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); |
| 241 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); |
| 242 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; |
| 243 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); |
| 244 | |
| 245 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
| 246 | { |
| 247 | char buf[10]; |
| 248 | |
| 249 | xsnprintf (buf, sizeof (buf), "_.d%d", i - SOFT_D1_REGNUM + 1); |
| 250 | m68hc11_get_register_info (&soft_regs[i], buf); |
| 251 | } |
| 252 | |
| 253 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
| 254 | warning (_("No frame soft register found in the symbol table.\n" |
| 255 | "Stack backtrace will not work.")); |
| 256 | soft_reg_initialized = 1; |
| 257 | } |
| 258 | |
| 259 | /* Given an address in memory, return the soft register number if |
| 260 | that address corresponds to a soft register. Returns -1 if not. */ |
| 261 | static int |
| 262 | m68hc11_which_soft_register (CORE_ADDR addr) |
| 263 | { |
| 264 | int i; |
| 265 | |
| 266 | if (addr < soft_min_addr || addr > soft_max_addr) |
| 267 | return -1; |
| 268 | |
| 269 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) |
| 270 | { |
| 271 | if (soft_regs[i].name && soft_regs[i].addr == addr) |
| 272 | return i; |
| 273 | } |
| 274 | return -1; |
| 275 | } |
| 276 | |
| 277 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
| 278 | pseudo registers. They are located in memory. Translate the register |
| 279 | fetch into a memory read. */ |
| 280 | static enum register_status |
| 281 | m68hc11_pseudo_register_read (struct gdbarch *gdbarch, |
| 282 | struct regcache *regcache, |
| 283 | int regno, gdb_byte *buf) |
| 284 | { |
| 285 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 286 | |
| 287 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
| 288 | addressing mode. */ |
| 289 | if (regno == M68HC12_HARD_PC_REGNUM) |
| 290 | { |
| 291 | ULONGEST pc; |
| 292 | const int regsize = 4; |
| 293 | enum register_status status; |
| 294 | |
| 295 | status = regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc); |
| 296 | if (status != REG_VALID) |
| 297 | return status; |
| 298 | if (pc >= 0x8000 && pc < 0xc000) |
| 299 | { |
| 300 | ULONGEST page; |
| 301 | |
| 302 | regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page); |
| 303 | pc -= 0x8000; |
| 304 | pc += (page << 14); |
| 305 | pc += 0x1000000; |
| 306 | } |
| 307 | store_unsigned_integer (buf, regsize, byte_order, pc); |
| 308 | return REG_VALID; |
| 309 | } |
| 310 | |
| 311 | m68hc11_initialize_register_info (); |
| 312 | |
| 313 | /* Fetch a soft register: translate into a memory read. */ |
| 314 | if (soft_regs[regno].name) |
| 315 | { |
| 316 | target_read_memory (soft_regs[regno].addr, buf, 2); |
| 317 | } |
| 318 | else |
| 319 | { |
| 320 | memset (buf, 0, 2); |
| 321 | } |
| 322 | |
| 323 | return REG_VALID; |
| 324 | } |
| 325 | |
| 326 | /* Store a pseudo register. Translate the register store |
| 327 | into a memory write. */ |
| 328 | static void |
| 329 | m68hc11_pseudo_register_write (struct gdbarch *gdbarch, |
| 330 | struct regcache *regcache, |
| 331 | int regno, const gdb_byte *buf) |
| 332 | { |
| 333 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 334 | |
| 335 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
| 336 | addressing mode. */ |
| 337 | if (regno == M68HC12_HARD_PC_REGNUM) |
| 338 | { |
| 339 | const int regsize = 4; |
| 340 | gdb_byte *tmp = alloca (regsize); |
| 341 | CORE_ADDR pc; |
| 342 | |
| 343 | memcpy (tmp, buf, regsize); |
| 344 | pc = extract_unsigned_integer (tmp, regsize, byte_order); |
| 345 | if (pc >= 0x1000000) |
| 346 | { |
| 347 | pc -= 0x1000000; |
| 348 | regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM, |
| 349 | (pc >> 14) & 0x0ff); |
| 350 | pc &= 0x03fff; |
| 351 | regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, |
| 352 | pc + 0x8000); |
| 353 | } |
| 354 | else |
| 355 | regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc); |
| 356 | return; |
| 357 | } |
| 358 | |
| 359 | m68hc11_initialize_register_info (); |
| 360 | |
| 361 | /* Store a soft register: translate into a memory write. */ |
| 362 | if (soft_regs[regno].name) |
| 363 | { |
| 364 | const int regsize = 2; |
| 365 | gdb_byte *tmp = alloca (regsize); |
| 366 | memcpy (tmp, buf, regsize); |
| 367 | target_write_memory (soft_regs[regno].addr, tmp, regsize); |
| 368 | } |
| 369 | } |
| 370 | |
| 371 | static const char * |
| 372 | m68hc11_register_name (struct gdbarch *gdbarch, int reg_nr) |
| 373 | { |
| 374 | if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch)) |
| 375 | return "pc"; |
| 376 | if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER (gdbarch)) |
| 377 | return "ppc"; |
| 378 | |
| 379 | if (reg_nr < 0) |
| 380 | return NULL; |
| 381 | if (reg_nr >= M68HC11_ALL_REGS) |
| 382 | return NULL; |
| 383 | |
| 384 | m68hc11_initialize_register_info (); |
| 385 | |
| 386 | /* If we don't know the address of a soft register, pretend it |
| 387 | does not exist. */ |
| 388 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) |
| 389 | return NULL; |
| 390 | return m68hc11_register_names[reg_nr]; |
| 391 | } |
| 392 | |
| 393 | static const unsigned char * |
| 394 | m68hc11_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, |
| 395 | int *lenptr) |
| 396 | { |
| 397 | static unsigned char breakpoint[] = {0x0}; |
| 398 | |
| 399 | *lenptr = sizeof (breakpoint); |
| 400 | return breakpoint; |
| 401 | } |
| 402 | |
| 403 | \f |
| 404 | /* 68HC11 & 68HC12 prologue analysis. */ |
| 405 | |
| 406 | #define MAX_CODES 12 |
| 407 | |
| 408 | /* 68HC11 opcodes. */ |
| 409 | #undef M6811_OP_PAGE2 |
| 410 | #define M6811_OP_PAGE2 (0x18) |
| 411 | #define M6811_OP_LDX (0xde) |
| 412 | #define M6811_OP_LDX_EXT (0xfe) |
| 413 | #define M6811_OP_PSHX (0x3c) |
| 414 | #define M6811_OP_STS (0x9f) |
| 415 | #define M6811_OP_STS_EXT (0xbf) |
| 416 | #define M6811_OP_TSX (0x30) |
| 417 | #define M6811_OP_XGDX (0x8f) |
| 418 | #define M6811_OP_ADDD (0xc3) |
| 419 | #define M6811_OP_TXS (0x35) |
| 420 | #define M6811_OP_DES (0x34) |
| 421 | |
| 422 | /* 68HC12 opcodes. */ |
| 423 | #define M6812_OP_PAGE2 (0x18) |
| 424 | #define M6812_OP_MOVW (0x01) |
| 425 | #define M6812_PB_PSHW (0xae) |
| 426 | #define M6812_OP_STS (0x5f) |
| 427 | #define M6812_OP_STS_EXT (0x7f) |
| 428 | #define M6812_OP_LEAS (0x1b) |
| 429 | #define M6812_OP_PSHX (0x34) |
| 430 | #define M6812_OP_PSHY (0x35) |
| 431 | |
| 432 | /* Operand extraction. */ |
| 433 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ |
| 434 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ |
| 435 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ |
| 436 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ |
| 437 | |
| 438 | /* Identification of the sequence. */ |
| 439 | enum m6811_seq_type |
| 440 | { |
| 441 | P_LAST = 0, |
| 442 | P_SAVE_REG, /* Save a register on the stack. */ |
| 443 | P_SET_FRAME, /* Setup the frame pointer. */ |
| 444 | P_LOCAL_1, /* Allocate 1 byte for locals. */ |
| 445 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ |
| 446 | P_LOCAL_N /* Allocate N bytes for locals. */ |
| 447 | }; |
| 448 | |
| 449 | struct insn_sequence { |
| 450 | enum m6811_seq_type type; |
| 451 | unsigned length; |
| 452 | unsigned short code[MAX_CODES]; |
| 453 | }; |
| 454 | |
| 455 | /* Sequence of instructions in the 68HC11 function prologue. */ |
| 456 | static struct insn_sequence m6811_prologue[] = { |
| 457 | /* Sequences to save a soft-register. */ |
| 458 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, |
| 459 | M6811_OP_PSHX } }, |
| 460 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, |
| 461 | M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 462 | { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, |
| 463 | M6811_OP_PSHX } }, |
| 464 | { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, |
| 465 | M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 466 | |
| 467 | /* Sequences to allocate local variables. */ |
| 468 | { P_LOCAL_N, 7, { M6811_OP_TSX, |
| 469 | M6811_OP_XGDX, |
| 470 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, |
| 471 | M6811_OP_XGDX, |
| 472 | M6811_OP_TXS } }, |
| 473 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, |
| 474 | M6811_OP_PAGE2, M6811_OP_XGDX, |
| 475 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, |
| 476 | M6811_OP_PAGE2, M6811_OP_XGDX, |
| 477 | M6811_OP_PAGE2, M6811_OP_TXS } }, |
| 478 | { P_LOCAL_1, 1, { M6811_OP_DES } }, |
| 479 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, |
| 480 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 481 | |
| 482 | /* Initialize the frame pointer. */ |
| 483 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, |
| 484 | { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, |
| 485 | { P_LAST, 0, { 0 } } |
| 486 | }; |
| 487 | |
| 488 | |
| 489 | /* Sequence of instructions in the 68HC12 function prologue. */ |
| 490 | static struct insn_sequence m6812_prologue[] = { |
| 491 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, |
| 492 | OP_IMM_HIGH, OP_IMM_LOW } }, |
| 493 | { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } }, |
| 494 | { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, |
| 495 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, |
| 496 | { P_LOCAL_2, 1, { M6812_OP_PSHX } }, |
| 497 | { P_LOCAL_2, 1, { M6812_OP_PSHY } }, |
| 498 | { P_LAST, 0 } |
| 499 | }; |
| 500 | |
| 501 | |
| 502 | /* Analyze the sequence of instructions starting at the given address. |
| 503 | Returns a pointer to the sequence when it is recognized and |
| 504 | the optional value (constant/address) associated with it. */ |
| 505 | static struct insn_sequence * |
| 506 | m68hc11_analyze_instruction (struct gdbarch *gdbarch, |
| 507 | struct insn_sequence *seq, CORE_ADDR pc, |
| 508 | CORE_ADDR *val) |
| 509 | { |
| 510 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 511 | unsigned char buffer[MAX_CODES]; |
| 512 | unsigned bufsize; |
| 513 | unsigned j; |
| 514 | CORE_ADDR cur_val; |
| 515 | short v = 0; |
| 516 | |
| 517 | bufsize = 0; |
| 518 | for (; seq->type != P_LAST; seq++) |
| 519 | { |
| 520 | cur_val = 0; |
| 521 | for (j = 0; j < seq->length; j++) |
| 522 | { |
| 523 | if (bufsize < j + 1) |
| 524 | { |
| 525 | buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize, |
| 526 | 1, byte_order); |
| 527 | bufsize++; |
| 528 | } |
| 529 | /* Continue while we match the opcode. */ |
| 530 | if (seq->code[j] == buffer[j]) |
| 531 | continue; |
| 532 | |
| 533 | if ((seq->code[j] & 0xf00) == 0) |
| 534 | break; |
| 535 | |
| 536 | /* Extract a sequence parameter (address or constant). */ |
| 537 | switch (seq->code[j]) |
| 538 | { |
| 539 | case OP_DIRECT: |
| 540 | cur_val = (CORE_ADDR) buffer[j]; |
| 541 | break; |
| 542 | |
| 543 | case OP_IMM_HIGH: |
| 544 | cur_val = cur_val & 0x0ff; |
| 545 | cur_val |= (buffer[j] << 8); |
| 546 | break; |
| 547 | |
| 548 | case OP_IMM_LOW: |
| 549 | cur_val &= 0x0ff00; |
| 550 | cur_val |= buffer[j]; |
| 551 | break; |
| 552 | |
| 553 | case OP_PBYTE: |
| 554 | if ((buffer[j] & 0xE0) == 0x80) |
| 555 | { |
| 556 | v = buffer[j] & 0x1f; |
| 557 | if (v & 0x10) |
| 558 | v |= 0xfff0; |
| 559 | } |
| 560 | else if ((buffer[j] & 0xfe) == 0xf0) |
| 561 | { |
| 562 | v = read_memory_unsigned_integer (pc + j + 1, 1, byte_order); |
| 563 | if (buffer[j] & 1) |
| 564 | v |= 0xff00; |
| 565 | } |
| 566 | else if (buffer[j] == 0xf2) |
| 567 | { |
| 568 | v = read_memory_unsigned_integer (pc + j + 1, 2, byte_order); |
| 569 | } |
| 570 | cur_val = v; |
| 571 | break; |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | /* We have a full match. */ |
| 576 | if (j == seq->length) |
| 577 | { |
| 578 | *val = cur_val; |
| 579 | return seq; |
| 580 | } |
| 581 | } |
| 582 | return 0; |
| 583 | } |
| 584 | |
| 585 | /* Return the instruction that the function at the PC is using. */ |
| 586 | static enum insn_return_kind |
| 587 | m68hc11_get_return_insn (CORE_ADDR pc) |
| 588 | { |
| 589 | struct bound_minimal_symbol sym; |
| 590 | |
| 591 | /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT |
| 592 | function is stored by elfread.c in the high bit of the info field. |
| 593 | Use this to decide which instruction the function uses to return. */ |
| 594 | sym = lookup_minimal_symbol_by_pc (pc); |
| 595 | if (sym.minsym == 0) |
| 596 | return RETURN_RTS; |
| 597 | |
| 598 | if (MSYMBOL_IS_RTC (sym.minsym)) |
| 599 | return RETURN_RTC; |
| 600 | else if (MSYMBOL_IS_RTI (sym.minsym)) |
| 601 | return RETURN_RTI; |
| 602 | else |
| 603 | return RETURN_RTS; |
| 604 | } |
| 605 | |
| 606 | /* Analyze the function prologue to find some information |
| 607 | about the function: |
| 608 | - the PC of the first line (for m68hc11_skip_prologue) |
| 609 | - the offset of the previous frame saved address (from current frame) |
| 610 | - the soft registers which are pushed. */ |
| 611 | static CORE_ADDR |
| 612 | m68hc11_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, |
| 613 | CORE_ADDR current_pc, struct m68hc11_unwind_cache *info) |
| 614 | { |
| 615 | LONGEST save_addr; |
| 616 | CORE_ADDR func_end; |
| 617 | int size; |
| 618 | int found_frame_point; |
| 619 | int saved_reg; |
| 620 | int done = 0; |
| 621 | struct insn_sequence *seq_table; |
| 622 | |
| 623 | info->size = 0; |
| 624 | info->sp_offset = 0; |
| 625 | if (pc >= current_pc) |
| 626 | return current_pc; |
| 627 | |
| 628 | size = 0; |
| 629 | |
| 630 | m68hc11_initialize_register_info (); |
| 631 | if (pc == 0) |
| 632 | { |
| 633 | info->size = 0; |
| 634 | return pc; |
| 635 | } |
| 636 | |
| 637 | seq_table = gdbarch_tdep (gdbarch)->prologue; |
| 638 | |
| 639 | /* The 68hc11 stack is as follows: |
| 640 | |
| 641 | |
| 642 | | | |
| 643 | +-----------+ |
| 644 | | | |
| 645 | | args | |
| 646 | | | |
| 647 | +-----------+ |
| 648 | | PC-return | |
| 649 | +-----------+ |
| 650 | | Old frame | |
| 651 | +-----------+ |
| 652 | | | |
| 653 | | Locals | |
| 654 | | | |
| 655 | +-----------+ <--- current frame |
| 656 | | | |
| 657 | |
| 658 | With most processors (like 68K) the previous frame can be computed |
| 659 | easily because it is always at a fixed offset (see link/unlink). |
| 660 | That is, locals are accessed with negative offsets, arguments are |
| 661 | accessed with positive ones. Since 68hc11 only supports offsets |
| 662 | in the range [0..255], the frame is defined at the bottom of |
| 663 | locals (see picture). |
| 664 | |
| 665 | The purpose of the analysis made here is to find out the size |
| 666 | of locals in this function. An alternative to this is to use |
| 667 | DWARF2 info. This would be better but I don't know how to |
| 668 | access dwarf2 debug from this function. |
| 669 | |
| 670 | Walk from the function entry point to the point where we save |
| 671 | the frame. While walking instructions, compute the size of bytes |
| 672 | which are pushed. This gives us the index to access the previous |
| 673 | frame. |
| 674 | |
| 675 | We limit the search to 128 bytes so that the algorithm is bounded |
| 676 | in case of random and wrong code. We also stop and abort if |
| 677 | we find an instruction which is not supposed to appear in the |
| 678 | prologue (as generated by gcc 2.95, 2.96). */ |
| 679 | |
| 680 | func_end = pc + 128; |
| 681 | found_frame_point = 0; |
| 682 | info->size = 0; |
| 683 | save_addr = 0; |
| 684 | while (!done && pc + 2 < func_end) |
| 685 | { |
| 686 | struct insn_sequence *seq; |
| 687 | CORE_ADDR val; |
| 688 | |
| 689 | seq = m68hc11_analyze_instruction (gdbarch, seq_table, pc, &val); |
| 690 | if (seq == 0) |
| 691 | break; |
| 692 | |
| 693 | /* If we are within the instruction group, we can't advance the |
| 694 | pc nor the stack offset. Otherwise the caller's stack computed |
| 695 | from the current stack can be wrong. */ |
| 696 | if (pc + seq->length > current_pc) |
| 697 | break; |
| 698 | |
| 699 | pc = pc + seq->length; |
| 700 | if (seq->type == P_SAVE_REG) |
| 701 | { |
| 702 | if (found_frame_point) |
| 703 | { |
| 704 | saved_reg = m68hc11_which_soft_register (val); |
| 705 | if (saved_reg < 0) |
| 706 | break; |
| 707 | |
| 708 | save_addr -= 2; |
| 709 | if (info->saved_regs) |
| 710 | info->saved_regs[saved_reg].addr = save_addr; |
| 711 | } |
| 712 | else |
| 713 | { |
| 714 | size += 2; |
| 715 | } |
| 716 | } |
| 717 | else if (seq->type == P_SET_FRAME) |
| 718 | { |
| 719 | found_frame_point = 1; |
| 720 | info->size = size; |
| 721 | } |
| 722 | else if (seq->type == P_LOCAL_1) |
| 723 | { |
| 724 | size += 1; |
| 725 | } |
| 726 | else if (seq->type == P_LOCAL_2) |
| 727 | { |
| 728 | size += 2; |
| 729 | } |
| 730 | else if (seq->type == P_LOCAL_N) |
| 731 | { |
| 732 | /* Stack pointer is decremented for the allocation. */ |
| 733 | if (val & 0x8000) |
| 734 | size -= (int) (val) | 0xffff0000; |
| 735 | else |
| 736 | size -= val; |
| 737 | } |
| 738 | } |
| 739 | if (found_frame_point == 0) |
| 740 | info->sp_offset = size; |
| 741 | else |
| 742 | info->sp_offset = -1; |
| 743 | return pc; |
| 744 | } |
| 745 | |
| 746 | static CORE_ADDR |
| 747 | m68hc11_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 748 | { |
| 749 | CORE_ADDR func_addr, func_end; |
| 750 | struct symtab_and_line sal; |
| 751 | struct m68hc11_unwind_cache tmp_cache = { 0 }; |
| 752 | |
| 753 | /* If we have line debugging information, then the end of the |
| 754 | prologue should be the first assembly instruction of the |
| 755 | first source line. */ |
| 756 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 757 | { |
| 758 | sal = find_pc_line (func_addr, 0); |
| 759 | if (sal.end && sal.end < func_end) |
| 760 | return sal.end; |
| 761 | } |
| 762 | |
| 763 | pc = m68hc11_scan_prologue (gdbarch, pc, (CORE_ADDR) -1, &tmp_cache); |
| 764 | return pc; |
| 765 | } |
| 766 | |
| 767 | static CORE_ADDR |
| 768 | m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 769 | { |
| 770 | ULONGEST pc; |
| 771 | |
| 772 | pc = frame_unwind_register_unsigned (next_frame, |
| 773 | gdbarch_pc_regnum (gdbarch)); |
| 774 | return pc; |
| 775 | } |
| 776 | |
| 777 | /* Put here the code to store, into fi->saved_regs, the addresses of |
| 778 | the saved registers of frame described by FRAME_INFO. This |
| 779 | includes special registers such as pc and fp saved in special ways |
| 780 | in the stack frame. sp is even more special: the address we return |
| 781 | for it IS the sp for the next frame. */ |
| 782 | |
| 783 | static struct m68hc11_unwind_cache * |
| 784 | m68hc11_frame_unwind_cache (struct frame_info *this_frame, |
| 785 | void **this_prologue_cache) |
| 786 | { |
| 787 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 788 | ULONGEST prev_sp; |
| 789 | ULONGEST this_base; |
| 790 | struct m68hc11_unwind_cache *info; |
| 791 | CORE_ADDR current_pc; |
| 792 | int i; |
| 793 | |
| 794 | if ((*this_prologue_cache)) |
| 795 | return (*this_prologue_cache); |
| 796 | |
| 797 | info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache); |
| 798 | (*this_prologue_cache) = info; |
| 799 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 800 | |
| 801 | info->pc = get_frame_func (this_frame); |
| 802 | |
| 803 | info->size = 0; |
| 804 | info->return_kind = m68hc11_get_return_insn (info->pc); |
| 805 | |
| 806 | /* The SP was moved to the FP. This indicates that a new frame |
| 807 | was created. Get THIS frame's FP value by unwinding it from |
| 808 | the next frame. */ |
| 809 | this_base = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM); |
| 810 | if (this_base == 0) |
| 811 | { |
| 812 | info->base = 0; |
| 813 | return info; |
| 814 | } |
| 815 | |
| 816 | current_pc = get_frame_pc (this_frame); |
| 817 | if (info->pc != 0) |
| 818 | m68hc11_scan_prologue (gdbarch, info->pc, current_pc, info); |
| 819 | |
| 820 | info->saved_regs[HARD_PC_REGNUM].addr = info->size; |
| 821 | |
| 822 | if (info->sp_offset != (CORE_ADDR) -1) |
| 823 | { |
| 824 | info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset; |
| 825 | this_base = get_frame_register_unsigned (this_frame, HARD_SP_REGNUM); |
| 826 | prev_sp = this_base + info->sp_offset + 2; |
| 827 | this_base += STACK_CORRECTION (gdbarch); |
| 828 | } |
| 829 | else |
| 830 | { |
| 831 | /* The FP points at the last saved register. Adjust the FP back |
| 832 | to before the first saved register giving the SP. */ |
| 833 | prev_sp = this_base + info->size + 2; |
| 834 | |
| 835 | this_base += STACK_CORRECTION (gdbarch); |
| 836 | if (soft_regs[SOFT_FP_REGNUM].name) |
| 837 | info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2; |
| 838 | } |
| 839 | |
| 840 | if (info->return_kind == RETURN_RTC) |
| 841 | { |
| 842 | prev_sp += 1; |
| 843 | info->saved_regs[HARD_PAGE_REGNUM].addr = info->size; |
| 844 | info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1; |
| 845 | } |
| 846 | else if (info->return_kind == RETURN_RTI) |
| 847 | { |
| 848 | prev_sp += 7; |
| 849 | info->saved_regs[HARD_CCR_REGNUM].addr = info->size; |
| 850 | info->saved_regs[HARD_D_REGNUM].addr = info->size + 1; |
| 851 | info->saved_regs[HARD_X_REGNUM].addr = info->size + 3; |
| 852 | info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5; |
| 853 | info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7; |
| 854 | } |
| 855 | |
| 856 | /* Add 1 here to adjust for the post-decrement nature of the push |
| 857 | instruction. */ |
| 858 | info->prev_sp = prev_sp; |
| 859 | |
| 860 | info->base = this_base; |
| 861 | |
| 862 | /* Adjust all the saved registers so that they contain addresses and not |
| 863 | offsets. */ |
| 864 | for (i = 0; |
| 865 | i < gdbarch_num_regs (gdbarch) |
| 866 | + gdbarch_num_pseudo_regs (gdbarch) - 1; |
| 867 | i++) |
| 868 | if (trad_frame_addr_p (info->saved_regs, i)) |
| 869 | { |
| 870 | info->saved_regs[i].addr += this_base; |
| 871 | } |
| 872 | |
| 873 | /* The previous frame's SP needed to be computed. Save the computed |
| 874 | value. */ |
| 875 | trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp); |
| 876 | |
| 877 | return info; |
| 878 | } |
| 879 | |
| 880 | /* Given a GDB frame, determine the address of the calling function's |
| 881 | frame. This will be used to create a new GDB frame struct. */ |
| 882 | |
| 883 | static void |
| 884 | m68hc11_frame_this_id (struct frame_info *this_frame, |
| 885 | void **this_prologue_cache, |
| 886 | struct frame_id *this_id) |
| 887 | { |
| 888 | struct m68hc11_unwind_cache *info |
| 889 | = m68hc11_frame_unwind_cache (this_frame, this_prologue_cache); |
| 890 | CORE_ADDR base; |
| 891 | CORE_ADDR func; |
| 892 | struct frame_id id; |
| 893 | |
| 894 | /* The FUNC is easy. */ |
| 895 | func = get_frame_func (this_frame); |
| 896 | |
| 897 | /* Hopefully the prologue analysis either correctly determined the |
| 898 | frame's base (which is the SP from the previous frame), or set |
| 899 | that base to "NULL". */ |
| 900 | base = info->prev_sp; |
| 901 | if (base == 0) |
| 902 | return; |
| 903 | |
| 904 | id = frame_id_build (base, func); |
| 905 | (*this_id) = id; |
| 906 | } |
| 907 | |
| 908 | static struct value * |
| 909 | m68hc11_frame_prev_register (struct frame_info *this_frame, |
| 910 | void **this_prologue_cache, int regnum) |
| 911 | { |
| 912 | struct value *value; |
| 913 | struct m68hc11_unwind_cache *info |
| 914 | = m68hc11_frame_unwind_cache (this_frame, this_prologue_cache); |
| 915 | |
| 916 | value = trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
| 917 | |
| 918 | /* Take into account the 68HC12 specific call (PC + page). */ |
| 919 | if (regnum == HARD_PC_REGNUM |
| 920 | && info->return_kind == RETURN_RTC |
| 921 | && USE_PAGE_REGISTER (get_frame_arch (this_frame))) |
| 922 | { |
| 923 | CORE_ADDR pc = value_as_long (value); |
| 924 | if (pc >= 0x08000 && pc < 0x0c000) |
| 925 | { |
| 926 | CORE_ADDR page; |
| 927 | |
| 928 | release_value (value); |
| 929 | value_free (value); |
| 930 | |
| 931 | value = trad_frame_get_prev_register (this_frame, info->saved_regs, |
| 932 | HARD_PAGE_REGNUM); |
| 933 | page = value_as_long (value); |
| 934 | release_value (value); |
| 935 | value_free (value); |
| 936 | |
| 937 | pc -= 0x08000; |
| 938 | pc += ((page & 0x0ff) << 14); |
| 939 | pc += 0x1000000; |
| 940 | |
| 941 | return frame_unwind_got_constant (this_frame, regnum, pc); |
| 942 | } |
| 943 | } |
| 944 | |
| 945 | return value; |
| 946 | } |
| 947 | |
| 948 | static const struct frame_unwind m68hc11_frame_unwind = { |
| 949 | NORMAL_FRAME, |
| 950 | default_frame_unwind_stop_reason, |
| 951 | m68hc11_frame_this_id, |
| 952 | m68hc11_frame_prev_register, |
| 953 | NULL, |
| 954 | default_frame_sniffer |
| 955 | }; |
| 956 | |
| 957 | static CORE_ADDR |
| 958 | m68hc11_frame_base_address (struct frame_info *this_frame, void **this_cache) |
| 959 | { |
| 960 | struct m68hc11_unwind_cache *info |
| 961 | = m68hc11_frame_unwind_cache (this_frame, this_cache); |
| 962 | |
| 963 | return info->base; |
| 964 | } |
| 965 | |
| 966 | static CORE_ADDR |
| 967 | m68hc11_frame_args_address (struct frame_info *this_frame, void **this_cache) |
| 968 | { |
| 969 | CORE_ADDR addr; |
| 970 | struct m68hc11_unwind_cache *info |
| 971 | = m68hc11_frame_unwind_cache (this_frame, this_cache); |
| 972 | |
| 973 | addr = info->base + info->size; |
| 974 | if (info->return_kind == RETURN_RTC) |
| 975 | addr += 1; |
| 976 | else if (info->return_kind == RETURN_RTI) |
| 977 | addr += 7; |
| 978 | |
| 979 | return addr; |
| 980 | } |
| 981 | |
| 982 | static const struct frame_base m68hc11_frame_base = { |
| 983 | &m68hc11_frame_unwind, |
| 984 | m68hc11_frame_base_address, |
| 985 | m68hc11_frame_base_address, |
| 986 | m68hc11_frame_args_address |
| 987 | }; |
| 988 | |
| 989 | static CORE_ADDR |
| 990 | m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 991 | { |
| 992 | ULONGEST sp; |
| 993 | sp = frame_unwind_register_unsigned (next_frame, HARD_SP_REGNUM); |
| 994 | return sp; |
| 995 | } |
| 996 | |
| 997 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that dummy |
| 998 | frame. The frame ID's base needs to match the TOS value saved by |
| 999 | save_dummy_frame_tos(), and the PC match the dummy frame's breakpoint. */ |
| 1000 | |
| 1001 | static struct frame_id |
| 1002 | m68hc11_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 1003 | { |
| 1004 | ULONGEST tos; |
| 1005 | CORE_ADDR pc = get_frame_pc (this_frame); |
| 1006 | |
| 1007 | tos = get_frame_register_unsigned (this_frame, SOFT_FP_REGNUM); |
| 1008 | tos += 2; |
| 1009 | return frame_id_build (tos, pc); |
| 1010 | } |
| 1011 | |
| 1012 | \f |
| 1013 | /* Get and print the register from the given frame. */ |
| 1014 | static void |
| 1015 | m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file, |
| 1016 | struct frame_info *frame, int regno) |
| 1017 | { |
| 1018 | LONGEST rval; |
| 1019 | |
| 1020 | if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM |
| 1021 | || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM) |
| 1022 | rval = get_frame_register_unsigned (frame, regno); |
| 1023 | else |
| 1024 | rval = get_frame_register_signed (frame, regno); |
| 1025 | |
| 1026 | if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM |
| 1027 | || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM) |
| 1028 | { |
| 1029 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); |
| 1030 | if (regno != HARD_CCR_REGNUM) |
| 1031 | print_longest (file, 'd', 1, rval); |
| 1032 | } |
| 1033 | else |
| 1034 | { |
| 1035 | if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register) |
| 1036 | { |
| 1037 | ULONGEST page; |
| 1038 | |
| 1039 | page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM); |
| 1040 | fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page, |
| 1041 | (unsigned) rval); |
| 1042 | } |
| 1043 | else |
| 1044 | { |
| 1045 | fprintf_filtered (file, "0x%04x ", (unsigned) rval); |
| 1046 | if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM |
| 1047 | && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM) |
| 1048 | print_longest (file, 'd', 1, rval); |
| 1049 | } |
| 1050 | } |
| 1051 | |
| 1052 | if (regno == HARD_CCR_REGNUM) |
| 1053 | { |
| 1054 | /* CCR register */ |
| 1055 | int C, Z, N, V; |
| 1056 | unsigned char l = rval & 0xff; |
| 1057 | |
| 1058 | fprintf_filtered (file, "%c%c%c%c%c%c%c%c ", |
| 1059 | l & M6811_S_BIT ? 'S' : '-', |
| 1060 | l & M6811_X_BIT ? 'X' : '-', |
| 1061 | l & M6811_H_BIT ? 'H' : '-', |
| 1062 | l & M6811_I_BIT ? 'I' : '-', |
| 1063 | l & M6811_N_BIT ? 'N' : '-', |
| 1064 | l & M6811_Z_BIT ? 'Z' : '-', |
| 1065 | l & M6811_V_BIT ? 'V' : '-', |
| 1066 | l & M6811_C_BIT ? 'C' : '-'); |
| 1067 | N = (l & M6811_N_BIT) != 0; |
| 1068 | Z = (l & M6811_Z_BIT) != 0; |
| 1069 | V = (l & M6811_V_BIT) != 0; |
| 1070 | C = (l & M6811_C_BIT) != 0; |
| 1071 | |
| 1072 | /* Print flags following the h8300. */ |
| 1073 | if ((C | Z) == 0) |
| 1074 | fprintf_filtered (file, "u> "); |
| 1075 | else if ((C | Z) == 1) |
| 1076 | fprintf_filtered (file, "u<= "); |
| 1077 | else if (C == 0) |
| 1078 | fprintf_filtered (file, "u< "); |
| 1079 | |
| 1080 | if (Z == 0) |
| 1081 | fprintf_filtered (file, "!= "); |
| 1082 | else |
| 1083 | fprintf_filtered (file, "== "); |
| 1084 | |
| 1085 | if ((N ^ V) == 0) |
| 1086 | fprintf_filtered (file, ">= "); |
| 1087 | else |
| 1088 | fprintf_filtered (file, "< "); |
| 1089 | |
| 1090 | if ((Z | (N ^ V)) == 0) |
| 1091 | fprintf_filtered (file, "> "); |
| 1092 | else |
| 1093 | fprintf_filtered (file, "<= "); |
| 1094 | } |
| 1095 | } |
| 1096 | |
| 1097 | /* Same as 'info reg' but prints the registers in a different way. */ |
| 1098 | static void |
| 1099 | m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, |
| 1100 | struct frame_info *frame, int regno, int cpregs) |
| 1101 | { |
| 1102 | if (regno >= 0) |
| 1103 | { |
| 1104 | const char *name = gdbarch_register_name (gdbarch, regno); |
| 1105 | |
| 1106 | if (!name || !*name) |
| 1107 | return; |
| 1108 | |
| 1109 | fprintf_filtered (file, "%-10s ", name); |
| 1110 | m68hc11_print_register (gdbarch, file, frame, regno); |
| 1111 | fprintf_filtered (file, "\n"); |
| 1112 | } |
| 1113 | else |
| 1114 | { |
| 1115 | int i, nr; |
| 1116 | |
| 1117 | fprintf_filtered (file, "PC="); |
| 1118 | m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM); |
| 1119 | |
| 1120 | fprintf_filtered (file, " SP="); |
| 1121 | m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM); |
| 1122 | |
| 1123 | fprintf_filtered (file, " FP="); |
| 1124 | m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM); |
| 1125 | |
| 1126 | fprintf_filtered (file, "\nCCR="); |
| 1127 | m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM); |
| 1128 | |
| 1129 | fprintf_filtered (file, "\nD="); |
| 1130 | m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM); |
| 1131 | |
| 1132 | fprintf_filtered (file, " X="); |
| 1133 | m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM); |
| 1134 | |
| 1135 | fprintf_filtered (file, " Y="); |
| 1136 | m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM); |
| 1137 | |
| 1138 | if (gdbarch_tdep (gdbarch)->use_page_register) |
| 1139 | { |
| 1140 | fprintf_filtered (file, "\nPage="); |
| 1141 | m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM); |
| 1142 | } |
| 1143 | fprintf_filtered (file, "\n"); |
| 1144 | |
| 1145 | nr = 0; |
| 1146 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) |
| 1147 | { |
| 1148 | /* Skip registers which are not defined in the symbol table. */ |
| 1149 | if (soft_regs[i].name == 0) |
| 1150 | continue; |
| 1151 | |
| 1152 | fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1); |
| 1153 | m68hc11_print_register (gdbarch, file, frame, i); |
| 1154 | nr++; |
| 1155 | if ((nr % 8) == 7) |
| 1156 | fprintf_filtered (file, "\n"); |
| 1157 | else |
| 1158 | fprintf_filtered (file, " "); |
| 1159 | } |
| 1160 | if (nr && (nr % 8) != 7) |
| 1161 | fprintf_filtered (file, "\n"); |
| 1162 | } |
| 1163 | } |
| 1164 | |
| 1165 | static CORE_ADDR |
| 1166 | m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 1167 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 1168 | int nargs, struct value **args, CORE_ADDR sp, |
| 1169 | int struct_return, CORE_ADDR struct_addr) |
| 1170 | { |
| 1171 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 1172 | int argnum; |
| 1173 | int first_stack_argnum; |
| 1174 | struct type *type; |
| 1175 | const gdb_byte *val; |
| 1176 | gdb_byte buf[2]; |
| 1177 | |
| 1178 | first_stack_argnum = 0; |
| 1179 | if (struct_return) |
| 1180 | { |
| 1181 | regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, struct_addr); |
| 1182 | } |
| 1183 | else if (nargs > 0) |
| 1184 | { |
| 1185 | type = value_type (args[0]); |
| 1186 | |
| 1187 | /* First argument is passed in D and X registers. */ |
| 1188 | if (TYPE_LENGTH (type) <= 4) |
| 1189 | { |
| 1190 | ULONGEST v; |
| 1191 | |
| 1192 | v = extract_unsigned_integer (value_contents (args[0]), |
| 1193 | TYPE_LENGTH (type), byte_order); |
| 1194 | first_stack_argnum = 1; |
| 1195 | |
| 1196 | regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v); |
| 1197 | if (TYPE_LENGTH (type) > 2) |
| 1198 | { |
| 1199 | v >>= 16; |
| 1200 | regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v); |
| 1201 | } |
| 1202 | } |
| 1203 | } |
| 1204 | |
| 1205 | for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--) |
| 1206 | { |
| 1207 | type = value_type (args[argnum]); |
| 1208 | |
| 1209 | if (TYPE_LENGTH (type) & 1) |
| 1210 | { |
| 1211 | static gdb_byte zero = 0; |
| 1212 | |
| 1213 | sp--; |
| 1214 | write_memory (sp, &zero, 1); |
| 1215 | } |
| 1216 | val = value_contents (args[argnum]); |
| 1217 | sp -= TYPE_LENGTH (type); |
| 1218 | write_memory (sp, val, TYPE_LENGTH (type)); |
| 1219 | } |
| 1220 | |
| 1221 | /* Store return address. */ |
| 1222 | sp -= 2; |
| 1223 | store_unsigned_integer (buf, 2, byte_order, bp_addr); |
| 1224 | write_memory (sp, buf, 2); |
| 1225 | |
| 1226 | /* Finally, update the stack pointer... */ |
| 1227 | sp -= STACK_CORRECTION (gdbarch); |
| 1228 | regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp); |
| 1229 | |
| 1230 | /* ...and fake a frame pointer. */ |
| 1231 | regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp); |
| 1232 | |
| 1233 | /* DWARF2/GCC uses the stack address *before* the function call as a |
| 1234 | frame's CFA. */ |
| 1235 | return sp + 2; |
| 1236 | } |
| 1237 | |
| 1238 | |
| 1239 | /* Return the GDB type object for the "standard" data type |
| 1240 | of data in register N. */ |
| 1241 | |
| 1242 | static struct type * |
| 1243 | m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr) |
| 1244 | { |
| 1245 | switch (reg_nr) |
| 1246 | { |
| 1247 | case HARD_PAGE_REGNUM: |
| 1248 | case HARD_A_REGNUM: |
| 1249 | case HARD_B_REGNUM: |
| 1250 | case HARD_CCR_REGNUM: |
| 1251 | return builtin_type (gdbarch)->builtin_uint8; |
| 1252 | |
| 1253 | case M68HC12_HARD_PC_REGNUM: |
| 1254 | return builtin_type (gdbarch)->builtin_uint32; |
| 1255 | |
| 1256 | default: |
| 1257 | return builtin_type (gdbarch)->builtin_uint16; |
| 1258 | } |
| 1259 | } |
| 1260 | |
| 1261 | static void |
| 1262 | m68hc11_store_return_value (struct type *type, struct regcache *regcache, |
| 1263 | const gdb_byte *valbuf) |
| 1264 | { |
| 1265 | int len; |
| 1266 | |
| 1267 | len = TYPE_LENGTH (type); |
| 1268 | |
| 1269 | /* First argument is passed in D and X registers. */ |
| 1270 | if (len <= 2) |
| 1271 | regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf); |
| 1272 | else if (len <= 4) |
| 1273 | { |
| 1274 | regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len, |
| 1275 | len - 2, valbuf); |
| 1276 | regcache_raw_write (regcache, HARD_D_REGNUM, valbuf + (len - 2)); |
| 1277 | } |
| 1278 | else |
| 1279 | error (_("return of value > 4 is not supported.")); |
| 1280 | } |
| 1281 | |
| 1282 | |
| 1283 | /* Given a return value in `regcache' with a type `type', |
| 1284 | extract and copy its value into `valbuf'. */ |
| 1285 | |
| 1286 | static void |
| 1287 | m68hc11_extract_return_value (struct type *type, struct regcache *regcache, |
| 1288 | void *valbuf) |
| 1289 | { |
| 1290 | gdb_byte buf[M68HC11_REG_SIZE]; |
| 1291 | |
| 1292 | regcache_raw_read (regcache, HARD_D_REGNUM, buf); |
| 1293 | switch (TYPE_LENGTH (type)) |
| 1294 | { |
| 1295 | case 1: |
| 1296 | memcpy (valbuf, buf + 1, 1); |
| 1297 | break; |
| 1298 | |
| 1299 | case 2: |
| 1300 | memcpy (valbuf, buf, 2); |
| 1301 | break; |
| 1302 | |
| 1303 | case 3: |
| 1304 | memcpy ((char*) valbuf + 1, buf, 2); |
| 1305 | regcache_raw_read (regcache, HARD_X_REGNUM, buf); |
| 1306 | memcpy (valbuf, buf + 1, 1); |
| 1307 | break; |
| 1308 | |
| 1309 | case 4: |
| 1310 | memcpy ((char*) valbuf + 2, buf, 2); |
| 1311 | regcache_raw_read (regcache, HARD_X_REGNUM, buf); |
| 1312 | memcpy (valbuf, buf, 2); |
| 1313 | break; |
| 1314 | |
| 1315 | default: |
| 1316 | error (_("bad size for return value")); |
| 1317 | } |
| 1318 | } |
| 1319 | |
| 1320 | static enum return_value_convention |
| 1321 | m68hc11_return_value (struct gdbarch *gdbarch, struct value *function, |
| 1322 | struct type *valtype, struct regcache *regcache, |
| 1323 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 1324 | { |
| 1325 | if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
| 1326 | || TYPE_CODE (valtype) == TYPE_CODE_UNION |
| 1327 | || TYPE_CODE (valtype) == TYPE_CODE_ARRAY |
| 1328 | || TYPE_LENGTH (valtype) > 4) |
| 1329 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 1330 | else |
| 1331 | { |
| 1332 | if (readbuf != NULL) |
| 1333 | m68hc11_extract_return_value (valtype, regcache, readbuf); |
| 1334 | if (writebuf != NULL) |
| 1335 | m68hc11_store_return_value (valtype, regcache, writebuf); |
| 1336 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 1337 | } |
| 1338 | } |
| 1339 | |
| 1340 | /* Test whether the ELF symbol corresponds to a function using rtc or |
| 1341 | rti to return. */ |
| 1342 | |
| 1343 | static void |
| 1344 | m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) |
| 1345 | { |
| 1346 | unsigned char flags; |
| 1347 | |
| 1348 | flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other; |
| 1349 | if (flags & STO_M68HC12_FAR) |
| 1350 | MSYMBOL_SET_RTC (msym); |
| 1351 | if (flags & STO_M68HC12_INTERRUPT) |
| 1352 | MSYMBOL_SET_RTI (msym); |
| 1353 | } |
| 1354 | |
| 1355 | static int |
| 1356 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) |
| 1357 | { |
| 1358 | if (info->arch == bfd_arch_m68hc11) |
| 1359 | return print_insn_m68hc11 (memaddr, info); |
| 1360 | else |
| 1361 | return print_insn_m68hc12 (memaddr, info); |
| 1362 | } |
| 1363 | |
| 1364 | \f |
| 1365 | |
| 1366 | /* 68HC11/68HC12 register groups. |
| 1367 | Identify real hard registers and soft registers used by gcc. */ |
| 1368 | |
| 1369 | static struct reggroup *m68hc11_soft_reggroup; |
| 1370 | static struct reggroup *m68hc11_hard_reggroup; |
| 1371 | |
| 1372 | static void |
| 1373 | m68hc11_init_reggroups (void) |
| 1374 | { |
| 1375 | m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP); |
| 1376 | m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP); |
| 1377 | } |
| 1378 | |
| 1379 | static void |
| 1380 | m68hc11_add_reggroups (struct gdbarch *gdbarch) |
| 1381 | { |
| 1382 | reggroup_add (gdbarch, m68hc11_hard_reggroup); |
| 1383 | reggroup_add (gdbarch, m68hc11_soft_reggroup); |
| 1384 | reggroup_add (gdbarch, general_reggroup); |
| 1385 | reggroup_add (gdbarch, float_reggroup); |
| 1386 | reggroup_add (gdbarch, all_reggroup); |
| 1387 | reggroup_add (gdbarch, save_reggroup); |
| 1388 | reggroup_add (gdbarch, restore_reggroup); |
| 1389 | reggroup_add (gdbarch, vector_reggroup); |
| 1390 | reggroup_add (gdbarch, system_reggroup); |
| 1391 | } |
| 1392 | |
| 1393 | static int |
| 1394 | m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
| 1395 | struct reggroup *group) |
| 1396 | { |
| 1397 | /* We must save the real hard register as well as gcc |
| 1398 | soft registers including the frame pointer. */ |
| 1399 | if (group == save_reggroup || group == restore_reggroup) |
| 1400 | { |
| 1401 | return (regnum <= gdbarch_num_regs (gdbarch) |
| 1402 | || ((regnum == SOFT_FP_REGNUM |
| 1403 | || regnum == SOFT_TMP_REGNUM |
| 1404 | || regnum == SOFT_ZS_REGNUM |
| 1405 | || regnum == SOFT_XY_REGNUM) |
| 1406 | && m68hc11_register_name (gdbarch, regnum))); |
| 1407 | } |
| 1408 | |
| 1409 | /* Group to identify gcc soft registers (d1..dN). */ |
| 1410 | if (group == m68hc11_soft_reggroup) |
| 1411 | { |
| 1412 | return regnum >= SOFT_D1_REGNUM |
| 1413 | && m68hc11_register_name (gdbarch, regnum); |
| 1414 | } |
| 1415 | |
| 1416 | if (group == m68hc11_hard_reggroup) |
| 1417 | { |
| 1418 | return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM |
| 1419 | || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM |
| 1420 | || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM; |
| 1421 | } |
| 1422 | return default_register_reggroup_p (gdbarch, regnum, group); |
| 1423 | } |
| 1424 | |
| 1425 | static struct gdbarch * |
| 1426 | m68hc11_gdbarch_init (struct gdbarch_info info, |
| 1427 | struct gdbarch_list *arches) |
| 1428 | { |
| 1429 | struct gdbarch *gdbarch; |
| 1430 | struct gdbarch_tdep *tdep; |
| 1431 | int elf_flags; |
| 1432 | |
| 1433 | soft_reg_initialized = 0; |
| 1434 | |
| 1435 | /* Extract the elf_flags if available. */ |
| 1436 | if (info.abfd != NULL |
| 1437 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) |
| 1438 | elf_flags = elf_elfheader (info.abfd)->e_flags; |
| 1439 | else |
| 1440 | elf_flags = 0; |
| 1441 | |
| 1442 | /* Try to find a pre-existing architecture. */ |
| 1443 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1444 | arches != NULL; |
| 1445 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 1446 | { |
| 1447 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) |
| 1448 | continue; |
| 1449 | |
| 1450 | return arches->gdbarch; |
| 1451 | } |
| 1452 | |
| 1453 | /* Need a new architecture. Fill in a target specific vector. */ |
| 1454 | tdep = XNEW (struct gdbarch_tdep); |
| 1455 | gdbarch = gdbarch_alloc (&info, tdep); |
| 1456 | tdep->elf_flags = elf_flags; |
| 1457 | |
| 1458 | switch (info.bfd_arch_info->arch) |
| 1459 | { |
| 1460 | case bfd_arch_m68hc11: |
| 1461 | tdep->stack_correction = 1; |
| 1462 | tdep->use_page_register = 0; |
| 1463 | tdep->prologue = m6811_prologue; |
| 1464 | set_gdbarch_addr_bit (gdbarch, 16); |
| 1465 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); |
| 1466 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); |
| 1467 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); |
| 1468 | break; |
| 1469 | |
| 1470 | case bfd_arch_m68hc12: |
| 1471 | tdep->stack_correction = 0; |
| 1472 | tdep->use_page_register = elf_flags & E_M68HC12_BANKS; |
| 1473 | tdep->prologue = m6812_prologue; |
| 1474 | set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16); |
| 1475 | set_gdbarch_num_pseudo_regs (gdbarch, |
| 1476 | elf_flags & E_M68HC12_BANKS |
| 1477 | ? M68HC12_NUM_PSEUDO_REGS |
| 1478 | : M68HC11_NUM_PSEUDO_REGS); |
| 1479 | set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS |
| 1480 | ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM); |
| 1481 | set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS |
| 1482 | ? M68HC12_NUM_REGS : M68HC11_NUM_REGS); |
| 1483 | break; |
| 1484 | |
| 1485 | default: |
| 1486 | break; |
| 1487 | } |
| 1488 | |
| 1489 | /* Initially set everything according to the ABI. |
| 1490 | Use 16-bit integers since it will be the case for most |
| 1491 | programs. The size of these types should normally be set |
| 1492 | according to the dwarf2 debug information. */ |
| 1493 | set_gdbarch_short_bit (gdbarch, 16); |
| 1494 | set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16); |
| 1495 | set_gdbarch_float_bit (gdbarch, 32); |
| 1496 | if (elf_flags & E_M68HC11_F64) |
| 1497 | { |
| 1498 | set_gdbarch_double_bit (gdbarch, 64); |
| 1499 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); |
| 1500 | } |
| 1501 | else |
| 1502 | { |
| 1503 | set_gdbarch_double_bit (gdbarch, 32); |
| 1504 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); |
| 1505 | } |
| 1506 | set_gdbarch_long_double_bit (gdbarch, 64); |
| 1507 | set_gdbarch_long_bit (gdbarch, 32); |
| 1508 | set_gdbarch_ptr_bit (gdbarch, 16); |
| 1509 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 1510 | |
| 1511 | /* Characters are unsigned. */ |
| 1512 | set_gdbarch_char_signed (gdbarch, 0); |
| 1513 | |
| 1514 | set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc); |
| 1515 | set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp); |
| 1516 | |
| 1517 | /* Set register info. */ |
| 1518 | set_gdbarch_fp0_regnum (gdbarch, -1); |
| 1519 | |
| 1520 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); |
| 1521 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); |
| 1522 | set_gdbarch_register_type (gdbarch, m68hc11_register_type); |
| 1523 | set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read); |
| 1524 | set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write); |
| 1525 | |
| 1526 | set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call); |
| 1527 | |
| 1528 | set_gdbarch_return_value (gdbarch, m68hc11_return_value); |
| 1529 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); |
| 1530 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1531 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); |
| 1532 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11); |
| 1533 | |
| 1534 | m68hc11_add_reggroups (gdbarch); |
| 1535 | set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p); |
| 1536 | set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info); |
| 1537 | |
| 1538 | /* Hook in the DWARF CFI frame unwinder. */ |
| 1539 | dwarf2_append_unwinders (gdbarch); |
| 1540 | |
| 1541 | frame_unwind_append_unwinder (gdbarch, &m68hc11_frame_unwind); |
| 1542 | frame_base_set_default (gdbarch, &m68hc11_frame_base); |
| 1543 | |
| 1544 | /* Methods for saving / extracting a dummy frame's ID. The ID's |
| 1545 | stack address must match the SP value returned by |
| 1546 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ |
| 1547 | set_gdbarch_dummy_id (gdbarch, m68hc11_dummy_id); |
| 1548 | |
| 1549 | /* Return the unwound PC value. */ |
| 1550 | set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc); |
| 1551 | |
| 1552 | /* Minsymbol frobbing. */ |
| 1553 | set_gdbarch_elf_make_msymbol_special (gdbarch, |
| 1554 | m68hc11_elf_make_msymbol_special); |
| 1555 | |
| 1556 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
| 1557 | |
| 1558 | return gdbarch; |
| 1559 | } |
| 1560 | |
| 1561 | /* -Wmissing-prototypes */ |
| 1562 | extern initialize_file_ftype _initialize_m68hc11_tdep; |
| 1563 | |
| 1564 | void |
| 1565 | _initialize_m68hc11_tdep (void) |
| 1566 | { |
| 1567 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
| 1568 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
| 1569 | m68hc11_init_reggroups (); |
| 1570 | } |
| 1571 | |