| 1 | /* Target-dependent code for Motorola 68HC11 & 68HC12 |
| 2 | |
| 3 | Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software |
| 4 | Foundation, Inc. |
| 5 | |
| 6 | Contributed by Stephane Carrez, stcarrez@nerim.fr |
| 7 | |
| 8 | This file is part of GDB. |
| 9 | |
| 10 | This program is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 2 of the License, or |
| 13 | (at your option) any later version. |
| 14 | |
| 15 | This program is distributed in the hope that it will be useful, |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | GNU General Public License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License |
| 21 | along with this program; if not, write to the Free Software |
| 22 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 23 | |
| 24 | |
| 25 | #include "defs.h" |
| 26 | #include "frame.h" |
| 27 | #include "frame-unwind.h" |
| 28 | #include "frame-base.h" |
| 29 | #include "dwarf2-frame.h" |
| 30 | #include "trad-frame.h" |
| 31 | #include "symtab.h" |
| 32 | #include "gdbtypes.h" |
| 33 | #include "gdbcmd.h" |
| 34 | #include "gdbcore.h" |
| 35 | #include "gdb_string.h" |
| 36 | #include "value.h" |
| 37 | #include "inferior.h" |
| 38 | #include "dis-asm.h" |
| 39 | #include "symfile.h" |
| 40 | #include "objfiles.h" |
| 41 | #include "arch-utils.h" |
| 42 | #include "regcache.h" |
| 43 | #include "reggroups.h" |
| 44 | |
| 45 | #include "target.h" |
| 46 | #include "opcode/m68hc11.h" |
| 47 | #include "elf/m68hc11.h" |
| 48 | #include "elf-bfd.h" |
| 49 | |
| 50 | /* Macros for setting and testing a bit in a minimal symbol. |
| 51 | For 68HC11/68HC12 we have two flags that tell which return |
| 52 | type the function is using. This is used for prologue and frame |
| 53 | analysis to compute correct stack frame layout. |
| 54 | |
| 55 | The MSB of the minimal symbol's "info" field is used for this purpose. |
| 56 | |
| 57 | MSYMBOL_SET_RTC Actually sets the "RTC" bit. |
| 58 | MSYMBOL_SET_RTI Actually sets the "RTI" bit. |
| 59 | MSYMBOL_IS_RTC Tests the "RTC" bit in a minimal symbol. |
| 60 | MSYMBOL_IS_RTI Tests the "RTC" bit in a minimal symbol. */ |
| 61 | |
| 62 | #define MSYMBOL_SET_RTC(msym) \ |
| 63 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ |
| 64 | | 0x80000000) |
| 65 | |
| 66 | #define MSYMBOL_SET_RTI(msym) \ |
| 67 | MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \ |
| 68 | | 0x40000000) |
| 69 | |
| 70 | #define MSYMBOL_IS_RTC(msym) \ |
| 71 | (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0) |
| 72 | |
| 73 | #define MSYMBOL_IS_RTI(msym) \ |
| 74 | (((long) MSYMBOL_INFO (msym) & 0x40000000) != 0) |
| 75 | |
| 76 | enum insn_return_kind { |
| 77 | RETURN_RTS, |
| 78 | RETURN_RTC, |
| 79 | RETURN_RTI |
| 80 | }; |
| 81 | |
| 82 | |
| 83 | /* Register numbers of various important registers. |
| 84 | Note that some of these values are "real" register numbers, |
| 85 | and correspond to the general registers of the machine, |
| 86 | and some are "phony" register numbers which are too large |
| 87 | to be actual register numbers as far as the user is concerned |
| 88 | but do serve to get the desired values when passed to read_register. */ |
| 89 | |
| 90 | #define HARD_X_REGNUM 0 |
| 91 | #define HARD_D_REGNUM 1 |
| 92 | #define HARD_Y_REGNUM 2 |
| 93 | #define HARD_SP_REGNUM 3 |
| 94 | #define HARD_PC_REGNUM 4 |
| 95 | |
| 96 | #define HARD_A_REGNUM 5 |
| 97 | #define HARD_B_REGNUM 6 |
| 98 | #define HARD_CCR_REGNUM 7 |
| 99 | |
| 100 | /* 68HC12 page number register. |
| 101 | Note: to keep a compatibility with gcc register naming, we must |
| 102 | not have to rename FP and other soft registers. The page register |
| 103 | is a real hard register and must therefore be counted by NUM_REGS. |
| 104 | For this it has the same number as Z register (which is not used). */ |
| 105 | #define HARD_PAGE_REGNUM 8 |
| 106 | #define M68HC11_LAST_HARD_REG (HARD_PAGE_REGNUM) |
| 107 | |
| 108 | /* Z is replaced by X or Y by gcc during machine reorg. |
| 109 | ??? There is no way to get it and even know whether |
| 110 | it's in X or Y or in ZS. */ |
| 111 | #define SOFT_Z_REGNUM 8 |
| 112 | |
| 113 | /* Soft registers. These registers are special. There are treated |
| 114 | like normal hard registers by gcc and gdb (ie, within dwarf2 info). |
| 115 | They are physically located in memory. */ |
| 116 | #define SOFT_FP_REGNUM 9 |
| 117 | #define SOFT_TMP_REGNUM 10 |
| 118 | #define SOFT_ZS_REGNUM 11 |
| 119 | #define SOFT_XY_REGNUM 12 |
| 120 | #define SOFT_UNUSED_REGNUM 13 |
| 121 | #define SOFT_D1_REGNUM 14 |
| 122 | #define SOFT_D32_REGNUM (SOFT_D1_REGNUM+31) |
| 123 | #define M68HC11_MAX_SOFT_REGS 32 |
| 124 | |
| 125 | #define M68HC11_NUM_REGS (8) |
| 126 | #define M68HC11_NUM_PSEUDO_REGS (M68HC11_MAX_SOFT_REGS+5) |
| 127 | #define M68HC11_ALL_REGS (M68HC11_NUM_REGS+M68HC11_NUM_PSEUDO_REGS) |
| 128 | |
| 129 | #define M68HC11_REG_SIZE (2) |
| 130 | |
| 131 | #define M68HC12_NUM_REGS (9) |
| 132 | #define M68HC12_NUM_PSEUDO_REGS ((M68HC11_MAX_SOFT_REGS+5)+1-1) |
| 133 | #define M68HC12_HARD_PC_REGNUM (SOFT_D32_REGNUM+1) |
| 134 | |
| 135 | struct insn_sequence; |
| 136 | struct gdbarch_tdep |
| 137 | { |
| 138 | /* Stack pointer correction value. For 68hc11, the stack pointer points |
| 139 | to the next push location. An offset of 1 must be applied to obtain |
| 140 | the address where the last value is saved. For 68hc12, the stack |
| 141 | pointer points to the last value pushed. No offset is necessary. */ |
| 142 | int stack_correction; |
| 143 | |
| 144 | /* Description of instructions in the prologue. */ |
| 145 | struct insn_sequence *prologue; |
| 146 | |
| 147 | /* True if the page memory bank register is available |
| 148 | and must be used. */ |
| 149 | int use_page_register; |
| 150 | |
| 151 | /* ELF flags for ABI. */ |
| 152 | int elf_flags; |
| 153 | }; |
| 154 | |
| 155 | #define M6811_TDEP gdbarch_tdep (current_gdbarch) |
| 156 | #define STACK_CORRECTION (M6811_TDEP->stack_correction) |
| 157 | #define USE_PAGE_REGISTER (M6811_TDEP->use_page_register) |
| 158 | |
| 159 | struct m68hc11_unwind_cache |
| 160 | { |
| 161 | /* The previous frame's inner most stack address. Used as this |
| 162 | frame ID's stack_addr. */ |
| 163 | CORE_ADDR prev_sp; |
| 164 | /* The frame's base, optionally used by the high-level debug info. */ |
| 165 | CORE_ADDR base; |
| 166 | CORE_ADDR pc; |
| 167 | int size; |
| 168 | int prologue_type; |
| 169 | CORE_ADDR return_pc; |
| 170 | CORE_ADDR sp_offset; |
| 171 | int frameless; |
| 172 | enum insn_return_kind return_kind; |
| 173 | |
| 174 | /* Table indicating the location of each and every register. */ |
| 175 | struct trad_frame_saved_reg *saved_regs; |
| 176 | }; |
| 177 | |
| 178 | /* Table of registers for 68HC11. This includes the hard registers |
| 179 | and the soft registers used by GCC. */ |
| 180 | static char * |
| 181 | m68hc11_register_names[] = |
| 182 | { |
| 183 | "x", "d", "y", "sp", "pc", "a", "b", |
| 184 | "ccr", "page", "frame","tmp", "zs", "xy", 0, |
| 185 | "d1", "d2", "d3", "d4", "d5", "d6", "d7", |
| 186 | "d8", "d9", "d10", "d11", "d12", "d13", "d14", |
| 187 | "d15", "d16", "d17", "d18", "d19", "d20", "d21", |
| 188 | "d22", "d23", "d24", "d25", "d26", "d27", "d28", |
| 189 | "d29", "d30", "d31", "d32" |
| 190 | }; |
| 191 | |
| 192 | struct m68hc11_soft_reg |
| 193 | { |
| 194 | const char *name; |
| 195 | CORE_ADDR addr; |
| 196 | }; |
| 197 | |
| 198 | static struct m68hc11_soft_reg soft_regs[M68HC11_ALL_REGS]; |
| 199 | |
| 200 | #define M68HC11_FP_ADDR soft_regs[SOFT_FP_REGNUM].addr |
| 201 | |
| 202 | static int soft_min_addr; |
| 203 | static int soft_max_addr; |
| 204 | static int soft_reg_initialized = 0; |
| 205 | |
| 206 | /* Look in the symbol table for the address of a pseudo register |
| 207 | in memory. If we don't find it, pretend the register is not used |
| 208 | and not available. */ |
| 209 | static void |
| 210 | m68hc11_get_register_info (struct m68hc11_soft_reg *reg, const char *name) |
| 211 | { |
| 212 | struct minimal_symbol *msymbol; |
| 213 | |
| 214 | msymbol = lookup_minimal_symbol (name, NULL, NULL); |
| 215 | if (msymbol) |
| 216 | { |
| 217 | reg->addr = SYMBOL_VALUE_ADDRESS (msymbol); |
| 218 | reg->name = xstrdup (name); |
| 219 | |
| 220 | /* Keep track of the address range for soft registers. */ |
| 221 | if (reg->addr < (CORE_ADDR) soft_min_addr) |
| 222 | soft_min_addr = reg->addr; |
| 223 | if (reg->addr > (CORE_ADDR) soft_max_addr) |
| 224 | soft_max_addr = reg->addr; |
| 225 | } |
| 226 | else |
| 227 | { |
| 228 | reg->name = 0; |
| 229 | reg->addr = 0; |
| 230 | } |
| 231 | } |
| 232 | |
| 233 | /* Initialize the table of soft register addresses according |
| 234 | to the symbol table. */ |
| 235 | static void |
| 236 | m68hc11_initialize_register_info (void) |
| 237 | { |
| 238 | int i; |
| 239 | |
| 240 | if (soft_reg_initialized) |
| 241 | return; |
| 242 | |
| 243 | soft_min_addr = INT_MAX; |
| 244 | soft_max_addr = 0; |
| 245 | for (i = 0; i < M68HC11_ALL_REGS; i++) |
| 246 | { |
| 247 | soft_regs[i].name = 0; |
| 248 | } |
| 249 | |
| 250 | m68hc11_get_register_info (&soft_regs[SOFT_FP_REGNUM], "_.frame"); |
| 251 | m68hc11_get_register_info (&soft_regs[SOFT_TMP_REGNUM], "_.tmp"); |
| 252 | m68hc11_get_register_info (&soft_regs[SOFT_ZS_REGNUM], "_.z"); |
| 253 | soft_regs[SOFT_Z_REGNUM] = soft_regs[SOFT_ZS_REGNUM]; |
| 254 | m68hc11_get_register_info (&soft_regs[SOFT_XY_REGNUM], "_.xy"); |
| 255 | |
| 256 | for (i = SOFT_D1_REGNUM; i < M68HC11_MAX_SOFT_REGS; i++) |
| 257 | { |
| 258 | char buf[10]; |
| 259 | |
| 260 | sprintf (buf, "_.d%d", i - SOFT_D1_REGNUM + 1); |
| 261 | m68hc11_get_register_info (&soft_regs[i], buf); |
| 262 | } |
| 263 | |
| 264 | if (soft_regs[SOFT_FP_REGNUM].name == 0) |
| 265 | warning (_("No frame soft register found in the symbol table.\n" |
| 266 | "Stack backtrace will not work.")); |
| 267 | soft_reg_initialized = 1; |
| 268 | } |
| 269 | |
| 270 | /* Given an address in memory, return the soft register number if |
| 271 | that address corresponds to a soft register. Returns -1 if not. */ |
| 272 | static int |
| 273 | m68hc11_which_soft_register (CORE_ADDR addr) |
| 274 | { |
| 275 | int i; |
| 276 | |
| 277 | if (addr < soft_min_addr || addr > soft_max_addr) |
| 278 | return -1; |
| 279 | |
| 280 | for (i = SOFT_FP_REGNUM; i < M68HC11_ALL_REGS; i++) |
| 281 | { |
| 282 | if (soft_regs[i].name && soft_regs[i].addr == addr) |
| 283 | return i; |
| 284 | } |
| 285 | return -1; |
| 286 | } |
| 287 | |
| 288 | /* Fetch a pseudo register. The 68hc11 soft registers are treated like |
| 289 | pseudo registers. They are located in memory. Translate the register |
| 290 | fetch into a memory read. */ |
| 291 | static void |
| 292 | m68hc11_pseudo_register_read (struct gdbarch *gdbarch, |
| 293 | struct regcache *regcache, |
| 294 | int regno, void *buf) |
| 295 | { |
| 296 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
| 297 | addressing mode. */ |
| 298 | if (regno == M68HC12_HARD_PC_REGNUM) |
| 299 | { |
| 300 | ULONGEST pc; |
| 301 | const int regsize = TYPE_LENGTH (builtin_type_uint32); |
| 302 | |
| 303 | regcache_cooked_read_unsigned (regcache, HARD_PC_REGNUM, &pc); |
| 304 | if (pc >= 0x8000 && pc < 0xc000) |
| 305 | { |
| 306 | ULONGEST page; |
| 307 | |
| 308 | regcache_cooked_read_unsigned (regcache, HARD_PAGE_REGNUM, &page); |
| 309 | pc -= 0x8000; |
| 310 | pc += (page << 14); |
| 311 | pc += 0x1000000; |
| 312 | } |
| 313 | store_unsigned_integer (buf, regsize, pc); |
| 314 | return; |
| 315 | } |
| 316 | |
| 317 | m68hc11_initialize_register_info (); |
| 318 | |
| 319 | /* Fetch a soft register: translate into a memory read. */ |
| 320 | if (soft_regs[regno].name) |
| 321 | { |
| 322 | target_read_memory (soft_regs[regno].addr, buf, 2); |
| 323 | } |
| 324 | else |
| 325 | { |
| 326 | memset (buf, 0, 2); |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | /* Store a pseudo register. Translate the register store |
| 331 | into a memory write. */ |
| 332 | static void |
| 333 | m68hc11_pseudo_register_write (struct gdbarch *gdbarch, |
| 334 | struct regcache *regcache, |
| 335 | int regno, const void *buf) |
| 336 | { |
| 337 | /* The PC is a pseudo reg only for 68HC12 with the memory bank |
| 338 | addressing mode. */ |
| 339 | if (regno == M68HC12_HARD_PC_REGNUM) |
| 340 | { |
| 341 | const int regsize = TYPE_LENGTH (builtin_type_uint32); |
| 342 | char *tmp = alloca (regsize); |
| 343 | CORE_ADDR pc; |
| 344 | |
| 345 | memcpy (tmp, buf, regsize); |
| 346 | pc = extract_unsigned_integer (tmp, regsize); |
| 347 | if (pc >= 0x1000000) |
| 348 | { |
| 349 | pc -= 0x1000000; |
| 350 | regcache_cooked_write_unsigned (regcache, HARD_PAGE_REGNUM, |
| 351 | (pc >> 14) & 0x0ff); |
| 352 | pc &= 0x03fff; |
| 353 | regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, |
| 354 | pc + 0x8000); |
| 355 | } |
| 356 | else |
| 357 | regcache_cooked_write_unsigned (regcache, HARD_PC_REGNUM, pc); |
| 358 | return; |
| 359 | } |
| 360 | |
| 361 | m68hc11_initialize_register_info (); |
| 362 | |
| 363 | /* Store a soft register: translate into a memory write. */ |
| 364 | if (soft_regs[regno].name) |
| 365 | { |
| 366 | const int regsize = 2; |
| 367 | char *tmp = alloca (regsize); |
| 368 | memcpy (tmp, buf, regsize); |
| 369 | target_write_memory (soft_regs[regno].addr, tmp, regsize); |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | static const char * |
| 374 | m68hc11_register_name (int reg_nr) |
| 375 | { |
| 376 | if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER) |
| 377 | return "pc"; |
| 378 | if (reg_nr == HARD_PC_REGNUM && USE_PAGE_REGISTER) |
| 379 | return "ppc"; |
| 380 | |
| 381 | if (reg_nr < 0) |
| 382 | return NULL; |
| 383 | if (reg_nr >= M68HC11_ALL_REGS) |
| 384 | return NULL; |
| 385 | |
| 386 | m68hc11_initialize_register_info (); |
| 387 | |
| 388 | /* If we don't know the address of a soft register, pretend it |
| 389 | does not exist. */ |
| 390 | if (reg_nr > M68HC11_LAST_HARD_REG && soft_regs[reg_nr].name == 0) |
| 391 | return NULL; |
| 392 | return m68hc11_register_names[reg_nr]; |
| 393 | } |
| 394 | |
| 395 | static const unsigned char * |
| 396 | m68hc11_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) |
| 397 | { |
| 398 | static unsigned char breakpoint[] = {0x0}; |
| 399 | |
| 400 | *lenptr = sizeof (breakpoint); |
| 401 | return breakpoint; |
| 402 | } |
| 403 | |
| 404 | \f |
| 405 | /* 68HC11 & 68HC12 prologue analysis. |
| 406 | |
| 407 | */ |
| 408 | #define MAX_CODES 12 |
| 409 | |
| 410 | /* 68HC11 opcodes. */ |
| 411 | #undef M6811_OP_PAGE2 |
| 412 | #define M6811_OP_PAGE2 (0x18) |
| 413 | #define M6811_OP_LDX (0xde) |
| 414 | #define M6811_OP_LDX_EXT (0xfe) |
| 415 | #define M6811_OP_PSHX (0x3c) |
| 416 | #define M6811_OP_STS (0x9f) |
| 417 | #define M6811_OP_STS_EXT (0xbf) |
| 418 | #define M6811_OP_TSX (0x30) |
| 419 | #define M6811_OP_XGDX (0x8f) |
| 420 | #define M6811_OP_ADDD (0xc3) |
| 421 | #define M6811_OP_TXS (0x35) |
| 422 | #define M6811_OP_DES (0x34) |
| 423 | |
| 424 | /* 68HC12 opcodes. */ |
| 425 | #define M6812_OP_PAGE2 (0x18) |
| 426 | #define M6812_OP_MOVW (0x01) |
| 427 | #define M6812_PB_PSHW (0xae) |
| 428 | #define M6812_OP_STS (0x5f) |
| 429 | #define M6812_OP_STS_EXT (0x7f) |
| 430 | #define M6812_OP_LEAS (0x1b) |
| 431 | #define M6812_OP_PSHX (0x34) |
| 432 | #define M6812_OP_PSHY (0x35) |
| 433 | |
| 434 | /* Operand extraction. */ |
| 435 | #define OP_DIRECT (0x100) /* 8-byte direct addressing. */ |
| 436 | #define OP_IMM_LOW (0x200) /* Low part of 16-bit constant/address. */ |
| 437 | #define OP_IMM_HIGH (0x300) /* High part of 16-bit constant/address. */ |
| 438 | #define OP_PBYTE (0x400) /* 68HC12 indexed operand. */ |
| 439 | |
| 440 | /* Identification of the sequence. */ |
| 441 | enum m6811_seq_type |
| 442 | { |
| 443 | P_LAST = 0, |
| 444 | P_SAVE_REG, /* Save a register on the stack. */ |
| 445 | P_SET_FRAME, /* Setup the frame pointer. */ |
| 446 | P_LOCAL_1, /* Allocate 1 byte for locals. */ |
| 447 | P_LOCAL_2, /* Allocate 2 bytes for locals. */ |
| 448 | P_LOCAL_N /* Allocate N bytes for locals. */ |
| 449 | }; |
| 450 | |
| 451 | struct insn_sequence { |
| 452 | enum m6811_seq_type type; |
| 453 | unsigned length; |
| 454 | unsigned short code[MAX_CODES]; |
| 455 | }; |
| 456 | |
| 457 | /* Sequence of instructions in the 68HC11 function prologue. */ |
| 458 | static struct insn_sequence m6811_prologue[] = { |
| 459 | /* Sequences to save a soft-register. */ |
| 460 | { P_SAVE_REG, 3, { M6811_OP_LDX, OP_DIRECT, |
| 461 | M6811_OP_PSHX } }, |
| 462 | { P_SAVE_REG, 5, { M6811_OP_PAGE2, M6811_OP_LDX, OP_DIRECT, |
| 463 | M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 464 | { P_SAVE_REG, 4, { M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, |
| 465 | M6811_OP_PSHX } }, |
| 466 | { P_SAVE_REG, 6, { M6811_OP_PAGE2, M6811_OP_LDX_EXT, OP_IMM_HIGH, OP_IMM_LOW, |
| 467 | M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 468 | |
| 469 | /* Sequences to allocate local variables. */ |
| 470 | { P_LOCAL_N, 7, { M6811_OP_TSX, |
| 471 | M6811_OP_XGDX, |
| 472 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, |
| 473 | M6811_OP_XGDX, |
| 474 | M6811_OP_TXS } }, |
| 475 | { P_LOCAL_N, 11, { M6811_OP_PAGE2, M6811_OP_TSX, |
| 476 | M6811_OP_PAGE2, M6811_OP_XGDX, |
| 477 | M6811_OP_ADDD, OP_IMM_HIGH, OP_IMM_LOW, |
| 478 | M6811_OP_PAGE2, M6811_OP_XGDX, |
| 479 | M6811_OP_PAGE2, M6811_OP_TXS } }, |
| 480 | { P_LOCAL_1, 1, { M6811_OP_DES } }, |
| 481 | { P_LOCAL_2, 1, { M6811_OP_PSHX } }, |
| 482 | { P_LOCAL_2, 2, { M6811_OP_PAGE2, M6811_OP_PSHX } }, |
| 483 | |
| 484 | /* Initialize the frame pointer. */ |
| 485 | { P_SET_FRAME, 2, { M6811_OP_STS, OP_DIRECT } }, |
| 486 | { P_SET_FRAME, 3, { M6811_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, |
| 487 | { P_LAST, 0, { 0 } } |
| 488 | }; |
| 489 | |
| 490 | |
| 491 | /* Sequence of instructions in the 68HC12 function prologue. */ |
| 492 | static struct insn_sequence m6812_prologue[] = { |
| 493 | { P_SAVE_REG, 5, { M6812_OP_PAGE2, M6812_OP_MOVW, M6812_PB_PSHW, |
| 494 | OP_IMM_HIGH, OP_IMM_LOW } }, |
| 495 | { P_SET_FRAME, 2, { M6812_OP_STS, OP_DIRECT } }, |
| 496 | { P_SET_FRAME, 3, { M6812_OP_STS_EXT, OP_IMM_HIGH, OP_IMM_LOW } }, |
| 497 | { P_LOCAL_N, 2, { M6812_OP_LEAS, OP_PBYTE } }, |
| 498 | { P_LOCAL_2, 1, { M6812_OP_PSHX } }, |
| 499 | { P_LOCAL_2, 1, { M6812_OP_PSHY } }, |
| 500 | { P_LAST, 0 } |
| 501 | }; |
| 502 | |
| 503 | |
| 504 | /* Analyze the sequence of instructions starting at the given address. |
| 505 | Returns a pointer to the sequence when it is recognized and |
| 506 | the optional value (constant/address) associated with it. */ |
| 507 | static struct insn_sequence * |
| 508 | m68hc11_analyze_instruction (struct insn_sequence *seq, CORE_ADDR pc, |
| 509 | CORE_ADDR *val) |
| 510 | { |
| 511 | unsigned char buffer[MAX_CODES]; |
| 512 | unsigned bufsize; |
| 513 | unsigned j; |
| 514 | CORE_ADDR cur_val; |
| 515 | short v = 0; |
| 516 | |
| 517 | bufsize = 0; |
| 518 | for (; seq->type != P_LAST; seq++) |
| 519 | { |
| 520 | cur_val = 0; |
| 521 | for (j = 0; j < seq->length; j++) |
| 522 | { |
| 523 | if (bufsize < j + 1) |
| 524 | { |
| 525 | buffer[bufsize] = read_memory_unsigned_integer (pc + bufsize, |
| 526 | 1); |
| 527 | bufsize++; |
| 528 | } |
| 529 | /* Continue while we match the opcode. */ |
| 530 | if (seq->code[j] == buffer[j]) |
| 531 | continue; |
| 532 | |
| 533 | if ((seq->code[j] & 0xf00) == 0) |
| 534 | break; |
| 535 | |
| 536 | /* Extract a sequence parameter (address or constant). */ |
| 537 | switch (seq->code[j]) |
| 538 | { |
| 539 | case OP_DIRECT: |
| 540 | cur_val = (CORE_ADDR) buffer[j]; |
| 541 | break; |
| 542 | |
| 543 | case OP_IMM_HIGH: |
| 544 | cur_val = cur_val & 0x0ff; |
| 545 | cur_val |= (buffer[j] << 8); |
| 546 | break; |
| 547 | |
| 548 | case OP_IMM_LOW: |
| 549 | cur_val &= 0x0ff00; |
| 550 | cur_val |= buffer[j]; |
| 551 | break; |
| 552 | |
| 553 | case OP_PBYTE: |
| 554 | if ((buffer[j] & 0xE0) == 0x80) |
| 555 | { |
| 556 | v = buffer[j] & 0x1f; |
| 557 | if (v & 0x10) |
| 558 | v |= 0xfff0; |
| 559 | } |
| 560 | else if ((buffer[j] & 0xfe) == 0xf0) |
| 561 | { |
| 562 | v = read_memory_unsigned_integer (pc + j + 1, 1); |
| 563 | if (buffer[j] & 1) |
| 564 | v |= 0xff00; |
| 565 | } |
| 566 | else if (buffer[j] == 0xf2) |
| 567 | { |
| 568 | v = read_memory_unsigned_integer (pc + j + 1, 2); |
| 569 | } |
| 570 | cur_val = v; |
| 571 | break; |
| 572 | } |
| 573 | } |
| 574 | |
| 575 | /* We have a full match. */ |
| 576 | if (j == seq->length) |
| 577 | { |
| 578 | *val = cur_val; |
| 579 | return seq; |
| 580 | } |
| 581 | } |
| 582 | return 0; |
| 583 | } |
| 584 | |
| 585 | /* Return the instruction that the function at the PC is using. */ |
| 586 | static enum insn_return_kind |
| 587 | m68hc11_get_return_insn (CORE_ADDR pc) |
| 588 | { |
| 589 | struct minimal_symbol *sym; |
| 590 | |
| 591 | /* A flag indicating that this is a STO_M68HC12_FAR or STO_M68HC12_INTERRUPT |
| 592 | function is stored by elfread.c in the high bit of the info field. |
| 593 | Use this to decide which instruction the function uses to return. */ |
| 594 | sym = lookup_minimal_symbol_by_pc (pc); |
| 595 | if (sym == 0) |
| 596 | return RETURN_RTS; |
| 597 | |
| 598 | if (MSYMBOL_IS_RTC (sym)) |
| 599 | return RETURN_RTC; |
| 600 | else if (MSYMBOL_IS_RTI (sym)) |
| 601 | return RETURN_RTI; |
| 602 | else |
| 603 | return RETURN_RTS; |
| 604 | } |
| 605 | |
| 606 | /* Analyze the function prologue to find some information |
| 607 | about the function: |
| 608 | - the PC of the first line (for m68hc11_skip_prologue) |
| 609 | - the offset of the previous frame saved address (from current frame) |
| 610 | - the soft registers which are pushed. */ |
| 611 | static CORE_ADDR |
| 612 | m68hc11_scan_prologue (CORE_ADDR pc, CORE_ADDR current_pc, |
| 613 | struct m68hc11_unwind_cache *info) |
| 614 | { |
| 615 | LONGEST save_addr; |
| 616 | CORE_ADDR func_end; |
| 617 | int size; |
| 618 | int found_frame_point; |
| 619 | int saved_reg; |
| 620 | int done = 0; |
| 621 | struct insn_sequence *seq_table; |
| 622 | |
| 623 | info->size = 0; |
| 624 | info->sp_offset = 0; |
| 625 | if (pc >= current_pc) |
| 626 | return current_pc; |
| 627 | |
| 628 | size = 0; |
| 629 | |
| 630 | m68hc11_initialize_register_info (); |
| 631 | if (pc == 0) |
| 632 | { |
| 633 | info->size = 0; |
| 634 | return pc; |
| 635 | } |
| 636 | |
| 637 | seq_table = gdbarch_tdep (current_gdbarch)->prologue; |
| 638 | |
| 639 | /* The 68hc11 stack is as follows: |
| 640 | |
| 641 | |
| 642 | | | |
| 643 | +-----------+ |
| 644 | | | |
| 645 | | args | |
| 646 | | | |
| 647 | +-----------+ |
| 648 | | PC-return | |
| 649 | +-----------+ |
| 650 | | Old frame | |
| 651 | +-----------+ |
| 652 | | | |
| 653 | | Locals | |
| 654 | | | |
| 655 | +-----------+ <--- current frame |
| 656 | | | |
| 657 | |
| 658 | With most processors (like 68K) the previous frame can be computed |
| 659 | easily because it is always at a fixed offset (see link/unlink). |
| 660 | That is, locals are accessed with negative offsets, arguments are |
| 661 | accessed with positive ones. Since 68hc11 only supports offsets |
| 662 | in the range [0..255], the frame is defined at the bottom of |
| 663 | locals (see picture). |
| 664 | |
| 665 | The purpose of the analysis made here is to find out the size |
| 666 | of locals in this function. An alternative to this is to use |
| 667 | DWARF2 info. This would be better but I don't know how to |
| 668 | access dwarf2 debug from this function. |
| 669 | |
| 670 | Walk from the function entry point to the point where we save |
| 671 | the frame. While walking instructions, compute the size of bytes |
| 672 | which are pushed. This gives us the index to access the previous |
| 673 | frame. |
| 674 | |
| 675 | We limit the search to 128 bytes so that the algorithm is bounded |
| 676 | in case of random and wrong code. We also stop and abort if |
| 677 | we find an instruction which is not supposed to appear in the |
| 678 | prologue (as generated by gcc 2.95, 2.96). |
| 679 | */ |
| 680 | func_end = pc + 128; |
| 681 | found_frame_point = 0; |
| 682 | info->size = 0; |
| 683 | save_addr = 0; |
| 684 | while (!done && pc + 2 < func_end) |
| 685 | { |
| 686 | struct insn_sequence *seq; |
| 687 | CORE_ADDR val; |
| 688 | |
| 689 | seq = m68hc11_analyze_instruction (seq_table, pc, &val); |
| 690 | if (seq == 0) |
| 691 | break; |
| 692 | |
| 693 | /* If we are within the instruction group, we can't advance the |
| 694 | pc nor the stack offset. Otherwise the caller's stack computed |
| 695 | from the current stack can be wrong. */ |
| 696 | if (pc + seq->length > current_pc) |
| 697 | break; |
| 698 | |
| 699 | pc = pc + seq->length; |
| 700 | if (seq->type == P_SAVE_REG) |
| 701 | { |
| 702 | if (found_frame_point) |
| 703 | { |
| 704 | saved_reg = m68hc11_which_soft_register (val); |
| 705 | if (saved_reg < 0) |
| 706 | break; |
| 707 | |
| 708 | save_addr -= 2; |
| 709 | info->saved_regs[saved_reg].addr = save_addr; |
| 710 | } |
| 711 | else |
| 712 | { |
| 713 | size += 2; |
| 714 | } |
| 715 | } |
| 716 | else if (seq->type == P_SET_FRAME) |
| 717 | { |
| 718 | found_frame_point = 1; |
| 719 | info->size = size; |
| 720 | } |
| 721 | else if (seq->type == P_LOCAL_1) |
| 722 | { |
| 723 | size += 1; |
| 724 | } |
| 725 | else if (seq->type == P_LOCAL_2) |
| 726 | { |
| 727 | size += 2; |
| 728 | } |
| 729 | else if (seq->type == P_LOCAL_N) |
| 730 | { |
| 731 | /* Stack pointer is decremented for the allocation. */ |
| 732 | if (val & 0x8000) |
| 733 | size -= (int) (val) | 0xffff0000; |
| 734 | else |
| 735 | size -= val; |
| 736 | } |
| 737 | } |
| 738 | if (found_frame_point == 0) |
| 739 | info->sp_offset = size; |
| 740 | else |
| 741 | info->sp_offset = -1; |
| 742 | return pc; |
| 743 | } |
| 744 | |
| 745 | static CORE_ADDR |
| 746 | m68hc11_skip_prologue (CORE_ADDR pc) |
| 747 | { |
| 748 | CORE_ADDR func_addr, func_end; |
| 749 | struct symtab_and_line sal; |
| 750 | struct m68hc11_unwind_cache tmp_cache = { 0 }; |
| 751 | |
| 752 | /* If we have line debugging information, then the end of the |
| 753 | prologue should be the first assembly instruction of the |
| 754 | first source line. */ |
| 755 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 756 | { |
| 757 | sal = find_pc_line (func_addr, 0); |
| 758 | if (sal.end && sal.end < func_end) |
| 759 | return sal.end; |
| 760 | } |
| 761 | |
| 762 | pc = m68hc11_scan_prologue (pc, (CORE_ADDR) -1, &tmp_cache); |
| 763 | return pc; |
| 764 | } |
| 765 | |
| 766 | static CORE_ADDR |
| 767 | m68hc11_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 768 | { |
| 769 | ULONGEST pc; |
| 770 | |
| 771 | frame_unwind_unsigned_register (next_frame, gdbarch_pc_regnum (gdbarch), |
| 772 | &pc); |
| 773 | return pc; |
| 774 | } |
| 775 | |
| 776 | /* Put here the code to store, into fi->saved_regs, the addresses of |
| 777 | the saved registers of frame described by FRAME_INFO. This |
| 778 | includes special registers such as pc and fp saved in special ways |
| 779 | in the stack frame. sp is even more special: the address we return |
| 780 | for it IS the sp for the next frame. */ |
| 781 | |
| 782 | struct m68hc11_unwind_cache * |
| 783 | m68hc11_frame_unwind_cache (struct frame_info *next_frame, |
| 784 | void **this_prologue_cache) |
| 785 | { |
| 786 | ULONGEST prev_sp; |
| 787 | ULONGEST this_base; |
| 788 | struct m68hc11_unwind_cache *info; |
| 789 | CORE_ADDR current_pc; |
| 790 | int i; |
| 791 | |
| 792 | if ((*this_prologue_cache)) |
| 793 | return (*this_prologue_cache); |
| 794 | |
| 795 | info = FRAME_OBSTACK_ZALLOC (struct m68hc11_unwind_cache); |
| 796 | (*this_prologue_cache) = info; |
| 797 | info->saved_regs = trad_frame_alloc_saved_regs (next_frame); |
| 798 | |
| 799 | info->pc = frame_func_unwind (next_frame); |
| 800 | |
| 801 | info->size = 0; |
| 802 | info->return_kind = m68hc11_get_return_insn (info->pc); |
| 803 | |
| 804 | /* The SP was moved to the FP. This indicates that a new frame |
| 805 | was created. Get THIS frame's FP value by unwinding it from |
| 806 | the next frame. */ |
| 807 | frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &this_base); |
| 808 | if (this_base == 0) |
| 809 | { |
| 810 | info->base = 0; |
| 811 | return info; |
| 812 | } |
| 813 | |
| 814 | current_pc = frame_pc_unwind (next_frame); |
| 815 | if (info->pc != 0) |
| 816 | m68hc11_scan_prologue (info->pc, current_pc, info); |
| 817 | |
| 818 | info->saved_regs[HARD_PC_REGNUM].addr = info->size; |
| 819 | |
| 820 | if (info->sp_offset != (CORE_ADDR) -1) |
| 821 | { |
| 822 | info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset; |
| 823 | frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &this_base); |
| 824 | prev_sp = this_base + info->sp_offset + 2; |
| 825 | this_base += STACK_CORRECTION; |
| 826 | } |
| 827 | else |
| 828 | { |
| 829 | /* The FP points at the last saved register. Adjust the FP back |
| 830 | to before the first saved register giving the SP. */ |
| 831 | prev_sp = this_base + info->size + 2; |
| 832 | |
| 833 | this_base += STACK_CORRECTION; |
| 834 | if (soft_regs[SOFT_FP_REGNUM].name) |
| 835 | info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2; |
| 836 | } |
| 837 | |
| 838 | if (info->return_kind == RETURN_RTC) |
| 839 | { |
| 840 | prev_sp += 1; |
| 841 | info->saved_regs[HARD_PAGE_REGNUM].addr = info->size; |
| 842 | info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1; |
| 843 | } |
| 844 | else if (info->return_kind == RETURN_RTI) |
| 845 | { |
| 846 | prev_sp += 7; |
| 847 | info->saved_regs[HARD_CCR_REGNUM].addr = info->size; |
| 848 | info->saved_regs[HARD_D_REGNUM].addr = info->size + 1; |
| 849 | info->saved_regs[HARD_X_REGNUM].addr = info->size + 3; |
| 850 | info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5; |
| 851 | info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7; |
| 852 | } |
| 853 | |
| 854 | /* Add 1 here to adjust for the post-decrement nature of the push |
| 855 | instruction.*/ |
| 856 | info->prev_sp = prev_sp; |
| 857 | |
| 858 | info->base = this_base; |
| 859 | |
| 860 | /* Adjust all the saved registers so that they contain addresses and not |
| 861 | offsets. */ |
| 862 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS - 1; i++) |
| 863 | if (trad_frame_addr_p (info->saved_regs, i)) |
| 864 | { |
| 865 | info->saved_regs[i].addr += this_base; |
| 866 | } |
| 867 | |
| 868 | /* The previous frame's SP needed to be computed. Save the computed |
| 869 | value. */ |
| 870 | trad_frame_set_value (info->saved_regs, HARD_SP_REGNUM, info->prev_sp); |
| 871 | |
| 872 | return info; |
| 873 | } |
| 874 | |
| 875 | /* Given a GDB frame, determine the address of the calling function's |
| 876 | frame. This will be used to create a new GDB frame struct. */ |
| 877 | |
| 878 | static void |
| 879 | m68hc11_frame_this_id (struct frame_info *next_frame, |
| 880 | void **this_prologue_cache, |
| 881 | struct frame_id *this_id) |
| 882 | { |
| 883 | struct m68hc11_unwind_cache *info |
| 884 | = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache); |
| 885 | CORE_ADDR base; |
| 886 | CORE_ADDR func; |
| 887 | struct frame_id id; |
| 888 | |
| 889 | /* The FUNC is easy. */ |
| 890 | func = frame_func_unwind (next_frame); |
| 891 | |
| 892 | /* Hopefully the prologue analysis either correctly determined the |
| 893 | frame's base (which is the SP from the previous frame), or set |
| 894 | that base to "NULL". */ |
| 895 | base = info->prev_sp; |
| 896 | if (base == 0) |
| 897 | return; |
| 898 | |
| 899 | id = frame_id_build (base, func); |
| 900 | (*this_id) = id; |
| 901 | } |
| 902 | |
| 903 | static void |
| 904 | m68hc11_frame_prev_register (struct frame_info *next_frame, |
| 905 | void **this_prologue_cache, |
| 906 | int regnum, int *optimizedp, |
| 907 | enum lval_type *lvalp, CORE_ADDR *addrp, |
| 908 | int *realnump, void *bufferp) |
| 909 | { |
| 910 | struct m68hc11_unwind_cache *info |
| 911 | = m68hc11_frame_unwind_cache (next_frame, this_prologue_cache); |
| 912 | |
| 913 | trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, |
| 914 | optimizedp, lvalp, addrp, realnump, bufferp); |
| 915 | |
| 916 | if (regnum == HARD_PC_REGNUM) |
| 917 | { |
| 918 | /* Take into account the 68HC12 specific call (PC + page). */ |
| 919 | if (info->return_kind == RETURN_RTC |
| 920 | && *addrp >= 0x08000 && *addrp < 0x0c000 |
| 921 | && USE_PAGE_REGISTER) |
| 922 | { |
| 923 | int page_optimized; |
| 924 | |
| 925 | CORE_ADDR page; |
| 926 | |
| 927 | trad_frame_get_prev_register (next_frame, info->saved_regs, |
| 928 | HARD_PAGE_REGNUM, &page_optimized, |
| 929 | 0, &page, 0, 0); |
| 930 | *addrp -= 0x08000; |
| 931 | *addrp += ((page & 0x0ff) << 14); |
| 932 | *addrp += 0x1000000; |
| 933 | } |
| 934 | } |
| 935 | } |
| 936 | |
| 937 | static const struct frame_unwind m68hc11_frame_unwind = { |
| 938 | NORMAL_FRAME, |
| 939 | m68hc11_frame_this_id, |
| 940 | m68hc11_frame_prev_register |
| 941 | }; |
| 942 | |
| 943 | const struct frame_unwind * |
| 944 | m68hc11_frame_sniffer (struct frame_info *next_frame) |
| 945 | { |
| 946 | return &m68hc11_frame_unwind; |
| 947 | } |
| 948 | |
| 949 | static CORE_ADDR |
| 950 | m68hc11_frame_base_address (struct frame_info *next_frame, void **this_cache) |
| 951 | { |
| 952 | struct m68hc11_unwind_cache *info |
| 953 | = m68hc11_frame_unwind_cache (next_frame, this_cache); |
| 954 | |
| 955 | return info->base; |
| 956 | } |
| 957 | |
| 958 | static CORE_ADDR |
| 959 | m68hc11_frame_args_address (struct frame_info *next_frame, void **this_cache) |
| 960 | { |
| 961 | CORE_ADDR addr; |
| 962 | struct m68hc11_unwind_cache *info |
| 963 | = m68hc11_frame_unwind_cache (next_frame, this_cache); |
| 964 | |
| 965 | addr = info->base + info->size; |
| 966 | if (info->return_kind == RETURN_RTC) |
| 967 | addr += 1; |
| 968 | else if (info->return_kind == RETURN_RTI) |
| 969 | addr += 7; |
| 970 | |
| 971 | return addr; |
| 972 | } |
| 973 | |
| 974 | static const struct frame_base m68hc11_frame_base = { |
| 975 | &m68hc11_frame_unwind, |
| 976 | m68hc11_frame_base_address, |
| 977 | m68hc11_frame_base_address, |
| 978 | m68hc11_frame_args_address |
| 979 | }; |
| 980 | |
| 981 | static CORE_ADDR |
| 982 | m68hc11_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 983 | { |
| 984 | ULONGEST sp; |
| 985 | frame_unwind_unsigned_register (next_frame, HARD_SP_REGNUM, &sp); |
| 986 | return sp; |
| 987 | } |
| 988 | |
| 989 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that |
| 990 | dummy frame. The frame ID's base needs to match the TOS value |
| 991 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's |
| 992 | breakpoint. */ |
| 993 | |
| 994 | static struct frame_id |
| 995 | m68hc11_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 996 | { |
| 997 | ULONGEST tos; |
| 998 | CORE_ADDR pc = frame_pc_unwind (next_frame); |
| 999 | |
| 1000 | frame_unwind_unsigned_register (next_frame, SOFT_FP_REGNUM, &tos); |
| 1001 | tos += 2; |
| 1002 | return frame_id_build (tos, pc); |
| 1003 | } |
| 1004 | |
| 1005 | \f |
| 1006 | /* Get and print the register from the given frame. */ |
| 1007 | static void |
| 1008 | m68hc11_print_register (struct gdbarch *gdbarch, struct ui_file *file, |
| 1009 | struct frame_info *frame, int regno) |
| 1010 | { |
| 1011 | LONGEST rval; |
| 1012 | |
| 1013 | if (regno == HARD_PC_REGNUM || regno == HARD_SP_REGNUM |
| 1014 | || regno == SOFT_FP_REGNUM || regno == M68HC12_HARD_PC_REGNUM) |
| 1015 | rval = get_frame_register_unsigned (frame, regno); |
| 1016 | else |
| 1017 | rval = get_frame_register_signed (frame, regno); |
| 1018 | |
| 1019 | if (regno == HARD_A_REGNUM || regno == HARD_B_REGNUM |
| 1020 | || regno == HARD_CCR_REGNUM || regno == HARD_PAGE_REGNUM) |
| 1021 | { |
| 1022 | fprintf_filtered (file, "0x%02x ", (unsigned char) rval); |
| 1023 | if (regno != HARD_CCR_REGNUM) |
| 1024 | print_longest (file, 'd', 1, rval); |
| 1025 | } |
| 1026 | else |
| 1027 | { |
| 1028 | if (regno == HARD_PC_REGNUM && gdbarch_tdep (gdbarch)->use_page_register) |
| 1029 | { |
| 1030 | ULONGEST page; |
| 1031 | |
| 1032 | page = get_frame_register_unsigned (frame, HARD_PAGE_REGNUM); |
| 1033 | fprintf_filtered (file, "0x%02x:%04x ", (unsigned) page, |
| 1034 | (unsigned) rval); |
| 1035 | } |
| 1036 | else |
| 1037 | { |
| 1038 | fprintf_filtered (file, "0x%04x ", (unsigned) rval); |
| 1039 | if (regno != HARD_PC_REGNUM && regno != HARD_SP_REGNUM |
| 1040 | && regno != SOFT_FP_REGNUM && regno != M68HC12_HARD_PC_REGNUM) |
| 1041 | print_longest (file, 'd', 1, rval); |
| 1042 | } |
| 1043 | } |
| 1044 | |
| 1045 | if (regno == HARD_CCR_REGNUM) |
| 1046 | { |
| 1047 | /* CCR register */ |
| 1048 | int C, Z, N, V; |
| 1049 | unsigned char l = rval & 0xff; |
| 1050 | |
| 1051 | fprintf_filtered (file, "%c%c%c%c%c%c%c%c ", |
| 1052 | l & M6811_S_BIT ? 'S' : '-', |
| 1053 | l & M6811_X_BIT ? 'X' : '-', |
| 1054 | l & M6811_H_BIT ? 'H' : '-', |
| 1055 | l & M6811_I_BIT ? 'I' : '-', |
| 1056 | l & M6811_N_BIT ? 'N' : '-', |
| 1057 | l & M6811_Z_BIT ? 'Z' : '-', |
| 1058 | l & M6811_V_BIT ? 'V' : '-', |
| 1059 | l & M6811_C_BIT ? 'C' : '-'); |
| 1060 | N = (l & M6811_N_BIT) != 0; |
| 1061 | Z = (l & M6811_Z_BIT) != 0; |
| 1062 | V = (l & M6811_V_BIT) != 0; |
| 1063 | C = (l & M6811_C_BIT) != 0; |
| 1064 | |
| 1065 | /* Print flags following the h8300 */ |
| 1066 | if ((C | Z) == 0) |
| 1067 | fprintf_filtered (file, "u> "); |
| 1068 | else if ((C | Z) == 1) |
| 1069 | fprintf_filtered (file, "u<= "); |
| 1070 | else if (C == 0) |
| 1071 | fprintf_filtered (file, "u< "); |
| 1072 | |
| 1073 | if (Z == 0) |
| 1074 | fprintf_filtered (file, "!= "); |
| 1075 | else |
| 1076 | fprintf_filtered (file, "== "); |
| 1077 | |
| 1078 | if ((N ^ V) == 0) |
| 1079 | fprintf_filtered (file, ">= "); |
| 1080 | else |
| 1081 | fprintf_filtered (file, "< "); |
| 1082 | |
| 1083 | if ((Z | (N ^ V)) == 0) |
| 1084 | fprintf_filtered (file, "> "); |
| 1085 | else |
| 1086 | fprintf_filtered (file, "<= "); |
| 1087 | } |
| 1088 | } |
| 1089 | |
| 1090 | /* Same as 'info reg' but prints the registers in a different way. */ |
| 1091 | static void |
| 1092 | m68hc11_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file, |
| 1093 | struct frame_info *frame, int regno, int cpregs) |
| 1094 | { |
| 1095 | if (regno >= 0) |
| 1096 | { |
| 1097 | const char *name = gdbarch_register_name (gdbarch, regno); |
| 1098 | |
| 1099 | if (!name || !*name) |
| 1100 | return; |
| 1101 | |
| 1102 | fprintf_filtered (file, "%-10s ", name); |
| 1103 | m68hc11_print_register (gdbarch, file, frame, regno); |
| 1104 | fprintf_filtered (file, "\n"); |
| 1105 | } |
| 1106 | else |
| 1107 | { |
| 1108 | int i, nr; |
| 1109 | |
| 1110 | fprintf_filtered (file, "PC="); |
| 1111 | m68hc11_print_register (gdbarch, file, frame, HARD_PC_REGNUM); |
| 1112 | |
| 1113 | fprintf_filtered (file, " SP="); |
| 1114 | m68hc11_print_register (gdbarch, file, frame, HARD_SP_REGNUM); |
| 1115 | |
| 1116 | fprintf_filtered (file, " FP="); |
| 1117 | m68hc11_print_register (gdbarch, file, frame, SOFT_FP_REGNUM); |
| 1118 | |
| 1119 | fprintf_filtered (file, "\nCCR="); |
| 1120 | m68hc11_print_register (gdbarch, file, frame, HARD_CCR_REGNUM); |
| 1121 | |
| 1122 | fprintf_filtered (file, "\nD="); |
| 1123 | m68hc11_print_register (gdbarch, file, frame, HARD_D_REGNUM); |
| 1124 | |
| 1125 | fprintf_filtered (file, " X="); |
| 1126 | m68hc11_print_register (gdbarch, file, frame, HARD_X_REGNUM); |
| 1127 | |
| 1128 | fprintf_filtered (file, " Y="); |
| 1129 | m68hc11_print_register (gdbarch, file, frame, HARD_Y_REGNUM); |
| 1130 | |
| 1131 | if (gdbarch_tdep (gdbarch)->use_page_register) |
| 1132 | { |
| 1133 | fprintf_filtered (file, "\nPage="); |
| 1134 | m68hc11_print_register (gdbarch, file, frame, HARD_PAGE_REGNUM); |
| 1135 | } |
| 1136 | fprintf_filtered (file, "\n"); |
| 1137 | |
| 1138 | nr = 0; |
| 1139 | for (i = SOFT_D1_REGNUM; i < M68HC11_ALL_REGS; i++) |
| 1140 | { |
| 1141 | /* Skip registers which are not defined in the symbol table. */ |
| 1142 | if (soft_regs[i].name == 0) |
| 1143 | continue; |
| 1144 | |
| 1145 | fprintf_filtered (file, "D%d=", i - SOFT_D1_REGNUM + 1); |
| 1146 | m68hc11_print_register (gdbarch, file, frame, i); |
| 1147 | nr++; |
| 1148 | if ((nr % 8) == 7) |
| 1149 | fprintf_filtered (file, "\n"); |
| 1150 | else |
| 1151 | fprintf_filtered (file, " "); |
| 1152 | } |
| 1153 | if (nr && (nr % 8) != 7) |
| 1154 | fprintf_filtered (file, "\n"); |
| 1155 | } |
| 1156 | } |
| 1157 | |
| 1158 | static CORE_ADDR |
| 1159 | m68hc11_stack_align (CORE_ADDR addr) |
| 1160 | { |
| 1161 | return ((addr + 1) & -2); |
| 1162 | } |
| 1163 | |
| 1164 | static CORE_ADDR |
| 1165 | m68hc11_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
| 1166 | struct regcache *regcache, CORE_ADDR bp_addr, |
| 1167 | int nargs, struct value **args, CORE_ADDR sp, |
| 1168 | int struct_return, CORE_ADDR struct_addr) |
| 1169 | { |
| 1170 | int argnum; |
| 1171 | int first_stack_argnum; |
| 1172 | struct type *type; |
| 1173 | char *val; |
| 1174 | int len; |
| 1175 | char buf[2]; |
| 1176 | |
| 1177 | first_stack_argnum = 0; |
| 1178 | if (struct_return) |
| 1179 | { |
| 1180 | /* The struct is allocated on the stack and gdb used the stack |
| 1181 | pointer for the address of that struct. We must apply the |
| 1182 | stack offset on the address. */ |
| 1183 | regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, |
| 1184 | struct_addr + STACK_CORRECTION); |
| 1185 | } |
| 1186 | else if (nargs > 0) |
| 1187 | { |
| 1188 | type = value_type (args[0]); |
| 1189 | len = TYPE_LENGTH (type); |
| 1190 | |
| 1191 | /* First argument is passed in D and X registers. */ |
| 1192 | if (len <= 4) |
| 1193 | { |
| 1194 | ULONGEST v; |
| 1195 | |
| 1196 | v = extract_unsigned_integer (value_contents (args[0]), len); |
| 1197 | first_stack_argnum = 1; |
| 1198 | |
| 1199 | regcache_cooked_write_unsigned (regcache, HARD_D_REGNUM, v); |
| 1200 | if (len > 2) |
| 1201 | { |
| 1202 | v >>= 16; |
| 1203 | regcache_cooked_write_unsigned (regcache, HARD_X_REGNUM, v); |
| 1204 | } |
| 1205 | } |
| 1206 | } |
| 1207 | |
| 1208 | for (argnum = nargs - 1; argnum >= first_stack_argnum; argnum--) |
| 1209 | { |
| 1210 | type = value_type (args[argnum]); |
| 1211 | len = TYPE_LENGTH (type); |
| 1212 | |
| 1213 | if (len & 1) |
| 1214 | { |
| 1215 | static char zero = 0; |
| 1216 | |
| 1217 | sp--; |
| 1218 | write_memory (sp, &zero, 1); |
| 1219 | } |
| 1220 | val = (char*) value_contents (args[argnum]); |
| 1221 | sp -= len; |
| 1222 | write_memory (sp, val, len); |
| 1223 | } |
| 1224 | |
| 1225 | /* Store return address. */ |
| 1226 | sp -= 2; |
| 1227 | store_unsigned_integer (buf, 2, bp_addr); |
| 1228 | write_memory (sp, buf, 2); |
| 1229 | |
| 1230 | /* Finally, update the stack pointer... */ |
| 1231 | sp -= STACK_CORRECTION; |
| 1232 | regcache_cooked_write_unsigned (regcache, HARD_SP_REGNUM, sp); |
| 1233 | |
| 1234 | /* ...and fake a frame pointer. */ |
| 1235 | regcache_cooked_write_unsigned (regcache, SOFT_FP_REGNUM, sp); |
| 1236 | |
| 1237 | /* DWARF2/GCC uses the stack address *before* the function call as a |
| 1238 | frame's CFA. */ |
| 1239 | return sp + 2; |
| 1240 | } |
| 1241 | |
| 1242 | |
| 1243 | /* Return the GDB type object for the "standard" data type |
| 1244 | of data in register N. */ |
| 1245 | |
| 1246 | static struct type * |
| 1247 | m68hc11_register_type (struct gdbarch *gdbarch, int reg_nr) |
| 1248 | { |
| 1249 | switch (reg_nr) |
| 1250 | { |
| 1251 | case HARD_PAGE_REGNUM: |
| 1252 | case HARD_A_REGNUM: |
| 1253 | case HARD_B_REGNUM: |
| 1254 | case HARD_CCR_REGNUM: |
| 1255 | return builtin_type_uint8; |
| 1256 | |
| 1257 | case M68HC12_HARD_PC_REGNUM: |
| 1258 | return builtin_type_uint32; |
| 1259 | |
| 1260 | default: |
| 1261 | return builtin_type_uint16; |
| 1262 | } |
| 1263 | } |
| 1264 | |
| 1265 | static void |
| 1266 | m68hc11_store_return_value (struct type *type, struct regcache *regcache, |
| 1267 | const void *valbuf) |
| 1268 | { |
| 1269 | int len; |
| 1270 | |
| 1271 | len = TYPE_LENGTH (type); |
| 1272 | |
| 1273 | /* First argument is passed in D and X registers. */ |
| 1274 | if (len <= 2) |
| 1275 | regcache_raw_write_part (regcache, HARD_D_REGNUM, 2 - len, len, valbuf); |
| 1276 | else if (len <= 4) |
| 1277 | { |
| 1278 | regcache_raw_write_part (regcache, HARD_X_REGNUM, 4 - len, |
| 1279 | len - 2, valbuf); |
| 1280 | regcache_raw_write (regcache, HARD_D_REGNUM, (char*) valbuf + (len - 2)); |
| 1281 | } |
| 1282 | else |
| 1283 | error (_("return of value > 4 is not supported.")); |
| 1284 | } |
| 1285 | |
| 1286 | |
| 1287 | /* Given a return value in `regcache' with a type `type', |
| 1288 | extract and copy its value into `valbuf'. */ |
| 1289 | |
| 1290 | static void |
| 1291 | m68hc11_extract_return_value (struct type *type, struct regcache *regcache, |
| 1292 | void *valbuf) |
| 1293 | { |
| 1294 | int len = TYPE_LENGTH (type); |
| 1295 | char buf[M68HC11_REG_SIZE]; |
| 1296 | |
| 1297 | regcache_raw_read (regcache, HARD_D_REGNUM, buf); |
| 1298 | switch (len) |
| 1299 | { |
| 1300 | case 1: |
| 1301 | memcpy (valbuf, buf + 1, 1); |
| 1302 | break; |
| 1303 | |
| 1304 | case 2: |
| 1305 | memcpy (valbuf, buf, 2); |
| 1306 | break; |
| 1307 | |
| 1308 | case 3: |
| 1309 | memcpy ((char*) valbuf + 1, buf, 2); |
| 1310 | regcache_raw_read (regcache, HARD_X_REGNUM, buf); |
| 1311 | memcpy (valbuf, buf + 1, 1); |
| 1312 | break; |
| 1313 | |
| 1314 | case 4: |
| 1315 | memcpy ((char*) valbuf + 2, buf, 2); |
| 1316 | regcache_raw_read (regcache, HARD_X_REGNUM, buf); |
| 1317 | memcpy (valbuf, buf, 2); |
| 1318 | break; |
| 1319 | |
| 1320 | default: |
| 1321 | error (_("bad size for return value")); |
| 1322 | } |
| 1323 | } |
| 1324 | |
| 1325 | enum return_value_convention |
| 1326 | m68hc11_return_value (struct gdbarch *gdbarch, struct type *valtype, |
| 1327 | struct regcache *regcache, void *readbuf, |
| 1328 | const void *writebuf) |
| 1329 | { |
| 1330 | if (TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
| 1331 | || TYPE_CODE (valtype) == TYPE_CODE_UNION |
| 1332 | || TYPE_CODE (valtype) == TYPE_CODE_ARRAY |
| 1333 | || TYPE_LENGTH (valtype) > 4) |
| 1334 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 1335 | else |
| 1336 | { |
| 1337 | if (readbuf != NULL) |
| 1338 | m68hc11_extract_return_value (valtype, regcache, readbuf); |
| 1339 | if (writebuf != NULL) |
| 1340 | m68hc11_store_return_value (valtype, regcache, writebuf); |
| 1341 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 1342 | } |
| 1343 | } |
| 1344 | |
| 1345 | /* Test whether the ELF symbol corresponds to a function using rtc or |
| 1346 | rti to return. */ |
| 1347 | |
| 1348 | static void |
| 1349 | m68hc11_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) |
| 1350 | { |
| 1351 | unsigned char flags; |
| 1352 | |
| 1353 | flags = ((elf_symbol_type *)sym)->internal_elf_sym.st_other; |
| 1354 | if (flags & STO_M68HC12_FAR) |
| 1355 | MSYMBOL_SET_RTC (msym); |
| 1356 | if (flags & STO_M68HC12_INTERRUPT) |
| 1357 | MSYMBOL_SET_RTI (msym); |
| 1358 | } |
| 1359 | |
| 1360 | static int |
| 1361 | gdb_print_insn_m68hc11 (bfd_vma memaddr, disassemble_info *info) |
| 1362 | { |
| 1363 | if (TARGET_ARCHITECTURE->arch == bfd_arch_m68hc11) |
| 1364 | return print_insn_m68hc11 (memaddr, info); |
| 1365 | else |
| 1366 | return print_insn_m68hc12 (memaddr, info); |
| 1367 | } |
| 1368 | |
| 1369 | \f |
| 1370 | |
| 1371 | /* 68HC11/68HC12 register groups. |
| 1372 | Identify real hard registers and soft registers used by gcc. */ |
| 1373 | |
| 1374 | static struct reggroup *m68hc11_soft_reggroup; |
| 1375 | static struct reggroup *m68hc11_hard_reggroup; |
| 1376 | |
| 1377 | static void |
| 1378 | m68hc11_init_reggroups (void) |
| 1379 | { |
| 1380 | m68hc11_hard_reggroup = reggroup_new ("hard", USER_REGGROUP); |
| 1381 | m68hc11_soft_reggroup = reggroup_new ("soft", USER_REGGROUP); |
| 1382 | } |
| 1383 | |
| 1384 | static void |
| 1385 | m68hc11_add_reggroups (struct gdbarch *gdbarch) |
| 1386 | { |
| 1387 | reggroup_add (gdbarch, m68hc11_hard_reggroup); |
| 1388 | reggroup_add (gdbarch, m68hc11_soft_reggroup); |
| 1389 | reggroup_add (gdbarch, general_reggroup); |
| 1390 | reggroup_add (gdbarch, float_reggroup); |
| 1391 | reggroup_add (gdbarch, all_reggroup); |
| 1392 | reggroup_add (gdbarch, save_reggroup); |
| 1393 | reggroup_add (gdbarch, restore_reggroup); |
| 1394 | reggroup_add (gdbarch, vector_reggroup); |
| 1395 | reggroup_add (gdbarch, system_reggroup); |
| 1396 | } |
| 1397 | |
| 1398 | static int |
| 1399 | m68hc11_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
| 1400 | struct reggroup *group) |
| 1401 | { |
| 1402 | /* We must save the real hard register as well as gcc |
| 1403 | soft registers including the frame pointer. */ |
| 1404 | if (group == save_reggroup || group == restore_reggroup) |
| 1405 | { |
| 1406 | return (regnum <= gdbarch_num_regs (gdbarch) |
| 1407 | || ((regnum == SOFT_FP_REGNUM |
| 1408 | || regnum == SOFT_TMP_REGNUM |
| 1409 | || regnum == SOFT_ZS_REGNUM |
| 1410 | || regnum == SOFT_XY_REGNUM) |
| 1411 | && m68hc11_register_name (regnum))); |
| 1412 | } |
| 1413 | |
| 1414 | /* Group to identify gcc soft registers (d1..dN). */ |
| 1415 | if (group == m68hc11_soft_reggroup) |
| 1416 | { |
| 1417 | return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum); |
| 1418 | } |
| 1419 | |
| 1420 | if (group == m68hc11_hard_reggroup) |
| 1421 | { |
| 1422 | return regnum == HARD_PC_REGNUM || regnum == HARD_SP_REGNUM |
| 1423 | || regnum == HARD_X_REGNUM || regnum == HARD_D_REGNUM |
| 1424 | || regnum == HARD_Y_REGNUM || regnum == HARD_CCR_REGNUM; |
| 1425 | } |
| 1426 | return default_register_reggroup_p (gdbarch, regnum, group); |
| 1427 | } |
| 1428 | |
| 1429 | static struct gdbarch * |
| 1430 | m68hc11_gdbarch_init (struct gdbarch_info info, |
| 1431 | struct gdbarch_list *arches) |
| 1432 | { |
| 1433 | struct gdbarch *gdbarch; |
| 1434 | struct gdbarch_tdep *tdep; |
| 1435 | int elf_flags; |
| 1436 | |
| 1437 | soft_reg_initialized = 0; |
| 1438 | |
| 1439 | /* Extract the elf_flags if available. */ |
| 1440 | if (info.abfd != NULL |
| 1441 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) |
| 1442 | elf_flags = elf_elfheader (info.abfd)->e_flags; |
| 1443 | else |
| 1444 | elf_flags = 0; |
| 1445 | |
| 1446 | /* try to find a pre-existing architecture */ |
| 1447 | for (arches = gdbarch_list_lookup_by_info (arches, &info); |
| 1448 | arches != NULL; |
| 1449 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) |
| 1450 | { |
| 1451 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) |
| 1452 | continue; |
| 1453 | |
| 1454 | return arches->gdbarch; |
| 1455 | } |
| 1456 | |
| 1457 | /* Need a new architecture. Fill in a target specific vector. */ |
| 1458 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); |
| 1459 | gdbarch = gdbarch_alloc (&info, tdep); |
| 1460 | tdep->elf_flags = elf_flags; |
| 1461 | |
| 1462 | switch (info.bfd_arch_info->arch) |
| 1463 | { |
| 1464 | case bfd_arch_m68hc11: |
| 1465 | tdep->stack_correction = 1; |
| 1466 | tdep->use_page_register = 0; |
| 1467 | tdep->prologue = m6811_prologue; |
| 1468 | set_gdbarch_addr_bit (gdbarch, 16); |
| 1469 | set_gdbarch_num_pseudo_regs (gdbarch, M68HC11_NUM_PSEUDO_REGS); |
| 1470 | set_gdbarch_pc_regnum (gdbarch, HARD_PC_REGNUM); |
| 1471 | set_gdbarch_num_regs (gdbarch, M68HC11_NUM_REGS); |
| 1472 | break; |
| 1473 | |
| 1474 | case bfd_arch_m68hc12: |
| 1475 | tdep->stack_correction = 0; |
| 1476 | tdep->use_page_register = elf_flags & E_M68HC12_BANKS; |
| 1477 | tdep->prologue = m6812_prologue; |
| 1478 | set_gdbarch_addr_bit (gdbarch, elf_flags & E_M68HC12_BANKS ? 32 : 16); |
| 1479 | set_gdbarch_num_pseudo_regs (gdbarch, |
| 1480 | elf_flags & E_M68HC12_BANKS |
| 1481 | ? M68HC12_NUM_PSEUDO_REGS |
| 1482 | : M68HC11_NUM_PSEUDO_REGS); |
| 1483 | set_gdbarch_pc_regnum (gdbarch, elf_flags & E_M68HC12_BANKS |
| 1484 | ? M68HC12_HARD_PC_REGNUM : HARD_PC_REGNUM); |
| 1485 | set_gdbarch_num_regs (gdbarch, elf_flags & E_M68HC12_BANKS |
| 1486 | ? M68HC12_NUM_REGS : M68HC11_NUM_REGS); |
| 1487 | break; |
| 1488 | |
| 1489 | default: |
| 1490 | break; |
| 1491 | } |
| 1492 | |
| 1493 | /* Initially set everything according to the ABI. |
| 1494 | Use 16-bit integers since it will be the case for most |
| 1495 | programs. The size of these types should normally be set |
| 1496 | according to the dwarf2 debug information. */ |
| 1497 | set_gdbarch_short_bit (gdbarch, 16); |
| 1498 | set_gdbarch_int_bit (gdbarch, elf_flags & E_M68HC11_I32 ? 32 : 16); |
| 1499 | set_gdbarch_float_bit (gdbarch, 32); |
| 1500 | set_gdbarch_double_bit (gdbarch, elf_flags & E_M68HC11_F64 ? 64 : 32); |
| 1501 | set_gdbarch_long_double_bit (gdbarch, 64); |
| 1502 | set_gdbarch_long_bit (gdbarch, 32); |
| 1503 | set_gdbarch_ptr_bit (gdbarch, 16); |
| 1504 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 1505 | |
| 1506 | /* Characters are unsigned. */ |
| 1507 | set_gdbarch_char_signed (gdbarch, 0); |
| 1508 | |
| 1509 | set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc); |
| 1510 | set_gdbarch_unwind_sp (gdbarch, m68hc11_unwind_sp); |
| 1511 | |
| 1512 | /* Set register info. */ |
| 1513 | set_gdbarch_fp0_regnum (gdbarch, -1); |
| 1514 | |
| 1515 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); |
| 1516 | |
| 1517 | set_gdbarch_sp_regnum (gdbarch, HARD_SP_REGNUM); |
| 1518 | set_gdbarch_register_name (gdbarch, m68hc11_register_name); |
| 1519 | set_gdbarch_register_type (gdbarch, m68hc11_register_type); |
| 1520 | set_gdbarch_pseudo_register_read (gdbarch, m68hc11_pseudo_register_read); |
| 1521 | set_gdbarch_pseudo_register_write (gdbarch, m68hc11_pseudo_register_write); |
| 1522 | |
| 1523 | set_gdbarch_push_dummy_call (gdbarch, m68hc11_push_dummy_call); |
| 1524 | |
| 1525 | set_gdbarch_return_value (gdbarch, m68hc11_return_value); |
| 1526 | set_gdbarch_skip_prologue (gdbarch, m68hc11_skip_prologue); |
| 1527 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1528 | set_gdbarch_breakpoint_from_pc (gdbarch, m68hc11_breakpoint_from_pc); |
| 1529 | set_gdbarch_deprecated_stack_align (gdbarch, m68hc11_stack_align); |
| 1530 | set_gdbarch_print_insn (gdbarch, gdb_print_insn_m68hc11); |
| 1531 | |
| 1532 | m68hc11_add_reggroups (gdbarch); |
| 1533 | set_gdbarch_register_reggroup_p (gdbarch, m68hc11_register_reggroup_p); |
| 1534 | set_gdbarch_print_registers_info (gdbarch, m68hc11_print_registers_info); |
| 1535 | |
| 1536 | /* Hook in the DWARF CFI frame unwinder. */ |
| 1537 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); |
| 1538 | |
| 1539 | frame_unwind_append_sniffer (gdbarch, m68hc11_frame_sniffer); |
| 1540 | frame_base_set_default (gdbarch, &m68hc11_frame_base); |
| 1541 | |
| 1542 | /* Methods for saving / extracting a dummy frame's ID. The ID's |
| 1543 | stack address must match the SP value returned by |
| 1544 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ |
| 1545 | set_gdbarch_unwind_dummy_id (gdbarch, m68hc11_unwind_dummy_id); |
| 1546 | |
| 1547 | /* Return the unwound PC value. */ |
| 1548 | set_gdbarch_unwind_pc (gdbarch, m68hc11_unwind_pc); |
| 1549 | |
| 1550 | /* Minsymbol frobbing. */ |
| 1551 | set_gdbarch_elf_make_msymbol_special (gdbarch, |
| 1552 | m68hc11_elf_make_msymbol_special); |
| 1553 | |
| 1554 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); |
| 1555 | |
| 1556 | return gdbarch; |
| 1557 | } |
| 1558 | |
| 1559 | extern initialize_file_ftype _initialize_m68hc11_tdep; /* -Wmissing-prototypes */ |
| 1560 | |
| 1561 | void |
| 1562 | _initialize_m68hc11_tdep (void) |
| 1563 | { |
| 1564 | register_gdbarch_init (bfd_arch_m68hc11, m68hc11_gdbarch_init); |
| 1565 | register_gdbarch_init (bfd_arch_m68hc12, m68hc11_gdbarch_init); |
| 1566 | m68hc11_init_reggroups (); |
| 1567 | } |
| 1568 | |