| 1 | /* Target-machine dependent code for Motorola 88000 series, for GDB. |
| 2 | Copyright 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 2000, |
| 3 | 2001 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 20 | Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "frame.h" |
| 24 | #include "inferior.h" |
| 25 | #include "value.h" |
| 26 | #include "gdbcore.h" |
| 27 | #include "symtab.h" |
| 28 | #include "setjmp.h" |
| 29 | #include "value.h" |
| 30 | #include "regcache.h" |
| 31 | |
| 32 | /* Size of an instruction */ |
| 33 | #define BYTES_PER_88K_INSN 4 |
| 34 | |
| 35 | void frame_find_saved_regs (); |
| 36 | |
| 37 | /* Is this target an m88110? Otherwise assume m88100. This has |
| 38 | relevance for the ways in which we screw with instruction pointers. */ |
| 39 | |
| 40 | int target_is_m88110 = 0; |
| 41 | |
| 42 | /* The m88k kernel aligns all instructions on 4-byte boundaries. The |
| 43 | kernel also uses the least significant two bits for its own hocus |
| 44 | pocus. When gdb receives an address from the kernel, it needs to |
| 45 | preserve those right-most two bits, but gdb also needs to be careful |
| 46 | to realize that those two bits are not really a part of the address |
| 47 | of an instruction. Shrug. */ |
| 48 | |
| 49 | CORE_ADDR |
| 50 | m88k_addr_bits_remove (CORE_ADDR addr) |
| 51 | { |
| 52 | return ((addr) & ~3); |
| 53 | } |
| 54 | |
| 55 | |
| 56 | /* Given a GDB frame, determine the address of the calling function's frame. |
| 57 | This will be used to create a new GDB frame struct, and then |
| 58 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. |
| 59 | |
| 60 | For us, the frame address is its stack pointer value, so we look up |
| 61 | the function prologue to determine the caller's sp value, and return it. */ |
| 62 | |
| 63 | CORE_ADDR |
| 64 | frame_chain (struct frame_info *thisframe) |
| 65 | { |
| 66 | |
| 67 | frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0); |
| 68 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not |
| 69 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
| 70 | frame_find_saved_regs results. */ |
| 71 | if (thisframe->fsr->regs[SP_REGNUM]) |
| 72 | return thisframe->fsr->regs[SP_REGNUM]; |
| 73 | else |
| 74 | return thisframe->frame; /* Leaf fn -- next frame up has same SP. */ |
| 75 | } |
| 76 | |
| 77 | int |
| 78 | frameless_function_invocation (struct frame_info *frame) |
| 79 | { |
| 80 | |
| 81 | frame_find_saved_regs (frame, (struct frame_saved_regs *) 0); |
| 82 | /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not |
| 83 | the ADDRESS, of SP_REGNUM. It also depends on the cache of |
| 84 | frame_find_saved_regs results. */ |
| 85 | if (frame->fsr->regs[SP_REGNUM]) |
| 86 | return 0; /* Frameful -- return addr saved somewhere */ |
| 87 | else |
| 88 | return 1; /* Frameless -- no saved return address */ |
| 89 | } |
| 90 | |
| 91 | void |
| 92 | init_extra_frame_info (int fromleaf, struct frame_info *frame) |
| 93 | { |
| 94 | frame->fsr = 0; /* Not yet allocated */ |
| 95 | frame->args_pointer = 0; /* Unknown */ |
| 96 | frame->locals_pointer = 0; /* Unknown */ |
| 97 | } |
| 98 | \f |
| 99 | /* Examine an m88k function prologue, recording the addresses at which |
| 100 | registers are saved explicitly by the prologue code, and returning |
| 101 | the address of the first instruction after the prologue (but not |
| 102 | after the instruction at address LIMIT, as explained below). |
| 103 | |
| 104 | LIMIT places an upper bound on addresses of the instructions to be |
| 105 | examined. If the prologue code scan reaches LIMIT, the scan is |
| 106 | aborted and LIMIT is returned. This is used, when examining the |
| 107 | prologue for the current frame, to keep examine_prologue () from |
| 108 | claiming that a given register has been saved when in fact the |
| 109 | instruction that saves it has not yet been executed. LIMIT is used |
| 110 | at other times to stop the scan when we hit code after the true |
| 111 | function prologue (e.g. for the first source line) which might |
| 112 | otherwise be mistaken for function prologue. |
| 113 | |
| 114 | The format of the function prologue matched by this routine is |
| 115 | derived from examination of the source to gcc 1.95, particularly |
| 116 | the routine output_prologue () in config/out-m88k.c. |
| 117 | |
| 118 | subu r31,r31,n # stack pointer update |
| 119 | |
| 120 | (st rn,r31,offset)? # save incoming regs |
| 121 | (st.d rn,r31,offset)? |
| 122 | |
| 123 | (addu r30,r31,n)? # frame pointer update |
| 124 | |
| 125 | (pic sequence)? # PIC code prologue |
| 126 | |
| 127 | (or rn,rm,0)? # Move parameters to other regs |
| 128 | */ |
| 129 | |
| 130 | /* Macros for extracting fields from instructions. */ |
| 131 | |
| 132 | #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos)) |
| 133 | #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width)) |
| 134 | #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF)) |
| 135 | #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF)) |
| 136 | #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5) |
| 137 | #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF)) |
| 138 | |
| 139 | /* |
| 140 | * prologue_insn_tbl is a table of instructions which may comprise a |
| 141 | * function prologue. Associated with each table entry (corresponding |
| 142 | * to a single instruction or group of instructions), is an action. |
| 143 | * This action is used by examine_prologue (below) to determine |
| 144 | * the state of certain machine registers and where the stack frame lives. |
| 145 | */ |
| 146 | |
| 147 | enum prologue_insn_action |
| 148 | { |
| 149 | PIA_SKIP, /* don't care what the instruction does */ |
| 150 | PIA_NOTE_ST, /* note register stored and where */ |
| 151 | PIA_NOTE_STD, /* note pair of registers stored and where */ |
| 152 | PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */ |
| 153 | PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */ |
| 154 | PIA_NOTE_PROLOGUE_END, /* no more prologue */ |
| 155 | }; |
| 156 | |
| 157 | struct prologue_insns |
| 158 | { |
| 159 | unsigned long insn; |
| 160 | unsigned long mask; |
| 161 | enum prologue_insn_action action; |
| 162 | }; |
| 163 | |
| 164 | struct prologue_insns prologue_insn_tbl[] = |
| 165 | { |
| 166 | /* Various register move instructions */ |
| 167 | {0x58000000, 0xf800ffff, PIA_SKIP}, /* or/or.u with immed of 0 */ |
| 168 | {0xf4005800, 0xfc1fffe0, PIA_SKIP}, /* or rd, r0, rs */ |
| 169 | {0xf4005800, 0xfc00ffff, PIA_SKIP}, /* or rd, rs, r0 */ |
| 170 | |
| 171 | /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */ |
| 172 | {0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT}, |
| 173 | |
| 174 | /* Frame pointer assignment: "addu r30, r31, n" */ |
| 175 | {0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT}, |
| 176 | |
| 177 | /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */ |
| 178 | {0x241f0000, 0xfc1f0000, PIA_NOTE_ST}, /* st rx, sp, n */ |
| 179 | {0x201f0000, 0xfc1f0000, PIA_NOTE_STD}, /* st.d rs, sp, n */ |
| 180 | |
| 181 | /* Instructions needed for setting up r25 for pic code. */ |
| 182 | {0x5f200000, 0xffff0000, PIA_SKIP}, /* or.u r25, r0, offset_high */ |
| 183 | {0xcc000002, 0xffffffff, PIA_SKIP}, /* bsr.n Lab */ |
| 184 | {0x5b390000, 0xffff0000, PIA_SKIP}, /* or r25, r25, offset_low */ |
| 185 | {0xf7396001, 0xffffffff, PIA_SKIP}, /* Lab: addu r25, r25, r1 */ |
| 186 | |
| 187 | /* Various branch or jump instructions which have a delay slot -- these |
| 188 | do not form part of the prologue, but the instruction in the delay |
| 189 | slot might be a store instruction which should be noted. */ |
| 190 | {0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END}, |
| 191 | /* br.n, bsr.n, bb0.n, or bb1.n */ |
| 192 | {0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END}, /* bcnd.n */ |
| 193 | {0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END} /* jmp.n or jsr.n */ |
| 194 | |
| 195 | }; |
| 196 | |
| 197 | |
| 198 | /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or |
| 199 | is not the address of a valid instruction, the address of the next |
| 200 | instruction beyond ADDR otherwise. *PWORD1 receives the first word |
| 201 | of the instruction. */ |
| 202 | |
| 203 | #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \ |
| 204 | (((addr) < (lim)) ? next_insn (addr, pword1) : 0) |
| 205 | |
| 206 | /* Read the m88k instruction at 'memaddr' and return the address of |
| 207 | the next instruction after that, or 0 if 'memaddr' is not the |
| 208 | address of a valid instruction. The instruction |
| 209 | is stored at 'pword1'. */ |
| 210 | |
| 211 | CORE_ADDR |
| 212 | next_insn (CORE_ADDR memaddr, unsigned long *pword1) |
| 213 | { |
| 214 | *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN); |
| 215 | return memaddr + BYTES_PER_88K_INSN; |
| 216 | } |
| 217 | |
| 218 | /* Read a register from frames called by us (or from the hardware regs). */ |
| 219 | |
| 220 | static int |
| 221 | read_next_frame_reg (struct frame_info *frame, int regno) |
| 222 | { |
| 223 | for (; frame; frame = frame->next) |
| 224 | { |
| 225 | if (regno == SP_REGNUM) |
| 226 | return FRAME_FP (frame); |
| 227 | else if (frame->fsr->regs[regno]) |
| 228 | return read_memory_integer (frame->fsr->regs[regno], 4); |
| 229 | } |
| 230 | return read_register (regno); |
| 231 | } |
| 232 | |
| 233 | /* Examine the prologue of a function. `ip' points to the first instruction. |
| 234 | `limit' is the limit of the prologue (e.g. the addr of the first |
| 235 | linenumber, or perhaps the program counter if we're stepping through). |
| 236 | `frame_sp' is the stack pointer value in use in this frame. |
| 237 | `fsr' is a pointer to a frame_saved_regs structure into which we put |
| 238 | info about the registers saved by this frame. |
| 239 | `fi' is a struct frame_info pointer; we fill in various fields in it |
| 240 | to reflect the offsets of the arg pointer and the locals pointer. */ |
| 241 | |
| 242 | static CORE_ADDR |
| 243 | examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit, |
| 244 | CORE_ADDR frame_sp, struct frame_saved_regs *fsr, |
| 245 | struct frame_info *fi) |
| 246 | { |
| 247 | register CORE_ADDR next_ip; |
| 248 | register int src; |
| 249 | unsigned long insn; |
| 250 | int size, offset; |
| 251 | char must_adjust[32]; /* If set, must adjust offsets in fsr */ |
| 252 | int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */ |
| 253 | int fp_offset = -1; /* -1 means not set */ |
| 254 | CORE_ADDR frame_fp; |
| 255 | CORE_ADDR prologue_end = 0; |
| 256 | |
| 257 | memset (must_adjust, '\0', sizeof (must_adjust)); |
| 258 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); |
| 259 | |
| 260 | while (next_ip) |
| 261 | { |
| 262 | struct prologue_insns *pip; |
| 263 | |
| 264 | for (pip = prologue_insn_tbl; (insn & pip->mask) != pip->insn;) |
| 265 | if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl) |
| 266 | goto end_of_prologue_found; /* not a prologue insn */ |
| 267 | |
| 268 | switch (pip->action) |
| 269 | { |
| 270 | case PIA_NOTE_ST: |
| 271 | case PIA_NOTE_STD: |
| 272 | if (sp_offset != -1) |
| 273 | { |
| 274 | src = ST_SRC (insn); |
| 275 | offset = ST_OFFSET (insn); |
| 276 | must_adjust[src] = 1; |
| 277 | fsr->regs[src++] = offset; /* Will be adjusted later */ |
| 278 | if (pip->action == PIA_NOTE_STD && src < 32) |
| 279 | { |
| 280 | offset += 4; |
| 281 | must_adjust[src] = 1; |
| 282 | fsr->regs[src++] = offset; |
| 283 | } |
| 284 | } |
| 285 | else |
| 286 | goto end_of_prologue_found; |
| 287 | break; |
| 288 | case PIA_NOTE_SP_ADJUSTMENT: |
| 289 | if (sp_offset == -1) |
| 290 | sp_offset = -SUBU_OFFSET (insn); |
| 291 | else |
| 292 | goto end_of_prologue_found; |
| 293 | break; |
| 294 | case PIA_NOTE_FP_ASSIGNMENT: |
| 295 | if (fp_offset == -1) |
| 296 | fp_offset = ADDU_OFFSET (insn); |
| 297 | else |
| 298 | goto end_of_prologue_found; |
| 299 | break; |
| 300 | case PIA_NOTE_PROLOGUE_END: |
| 301 | if (!prologue_end) |
| 302 | prologue_end = ip; |
| 303 | break; |
| 304 | case PIA_SKIP: |
| 305 | default: |
| 306 | /* Do nothing */ |
| 307 | break; |
| 308 | } |
| 309 | |
| 310 | ip = next_ip; |
| 311 | next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn); |
| 312 | } |
| 313 | |
| 314 | end_of_prologue_found: |
| 315 | |
| 316 | if (prologue_end) |
| 317 | ip = prologue_end; |
| 318 | |
| 319 | /* We're done with the prologue. If we don't care about the stack |
| 320 | frame itself, just return. (Note that fsr->regs has been trashed, |
| 321 | but the one caller who calls with fi==0 passes a dummy there.) */ |
| 322 | |
| 323 | if (fi == 0) |
| 324 | return ip; |
| 325 | |
| 326 | /* |
| 327 | OK, now we have: |
| 328 | |
| 329 | sp_offset original (before any alloca calls) displacement of SP |
| 330 | (will be negative). |
| 331 | |
| 332 | fp_offset displacement from original SP to the FP for this frame |
| 333 | or -1. |
| 334 | |
| 335 | fsr->regs[0..31] displacement from original SP to the stack |
| 336 | location where reg[0..31] is stored. |
| 337 | |
| 338 | must_adjust[0..31] set if corresponding offset was set. |
| 339 | |
| 340 | If alloca has been called between the function prologue and the current |
| 341 | IP, then the current SP (frame_sp) will not be the original SP as set by |
| 342 | the function prologue. If the current SP is not the original SP, then the |
| 343 | compiler will have allocated an FP for this frame, fp_offset will be set, |
| 344 | and we can use it to calculate the original SP. |
| 345 | |
| 346 | Then, we figure out where the arguments and locals are, and relocate the |
| 347 | offsets in fsr->regs to absolute addresses. */ |
| 348 | |
| 349 | if (fp_offset != -1) |
| 350 | { |
| 351 | /* We have a frame pointer, so get it, and base our calc's on it. */ |
| 352 | frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM); |
| 353 | frame_sp = frame_fp - fp_offset; |
| 354 | } |
| 355 | else |
| 356 | { |
| 357 | /* We have no frame pointer, therefore frame_sp is still the same value |
| 358 | as set by prologue. But where is the frame itself? */ |
| 359 | if (must_adjust[SRP_REGNUM]) |
| 360 | { |
| 361 | /* Function header saved SRP (r1), the return address. Frame starts |
| 362 | 4 bytes down from where it was saved. */ |
| 363 | frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4; |
| 364 | fi->locals_pointer = frame_fp; |
| 365 | } |
| 366 | else |
| 367 | { |
| 368 | /* Function header didn't save SRP (r1), so we are in a leaf fn or |
| 369 | are otherwise confused. */ |
| 370 | frame_fp = -1; |
| 371 | } |
| 372 | } |
| 373 | |
| 374 | /* The locals are relative to the FP (whether it exists as an allocated |
| 375 | register, or just as an assumed offset from the SP) */ |
| 376 | fi->locals_pointer = frame_fp; |
| 377 | |
| 378 | /* The arguments are just above the SP as it was before we adjusted it |
| 379 | on entry. */ |
| 380 | fi->args_pointer = frame_sp - sp_offset; |
| 381 | |
| 382 | /* Now that we know the SP value used by the prologue, we know where |
| 383 | it saved all the registers. */ |
| 384 | for (src = 0; src < 32; src++) |
| 385 | if (must_adjust[src]) |
| 386 | fsr->regs[src] += frame_sp; |
| 387 | |
| 388 | /* The saved value of the SP is always known. */ |
| 389 | /* (we hope...) */ |
| 390 | if (fsr->regs[SP_REGNUM] != 0 |
| 391 | && fsr->regs[SP_REGNUM] != frame_sp - sp_offset) |
| 392 | fprintf_unfiltered (gdb_stderr, "Bad saved SP value %lx != %lx, offset %x!\n", |
| 393 | fsr->regs[SP_REGNUM], |
| 394 | frame_sp - sp_offset, sp_offset); |
| 395 | |
| 396 | fsr->regs[SP_REGNUM] = frame_sp - sp_offset; |
| 397 | |
| 398 | return (ip); |
| 399 | } |
| 400 | |
| 401 | /* Given an ip value corresponding to the start of a function, |
| 402 | return the ip of the first instruction after the function |
| 403 | prologue. */ |
| 404 | |
| 405 | CORE_ADDR |
| 406 | m88k_skip_prologue (CORE_ADDR ip) |
| 407 | { |
| 408 | struct frame_saved_regs saved_regs_dummy; |
| 409 | struct symtab_and_line sal; |
| 410 | CORE_ADDR limit; |
| 411 | |
| 412 | sal = find_pc_line (ip, 0); |
| 413 | limit = (sal.end) ? sal.end : 0xffffffff; |
| 414 | |
| 415 | return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy, |
| 416 | (struct frame_info *) 0)); |
| 417 | } |
| 418 | |
| 419 | /* Put here the code to store, into a struct frame_saved_regs, |
| 420 | the addresses of the saved registers of frame described by FRAME_INFO. |
| 421 | This includes special registers such as pc and fp saved in special |
| 422 | ways in the stack frame. sp is even more special: |
| 423 | the address we return for it IS the sp for the next frame. |
| 424 | |
| 425 | We cache the result of doing this in the frame_obstack, since it is |
| 426 | fairly expensive. */ |
| 427 | |
| 428 | void |
| 429 | frame_find_saved_regs (struct frame_info *fi, struct frame_saved_regs *fsr) |
| 430 | { |
| 431 | register struct frame_saved_regs *cache_fsr; |
| 432 | CORE_ADDR ip; |
| 433 | struct symtab_and_line sal; |
| 434 | CORE_ADDR limit; |
| 435 | |
| 436 | if (!fi->fsr) |
| 437 | { |
| 438 | cache_fsr = (struct frame_saved_regs *) |
| 439 | frame_obstack_alloc (sizeof (struct frame_saved_regs)); |
| 440 | memset (cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
| 441 | fi->fsr = cache_fsr; |
| 442 | |
| 443 | /* Find the start and end of the function prologue. If the PC |
| 444 | is in the function prologue, we only consider the part that |
| 445 | has executed already. In the case where the PC is not in |
| 446 | the function prologue, we set limit to two instructions beyond |
| 447 | where the prologue ends in case if any of the prologue instructions |
| 448 | were moved into a delay slot of a branch instruction. */ |
| 449 | |
| 450 | ip = get_pc_function_start (fi->pc); |
| 451 | sal = find_pc_line (ip, 0); |
| 452 | limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN |
| 453 | : fi->pc; |
| 454 | |
| 455 | /* This will fill in fields in *fi as well as in cache_fsr. */ |
| 456 | #ifdef SIGTRAMP_FRAME_FIXUP |
| 457 | if (fi->signal_handler_caller) |
| 458 | SIGTRAMP_FRAME_FIXUP (fi->frame); |
| 459 | #endif |
| 460 | examine_prologue (ip, limit, fi->frame, cache_fsr, fi); |
| 461 | #ifdef SIGTRAMP_SP_FIXUP |
| 462 | if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM]) |
| 463 | SIGTRAMP_SP_FIXUP (fi->fsr->regs[SP_REGNUM]); |
| 464 | #endif |
| 465 | } |
| 466 | |
| 467 | if (fsr) |
| 468 | *fsr = *fi->fsr; |
| 469 | } |
| 470 | |
| 471 | /* Return the address of the locals block for the frame |
| 472 | described by FI. Returns 0 if the address is unknown. |
| 473 | NOTE! Frame locals are referred to by negative offsets from the |
| 474 | argument pointer, so this is the same as frame_args_address(). */ |
| 475 | |
| 476 | CORE_ADDR |
| 477 | frame_locals_address (struct frame_info *fi) |
| 478 | { |
| 479 | struct frame_saved_regs fsr; |
| 480 | |
| 481 | if (fi->args_pointer) /* Cached value is likely there. */ |
| 482 | return fi->args_pointer; |
| 483 | |
| 484 | /* Nope, generate it. */ |
| 485 | |
| 486 | get_frame_saved_regs (fi, &fsr); |
| 487 | |
| 488 | return fi->args_pointer; |
| 489 | } |
| 490 | |
| 491 | /* Return the address of the argument block for the frame |
| 492 | described by FI. Returns 0 if the address is unknown. */ |
| 493 | |
| 494 | CORE_ADDR |
| 495 | frame_args_address (struct frame_info *fi) |
| 496 | { |
| 497 | struct frame_saved_regs fsr; |
| 498 | |
| 499 | if (fi->args_pointer) /* Cached value is likely there. */ |
| 500 | return fi->args_pointer; |
| 501 | |
| 502 | /* Nope, generate it. */ |
| 503 | |
| 504 | get_frame_saved_regs (fi, &fsr); |
| 505 | |
| 506 | return fi->args_pointer; |
| 507 | } |
| 508 | |
| 509 | /* Return the saved PC from this frame. |
| 510 | |
| 511 | If the frame has a memory copy of SRP_REGNUM, use that. If not, |
| 512 | just use the register SRP_REGNUM itself. */ |
| 513 | |
| 514 | CORE_ADDR |
| 515 | frame_saved_pc (struct frame_info *frame) |
| 516 | { |
| 517 | return read_next_frame_reg (frame, SRP_REGNUM); |
| 518 | } |
| 519 | |
| 520 | |
| 521 | #define DUMMY_FRAME_SIZE 192 |
| 522 | |
| 523 | static void |
| 524 | write_word (CORE_ADDR sp, ULONGEST word) |
| 525 | { |
| 526 | register int len = REGISTER_SIZE; |
| 527 | char buffer[MAX_REGISTER_RAW_SIZE]; |
| 528 | |
| 529 | store_unsigned_integer (buffer, len, word); |
| 530 | write_memory (sp, buffer, len); |
| 531 | } |
| 532 | |
| 533 | void |
| 534 | m88k_push_dummy_frame (void) |
| 535 | { |
| 536 | register CORE_ADDR sp = read_register (SP_REGNUM); |
| 537 | register int rn; |
| 538 | int offset; |
| 539 | |
| 540 | sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */ |
| 541 | |
| 542 | for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset += 4) |
| 543 | write_word (sp + offset, read_register (rn)); |
| 544 | |
| 545 | write_word (sp + offset, read_register (SXIP_REGNUM)); |
| 546 | offset += 4; |
| 547 | |
| 548 | write_word (sp + offset, read_register (SNIP_REGNUM)); |
| 549 | offset += 4; |
| 550 | |
| 551 | write_word (sp + offset, read_register (SFIP_REGNUM)); |
| 552 | offset += 4; |
| 553 | |
| 554 | write_word (sp + offset, read_register (PSR_REGNUM)); |
| 555 | offset += 4; |
| 556 | |
| 557 | write_word (sp + offset, read_register (FPSR_REGNUM)); |
| 558 | offset += 4; |
| 559 | |
| 560 | write_word (sp + offset, read_register (FPCR_REGNUM)); |
| 561 | offset += 4; |
| 562 | |
| 563 | write_register (SP_REGNUM, sp); |
| 564 | write_register (ACTUAL_FP_REGNUM, sp); |
| 565 | } |
| 566 | |
| 567 | void |
| 568 | pop_frame (void) |
| 569 | { |
| 570 | register struct frame_info *frame = get_current_frame (); |
| 571 | register int regnum; |
| 572 | struct frame_saved_regs fsr; |
| 573 | |
| 574 | get_frame_saved_regs (frame, &fsr); |
| 575 | |
| 576 | if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), frame->frame)) |
| 577 | { |
| 578 | /* FIXME: I think get_frame_saved_regs should be handling this so |
| 579 | that we can deal with the saved registers properly (e.g. frame |
| 580 | 1 is a call dummy, the user types "frame 2" and then "print $ps"). */ |
| 581 | register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM); |
| 582 | int offset; |
| 583 | |
| 584 | for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset += 4) |
| 585 | (void) write_register (regnum, read_memory_integer (sp + offset, 4)); |
| 586 | |
| 587 | write_register (SXIP_REGNUM, read_memory_integer (sp + offset, 4)); |
| 588 | offset += 4; |
| 589 | |
| 590 | write_register (SNIP_REGNUM, read_memory_integer (sp + offset, 4)); |
| 591 | offset += 4; |
| 592 | |
| 593 | write_register (SFIP_REGNUM, read_memory_integer (sp + offset, 4)); |
| 594 | offset += 4; |
| 595 | |
| 596 | write_register (PSR_REGNUM, read_memory_integer (sp + offset, 4)); |
| 597 | offset += 4; |
| 598 | |
| 599 | write_register (FPSR_REGNUM, read_memory_integer (sp + offset, 4)); |
| 600 | offset += 4; |
| 601 | |
| 602 | write_register (FPCR_REGNUM, read_memory_integer (sp + offset, 4)); |
| 603 | offset += 4; |
| 604 | |
| 605 | } |
| 606 | else |
| 607 | { |
| 608 | for (regnum = FP_REGNUM; regnum > 0; regnum--) |
| 609 | if (fsr.regs[regnum]) |
| 610 | write_register (regnum, |
| 611 | read_memory_integer (fsr.regs[regnum], 4)); |
| 612 | write_pc (frame_saved_pc (frame)); |
| 613 | } |
| 614 | reinit_frame_cache (); |
| 615 | } |
| 616 | |
| 617 | void |
| 618 | _initialize_m88k_tdep (void) |
| 619 | { |
| 620 | tm_print_insn = print_insn_m88k; |
| 621 | } |