| 1 | /* Target-machine dependent code for Motorola MCore for GDB, the GNU debugger |
| 2 | Copyright (C) 1999 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 19 | |
| 20 | #include "defs.h" |
| 21 | #include "frame.h" |
| 22 | #include "symtab.h" |
| 23 | #include "value.h" |
| 24 | #include "gdbcmd.h" |
| 25 | |
| 26 | /* Functions declared and used only in this file */ |
| 27 | |
| 28 | static CORE_ADDR mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue); |
| 29 | |
| 30 | static struct frame_info *analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame); |
| 31 | |
| 32 | static int get_insn (CORE_ADDR pc); |
| 33 | |
| 34 | /* Functions exported from this file */ |
| 35 | |
| 36 | int mcore_use_struct_convention (int gcc_p, struct type *type); |
| 37 | |
| 38 | void _initialize_mcore (void); |
| 39 | |
| 40 | void mcore_init_extra_frame_info (struct frame_info *fi); |
| 41 | |
| 42 | CORE_ADDR mcore_frame_saved_pc (struct frame_info *fi); |
| 43 | |
| 44 | CORE_ADDR mcore_find_callers_reg (struct frame_info *fi, int regnum); |
| 45 | |
| 46 | CORE_ADDR mcore_frame_args_address (struct frame_info *fi); |
| 47 | |
| 48 | CORE_ADDR mcore_frame_locals_address (struct frame_info *fi); |
| 49 | |
| 50 | void mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset); |
| 51 | |
| 52 | CORE_ADDR mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp); |
| 53 | |
| 54 | CORE_ADDR mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp, |
| 55 | unsigned char struct_return, CORE_ADDR struct_addr); |
| 56 | |
| 57 | void mcore_pop_frame (struct frame_info *fi); |
| 58 | |
| 59 | CORE_ADDR mcore_skip_prologue (CORE_ADDR pc); |
| 60 | |
| 61 | CORE_ADDR mcore_frame_chain (struct frame_info *fi); |
| 62 | |
| 63 | unsigned char *mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size); |
| 64 | |
| 65 | int mcore_use_struct_convention (int gcc_p, struct type *type); |
| 66 | |
| 67 | void mcore_store_return_value (struct type *type, char *valbuf); |
| 68 | |
| 69 | CORE_ADDR mcore_extract_struct_value_address (char *regbuf); |
| 70 | |
| 71 | void mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf); |
| 72 | |
| 73 | #ifdef MCORE_DEBUG |
| 74 | int mcore_debug = 0; |
| 75 | #endif |
| 76 | |
| 77 | /* The registers of the Motorola MCore processors */ |
| 78 | /* *INDENT-OFF* */ |
| 79 | char *mcore_register_names[] = |
| 80 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 81 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 82 | "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7", |
| 83 | "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15", |
| 84 | "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1", |
| 85 | "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15", |
| 86 | "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23", |
| 87 | "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31", |
| 88 | "pc" }; |
| 89 | /* *INDENT-ON* */ |
| 90 | |
| 91 | |
| 92 | |
| 93 | /* Additional info that we use for managing frames */ |
| 94 | struct frame_extra_info |
| 95 | { |
| 96 | /* A generic status word */ |
| 97 | int status; |
| 98 | |
| 99 | /* Size of this frame */ |
| 100 | int framesize; |
| 101 | |
| 102 | /* The register that is acting as a frame pointer, if |
| 103 | it is being used. This is undefined if status |
| 104 | does not contain the flag MY_FRAME_IN_FP. */ |
| 105 | int fp_regnum; |
| 106 | }; |
| 107 | |
| 108 | /* frame_extra_info status flags */ |
| 109 | |
| 110 | /* The base of the current frame is actually in the stack pointer. |
| 111 | This happens when there is no frame pointer (MCore ABI does not |
| 112 | require a frame pointer) or when we're stopped in the prologue or |
| 113 | epilogue itself. In these cases, mcore_analyze_prologue will need |
| 114 | to update fi->frame before returning or analyzing the register |
| 115 | save instructions. */ |
| 116 | #define MY_FRAME_IN_SP 0x1 |
| 117 | |
| 118 | /* The base of the current frame is in a frame pointer register. |
| 119 | This register is noted in frame_extra_info->fp_regnum. |
| 120 | |
| 121 | Note that the existance of an FP might also indicate that the |
| 122 | function has called alloca. */ |
| 123 | #define MY_FRAME_IN_FP 0x2 |
| 124 | |
| 125 | /* This flag is set to indicate that this frame is the top-most |
| 126 | frame. This tells frame chain not to bother trying to unwind |
| 127 | beyond this frame. */ |
| 128 | #define NO_MORE_FRAMES 0x4 |
| 129 | |
| 130 | /* Instruction macros used for analyzing the prologue */ |
| 131 | #define IS_SUBI0(x) (((x) & 0xfe0f) == 0x2400) /* subi r0,oimm5 */ |
| 132 | #define IS_STM(x) (((x) & 0xfff0) == 0x0070) /* stm rf-r15,r0 */ |
| 133 | #define IS_STWx0(x) (((x) & 0xf00f) == 0x9000) /* stw rz,(r0,disp) */ |
| 134 | #define IS_STWxy(x) (((x) & 0xf000) == 0x9000) /* stw rx,(ry,disp) */ |
| 135 | #define IS_MOVx0(x) (((x) & 0xfff0) == 0x1200) /* mov rn,r0 */ |
| 136 | #define IS_LRW1(x) (((x) & 0xff00) == 0x7100) /* lrw r1,literal */ |
| 137 | #define IS_MOVI1(x) (((x) & 0xf80f) == 0x6001) /* movi r1,imm7 */ |
| 138 | #define IS_BGENI1(x) (((x) & 0xfe0f) == 0x3201) /* bgeni r1,imm5 */ |
| 139 | #define IS_BMASKI1(x) (((x) & 0xfe0f) == 0x2C01) /* bmaski r1,imm5 */ |
| 140 | #define IS_ADDI1(x) (((x) & 0xfe0f) == 0x2001) /* addi r1,oimm5 */ |
| 141 | #define IS_SUBI1(x) (((x) & 0xfe0f) == 0x2401) /* subi r1,oimm5 */ |
| 142 | #define IS_RSUBI1(x) (((x) & 0xfe0f) == 0x2801) /* rsubi r1,imm5 */ |
| 143 | #define IS_NOT1(x) (((x) & 0xffff) == 0x01f1) /* not r1 */ |
| 144 | #define IS_ROTLI1(x) (((x) & 0xfe0f) == 0x3801) /* rotli r1,imm5 */ |
| 145 | #define IS_BSETI1(x) (((x) & 0xfe0f) == 0x3401) /* bseti r1,imm5 */ |
| 146 | #define IS_BCLRI1(x) (((x) & 0xfe0f) == 0x3001) /* bclri r1,imm5 */ |
| 147 | #define IS_IXH1(x) (((x) & 0xffff) == 0x1d11) /* ixh r1,r1 */ |
| 148 | #define IS_IXW1(x) (((x) & 0xffff) == 0x1511) /* ixw r1,r1 */ |
| 149 | #define IS_SUB01(x) (((x) & 0xffff) == 0x0510) /* subu r0,r1 */ |
| 150 | #define IS_RTS(x) (((x) & 0xffff) == 0x00cf) /* jmp r15 */ |
| 151 | |
| 152 | #define IS_R1_ADJUSTER(x) \ |
| 153 | (IS_ADDI1(x) || IS_SUBI1(x) || IS_ROTLI1(x) || IS_BSETI1(x) \ |
| 154 | || IS_BCLRI1(x) || IS_RSUBI1(x) || IS_NOT1(x) \ |
| 155 | || IS_IXH1(x) || IS_IXW1(x)) |
| 156 | \f |
| 157 | |
| 158 | #ifdef MCORE_DEBUG |
| 159 | static void |
| 160 | mcore_dump_insn (char *commnt, CORE_ADDR pc, int insn) |
| 161 | { |
| 162 | if (mcore_debug) |
| 163 | { |
| 164 | printf_filtered ("MCORE: %s %08x %08x ", |
| 165 | commnt, (unsigned int) pc, (unsigned int) insn); |
| 166 | (*tm_print_insn) (pc, &tm_print_insn_info); |
| 167 | printf_filtered ("\n"); |
| 168 | } |
| 169 | } |
| 170 | #define mcore_insn_debug(args) { if (mcore_debug) printf_filtered args; } |
| 171 | #else /* !MCORE_DEBUG */ |
| 172 | #define mcore_dump_insn(a,b,c) {} |
| 173 | #define mcore_insn_debug(args) {} |
| 174 | #endif |
| 175 | |
| 176 | /* Given the address at which to insert a breakpoint (BP_ADDR), |
| 177 | what will that breakpoint be? |
| 178 | |
| 179 | For MCore, we have a breakpoint instruction. Since all MCore |
| 180 | instructions are 16 bits, this is all we need, regardless of |
| 181 | address. bpkt = 0x0000 */ |
| 182 | |
| 183 | unsigned char * |
| 184 | mcore_breakpoint_from_pc (CORE_ADDR * bp_addr, int *bp_size) |
| 185 | { |
| 186 | static char breakpoint[] = |
| 187 | {0x00, 0x00}; |
| 188 | *bp_size = 2; |
| 189 | return breakpoint; |
| 190 | } |
| 191 | |
| 192 | /* Helper function for several routines below. This funtion simply |
| 193 | sets up a fake, aka dummy, frame (not a _call_ dummy frame) that |
| 194 | we can analyze with mcore_analyze_prologue. */ |
| 195 | |
| 196 | static struct frame_info * |
| 197 | analyze_dummy_frame (CORE_ADDR pc, CORE_ADDR frame) |
| 198 | { |
| 199 | static struct frame_info *dummy = NULL; |
| 200 | |
| 201 | if (dummy == NULL) |
| 202 | { |
| 203 | dummy = (struct frame_info *) xmalloc (sizeof (struct frame_info)); |
| 204 | dummy->saved_regs = (CORE_ADDR *) xmalloc (SIZEOF_FRAME_SAVED_REGS); |
| 205 | dummy->extra_info = |
| 206 | (struct frame_extra_info *) xmalloc (sizeof (struct frame_extra_info)); |
| 207 | } |
| 208 | |
| 209 | dummy->next = NULL; |
| 210 | dummy->prev = NULL; |
| 211 | dummy->pc = pc; |
| 212 | dummy->frame = frame; |
| 213 | dummy->extra_info->status = 0; |
| 214 | dummy->extra_info->framesize = 0; |
| 215 | memset (dummy->saved_regs, '\000', SIZEOF_FRAME_SAVED_REGS); |
| 216 | mcore_analyze_prologue (dummy, 0, 0); |
| 217 | return dummy; |
| 218 | } |
| 219 | |
| 220 | /* Function prologues on the Motorol MCore processors consist of: |
| 221 | |
| 222 | - adjustments to the stack pointer (r1 used as scratch register) |
| 223 | - store word/multiples that use r0 as the base address |
| 224 | - making a copy of r0 into another register (a "frame" pointer) |
| 225 | |
| 226 | Note that the MCore really doesn't have a real frame pointer. |
| 227 | Instead, the compiler may copy the SP into a register (usually |
| 228 | r8) to act as an arg pointer. For our target-dependent purposes, |
| 229 | the frame info's "frame" member will be the beginning of the |
| 230 | frame. The SP could, in fact, point below this. |
| 231 | |
| 232 | The prologue ends when an instruction fails to meet either of |
| 233 | the first two criteria or when an FP is made. We make a special |
| 234 | exception for gcc. When compiling unoptimized code, gcc will |
| 235 | setup stack slots. We need to make sure that we skip the filling |
| 236 | of these stack slots as much as possible. This is only done |
| 237 | when SKIP_PROLOGUE is set, so that it does not mess up |
| 238 | backtraces. */ |
| 239 | |
| 240 | /* Analyze the prologue of frame FI to determine where registers are saved, |
| 241 | the end of the prologue, etc. Return the address of the first line |
| 242 | of "real" code (i.e., the end of the prologue). */ |
| 243 | |
| 244 | static CORE_ADDR |
| 245 | mcore_analyze_prologue (struct frame_info *fi, CORE_ADDR pc, int skip_prologue) |
| 246 | { |
| 247 | CORE_ADDR func_addr, func_end, addr, stop; |
| 248 | CORE_ADDR stack_size; |
| 249 | int insn, rn; |
| 250 | int status, fp_regnum, flags; |
| 251 | int framesize; |
| 252 | int register_offsets[NUM_REGS]; |
| 253 | char *name; |
| 254 | |
| 255 | /* If provided, use the PC in the frame to look up the |
| 256 | start of this function. */ |
| 257 | pc = (fi == NULL ? pc : fi->pc); |
| 258 | |
| 259 | /* Find the start of this function. */ |
| 260 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); |
| 261 | |
| 262 | /* If the start of this function could not be found or if the debbuger |
| 263 | is stopped at the first instruction of the prologue, do nothing. */ |
| 264 | if (status == 0) |
| 265 | return pc; |
| 266 | |
| 267 | /* If the debugger is entry function, give up. */ |
| 268 | if (func_addr == entry_point_address ()) |
| 269 | { |
| 270 | if (fi != NULL) |
| 271 | fi->extra_info->status |= NO_MORE_FRAMES; |
| 272 | return pc; |
| 273 | } |
| 274 | |
| 275 | /* At the start of a function, our frame is in the stack pointer. */ |
| 276 | flags = MY_FRAME_IN_SP; |
| 277 | |
| 278 | /* Start decoding the prologue. We start by checking two special cases: |
| 279 | |
| 280 | 1. We're about to return |
| 281 | 2. We're at the first insn of the prologue. |
| 282 | |
| 283 | If we're about to return, our frame has already been deallocated. |
| 284 | If we are stopped at the first instruction of a prologue, |
| 285 | then our frame has not yet been set up. */ |
| 286 | |
| 287 | /* Get the first insn from memory (all MCore instructions are 16 bits) */ |
| 288 | mcore_insn_debug (("MCORE: starting prologue decoding\n")); |
| 289 | insn = get_insn (pc); |
| 290 | mcore_dump_insn ("got 1: ", pc, insn); |
| 291 | |
| 292 | /* Check for return. */ |
| 293 | if (fi != NULL && IS_RTS (insn)) |
| 294 | { |
| 295 | mcore_insn_debug (("MCORE: got jmp r15")); |
| 296 | if (fi->next == NULL) |
| 297 | fi->frame = read_sp (); |
| 298 | return fi->pc; |
| 299 | } |
| 300 | |
| 301 | /* Check for first insn of prologue */ |
| 302 | if (fi != NULL && fi->pc == func_addr) |
| 303 | { |
| 304 | if (fi->next == NULL) |
| 305 | fi->frame = read_sp (); |
| 306 | return fi->pc; |
| 307 | } |
| 308 | |
| 309 | /* Figure out where to stop scanning */ |
| 310 | stop = (fi ? fi->pc : func_end); |
| 311 | |
| 312 | /* Don't walk off the end of the function */ |
| 313 | stop = (stop > func_end ? func_end : stop); |
| 314 | |
| 315 | /* REGISTER_OFFSETS will contain offsets, from the top of the frame |
| 316 | (NOT the frame pointer), for the various saved registers or -1 |
| 317 | if the register is not saved. */ |
| 318 | for (rn = 0; rn < NUM_REGS; rn++) |
| 319 | register_offsets[rn] = -1; |
| 320 | |
| 321 | /* Analyze the prologue. Things we determine from analyzing the |
| 322 | prologue include: |
| 323 | * the size of the frame |
| 324 | * where saved registers are located (and which are saved) |
| 325 | * FP used? */ |
| 326 | mcore_insn_debug (("MCORE: Scanning prologue: func_addr=0x%x, stop=0x%x\n", |
| 327 | (unsigned int) func_addr, (unsigned int) stop)); |
| 328 | |
| 329 | framesize = 0; |
| 330 | for (addr = func_addr; addr < stop; addr += 2) |
| 331 | { |
| 332 | /* Get next insn */ |
| 333 | insn = get_insn (addr); |
| 334 | mcore_dump_insn ("got 2: ", addr, insn); |
| 335 | |
| 336 | if (IS_SUBI0 (insn)) |
| 337 | { |
| 338 | int offset = 1 + ((insn >> 4) & 0x1f); |
| 339 | mcore_insn_debug (("MCORE: got subi r0,%d; contnuing\n", offset)); |
| 340 | framesize += offset; |
| 341 | continue; |
| 342 | } |
| 343 | else if (IS_STM (insn)) |
| 344 | { |
| 345 | /* Spill register(s) */ |
| 346 | int offset; |
| 347 | int start_register; |
| 348 | |
| 349 | /* BIG WARNING! The MCore ABI does not restrict functions |
| 350 | to taking only one stack allocation. Therefore, when |
| 351 | we save a register, we record the offset of where it was |
| 352 | saved relative to the current framesize. This will |
| 353 | then give an offset from the SP upon entry to our |
| 354 | function. Remember, framesize is NOT constant until |
| 355 | we're done scanning the prologue. */ |
| 356 | start_register = (insn & 0xf); |
| 357 | mcore_insn_debug (("MCORE: got stm r%d-r15,(r0)\n", start_register)); |
| 358 | |
| 359 | for (rn = start_register, offset = 0; rn <= 15; rn++, offset += 4) |
| 360 | { |
| 361 | register_offsets[rn] = framesize - offset; |
| 362 | mcore_insn_debug (("MCORE: r%d saved at 0x%x (offset %d)\n", rn, |
| 363 | register_offsets[rn], offset)); |
| 364 | } |
| 365 | mcore_insn_debug (("MCORE: continuing\n")); |
| 366 | continue; |
| 367 | } |
| 368 | else if (IS_STWx0 (insn)) |
| 369 | { |
| 370 | /* Spill register: see note for IS_STM above. */ |
| 371 | int imm; |
| 372 | |
| 373 | rn = (insn >> 8) & 0xf; |
| 374 | imm = (insn >> 4) & 0xf; |
| 375 | register_offsets[rn] = framesize - (imm << 2); |
| 376 | mcore_insn_debug (("MCORE: r%d saved at offset 0x%x\n", rn, register_offsets[rn])); |
| 377 | mcore_insn_debug (("MCORE: continuing\n")); |
| 378 | continue; |
| 379 | } |
| 380 | else if (IS_MOVx0 (insn)) |
| 381 | { |
| 382 | /* We have a frame pointer, so this prologue is over. Note |
| 383 | the register which is acting as the frame pointer. */ |
| 384 | flags |= MY_FRAME_IN_FP; |
| 385 | flags &= ~MY_FRAME_IN_SP; |
| 386 | fp_regnum = insn & 0xf; |
| 387 | mcore_insn_debug (("MCORE: Found a frame pointer: r%d\n", fp_regnum)); |
| 388 | |
| 389 | /* If we found an FP, we're at the end of the prologue. */ |
| 390 | mcore_insn_debug (("MCORE: end of prologue\n")); |
| 391 | if (skip_prologue) |
| 392 | continue; |
| 393 | |
| 394 | /* If we're decoding prologue, stop here. */ |
| 395 | addr += 2; |
| 396 | break; |
| 397 | } |
| 398 | else if (IS_STWxy (insn) && (flags & MY_FRAME_IN_FP) && ((insn & 0xf) == fp_regnum)) |
| 399 | { |
| 400 | /* Special case. Skip over stack slot allocs, too. */ |
| 401 | mcore_insn_debug (("MCORE: push arg onto stack.\n")); |
| 402 | continue; |
| 403 | } |
| 404 | else if (IS_LRW1 (insn) || IS_MOVI1 (insn) |
| 405 | || IS_BGENI1 (insn) || IS_BMASKI1 (insn)) |
| 406 | { |
| 407 | int adjust = 0; |
| 408 | int offset = 0; |
| 409 | int insn2; |
| 410 | |
| 411 | mcore_insn_debug (("MCORE: looking at large frame\n")); |
| 412 | if (IS_LRW1 (insn)) |
| 413 | { |
| 414 | adjust = |
| 415 | read_memory_integer ((addr + 2 + ((insn & 0xff) << 2)) & 0xfffffffc, 4); |
| 416 | } |
| 417 | else if (IS_MOVI1 (insn)) |
| 418 | adjust = (insn >> 4) & 0x7f; |
| 419 | else if (IS_BGENI1 (insn)) |
| 420 | adjust = 1 << ((insn >> 4) & 0x1f); |
| 421 | else /* IS_BMASKI (insn) */ |
| 422 | adjust = (1 << (adjust >> 4) & 0x1f) - 1; |
| 423 | |
| 424 | mcore_insn_debug (("MCORE: base framesize=0x%x\n", adjust)); |
| 425 | |
| 426 | /* May have zero or more insns which modify r1 */ |
| 427 | mcore_insn_debug (("MCORE: looking for r1 adjusters...\n")); |
| 428 | offset = 2; |
| 429 | insn2 = get_insn (addr + offset); |
| 430 | while (IS_R1_ADJUSTER (insn2)) |
| 431 | { |
| 432 | int imm; |
| 433 | |
| 434 | imm = (insn2 >> 4) & 0x1f; |
| 435 | mcore_dump_insn ("got 3: ", addr + offset, insn); |
| 436 | if (IS_ADDI1 (insn2)) |
| 437 | { |
| 438 | adjust += (imm + 1); |
| 439 | mcore_insn_debug (("MCORE: addi r1,%d\n", imm + 1)); |
| 440 | } |
| 441 | else if (IS_SUBI1 (insn2)) |
| 442 | { |
| 443 | adjust -= (imm + 1); |
| 444 | mcore_insn_debug (("MCORE: subi r1,%d\n", imm + 1)); |
| 445 | } |
| 446 | else if (IS_RSUBI1 (insn2)) |
| 447 | { |
| 448 | adjust = imm - adjust; |
| 449 | mcore_insn_debug (("MCORE: rsubi r1,%d\n", imm + 1)); |
| 450 | } |
| 451 | else if (IS_NOT1 (insn2)) |
| 452 | { |
| 453 | adjust = ~adjust; |
| 454 | mcore_insn_debug (("MCORE: not r1\n")); |
| 455 | } |
| 456 | else if (IS_ROTLI1 (insn2)) |
| 457 | { |
| 458 | adjust <<= imm; |
| 459 | mcore_insn_debug (("MCORE: rotli r1,%d\n", imm + 1)); |
| 460 | } |
| 461 | else if (IS_BSETI1 (insn2)) |
| 462 | { |
| 463 | adjust |= (1 << imm); |
| 464 | mcore_insn_debug (("MCORE: bseti r1,%d\n", imm)); |
| 465 | } |
| 466 | else if (IS_BCLRI1 (insn2)) |
| 467 | { |
| 468 | adjust &= ~(1 << imm); |
| 469 | mcore_insn_debug (("MCORE: bclri r1,%d\n", imm)); |
| 470 | } |
| 471 | else if (IS_IXH1 (insn2)) |
| 472 | { |
| 473 | adjust *= 3; |
| 474 | mcore_insn_debug (("MCORE: ix.h r1,r1\n")); |
| 475 | } |
| 476 | else if (IS_IXW1 (insn2)) |
| 477 | { |
| 478 | adjust *= 5; |
| 479 | mcore_insn_debug (("MCORE: ix.w r1,r1\n")); |
| 480 | } |
| 481 | |
| 482 | offset += 2; |
| 483 | insn2 = get_insn (addr + offset); |
| 484 | }; |
| 485 | |
| 486 | mcore_insn_debug (("MCORE: done looking for r1 adjusters\n")); |
| 487 | |
| 488 | /* If the next insn adjusts the stack pointer, we keep everything; |
| 489 | if not, we scrap it and we've found the end of the prologue. */ |
| 490 | if (IS_SUB01 (insn2)) |
| 491 | { |
| 492 | addr += offset; |
| 493 | framesize += adjust; |
| 494 | mcore_insn_debug (("MCORE: found stack adjustment of 0x%x bytes.\n", adjust)); |
| 495 | mcore_insn_debug (("MCORE: skipping to new address 0x%x\n", addr)); |
| 496 | mcore_insn_debug (("MCORE: continuing\n")); |
| 497 | continue; |
| 498 | } |
| 499 | |
| 500 | /* None of these instructions are prologue, so don't touch |
| 501 | anything. */ |
| 502 | mcore_insn_debug (("MCORE: no subu r1,r0, NOT altering framesize.\n")); |
| 503 | break; |
| 504 | } |
| 505 | |
| 506 | /* This is not a prologue insn, so stop here. */ |
| 507 | mcore_insn_debug (("MCORE: insn is not a prologue insn -- ending scan\n")); |
| 508 | break; |
| 509 | } |
| 510 | |
| 511 | mcore_insn_debug (("MCORE: done analyzing prologue\n")); |
| 512 | mcore_insn_debug (("MCORE: prologue end = 0x%x\n", addr)); |
| 513 | |
| 514 | /* Save everything we have learned about this frame into FI. */ |
| 515 | if (fi != NULL) |
| 516 | { |
| 517 | fi->extra_info->framesize = framesize; |
| 518 | fi->extra_info->fp_regnum = fp_regnum; |
| 519 | fi->extra_info->status = flags; |
| 520 | |
| 521 | /* Fix the frame pointer. When gcc uses r8 as a frame pointer, |
| 522 | it is really an arg ptr. We adjust fi->frame to be a "real" |
| 523 | frame pointer. */ |
| 524 | if (fi->next == NULL) |
| 525 | { |
| 526 | if (fi->extra_info->status & MY_FRAME_IN_SP) |
| 527 | fi->frame = read_sp () + framesize; |
| 528 | else |
| 529 | fi->frame = read_register (fp_regnum) + framesize; |
| 530 | } |
| 531 | |
| 532 | /* Note where saved registers are stored. The offsets in REGISTER_OFFSETS |
| 533 | are computed relative to the top of the frame. */ |
| 534 | for (rn = 0; rn < NUM_REGS; rn++) |
| 535 | { |
| 536 | if (register_offsets[rn] >= 0) |
| 537 | { |
| 538 | fi->saved_regs[rn] = fi->frame - register_offsets[rn]; |
| 539 | mcore_insn_debug (("Saved register %s stored at 0x%08x, value=0x%08x\n", |
| 540 | mcore_register_names[rn], fi->saved_regs[rn], |
| 541 | read_memory_integer (fi->saved_regs[rn], 4))); |
| 542 | } |
| 543 | } |
| 544 | } |
| 545 | |
| 546 | /* Return addr of first non-prologue insn. */ |
| 547 | return addr; |
| 548 | } |
| 549 | |
| 550 | /* Given a GDB frame, determine the address of the calling function's frame. |
| 551 | This will be used to create a new GDB frame struct, and then |
| 552 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. */ |
| 553 | |
| 554 | CORE_ADDR |
| 555 | mcore_frame_chain (struct frame_info * fi) |
| 556 | { |
| 557 | struct frame_info *dummy; |
| 558 | CORE_ADDR callers_addr; |
| 559 | |
| 560 | /* Analyze the prologue of this function. */ |
| 561 | if (fi->extra_info->status == 0) |
| 562 | mcore_analyze_prologue (fi, 0, 0); |
| 563 | |
| 564 | /* If mcore_analyze_prologue set NO_MORE_FRAMES, quit now. */ |
| 565 | if (fi->extra_info->status & NO_MORE_FRAMES) |
| 566 | return 0; |
| 567 | |
| 568 | /* Now that we've analyzed our prologue, we can start to ask |
| 569 | for information about our caller. The easiest way to do |
| 570 | this is to analyze our caller's prologue. |
| 571 | |
| 572 | If our caller has a frame pointer, then we need to find |
| 573 | the value of that register upon entry to our frame. |
| 574 | This value is either in fi->saved_regs[rn] if it's saved, |
| 575 | or it's still in a register. |
| 576 | |
| 577 | If our caller does not have a frame pointer, then his frame base |
| 578 | is <our base> + -<caller's frame size>. */ |
| 579 | dummy = analyze_dummy_frame (FRAME_SAVED_PC (fi), fi->frame); |
| 580 | |
| 581 | if (dummy->extra_info->status & MY_FRAME_IN_FP) |
| 582 | { |
| 583 | int fp = dummy->extra_info->fp_regnum; |
| 584 | |
| 585 | /* Our caller has a frame pointer. */ |
| 586 | if (fi->saved_regs[fp] != 0) |
| 587 | { |
| 588 | /* The "FP" was saved on the stack. Don't forget to adjust |
| 589 | the "FP" with the framesize to get a real FP. */ |
| 590 | callers_addr = read_memory_integer (fi->saved_regs[fp], REGISTER_SIZE) |
| 591 | + dummy->extra_info->framesize; |
| 592 | } |
| 593 | else |
| 594 | { |
| 595 | /* It's still in the register. Don't forget to adjust |
| 596 | the "FP" with the framesize to get a real FP. */ |
| 597 | callers_addr = read_register (fp) + dummy->extra_info->framesize; |
| 598 | } |
| 599 | } |
| 600 | else |
| 601 | { |
| 602 | /* Our caller does not have a frame pointer. */ |
| 603 | callers_addr = fi->frame + dummy->extra_info->framesize; |
| 604 | } |
| 605 | |
| 606 | return callers_addr; |
| 607 | } |
| 608 | |
| 609 | /* Skip the prologue of the function at PC. */ |
| 610 | |
| 611 | CORE_ADDR |
| 612 | mcore_skip_prologue (CORE_ADDR pc) |
| 613 | { |
| 614 | CORE_ADDR func_addr, func_end; |
| 615 | struct symtab_and_line sal; |
| 616 | |
| 617 | /* If we have line debugging information, then the end of the |
| 618 | prologue should the first assembly instruction of the first |
| 619 | source line */ |
| 620 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 621 | { |
| 622 | sal = find_pc_line (func_addr, 0); |
| 623 | if (sal.end && sal.end < func_end) |
| 624 | return sal.end; |
| 625 | } |
| 626 | |
| 627 | return mcore_analyze_prologue (NULL, pc, 1); |
| 628 | } |
| 629 | |
| 630 | /* Return the address at which function arguments are offset. */ |
| 631 | CORE_ADDR |
| 632 | mcore_frame_args_address (struct frame_info * fi) |
| 633 | { |
| 634 | return fi->frame - fi->extra_info->framesize; |
| 635 | } |
| 636 | |
| 637 | CORE_ADDR |
| 638 | mcore_frame_locals_address (struct frame_info * fi) |
| 639 | { |
| 640 | return fi->frame - fi->extra_info->framesize; |
| 641 | } |
| 642 | |
| 643 | /* Return the frame pointer in use at address PC. */ |
| 644 | |
| 645 | void |
| 646 | mcore_virtual_frame_pointer (CORE_ADDR pc, long *reg, long *offset) |
| 647 | { |
| 648 | struct frame_info *dummy = analyze_dummy_frame (pc, 0); |
| 649 | if (dummy->extra_info->status & MY_FRAME_IN_SP) |
| 650 | { |
| 651 | *reg = SP_REGNUM; |
| 652 | *offset = 0; |
| 653 | } |
| 654 | else |
| 655 | { |
| 656 | *reg = dummy->extra_info->fp_regnum; |
| 657 | *offset = 0; |
| 658 | } |
| 659 | } |
| 660 | |
| 661 | /* Find the value of register REGNUM in frame FI. */ |
| 662 | |
| 663 | CORE_ADDR |
| 664 | mcore_find_callers_reg (struct frame_info *fi, int regnum) |
| 665 | { |
| 666 | for (; fi != NULL; fi = fi->next) |
| 667 | { |
| 668 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 669 | return generic_read_register_dummy (fi->pc, fi->frame, regnum); |
| 670 | else if (fi->saved_regs[regnum] != 0) |
| 671 | return read_memory_integer (fi->saved_regs[regnum], |
| 672 | REGISTER_SIZE); |
| 673 | } |
| 674 | |
| 675 | return read_register (regnum); |
| 676 | } |
| 677 | |
| 678 | /* Find the saved pc in frame FI. */ |
| 679 | |
| 680 | CORE_ADDR |
| 681 | mcore_frame_saved_pc (struct frame_info * fi) |
| 682 | { |
| 683 | |
| 684 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 685 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); |
| 686 | else |
| 687 | return mcore_find_callers_reg (fi, PR_REGNUM); |
| 688 | } |
| 689 | \f |
| 690 | /* INFERIOR FUNCTION CALLS */ |
| 691 | |
| 692 | /* This routine gets called when either the user uses the "return" |
| 693 | command, or the call dummy breakpoint gets hit. */ |
| 694 | |
| 695 | void |
| 696 | mcore_pop_frame (struct frame_info *fi) |
| 697 | { |
| 698 | int rn; |
| 699 | |
| 700 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 701 | generic_pop_dummy_frame (); |
| 702 | else |
| 703 | { |
| 704 | /* Write out the PC we saved. */ |
| 705 | write_register (PC_REGNUM, FRAME_SAVED_PC (fi)); |
| 706 | |
| 707 | /* Restore any saved registers. */ |
| 708 | for (rn = 0; rn < NUM_REGS; rn++) |
| 709 | { |
| 710 | if (fi->saved_regs[rn] != 0) |
| 711 | { |
| 712 | ULONGEST value; |
| 713 | |
| 714 | value = read_memory_unsigned_integer (fi->saved_regs[rn], |
| 715 | REGISTER_SIZE); |
| 716 | write_register (rn, value); |
| 717 | } |
| 718 | } |
| 719 | |
| 720 | /* Actually cut back the stack. */ |
| 721 | write_register (SP_REGNUM, FRAME_FP (fi)); |
| 722 | } |
| 723 | |
| 724 | /* Finally, throw away any cached frame information. */ |
| 725 | flush_cached_frames (); |
| 726 | } |
| 727 | |
| 728 | /* Setup arguments and PR for a call to the target. First six arguments |
| 729 | go in FIRST_ARGREG -> LAST_ARGREG, subsequent args go on to the stack. |
| 730 | |
| 731 | * Types with lengths greater than REGISTER_SIZE may not be split |
| 732 | between registers and the stack, and they must start in an even-numbered |
| 733 | register. Subsequent args will go onto the stack. |
| 734 | |
| 735 | * Structs may be split between registers and stack, left-aligned. |
| 736 | |
| 737 | * If the function returns a struct which will not fit into registers (it's |
| 738 | more than eight bytes), we must allocate for that, too. Gdb will tell |
| 739 | us where this buffer is (STRUCT_ADDR), and we simply place it into |
| 740 | FIRST_ARGREG, since the MCORE treats struct returns (of less than eight |
| 741 | bytes) as hidden first arguments. */ |
| 742 | |
| 743 | CORE_ADDR |
| 744 | mcore_push_arguments (int nargs, value_ptr * args, CORE_ADDR sp, |
| 745 | unsigned char struct_return, CORE_ADDR struct_addr) |
| 746 | { |
| 747 | int argreg; |
| 748 | int argnum; |
| 749 | struct stack_arg |
| 750 | { |
| 751 | int len; |
| 752 | char *val; |
| 753 | } |
| 754 | *stack_args; |
| 755 | int nstack_args = 0; |
| 756 | |
| 757 | stack_args = (struct stack_arg *) alloca (nargs * sizeof (struct stack_arg)); |
| 758 | |
| 759 | argreg = FIRST_ARGREG; |
| 760 | |
| 761 | /* Align the stack. This is mostly a nop, but not always. It will be needed |
| 762 | if we call a function which has argument overflow. */ |
| 763 | sp &= ~3; |
| 764 | |
| 765 | /* If this function returns a struct which does not fit in the |
| 766 | return registers, we must pass a buffer to the function |
| 767 | which it can use to save the return value. */ |
| 768 | if (struct_return) |
| 769 | write_register (argreg++, struct_addr); |
| 770 | |
| 771 | /* FIXME: what about unions? */ |
| 772 | for (argnum = 0; argnum < nargs; argnum++) |
| 773 | { |
| 774 | char *val = (char *) VALUE_CONTENTS (args[argnum]); |
| 775 | int len = TYPE_LENGTH (VALUE_TYPE (args[argnum])); |
| 776 | struct type *type = VALUE_TYPE (args[argnum]); |
| 777 | int olen; |
| 778 | |
| 779 | mcore_insn_debug (("MCORE PUSH: argreg=%d; len=%d; %s\n", |
| 780 | argreg, len, TYPE_CODE (type) == TYPE_CODE_STRUCT ? "struct" : "not struct")); |
| 781 | /* Arguments larger than a register must start in an even |
| 782 | numbered register. */ |
| 783 | olen = len; |
| 784 | |
| 785 | if (TYPE_CODE (type) != TYPE_CODE_STRUCT && len > REGISTER_SIZE && argreg % 2) |
| 786 | { |
| 787 | mcore_insn_debug (("MCORE PUSH: %d > REGISTER_SIZE: and %s is not even\n", |
| 788 | len, mcore_register_names[argreg])); |
| 789 | argreg++; |
| 790 | } |
| 791 | |
| 792 | if ((argreg <= LAST_ARGREG && len <= (LAST_ARGREG - argreg + 1) * REGISTER_SIZE) |
| 793 | || (TYPE_CODE (type) == TYPE_CODE_STRUCT)) |
| 794 | { |
| 795 | /* Something that will fit entirely into registers (or a struct |
| 796 | which may be split between registers and stack). */ |
| 797 | mcore_insn_debug (("MCORE PUSH: arg %d going into regs\n", argnum)); |
| 798 | |
| 799 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && olen < REGISTER_SIZE) |
| 800 | { |
| 801 | /* Small structs must be right aligned within the register, |
| 802 | the most significant bits are undefined. */ |
| 803 | write_register (argreg, extract_unsigned_integer (val, len)); |
| 804 | argreg++; |
| 805 | len = 0; |
| 806 | } |
| 807 | |
| 808 | while (len > 0 && argreg <= LAST_ARGREG) |
| 809 | { |
| 810 | write_register (argreg, extract_unsigned_integer (val, REGISTER_SIZE)); |
| 811 | argreg++; |
| 812 | val += REGISTER_SIZE; |
| 813 | len -= REGISTER_SIZE; |
| 814 | } |
| 815 | |
| 816 | /* Any remainder for the stack is noted below... */ |
| 817 | } |
| 818 | else if (TYPE_CODE (VALUE_TYPE (args[argnum])) != TYPE_CODE_STRUCT |
| 819 | && len > REGISTER_SIZE) |
| 820 | { |
| 821 | /* All subsequent args go onto the stack. */ |
| 822 | mcore_insn_debug (("MCORE PUSH: does not fit into regs, going onto stack\n")); |
| 823 | argnum = LAST_ARGREG + 1; |
| 824 | } |
| 825 | |
| 826 | if (len > 0) |
| 827 | { |
| 828 | /* Note that this must be saved onto the stack */ |
| 829 | mcore_insn_debug (("MCORE PUSH: adding arg %d to stack\n", argnum)); |
| 830 | stack_args[nstack_args].val = val; |
| 831 | stack_args[nstack_args].len = len; |
| 832 | nstack_args++; |
| 833 | } |
| 834 | |
| 835 | } |
| 836 | |
| 837 | /* We're done with registers and stack allocation. Now do the actual |
| 838 | stack pushes. */ |
| 839 | while (nstack_args--) |
| 840 | { |
| 841 | sp -= stack_args[nstack_args].len; |
| 842 | write_memory (sp, stack_args[nstack_args].val, stack_args[nstack_args].len); |
| 843 | } |
| 844 | |
| 845 | /* Return adjusted stack pointer. */ |
| 846 | return sp; |
| 847 | } |
| 848 | |
| 849 | /* Store the return address for the call dummy. For MCore, we've |
| 850 | opted to use generic call dummies, so we simply store the |
| 851 | CALL_DUMMY_ADDRESS into the PR register (r15). */ |
| 852 | |
| 853 | CORE_ADDR |
| 854 | mcore_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
| 855 | { |
| 856 | write_register (PR_REGNUM, CALL_DUMMY_ADDRESS ()); |
| 857 | return sp; |
| 858 | } |
| 859 | |
| 860 | /* Setting/getting return values from functions. |
| 861 | |
| 862 | The Motorola MCore processors use r2/r3 to return anything |
| 863 | not larger than 32 bits. Everything else goes into a caller- |
| 864 | supplied buffer, which is passed in via a hidden first |
| 865 | argument. |
| 866 | |
| 867 | For gdb, this leaves us two routes, based on what |
| 868 | USE_STRUCT_CONVENTION (mcore_use_struct_convention) returns. |
| 869 | If this macro returns 1, gdb will call STORE_STRUCT_RETURN and |
| 870 | EXTRACT_STRUCT_VALUE_ADDRESS. |
| 871 | |
| 872 | If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE |
| 873 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. */ |
| 874 | |
| 875 | /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of |
| 876 | EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc |
| 877 | and TYPE is the type (which is known to be struct, union or array). */ |
| 878 | |
| 879 | int |
| 880 | mcore_use_struct_convention (int gcc_p, struct type *type) |
| 881 | { |
| 882 | return (TYPE_LENGTH (type) > 8); |
| 883 | } |
| 884 | |
| 885 | /* Where is the return value saved? For MCore, a pointer to |
| 886 | this buffer was passed as a hidden first argument, so |
| 887 | just return that address. */ |
| 888 | |
| 889 | CORE_ADDR |
| 890 | mcore_extract_struct_value_address (char *regbuf) |
| 891 | { |
| 892 | return extract_address (regbuf + REGISTER_BYTE (FIRST_ARGREG), REGISTER_SIZE); |
| 893 | } |
| 894 | |
| 895 | /* Given a function which returns a value of type TYPE, extract the |
| 896 | the function's return value and place the result into VALBUF. |
| 897 | REGBUF is the register contents of the target. */ |
| 898 | |
| 899 | void |
| 900 | mcore_extract_return_value (struct type *type, char *regbuf, char *valbuf) |
| 901 | { |
| 902 | /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */ |
| 903 | /* Only getting the first byte! if len = 1, we need the last byte of |
| 904 | the register, not the first. */ |
| 905 | memcpy (valbuf, regbuf + REGISTER_BYTE (RETVAL_REGNUM) + |
| 906 | (TYPE_LENGTH (type) < 4 ? 4 - TYPE_LENGTH (type) : 0), TYPE_LENGTH (type)); |
| 907 | } |
| 908 | |
| 909 | /* Store the return value in VALBUF (of type TYPE) where the caller |
| 910 | expects to see it. |
| 911 | |
| 912 | Values less than 32 bits are stored in r2, right justified and |
| 913 | sign or zero extended. |
| 914 | |
| 915 | Values between 32 and 64 bits are stored in r2 (most |
| 916 | significant word) and r3 (least significant word, left justified). |
| 917 | Note that this includes structures of less than eight bytes, too. */ |
| 918 | |
| 919 | void |
| 920 | mcore_store_return_value (struct type *type, char *valbuf) |
| 921 | { |
| 922 | int value_size; |
| 923 | int return_size; |
| 924 | int offset; |
| 925 | char *zeros; |
| 926 | |
| 927 | value_size = TYPE_LENGTH (type); |
| 928 | |
| 929 | /* Return value fits into registers. */ |
| 930 | return_size = (value_size + REGISTER_SIZE - 1) & ~(REGISTER_SIZE - 1); |
| 931 | offset = REGISTER_BYTE (RETVAL_REGNUM) + (return_size - value_size); |
| 932 | zeros = alloca (return_size); |
| 933 | memset (zeros, 0, return_size); |
| 934 | |
| 935 | write_register_bytes (REGISTER_BYTE (RETVAL_REGNUM), zeros, return_size); |
| 936 | write_register_bytes (offset, valbuf, value_size); |
| 937 | } |
| 938 | |
| 939 | /* Initialize our target-dependent "stuff" for this newly created frame. |
| 940 | |
| 941 | This includes allocating space for saved registers and analyzing |
| 942 | the prologue of this frame. */ |
| 943 | |
| 944 | void |
| 945 | mcore_init_extra_frame_info (struct frame_info *fi) |
| 946 | { |
| 947 | if (fi->next) |
| 948 | fi->pc = FRAME_SAVED_PC (fi->next); |
| 949 | |
| 950 | frame_saved_regs_zalloc (fi); |
| 951 | |
| 952 | fi->extra_info = (struct frame_extra_info *) |
| 953 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
| 954 | fi->extra_info->status = 0; |
| 955 | fi->extra_info->framesize = 0; |
| 956 | |
| 957 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
| 958 | { |
| 959 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong |
| 960 | by assuming it's always FP. */ |
| 961 | fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); |
| 962 | } |
| 963 | else |
| 964 | mcore_analyze_prologue (fi, 0, 0); |
| 965 | } |
| 966 | |
| 967 | /* Get an insturction from memory. */ |
| 968 | |
| 969 | static int |
| 970 | get_insn (CORE_ADDR pc) |
| 971 | { |
| 972 | char buf[4]; |
| 973 | int status = read_memory_nobpt (pc, buf, 2); |
| 974 | if (status != 0) |
| 975 | return 0; |
| 976 | |
| 977 | return extract_unsigned_integer (buf, 2); |
| 978 | } |
| 979 | |
| 980 | void |
| 981 | _initialize_mcore_tdep (void) |
| 982 | { |
| 983 | extern int print_insn_mcore (bfd_vma, disassemble_info *); |
| 984 | tm_print_insn = print_insn_mcore; |
| 985 | |
| 986 | #ifdef MCORE_DEBUG |
| 987 | add_show_from_set (add_set_cmd ("mcoredebug", no_class, |
| 988 | var_boolean, (char *) &mcore_debug, |
| 989 | "Set mcore debugging.\n", &setlist), |
| 990 | &showlist); |
| 991 | #endif |
| 992 | } |