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1/* Native-dependent code for GNU/Linux on MIPS processors.
2
3 Copyright (C) 2001-2017 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "command.h"
22#include "gdbcmd.h"
23#include "inferior.h"
24#include "mips-tdep.h"
25#include "target.h"
26#include "regcache.h"
27#include "linux-nat.h"
28#include "mips-linux-tdep.h"
29#include "target-descriptions.h"
30
31#include "gdb_proc_service.h"
32#include "gregset.h"
33
34#include <sgidefs.h>
35#include "nat/gdb_ptrace.h"
36#include <asm/ptrace.h>
37#include "inf-ptrace.h"
38
39#include "nat/mips-linux-watch.h"
40
41#ifndef PTRACE_GET_THREAD_AREA
42#define PTRACE_GET_THREAD_AREA 25
43#endif
44
45/* Assume that we have PTRACE_GETREGS et al. support. If we do not,
46 we'll clear this and use PTRACE_PEEKUSER instead. */
47static int have_ptrace_regsets = 1;
48
49/* Saved function pointers to fetch and store a single register using
50 PTRACE_PEEKUSER and PTRACE_POKEUSER. */
51
52static void (*super_fetch_registers) (struct target_ops *,
53 struct regcache *, int);
54static void (*super_store_registers) (struct target_ops *,
55 struct regcache *, int);
56
57static void (*super_close) (struct target_ops *);
58
59/* Map gdb internal register number to ptrace ``address''.
60 These ``addresses'' are normally defined in <asm/ptrace.h>.
61
62 ptrace does not provide a way to read (or set) MIPS_PS_REGNUM,
63 and there's no point in reading or setting MIPS_ZERO_REGNUM.
64 We also can not set BADVADDR, CAUSE, or FCRIR via ptrace(). */
65
66static CORE_ADDR
67mips_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
68{
69 CORE_ADDR regaddr;
70
71 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
72 error (_("Bogon register number %d."), regno);
73
74 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
75 regaddr = regno;
76 else if ((regno >= mips_regnum (gdbarch)->fp0)
77 && (regno < mips_regnum (gdbarch)->fp0 + 32))
78 regaddr = FPR_BASE + (regno - mips_regnum (gdbarch)->fp0);
79 else if (regno == mips_regnum (gdbarch)->pc)
80 regaddr = PC;
81 else if (regno == mips_regnum (gdbarch)->cause)
82 regaddr = store? (CORE_ADDR) -1 : CAUSE;
83 else if (regno == mips_regnum (gdbarch)->badvaddr)
84 regaddr = store? (CORE_ADDR) -1 : BADVADDR;
85 else if (regno == mips_regnum (gdbarch)->lo)
86 regaddr = MMLO;
87 else if (regno == mips_regnum (gdbarch)->hi)
88 regaddr = MMHI;
89 else if (regno == mips_regnum (gdbarch)->fp_control_status)
90 regaddr = FPC_CSR;
91 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
92 regaddr = store? (CORE_ADDR) -1 : FPC_EIR;
93 else if (mips_regnum (gdbarch)->dspacc != -1
94 && regno >= mips_regnum (gdbarch)->dspacc
95 && regno < mips_regnum (gdbarch)->dspacc + 6)
96 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
97 else if (regno == mips_regnum (gdbarch)->dspctl)
98 regaddr = DSP_CONTROL;
99 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
100 regaddr = 0;
101 else
102 regaddr = (CORE_ADDR) -1;
103
104 return regaddr;
105}
106
107static CORE_ADDR
108mips64_linux_register_addr (struct gdbarch *gdbarch, int regno, int store)
109{
110 CORE_ADDR regaddr;
111
112 if (regno < 0 || regno >= gdbarch_num_regs (gdbarch))
113 error (_("Bogon register number %d."), regno);
114
115 if (regno > MIPS_ZERO_REGNUM && regno < MIPS_ZERO_REGNUM + 32)
116 regaddr = regno;
117 else if ((regno >= mips_regnum (gdbarch)->fp0)
118 && (regno < mips_regnum (gdbarch)->fp0 + 32))
119 regaddr = MIPS64_FPR_BASE + (regno - gdbarch_fp0_regnum (gdbarch));
120 else if (regno == mips_regnum (gdbarch)->pc)
121 regaddr = MIPS64_PC;
122 else if (regno == mips_regnum (gdbarch)->cause)
123 regaddr = store? (CORE_ADDR) -1 : MIPS64_CAUSE;
124 else if (regno == mips_regnum (gdbarch)->badvaddr)
125 regaddr = store? (CORE_ADDR) -1 : MIPS64_BADVADDR;
126 else if (regno == mips_regnum (gdbarch)->lo)
127 regaddr = MIPS64_MMLO;
128 else if (regno == mips_regnum (gdbarch)->hi)
129 regaddr = MIPS64_MMHI;
130 else if (regno == mips_regnum (gdbarch)->fp_control_status)
131 regaddr = MIPS64_FPC_CSR;
132 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
133 regaddr = store? (CORE_ADDR) -1 : MIPS64_FPC_EIR;
134 else if (mips_regnum (gdbarch)->dspacc != -1
135 && regno >= mips_regnum (gdbarch)->dspacc
136 && regno < mips_regnum (gdbarch)->dspacc + 6)
137 regaddr = DSP_BASE + (regno - mips_regnum (gdbarch)->dspacc);
138 else if (regno == mips_regnum (gdbarch)->dspctl)
139 regaddr = DSP_CONTROL;
140 else if (mips_linux_restart_reg_p (gdbarch) && regno == MIPS_RESTART_REGNUM)
141 regaddr = 0;
142 else
143 regaddr = (CORE_ADDR) -1;
144
145 return regaddr;
146}
147
148/* Fetch the thread-local storage pointer for libthread_db. */
149
150ps_err_e
151ps_get_thread_area (struct ps_prochandle *ph,
152 lwpid_t lwpid, int idx, void **base)
153{
154 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
155 return PS_ERR;
156
157 /* IDX is the bias from the thread pointer to the beginning of the
158 thread descriptor. It has to be subtracted due to implementation
159 quirks in libthread_db. */
160 *base = (void *) ((char *)*base - idx);
161
162 return PS_OK;
163}
164
165/* Wrapper functions. These are only used by libthread_db. */
166
167void
168supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
169{
170 if (mips_isa_regsize (regcache->arch ()) == 4)
171 mips_supply_gregset (regcache, (const mips_elf_gregset_t *) gregsetp);
172 else
173 mips64_supply_gregset (regcache, (const mips64_elf_gregset_t *) gregsetp);
174}
175
176void
177fill_gregset (const struct regcache *regcache,
178 gdb_gregset_t *gregsetp, int regno)
179{
180 if (mips_isa_regsize (regcache->arch ()) == 4)
181 mips_fill_gregset (regcache, (mips_elf_gregset_t *) gregsetp, regno);
182 else
183 mips64_fill_gregset (regcache, (mips64_elf_gregset_t *) gregsetp, regno);
184}
185
186void
187supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
188{
189 if (mips_isa_regsize (regcache->arch ()) == 4)
190 mips_supply_fpregset (regcache, (const mips_elf_fpregset_t *) fpregsetp);
191 else
192 mips64_supply_fpregset (regcache,
193 (const mips64_elf_fpregset_t *) fpregsetp);
194}
195
196void
197fill_fpregset (const struct regcache *regcache,
198 gdb_fpregset_t *fpregsetp, int regno)
199{
200 if (mips_isa_regsize (regcache->arch ()) == 4)
201 mips_fill_fpregset (regcache, (mips_elf_fpregset_t *) fpregsetp, regno);
202 else
203 mips64_fill_fpregset (regcache,
204 (mips64_elf_fpregset_t *) fpregsetp, regno);
205}
206
207
208/* Fetch REGNO (or all registers if REGNO == -1) from the target
209 using PTRACE_GETREGS et al. */
210
211static void
212mips64_linux_regsets_fetch_registers (struct target_ops *ops,
213 struct regcache *regcache, int regno)
214{
215 struct gdbarch *gdbarch = regcache->arch ();
216 int is_fp, is_dsp;
217 int have_dsp;
218 int regi;
219 int tid;
220
221 if (regno >= mips_regnum (gdbarch)->fp0
222 && regno <= mips_regnum (gdbarch)->fp0 + 32)
223 is_fp = 1;
224 else if (regno == mips_regnum (gdbarch)->fp_control_status)
225 is_fp = 1;
226 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
227 is_fp = 1;
228 else
229 is_fp = 0;
230
231 /* DSP registers are optional and not a part of any set. */
232 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
233 if (!have_dsp)
234 is_dsp = 0;
235 else if (regno >= mips_regnum (gdbarch)->dspacc
236 && regno < mips_regnum (gdbarch)->dspacc + 6)
237 is_dsp = 1;
238 else if (regno == mips_regnum (gdbarch)->dspctl)
239 is_dsp = 1;
240 else
241 is_dsp = 0;
242
243 tid = get_ptrace_pid (regcache_get_ptid (regcache));
244
245 if (regno == -1 || (!is_fp && !is_dsp))
246 {
247 mips64_elf_gregset_t regs;
248
249 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
250 {
251 if (errno == EIO)
252 {
253 have_ptrace_regsets = 0;
254 return;
255 }
256 perror_with_name (_("Couldn't get registers"));
257 }
258
259 mips64_supply_gregset (regcache,
260 (const mips64_elf_gregset_t *) &regs);
261 }
262
263 if (regno == -1 || is_fp)
264 {
265 mips64_elf_fpregset_t fp_regs;
266
267 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
268 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
269 {
270 if (errno == EIO)
271 {
272 have_ptrace_regsets = 0;
273 return;
274 }
275 perror_with_name (_("Couldn't get FP registers"));
276 }
277
278 mips64_supply_fpregset (regcache,
279 (const mips64_elf_fpregset_t *) &fp_regs);
280 }
281
282 if (is_dsp)
283 super_fetch_registers (ops, regcache, regno);
284 else if (regno == -1 && have_dsp)
285 {
286 for (regi = mips_regnum (gdbarch)->dspacc;
287 regi < mips_regnum (gdbarch)->dspacc + 6;
288 regi++)
289 super_fetch_registers (ops, regcache, regi);
290 super_fetch_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
291 }
292}
293
294/* Store REGNO (or all registers if REGNO == -1) to the target
295 using PTRACE_SETREGS et al. */
296
297static void
298mips64_linux_regsets_store_registers (struct target_ops *ops,
299 struct regcache *regcache, int regno)
300{
301 struct gdbarch *gdbarch = regcache->arch ();
302 int is_fp, is_dsp;
303 int have_dsp;
304 int regi;
305 int tid;
306
307 if (regno >= mips_regnum (gdbarch)->fp0
308 && regno <= mips_regnum (gdbarch)->fp0 + 32)
309 is_fp = 1;
310 else if (regno == mips_regnum (gdbarch)->fp_control_status)
311 is_fp = 1;
312 else if (regno == mips_regnum (gdbarch)->fp_implementation_revision)
313 is_fp = 1;
314 else
315 is_fp = 0;
316
317 /* DSP registers are optional and not a part of any set. */
318 have_dsp = mips_regnum (gdbarch)->dspctl != -1;
319 if (!have_dsp)
320 is_dsp = 0;
321 else if (regno >= mips_regnum (gdbarch)->dspacc
322 && regno < mips_regnum (gdbarch)->dspacc + 6)
323 is_dsp = 1;
324 else if (regno == mips_regnum (gdbarch)->dspctl)
325 is_dsp = 1;
326 else
327 is_dsp = 0;
328
329 tid = get_ptrace_pid (regcache_get_ptid (regcache));
330
331 if (regno == -1 || (!is_fp && !is_dsp))
332 {
333 mips64_elf_gregset_t regs;
334
335 if (ptrace (PTRACE_GETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
336 perror_with_name (_("Couldn't get registers"));
337
338 mips64_fill_gregset (regcache, &regs, regno);
339
340 if (ptrace (PTRACE_SETREGS, tid, 0L, (PTRACE_TYPE_ARG3) &regs) == -1)
341 perror_with_name (_("Couldn't set registers"));
342 }
343
344 if (regno == -1 || is_fp)
345 {
346 mips64_elf_fpregset_t fp_regs;
347
348 if (ptrace (PTRACE_GETFPREGS, tid, 0L,
349 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
350 perror_with_name (_("Couldn't get FP registers"));
351
352 mips64_fill_fpregset (regcache, &fp_regs, regno);
353
354 if (ptrace (PTRACE_SETFPREGS, tid, 0L,
355 (PTRACE_TYPE_ARG3) &fp_regs) == -1)
356 perror_with_name (_("Couldn't set FP registers"));
357 }
358
359 if (is_dsp)
360 super_store_registers (ops, regcache, regno);
361 else if (regno == -1 && have_dsp)
362 {
363 for (regi = mips_regnum (gdbarch)->dspacc;
364 regi < mips_regnum (gdbarch)->dspacc + 6;
365 regi++)
366 super_store_registers (ops, regcache, regi);
367 super_store_registers (ops, regcache, mips_regnum (gdbarch)->dspctl);
368 }
369}
370
371/* Fetch REGNO (or all registers if REGNO == -1) from the target
372 using any working method. */
373
374static void
375mips64_linux_fetch_registers (struct target_ops *ops,
376 struct regcache *regcache, int regnum)
377{
378 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
379 if (have_ptrace_regsets)
380 mips64_linux_regsets_fetch_registers (ops, regcache, regnum);
381
382 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
383 back to PTRACE_PEEKUSER. */
384 if (!have_ptrace_regsets)
385 super_fetch_registers (ops, regcache, regnum);
386}
387
388/* Store REGNO (or all registers if REGNO == -1) to the target
389 using any working method. */
390
391static void
392mips64_linux_store_registers (struct target_ops *ops,
393 struct regcache *regcache, int regnum)
394{
395 /* Unless we already know that PTRACE_GETREGS does not work, try it. */
396 if (have_ptrace_regsets)
397 mips64_linux_regsets_store_registers (ops, regcache, regnum);
398
399 /* If we know, or just found out, that PTRACE_GETREGS does not work, fall
400 back to PTRACE_PEEKUSER. */
401 if (!have_ptrace_regsets)
402 super_store_registers (ops, regcache, regnum);
403}
404
405/* Return the address in the core dump or inferior of register
406 REGNO. */
407
408static CORE_ADDR
409mips_linux_register_u_offset (struct gdbarch *gdbarch, int regno, int store_p)
410{
411 if (mips_abi_regsize (gdbarch) == 8)
412 return mips64_linux_register_addr (gdbarch, regno, store_p);
413 else
414 return mips_linux_register_addr (gdbarch, regno, store_p);
415}
416
417static const struct target_desc *
418mips_linux_read_description (struct target_ops *ops)
419{
420 static int have_dsp = -1;
421
422 if (have_dsp < 0)
423 {
424 int tid;
425
426 tid = ptid_get_lwp (inferior_ptid);
427 if (tid == 0)
428 tid = ptid_get_pid (inferior_ptid);
429
430 errno = 0;
431 ptrace (PTRACE_PEEKUSER, tid, DSP_CONTROL, 0);
432 switch (errno)
433 {
434 case 0:
435 have_dsp = 1;
436 break;
437 case EIO:
438 have_dsp = 0;
439 break;
440 default:
441 perror_with_name (_("Couldn't check DSP support"));
442 break;
443 }
444 }
445
446 /* Report that target registers are a size we know for sure
447 that we can get from ptrace. */
448 if (_MIPS_SIM == _ABIO32)
449 return have_dsp ? tdesc_mips_dsp_linux : tdesc_mips_linux;
450 else
451 return have_dsp ? tdesc_mips64_dsp_linux : tdesc_mips64_linux;
452}
453
454/* -1 if the kernel and/or CPU do not support watch registers.
455 1 if watch_readback is valid and we can read style, num_valid
456 and the masks.
457 0 if we need to read the watch_readback. */
458
459static int watch_readback_valid;
460
461/* Cached watch register read values. */
462
463static struct pt_watch_regs watch_readback;
464
465static struct mips_watchpoint *current_watches;
466
467/* The current set of watch register values for writing the
468 registers. */
469
470static struct pt_watch_regs watch_mirror;
471
472static void
473mips_show_dr (const char *func, CORE_ADDR addr,
474 int len, enum target_hw_bp_type type)
475{
476 int i;
477
478 puts_unfiltered (func);
479 if (addr || len)
480 printf_unfiltered (" (addr=%s, len=%d, type=%s)",
481 paddress (target_gdbarch (), addr), len,
482 type == hw_write ? "data-write"
483 : (type == hw_read ? "data-read"
484 : (type == hw_access ? "data-read/write"
485 : (type == hw_execute ? "instruction-execute"
486 : "??unknown??"))));
487 puts_unfiltered (":\n");
488
489 for (i = 0; i < MAX_DEBUG_REGISTER; i++)
490 printf_unfiltered ("\tDR%d: lo=%s, hi=%s\n", i,
491 paddress (target_gdbarch (),
492 mips_linux_watch_get_watchlo (&watch_mirror,
493 i)),
494 paddress (target_gdbarch (),
495 mips_linux_watch_get_watchhi (&watch_mirror,
496 i)));
497}
498
499/* Target to_can_use_hw_breakpoint implementation. Return 1 if we can
500 handle the specified watch type. */
501
502static int
503mips_linux_can_use_hw_breakpoint (struct target_ops *self,
504 enum bptype type,
505 int cnt, int ot)
506{
507 int i;
508 uint32_t wanted_mask, irw_mask;
509
510 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
511 &watch_readback,
512 &watch_readback_valid, 0))
513 return 0;
514
515 switch (type)
516 {
517 case bp_hardware_watchpoint:
518 wanted_mask = W_MASK;
519 break;
520 case bp_read_watchpoint:
521 wanted_mask = R_MASK;
522 break;
523 case bp_access_watchpoint:
524 wanted_mask = R_MASK | W_MASK;
525 break;
526 default:
527 return 0;
528 }
529
530 for (i = 0;
531 i < mips_linux_watch_get_num_valid (&watch_readback) && cnt;
532 i++)
533 {
534 irw_mask = mips_linux_watch_get_irw_mask (&watch_readback, i);
535 if ((irw_mask & wanted_mask) == wanted_mask)
536 cnt--;
537 }
538 return (cnt == 0) ? 1 : 0;
539}
540
541/* Target to_stopped_by_watchpoint implementation. Return 1 if
542 stopped by watchpoint. The watchhi R and W bits indicate the watch
543 register triggered. */
544
545static int
546mips_linux_stopped_by_watchpoint (struct target_ops *ops)
547{
548 int n;
549 int num_valid;
550
551 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
552 &watch_readback,
553 &watch_readback_valid, 1))
554 return 0;
555
556 num_valid = mips_linux_watch_get_num_valid (&watch_readback);
557
558 for (n = 0; n < MAX_DEBUG_REGISTER && n < num_valid; n++)
559 if (mips_linux_watch_get_watchhi (&watch_readback, n) & (R_MASK | W_MASK))
560 return 1;
561
562 return 0;
563}
564
565/* Target to_stopped_data_address implementation. Set the address
566 where the watch triggered (if known). Return 1 if the address was
567 known. */
568
569static int
570mips_linux_stopped_data_address (struct target_ops *t, CORE_ADDR *paddr)
571{
572 /* On mips we don't know the low order 3 bits of the data address,
573 so we must return false. */
574 return 0;
575}
576
577/* Target to_region_ok_for_hw_watchpoint implementation. Return 1 if
578 the specified region can be covered by the watch registers. */
579
580static int
581mips_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
582 CORE_ADDR addr, int len)
583{
584 struct pt_watch_regs dummy_regs;
585 int i;
586
587 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
588 &watch_readback,
589 &watch_readback_valid, 0))
590 return 0;
591
592 dummy_regs = watch_readback;
593 /* Clear them out. */
594 for (i = 0; i < mips_linux_watch_get_num_valid (&dummy_regs); i++)
595 mips_linux_watch_set_watchlo (&dummy_regs, i, 0);
596 return mips_linux_watch_try_one_watch (&dummy_regs, addr, len, 0);
597}
598
599/* Write the mirrored watch register values for each thread. */
600
601static int
602write_watchpoint_regs (void)
603{
604 struct lwp_info *lp;
605 int tid;
606
607 ALL_LWPS (lp)
608 {
609 tid = ptid_get_lwp (lp->ptid);
610 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
611 perror_with_name (_("Couldn't write debug register"));
612 }
613 return 0;
614}
615
616/* linux_nat new_thread implementation. Write the mirrored watch
617 register values for the new thread. */
618
619static void
620mips_linux_new_thread (struct lwp_info *lp)
621{
622 long tid = lp->ptid.lwp ();
623
624 if (!mips_linux_read_watch_registers (tid,
625 &watch_readback,
626 &watch_readback_valid, 0))
627 return;
628
629 if (ptrace (PTRACE_SET_WATCH_REGS, tid, &watch_mirror, NULL) == -1)
630 perror_with_name (_("Couldn't write debug register"));
631}
632
633/* Target to_insert_watchpoint implementation. Try to insert a new
634 watch. Return zero on success. */
635
636static int
637mips_linux_insert_watchpoint (struct target_ops *self,
638 CORE_ADDR addr, int len,
639 enum target_hw_bp_type type,
640 struct expression *cond)
641{
642 struct pt_watch_regs regs;
643 struct mips_watchpoint *new_watch;
644 struct mips_watchpoint **pw;
645
646 int i;
647 int retval;
648
649 if (!mips_linux_read_watch_registers (ptid_get_lwp (inferior_ptid),
650 &watch_readback,
651 &watch_readback_valid, 0))
652 return -1;
653
654 if (len <= 0)
655 return -1;
656
657 regs = watch_readback;
658 /* Add the current watches. */
659 mips_linux_watch_populate_regs (current_watches, &regs);
660
661 /* Now try to add the new watch. */
662 if (!mips_linux_watch_try_one_watch (&regs, addr, len,
663 mips_linux_watch_type_to_irw (type)))
664 return -1;
665
666 /* It fit. Stick it on the end of the list. */
667 new_watch = XNEW (struct mips_watchpoint);
668 new_watch->addr = addr;
669 new_watch->len = len;
670 new_watch->type = type;
671 new_watch->next = NULL;
672
673 pw = &current_watches;
674 while (*pw != NULL)
675 pw = &(*pw)->next;
676 *pw = new_watch;
677
678 watch_mirror = regs;
679 retval = write_watchpoint_regs ();
680
681 if (show_debug_regs)
682 mips_show_dr ("insert_watchpoint", addr, len, type);
683
684 return retval;
685}
686
687/* Target to_remove_watchpoint implementation. Try to remove a watch.
688 Return zero on success. */
689
690static int
691mips_linux_remove_watchpoint (struct target_ops *self,
692 CORE_ADDR addr, int len,
693 enum target_hw_bp_type type,
694 struct expression *cond)
695{
696 int retval;
697 int deleted_one;
698
699 struct mips_watchpoint **pw;
700 struct mips_watchpoint *w;
701
702 /* Search for a known watch that matches. Then unlink and free
703 it. */
704 deleted_one = 0;
705 pw = &current_watches;
706 while ((w = *pw))
707 {
708 if (w->addr == addr && w->len == len && w->type == type)
709 {
710 *pw = w->next;
711 xfree (w);
712 deleted_one = 1;
713 break;
714 }
715 pw = &(w->next);
716 }
717
718 if (!deleted_one)
719 return -1; /* We don't know about it, fail doing nothing. */
720
721 /* At this point watch_readback is known to be valid because we
722 could not have added the watch without reading it. */
723 gdb_assert (watch_readback_valid == 1);
724
725 watch_mirror = watch_readback;
726 mips_linux_watch_populate_regs (current_watches, &watch_mirror);
727
728 retval = write_watchpoint_regs ();
729
730 if (show_debug_regs)
731 mips_show_dr ("remove_watchpoint", addr, len, type);
732
733 return retval;
734}
735
736/* Target to_close implementation. Free any watches and call the
737 super implementation. */
738
739static void
740mips_linux_close (struct target_ops *self)
741{
742 struct mips_watchpoint *w;
743 struct mips_watchpoint *nw;
744
745 /* Clean out the current_watches list. */
746 w = current_watches;
747 while (w)
748 {
749 nw = w->next;
750 xfree (w);
751 w = nw;
752 }
753 current_watches = NULL;
754
755 if (super_close)
756 super_close (self);
757}
758
759void
760_initialize_mips_linux_nat (void)
761{
762 struct target_ops *t;
763
764 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
765 &show_debug_regs, _("\
766Set whether to show variables that mirror the mips debug registers."), _("\
767Show whether to show variables that mirror the mips debug registers."), _("\
768Use \"on\" to enable, \"off\" to disable.\n\
769If enabled, the debug registers values are shown when GDB inserts\n\
770or removes a hardware breakpoint or watchpoint, and when the inferior\n\
771triggers a breakpoint or watchpoint."),
772 NULL,
773 NULL,
774 &maintenance_set_cmdlist,
775 &maintenance_show_cmdlist);
776
777 t = linux_trad_target (mips_linux_register_u_offset);
778
779 super_close = t->to_close;
780 t->to_close = mips_linux_close;
781
782 super_fetch_registers = t->to_fetch_registers;
783 super_store_registers = t->to_store_registers;
784
785 t->to_fetch_registers = mips64_linux_fetch_registers;
786 t->to_store_registers = mips64_linux_store_registers;
787
788 t->to_can_use_hw_breakpoint = mips_linux_can_use_hw_breakpoint;
789 t->to_remove_watchpoint = mips_linux_remove_watchpoint;
790 t->to_insert_watchpoint = mips_linux_insert_watchpoint;
791 t->to_stopped_by_watchpoint = mips_linux_stopped_by_watchpoint;
792 t->to_stopped_data_address = mips_linux_stopped_data_address;
793 t->to_region_ok_for_hw_watchpoint = mips_linux_region_ok_for_hw_watchpoint;
794
795 t->to_read_description = mips_linux_read_description;
796
797 linux_nat_add_target (t);
798 linux_nat_set_new_thread (t, mips_linux_new_thread);
799}
GDB Binutils - Deliverables
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