| 1 | /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger. |
| 2 | Copyright 1988, 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. |
| 3 | Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU |
| 4 | and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 2 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software |
| 20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "frame.h" |
| 24 | #include "inferior.h" |
| 25 | #include "symtab.h" |
| 26 | #include "value.h" |
| 27 | #include "gdbcmd.h" |
| 28 | #include "language.h" |
| 29 | |
| 30 | #ifdef USG |
| 31 | #include <sys/types.h> |
| 32 | #endif |
| 33 | |
| 34 | #include <sys/param.h> |
| 35 | #include <signal.h> |
| 36 | #include <sys/ioctl.h> |
| 37 | |
| 38 | #include "gdbcore.h" |
| 39 | #include "symfile.h" |
| 40 | #include "objfiles.h" |
| 41 | |
| 42 | #ifndef MIPSMAGIC |
| 43 | #ifdef MIPSEL |
| 44 | #define MIPSMAGIC MIPSELMAGIC |
| 45 | #else |
| 46 | #define MIPSMAGIC MIPSEBMAGIC |
| 47 | #endif |
| 48 | #endif |
| 49 | |
| 50 | #define VM_MIN_ADDRESS (unsigned)0x400000 |
| 51 | |
| 52 | #include <sys/user.h> /* After a.out.h */ |
| 53 | #include <sys/file.h> |
| 54 | #include <sys/stat.h> |
| 55 | |
| 56 | \f |
| 57 | /* Some MIPS boards don't support floating point, so we permit the |
| 58 | user to turn it off. */ |
| 59 | int mips_fpu = 1; |
| 60 | |
| 61 | /* Heuristic_proc_start may hunt through the text section for a long |
| 62 | time across a 2400 baud serial line. Allows the user to limit this |
| 63 | search. */ |
| 64 | static unsigned int heuristic_fence_post = 0; |
| 65 | |
| 66 | #define PROC_LOW_ADDR(proc) ((proc)->pdr.adr) /* least address */ |
| 67 | #define PROC_HIGH_ADDR(proc) ((proc)->pdr.iline) /* upper address bound */ |
| 68 | #define PROC_FRAME_OFFSET(proc) ((proc)->pdr.frameoffset) |
| 69 | #define PROC_FRAME_REG(proc) ((proc)->pdr.framereg) |
| 70 | #define PROC_REG_MASK(proc) ((proc)->pdr.regmask) |
| 71 | #define PROC_FREG_MASK(proc) ((proc)->pdr.fregmask) |
| 72 | #define PROC_REG_OFFSET(proc) ((proc)->pdr.regoffset) |
| 73 | #define PROC_FREG_OFFSET(proc) ((proc)->pdr.fregoffset) |
| 74 | #define PROC_PC_REG(proc) ((proc)->pdr.pcreg) |
| 75 | #define PROC_SYMBOL(proc) (*(struct symbol**)&(proc)->pdr.isym) |
| 76 | #define _PROC_MAGIC_ 0x0F0F0F0F |
| 77 | #define PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym == _PROC_MAGIC_) |
| 78 | #define SET_PROC_DESC_IS_DUMMY(proc) ((proc)->pdr.isym = _PROC_MAGIC_) |
| 79 | |
| 80 | struct linked_proc_info |
| 81 | { |
| 82 | struct mips_extra_func_info info; |
| 83 | struct linked_proc_info *next; |
| 84 | } *linked_proc_desc_table = NULL; |
| 85 | |
| 86 | \f |
| 87 | #define READ_FRAME_REG(fi, regno) read_next_frame_reg((fi)->next, regno) |
| 88 | |
| 89 | static int |
| 90 | read_next_frame_reg(fi, regno) |
| 91 | FRAME fi; |
| 92 | int regno; |
| 93 | { |
| 94 | /* If it is the frame for sigtramp we have a complete sigcontext |
| 95 | immediately below the frame and we get the saved registers from there. |
| 96 | If the stack layout for sigtramp changes we might have to change these |
| 97 | constants and the companion fixup_sigtramp in mipsread.c */ |
| 98 | #ifndef SIGFRAME_BASE |
| 99 | #define SIGFRAME_BASE 0x12c /* sizeof(sigcontext) */ |
| 100 | #define SIGFRAME_PC_OFF (-SIGFRAME_BASE + 2 * 4) |
| 101 | #define SIGFRAME_REGSAVE_OFF (-SIGFRAME_BASE + 3 * 4) |
| 102 | #endif |
| 103 | for (; fi; fi = fi->next) |
| 104 | if (in_sigtramp(fi->pc, 0)) { |
| 105 | int offset; |
| 106 | if (regno == PC_REGNUM) offset = SIGFRAME_PC_OFF; |
| 107 | else if (regno < 32) offset = SIGFRAME_REGSAVE_OFF + regno * 4; |
| 108 | else return 0; |
| 109 | return read_memory_integer(fi->frame + offset, 4); |
| 110 | } |
| 111 | else if (regno == SP_REGNUM) return fi->frame; |
| 112 | else if (fi->saved_regs->regs[regno]) |
| 113 | return read_memory_integer(fi->saved_regs->regs[regno], 4); |
| 114 | return read_register(regno); |
| 115 | } |
| 116 | |
| 117 | int |
| 118 | mips_frame_saved_pc(frame) |
| 119 | FRAME frame; |
| 120 | { |
| 121 | mips_extra_func_info_t proc_desc = frame->proc_desc; |
| 122 | int pcreg = proc_desc ? PROC_PC_REG(proc_desc) : RA_REGNUM; |
| 123 | |
| 124 | if (proc_desc && PROC_DESC_IS_DUMMY(proc_desc)) |
| 125 | return read_memory_integer(frame->frame - 4, 4); |
| 126 | |
| 127 | return read_next_frame_reg(frame, pcreg); |
| 128 | } |
| 129 | |
| 130 | static struct mips_extra_func_info temp_proc_desc; |
| 131 | static struct frame_saved_regs temp_saved_regs; |
| 132 | |
| 133 | /* This fencepost looks highly suspicious to me. Removing it also |
| 134 | seems suspicious as it could affect remote debugging across serial |
| 135 | lines. */ |
| 136 | |
| 137 | static CORE_ADDR |
| 138 | heuristic_proc_start(pc) |
| 139 | CORE_ADDR pc; |
| 140 | { |
| 141 | CORE_ADDR start_pc = pc; |
| 142 | CORE_ADDR fence = start_pc - heuristic_fence_post; |
| 143 | |
| 144 | if (start_pc == 0) return 0; |
| 145 | |
| 146 | if (heuristic_fence_post == UINT_MAX |
| 147 | || fence < VM_MIN_ADDRESS) |
| 148 | fence = VM_MIN_ADDRESS; |
| 149 | |
| 150 | /* search back for previous return */ |
| 151 | for (start_pc -= 4; ; start_pc -= 4) |
| 152 | if (start_pc < fence) |
| 153 | { |
| 154 | /* It's not clear to me why we reach this point when |
| 155 | stop_soon_quietly, but with this test, at least we |
| 156 | don't print out warnings for every child forked (eg, on |
| 157 | decstation). 22apr93 rich@cygnus.com. */ |
| 158 | if (!stop_soon_quietly) |
| 159 | { |
| 160 | if (fence == VM_MIN_ADDRESS) |
| 161 | warning("Hit beginning of text section without finding"); |
| 162 | else |
| 163 | warning("Hit heuristic-fence-post without finding"); |
| 164 | |
| 165 | warning("enclosing function for pc 0x%x", pc); |
| 166 | } |
| 167 | |
| 168 | return 0; |
| 169 | } |
| 170 | else if (ABOUT_TO_RETURN(start_pc)) |
| 171 | break; |
| 172 | |
| 173 | start_pc += 8; /* skip return, and its delay slot */ |
| 174 | #if 0 |
| 175 | /* skip nops (usually 1) 0 - is this */ |
| 176 | while (start_pc < pc && read_memory_integer (start_pc, 4) == 0) |
| 177 | start_pc += 4; |
| 178 | #endif |
| 179 | return start_pc; |
| 180 | } |
| 181 | |
| 182 | static mips_extra_func_info_t |
| 183 | heuristic_proc_desc(start_pc, limit_pc, next_frame) |
| 184 | CORE_ADDR start_pc, limit_pc; |
| 185 | FRAME next_frame; |
| 186 | { |
| 187 | CORE_ADDR sp = next_frame ? next_frame->frame : read_register (SP_REGNUM); |
| 188 | CORE_ADDR cur_pc; |
| 189 | int frame_size; |
| 190 | int has_frame_reg = 0; |
| 191 | int reg30; /* Value of $r30. Used by gcc for frame-pointer */ |
| 192 | unsigned long reg_mask = 0; |
| 193 | |
| 194 | if (start_pc == 0) return NULL; |
| 195 | bzero(&temp_proc_desc, sizeof(temp_proc_desc)); |
| 196 | bzero(&temp_saved_regs, sizeof(struct frame_saved_regs)); |
| 197 | PROC_LOW_ADDR(&temp_proc_desc) = start_pc; |
| 198 | |
| 199 | if (start_pc + 200 < limit_pc) limit_pc = start_pc + 200; |
| 200 | restart: |
| 201 | frame_size = 0; |
| 202 | for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += 4) { |
| 203 | unsigned long word; |
| 204 | int status; |
| 205 | |
| 206 | status = read_memory_nobpt (cur_pc, (char *)&word, 4); |
| 207 | if (status) memory_error (status, cur_pc); |
| 208 | SWAP_TARGET_AND_HOST (&word, sizeof (word)); |
| 209 | if ((word & 0xFFFF0000) == 0x27bd0000) /* addiu $sp,$sp,-i */ |
| 210 | frame_size += (-word) & 0xFFFF; |
| 211 | else if ((word & 0xFFFF0000) == 0x23bd0000) /* addu $sp,$sp,-i */ |
| 212 | frame_size += (-word) & 0xFFFF; |
| 213 | else if ((word & 0xFFE00000) == 0xafa00000) { /* sw reg,offset($sp) */ |
| 214 | int reg = (word & 0x001F0000) >> 16; |
| 215 | reg_mask |= 1 << reg; |
| 216 | temp_saved_regs.regs[reg] = sp + (short)word; |
| 217 | } |
| 218 | else if ((word & 0xFFFF0000) == 0x27be0000) { /* addiu $30,$sp,size */ |
| 219 | if ((unsigned short)word != frame_size) |
| 220 | reg30 = sp + (unsigned short)word; |
| 221 | else if (!has_frame_reg) { |
| 222 | int alloca_adjust; |
| 223 | has_frame_reg = 1; |
| 224 | reg30 = read_next_frame_reg(next_frame, 30); |
| 225 | alloca_adjust = reg30 - (sp + (unsigned short)word); |
| 226 | if (alloca_adjust > 0) { |
| 227 | /* FP > SP + frame_size. This may be because |
| 228 | /* of an alloca or somethings similar. |
| 229 | * Fix sp to "pre-alloca" value, and try again. |
| 230 | */ |
| 231 | sp += alloca_adjust; |
| 232 | goto restart; |
| 233 | } |
| 234 | } |
| 235 | } |
| 236 | else if ((word & 0xFFE00000) == 0xafc00000) { /* sw reg,offset($30) */ |
| 237 | int reg = (word & 0x001F0000) >> 16; |
| 238 | reg_mask |= 1 << reg; |
| 239 | temp_saved_regs.regs[reg] = reg30 + (short)word; |
| 240 | } |
| 241 | } |
| 242 | if (has_frame_reg) { |
| 243 | PROC_FRAME_REG(&temp_proc_desc) = 30; |
| 244 | PROC_FRAME_OFFSET(&temp_proc_desc) = 0; |
| 245 | } |
| 246 | else { |
| 247 | PROC_FRAME_REG(&temp_proc_desc) = SP_REGNUM; |
| 248 | PROC_FRAME_OFFSET(&temp_proc_desc) = frame_size; |
| 249 | } |
| 250 | PROC_REG_MASK(&temp_proc_desc) = reg_mask; |
| 251 | PROC_PC_REG(&temp_proc_desc) = RA_REGNUM; |
| 252 | return &temp_proc_desc; |
| 253 | } |
| 254 | |
| 255 | static mips_extra_func_info_t |
| 256 | find_proc_desc(pc, next_frame) |
| 257 | CORE_ADDR pc; |
| 258 | FRAME next_frame; |
| 259 | { |
| 260 | mips_extra_func_info_t proc_desc; |
| 261 | struct block *b = block_for_pc(pc); |
| 262 | struct symbol *sym = |
| 263 | b ? lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL) : NULL; |
| 264 | |
| 265 | if (sym) |
| 266 | { |
| 267 | /* IF this is the topmost frame AND |
| 268 | * (this proc does not have debugging information OR |
| 269 | * the PC is in the procedure prologue) |
| 270 | * THEN create a "heuristic" proc_desc (by analyzing |
| 271 | * the actual code) to replace the "official" proc_desc. |
| 272 | */ |
| 273 | proc_desc = (mips_extra_func_info_t)SYMBOL_VALUE(sym); |
| 274 | if (next_frame == NULL) { |
| 275 | struct symtab_and_line val; |
| 276 | struct symbol *proc_symbol = |
| 277 | PROC_DESC_IS_DUMMY(proc_desc) ? 0 : PROC_SYMBOL(proc_desc); |
| 278 | |
| 279 | if (proc_symbol) { |
| 280 | val = find_pc_line (BLOCK_START |
| 281 | (SYMBOL_BLOCK_VALUE(proc_symbol)), |
| 282 | 0); |
| 283 | val.pc = val.end ? val.end : pc; |
| 284 | } |
| 285 | if (!proc_symbol || pc < val.pc) { |
| 286 | mips_extra_func_info_t found_heuristic = |
| 287 | heuristic_proc_desc(PROC_LOW_ADDR(proc_desc), |
| 288 | pc, next_frame); |
| 289 | if (found_heuristic) proc_desc = found_heuristic; |
| 290 | } |
| 291 | } |
| 292 | } |
| 293 | else |
| 294 | { |
| 295 | /* Is linked_proc_desc_table really necessary? It only seems to be used |
| 296 | by procedure call dummys. However, the procedures being called ought |
| 297 | to have their own proc_descs, and even if they don't, |
| 298 | heuristic_proc_desc knows how to create them! */ |
| 299 | |
| 300 | register struct linked_proc_info *link; |
| 301 | for (link = linked_proc_desc_table; link; link = link->next) |
| 302 | if (PROC_LOW_ADDR(&link->info) <= pc |
| 303 | && PROC_HIGH_ADDR(&link->info) > pc) |
| 304 | return &link->info; |
| 305 | proc_desc = |
| 306 | heuristic_proc_desc(heuristic_proc_start(pc), pc, next_frame); |
| 307 | } |
| 308 | return proc_desc; |
| 309 | } |
| 310 | |
| 311 | mips_extra_func_info_t cached_proc_desc; |
| 312 | |
| 313 | FRAME_ADDR |
| 314 | mips_frame_chain(frame) |
| 315 | FRAME frame; |
| 316 | { |
| 317 | mips_extra_func_info_t proc_desc; |
| 318 | CORE_ADDR saved_pc = FRAME_SAVED_PC(frame); |
| 319 | |
| 320 | if (saved_pc == 0 || inside_entry_file (saved_pc)) |
| 321 | return 0; |
| 322 | |
| 323 | proc_desc = find_proc_desc(saved_pc, frame); |
| 324 | if (!proc_desc) |
| 325 | return 0; |
| 326 | |
| 327 | cached_proc_desc = proc_desc; |
| 328 | return read_next_frame_reg(frame, PROC_FRAME_REG(proc_desc)) |
| 329 | + PROC_FRAME_OFFSET(proc_desc); |
| 330 | } |
| 331 | |
| 332 | void |
| 333 | init_extra_frame_info(fci) |
| 334 | struct frame_info *fci; |
| 335 | { |
| 336 | extern struct obstack frame_cache_obstack; |
| 337 | /* Use proc_desc calculated in frame_chain */ |
| 338 | mips_extra_func_info_t proc_desc = fci->next ? cached_proc_desc : |
| 339 | find_proc_desc(fci->pc, fci->next); |
| 340 | |
| 341 | fci->saved_regs = (struct frame_saved_regs*) |
| 342 | obstack_alloc (&frame_cache_obstack, sizeof(struct frame_saved_regs)); |
| 343 | bzero(fci->saved_regs, sizeof(struct frame_saved_regs)); |
| 344 | fci->proc_desc = |
| 345 | proc_desc == &temp_proc_desc ? 0 : proc_desc; |
| 346 | if (proc_desc) |
| 347 | { |
| 348 | int ireg; |
| 349 | CORE_ADDR reg_position; |
| 350 | unsigned long mask; |
| 351 | /* r0 bit means kernel trap */ |
| 352 | int kernel_trap = PROC_REG_MASK(proc_desc) & 1; |
| 353 | |
| 354 | /* Fixup frame-pointer - only needed for top frame */ |
| 355 | /* This may not be quite right, if proc has a real frame register */ |
| 356 | if (fci->pc == PROC_LOW_ADDR(proc_desc)) |
| 357 | fci->frame = read_register (SP_REGNUM); |
| 358 | else |
| 359 | fci->frame = READ_FRAME_REG(fci, PROC_FRAME_REG(proc_desc)) |
| 360 | + PROC_FRAME_OFFSET(proc_desc); |
| 361 | |
| 362 | if (proc_desc == &temp_proc_desc) |
| 363 | *fci->saved_regs = temp_saved_regs; |
| 364 | else |
| 365 | { |
| 366 | /* find which general-purpose registers were saved */ |
| 367 | reg_position = fci->frame + PROC_REG_OFFSET(proc_desc); |
| 368 | mask = kernel_trap ? 0xFFFFFFFF : PROC_REG_MASK(proc_desc); |
| 369 | for (ireg= 31; mask; --ireg, mask <<= 1) |
| 370 | if (mask & 0x80000000) |
| 371 | { |
| 372 | fci->saved_regs->regs[ireg] = reg_position; |
| 373 | reg_position -= 4; |
| 374 | } |
| 375 | /* find which floating-point registers were saved */ |
| 376 | reg_position = fci->frame + PROC_FREG_OFFSET(proc_desc); |
| 377 | /* The freg_offset points to where the first *double* register is saved. |
| 378 | * So skip to the high-order word. */ |
| 379 | reg_position += 4; |
| 380 | mask = kernel_trap ? 0xFFFFFFFF : PROC_FREG_MASK(proc_desc); |
| 381 | for (ireg = 31; mask; --ireg, mask <<= 1) |
| 382 | if (mask & 0x80000000) |
| 383 | { |
| 384 | fci->saved_regs->regs[FP0_REGNUM+ireg] = reg_position; |
| 385 | reg_position -= 4; |
| 386 | } |
| 387 | } |
| 388 | |
| 389 | /* hack: if argument regs are saved, guess these contain args */ |
| 390 | if ((PROC_REG_MASK(proc_desc) & 0xF0) == 0) fci->num_args = -1; |
| 391 | else if ((PROC_REG_MASK(proc_desc) & 0x80) == 0) fci->num_args = 4; |
| 392 | else if ((PROC_REG_MASK(proc_desc) & 0x40) == 0) fci->num_args = 3; |
| 393 | else if ((PROC_REG_MASK(proc_desc) & 0x20) == 0) fci->num_args = 2; |
| 394 | else if ((PROC_REG_MASK(proc_desc) & 0x10) == 0) fci->num_args = 1; |
| 395 | |
| 396 | fci->saved_regs->regs[PC_REGNUM] = fci->saved_regs->regs[RA_REGNUM]; |
| 397 | } |
| 398 | } |
| 399 | |
| 400 | /* MIPS stack frames are almost impenetrable. When execution stops, |
| 401 | we basically have to look at symbol information for the function |
| 402 | that we stopped in, which tells us *which* register (if any) is |
| 403 | the base of the frame pointer, and what offset from that register |
| 404 | the frame itself is at. |
| 405 | |
| 406 | This presents a problem when trying to examine a stack in memory |
| 407 | (that isn't executing at the moment), using the "frame" command. We |
| 408 | don't have a PC, nor do we have any registers except SP. |
| 409 | |
| 410 | This routine takes two arguments, SP and PC, and tries to make the |
| 411 | cached frames look as if these two arguments defined a frame on the |
| 412 | cache. This allows the rest of info frame to extract the important |
| 413 | arguments without difficulty. */ |
| 414 | |
| 415 | FRAME |
| 416 | setup_arbitrary_frame (argc, argv) |
| 417 | int argc; |
| 418 | FRAME_ADDR *argv; |
| 419 | { |
| 420 | if (argc != 2) |
| 421 | error ("MIPS frame specifications require two arguments: sp and pc"); |
| 422 | |
| 423 | return create_new_frame (argv[0], argv[1]); |
| 424 | } |
| 425 | |
| 426 | |
| 427 | CORE_ADDR |
| 428 | mips_push_arguments(nargs, args, sp, struct_return, struct_addr) |
| 429 | int nargs; |
| 430 | value *args; |
| 431 | CORE_ADDR sp; |
| 432 | int struct_return; |
| 433 | CORE_ADDR struct_addr; |
| 434 | { |
| 435 | CORE_ADDR buf; |
| 436 | register i; |
| 437 | int accumulate_size = struct_return ? 4 : 0; |
| 438 | struct mips_arg { char *contents; int len; int offset; }; |
| 439 | struct mips_arg *mips_args = |
| 440 | (struct mips_arg*)alloca(nargs * sizeof(struct mips_arg)); |
| 441 | register struct mips_arg *m_arg; |
| 442 | for (i = 0, m_arg = mips_args; i < nargs; i++, m_arg++) { |
| 443 | extern value value_arg_coerce(); |
| 444 | value arg = value_arg_coerce (args[i]); |
| 445 | m_arg->len = TYPE_LENGTH (VALUE_TYPE (arg)); |
| 446 | /* This entire mips-specific routine is because doubles must be aligned |
| 447 | * on 8-byte boundaries. It still isn't quite right, because MIPS decided |
| 448 | * to align 'struct {int a, b}' on 4-byte boundaries (even though this |
| 449 | * breaks their varargs implementation...). A correct solution |
| 450 | * requires an simulation of gcc's 'alignof' (and use of 'alignof' |
| 451 | * in stdarg.h/varargs.h). |
| 452 | */ |
| 453 | if (m_arg->len > 4) accumulate_size = (accumulate_size + 7) & -8; |
| 454 | m_arg->offset = accumulate_size; |
| 455 | accumulate_size = (accumulate_size + m_arg->len + 3) & -4; |
| 456 | m_arg->contents = VALUE_CONTENTS(arg); |
| 457 | } |
| 458 | accumulate_size = (accumulate_size + 7) & (-8); |
| 459 | if (accumulate_size < 16) accumulate_size = 16; |
| 460 | sp -= accumulate_size; |
| 461 | for (i = nargs; m_arg--, --i >= 0; ) |
| 462 | write_memory(sp + m_arg->offset, m_arg->contents, m_arg->len); |
| 463 | if (struct_return) { |
| 464 | buf = struct_addr; |
| 465 | write_memory(sp, (char *)&buf, sizeof(CORE_ADDR)); |
| 466 | } |
| 467 | return sp; |
| 468 | } |
| 469 | |
| 470 | /* MASK(i,j) == (1<<i) + (1<<(i+1)) + ... + (1<<j)). Assume i<=j<31. */ |
| 471 | #define MASK(i,j) ((1 << (j)+1)-1 ^ (1 << (i))-1) |
| 472 | |
| 473 | void |
| 474 | mips_push_dummy_frame() |
| 475 | { |
| 476 | int ireg; |
| 477 | struct linked_proc_info *link = (struct linked_proc_info*) |
| 478 | xmalloc(sizeof(struct linked_proc_info)); |
| 479 | mips_extra_func_info_t proc_desc = &link->info; |
| 480 | CORE_ADDR sp = read_register (SP_REGNUM); |
| 481 | CORE_ADDR save_address; |
| 482 | REGISTER_TYPE buffer; |
| 483 | link->next = linked_proc_desc_table; |
| 484 | linked_proc_desc_table = link; |
| 485 | #define PUSH_FP_REGNUM 16 /* must be a register preserved across calls */ |
| 486 | #define GEN_REG_SAVE_MASK MASK(1,16)|MASK(24,28)|(1<<31) |
| 487 | #define GEN_REG_SAVE_COUNT 22 |
| 488 | #define FLOAT_REG_SAVE_MASK MASK(0,19) |
| 489 | #define FLOAT_REG_SAVE_COUNT 20 |
| 490 | #define SPECIAL_REG_SAVE_COUNT 4 |
| 491 | /* |
| 492 | * The registers we must save are all those not preserved across |
| 493 | * procedure calls. Dest_Reg (see tm-mips.h) must also be saved. |
| 494 | * In addition, we must save the PC, and PUSH_FP_REGNUM. |
| 495 | * (Ideally, we should also save MDLO/-HI and FP Control/Status reg.) |
| 496 | * |
| 497 | * Dummy frame layout: |
| 498 | * (high memory) |
| 499 | * Saved PC |
| 500 | * Saved MMHI, MMLO, FPC_CSR |
| 501 | * Saved R31 |
| 502 | * Saved R28 |
| 503 | * ... |
| 504 | * Saved R1 |
| 505 | * Saved D18 (i.e. F19, F18) |
| 506 | * ... |
| 507 | * Saved D0 (i.e. F1, F0) |
| 508 | * CALL_DUMMY (subroutine stub; see tm-mips.h) |
| 509 | * Parameter build area (not yet implemented) |
| 510 | * (low memory) |
| 511 | */ |
| 512 | PROC_REG_MASK(proc_desc) = GEN_REG_SAVE_MASK; |
| 513 | PROC_FREG_MASK(proc_desc) = mips_fpu ? FLOAT_REG_SAVE_MASK : 0; |
| 514 | PROC_REG_OFFSET(proc_desc) = /* offset of (Saved R31) from FP */ |
| 515 | -sizeof(long) - 4 * SPECIAL_REG_SAVE_COUNT; |
| 516 | PROC_FREG_OFFSET(proc_desc) = /* offset of (Saved D18) from FP */ |
| 517 | -sizeof(double) - 4 * (SPECIAL_REG_SAVE_COUNT + GEN_REG_SAVE_COUNT); |
| 518 | /* save general registers */ |
| 519 | save_address = sp + PROC_REG_OFFSET(proc_desc); |
| 520 | for (ireg = 32; --ireg >= 0; ) |
| 521 | if (PROC_REG_MASK(proc_desc) & (1 << ireg)) |
| 522 | { |
| 523 | buffer = read_register (ireg); |
| 524 | write_memory (save_address, (char *)&buffer, sizeof(REGISTER_TYPE)); |
| 525 | save_address -= 4; |
| 526 | } |
| 527 | /* save floating-points registers starting with high order word */ |
| 528 | save_address = sp + PROC_FREG_OFFSET(proc_desc) + 4; |
| 529 | for (ireg = 32; --ireg >= 0; ) |
| 530 | if (PROC_FREG_MASK(proc_desc) & (1 << ireg)) |
| 531 | { |
| 532 | buffer = read_register (ireg + FP0_REGNUM); |
| 533 | write_memory (save_address, (char *)&buffer, 4); |
| 534 | save_address -= 4; |
| 535 | } |
| 536 | write_register (PUSH_FP_REGNUM, sp); |
| 537 | PROC_FRAME_REG(proc_desc) = PUSH_FP_REGNUM; |
| 538 | PROC_FRAME_OFFSET(proc_desc) = 0; |
| 539 | buffer = read_register (PC_REGNUM); |
| 540 | write_memory (sp - 4, (char *)&buffer, sizeof(REGISTER_TYPE)); |
| 541 | buffer = read_register (HI_REGNUM); |
| 542 | write_memory (sp - 8, (char *)&buffer, sizeof(REGISTER_TYPE)); |
| 543 | buffer = read_register (LO_REGNUM); |
| 544 | write_memory (sp - 12, (char *)&buffer, sizeof(REGISTER_TYPE)); |
| 545 | buffer = read_register (mips_fpu ? FCRCS_REGNUM : ZERO_REGNUM); |
| 546 | write_memory (sp - 16, (char *)&buffer, sizeof(REGISTER_TYPE)); |
| 547 | sp -= 4 * (GEN_REG_SAVE_COUNT |
| 548 | + (mips_fpu ? FLOAT_REG_SAVE_COUNT : 0) |
| 549 | + SPECIAL_REG_SAVE_COUNT); |
| 550 | write_register (SP_REGNUM, sp); |
| 551 | PROC_LOW_ADDR(proc_desc) = sp - CALL_DUMMY_SIZE + CALL_DUMMY_START_OFFSET; |
| 552 | PROC_HIGH_ADDR(proc_desc) = sp; |
| 553 | SET_PROC_DESC_IS_DUMMY(proc_desc); |
| 554 | PROC_PC_REG(proc_desc) = RA_REGNUM; |
| 555 | } |
| 556 | |
| 557 | void |
| 558 | mips_pop_frame() |
| 559 | { |
| 560 | register int regnum; |
| 561 | FRAME frame = get_current_frame (); |
| 562 | CORE_ADDR new_sp = frame->frame; |
| 563 | |
| 564 | mips_extra_func_info_t proc_desc = frame->proc_desc; |
| 565 | |
| 566 | write_register (PC_REGNUM, FRAME_SAVED_PC(frame)); |
| 567 | if (proc_desc) |
| 568 | { |
| 569 | for (regnum = 32; --regnum >= 0; ) |
| 570 | if (PROC_REG_MASK(proc_desc) & (1 << regnum)) |
| 571 | write_register (regnum, |
| 572 | read_memory_integer (frame->saved_regs->regs[regnum], |
| 573 | 4)); |
| 574 | for (regnum = 32; --regnum >= 0; ) |
| 575 | if (PROC_FREG_MASK(proc_desc) & (1 << regnum)) |
| 576 | write_register (regnum + FP0_REGNUM, |
| 577 | read_memory_integer (frame->saved_regs->regs[regnum + FP0_REGNUM], 4)); |
| 578 | } |
| 579 | write_register (SP_REGNUM, new_sp); |
| 580 | flush_cached_frames (); |
| 581 | /* We let mips_init_extra_frame_info figure out the frame pointer */ |
| 582 | set_current_frame (create_new_frame (0, read_pc ())); |
| 583 | |
| 584 | if (PROC_DESC_IS_DUMMY(proc_desc)) |
| 585 | { |
| 586 | struct linked_proc_info *pi_ptr, *prev_ptr; |
| 587 | |
| 588 | for (pi_ptr = linked_proc_desc_table, prev_ptr = NULL; |
| 589 | pi_ptr != NULL; |
| 590 | prev_ptr = pi_ptr, pi_ptr = pi_ptr->next) |
| 591 | { |
| 592 | if (&pi_ptr->info == proc_desc) |
| 593 | break; |
| 594 | } |
| 595 | |
| 596 | if (pi_ptr == NULL) |
| 597 | error ("Can't locate dummy extra frame info\n"); |
| 598 | |
| 599 | if (prev_ptr != NULL) |
| 600 | prev_ptr->next = pi_ptr->next; |
| 601 | else |
| 602 | linked_proc_desc_table = pi_ptr->next; |
| 603 | |
| 604 | free (pi_ptr); |
| 605 | |
| 606 | write_register (HI_REGNUM, read_memory_integer(new_sp - 8, 4)); |
| 607 | write_register (LO_REGNUM, read_memory_integer(new_sp - 12, 4)); |
| 608 | if (mips_fpu) |
| 609 | write_register (FCRCS_REGNUM, read_memory_integer(new_sp - 16, 4)); |
| 610 | } |
| 611 | } |
| 612 | |
| 613 | static void |
| 614 | mips_print_register (regnum, all) |
| 615 | int regnum, all; |
| 616 | { |
| 617 | unsigned char raw_buffer[MAX_REGISTER_RAW_SIZE]; |
| 618 | REGISTER_TYPE val; |
| 619 | |
| 620 | /* Get the data in raw format. */ |
| 621 | if (read_relative_register_raw_bytes (regnum, raw_buffer)) |
| 622 | { |
| 623 | printf_filtered ("%s: [Invalid]", reg_names[regnum]); |
| 624 | return; |
| 625 | } |
| 626 | |
| 627 | /* If an even floating pointer register, also print as double. */ |
| 628 | if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM+32 |
| 629 | && !((regnum-FP0_REGNUM) & 1)) { |
| 630 | char dbuffer[MAX_REGISTER_RAW_SIZE]; |
| 631 | |
| 632 | read_relative_register_raw_bytes (regnum, dbuffer); |
| 633 | read_relative_register_raw_bytes (regnum+1, dbuffer+4); |
| 634 | #ifdef REGISTER_CONVERT_TO_TYPE |
| 635 | REGISTER_CONVERT_TO_TYPE(regnum, builtin_type_double, dbuffer); |
| 636 | #endif |
| 637 | printf_filtered ("(d%d: ", regnum-FP0_REGNUM); |
| 638 | val_print (builtin_type_double, dbuffer, 0, |
| 639 | stdout, 0, 1, 0, Val_pretty_default); |
| 640 | printf_filtered ("); "); |
| 641 | } |
| 642 | fputs_filtered (reg_names[regnum], stdout); |
| 643 | #ifndef NUMERIC_REG_NAMES |
| 644 | if (regnum < 32) |
| 645 | printf_filtered ("(r%d): ", regnum); |
| 646 | else |
| 647 | #endif |
| 648 | printf_filtered (": "); |
| 649 | |
| 650 | /* If virtual format is floating, print it that way. */ |
| 651 | if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (regnum)) == TYPE_CODE_FLT |
| 652 | && ! INVALID_FLOAT (raw_buffer, REGISTER_VIRTUAL_SIZE(regnum))) { |
| 653 | val_print (REGISTER_VIRTUAL_TYPE (regnum), raw_buffer, 0, |
| 654 | stdout, 0, 1, 0, Val_pretty_default); |
| 655 | } |
| 656 | /* Else print as integer in hex. */ |
| 657 | else |
| 658 | { |
| 659 | long val; |
| 660 | |
| 661 | bcopy (raw_buffer, &val, sizeof (long)); |
| 662 | SWAP_TARGET_AND_HOST ((char *)&val, sizeof (long)); |
| 663 | if (val == 0) |
| 664 | printf_filtered ("0"); |
| 665 | else if (all) |
| 666 | printf_filtered (local_hex_format(), val); |
| 667 | else |
| 668 | printf_filtered ("%s=%d", local_hex_string(val), val); |
| 669 | } |
| 670 | } |
| 671 | |
| 672 | /* Replacement for generic do_registers_info. */ |
| 673 | void |
| 674 | mips_do_registers_info (regnum, fpregs) |
| 675 | int regnum; |
| 676 | int fpregs; |
| 677 | { |
| 678 | if (regnum != -1) { |
| 679 | mips_print_register (regnum, 0); |
| 680 | printf_filtered ("\n"); |
| 681 | } |
| 682 | else { |
| 683 | for (regnum = 0; regnum < NUM_REGS; ) { |
| 684 | if ((!fpregs) && regnum >= FP0_REGNUM && regnum <= FCRIR_REGNUM) { |
| 685 | regnum++; |
| 686 | continue; |
| 687 | } |
| 688 | mips_print_register (regnum, 1); |
| 689 | regnum++; |
| 690 | if ((regnum & 3) == 0 || regnum == NUM_REGS) |
| 691 | printf_filtered (";\n"); |
| 692 | else |
| 693 | printf_filtered ("; "); |
| 694 | } |
| 695 | } |
| 696 | } |
| 697 | /* Return number of args passed to a frame. described by FIP. |
| 698 | Can return -1, meaning no way to tell. */ |
| 699 | |
| 700 | int |
| 701 | mips_frame_num_args(fip) |
| 702 | FRAME fip; |
| 703 | { |
| 704 | #if 0 |
| 705 | struct chain_info_t *p; |
| 706 | |
| 707 | p = mips_find_cached_frame(FRAME_FP(fip)); |
| 708 | if (p->valid) |
| 709 | return p->the_info.numargs; |
| 710 | #endif |
| 711 | return -1; |
| 712 | } |
| 713 | |
| 714 | \f |
| 715 | /* Bad floats: Returns 0 if P points to a valid IEEE floating point number, |
| 716 | 1 if P points to a denormalized number or a NaN. LEN says whether this is |
| 717 | a single-precision or double-precision float */ |
| 718 | #define SINGLE_EXP_BITS 8 |
| 719 | #define DOUBLE_EXP_BITS 11 |
| 720 | int |
| 721 | isa_NAN(p, len) |
| 722 | int *p, len; |
| 723 | { |
| 724 | int exponent; |
| 725 | if (len == 4) |
| 726 | { |
| 727 | exponent = *p; |
| 728 | exponent = exponent << 1 >> (32 - SINGLE_EXP_BITS - 1); |
| 729 | return ((exponent == -1) || (! exponent && *p)); |
| 730 | } |
| 731 | else if (len == 8) |
| 732 | { |
| 733 | #if TARGET_BYTE_ORDER == BIG_ENDIAN |
| 734 | exponent = *p; |
| 735 | #else |
| 736 | exponent = *(p+1); |
| 737 | #endif |
| 738 | exponent = exponent << 1 >> (32 - DOUBLE_EXP_BITS - 1); |
| 739 | return ((exponent == -1) || (! exponent && *p * *(p+1))); |
| 740 | } |
| 741 | else return 1; |
| 742 | } |
| 743 | \f |
| 744 | /* To skip prologues, I use this predicate. Returns either PC |
| 745 | itself if the code at PC does not look like a function prologue; |
| 746 | otherwise returns an address that (if we're lucky) follows |
| 747 | the prologue. */ |
| 748 | |
| 749 | CORE_ADDR |
| 750 | mips_skip_prologue(pc) |
| 751 | CORE_ADDR pc; |
| 752 | { |
| 753 | struct symbol *f; |
| 754 | struct block *b; |
| 755 | unsigned long inst; |
| 756 | int offset; |
| 757 | int seen_sp_adjust = 0; |
| 758 | |
| 759 | /* Skip the typical prologue instructions. These are the stack adjustment |
| 760 | instruction and the instructions that save registers on the stack |
| 761 | or in the gcc frame. */ |
| 762 | for (offset = 0; offset < 100; offset += 4) { |
| 763 | inst = read_memory_integer(pc + offset, 4); |
| 764 | if ((inst & 0xffff0000) == 0x27bd0000) /* addiu $sp,$sp,offset */ |
| 765 | seen_sp_adjust = 1; |
| 766 | else if ((inst & 0xFFE00000) == 0xAFA00000 && (inst & 0x001F0000)) |
| 767 | continue; /* sw reg,n($sp) */ |
| 768 | /* reg != $zero */ |
| 769 | else if ((inst & 0xFFE00000) == 0xE7A00000) /* swc1 freg,n($sp) */ |
| 770 | continue; |
| 771 | else if ((inst & 0xF3E00000) == 0xA3C00000 && (inst & 0x001F0000)) |
| 772 | /* sx reg,n($s8) */ |
| 773 | continue; /* reg != $zero */ |
| 774 | else if (inst == 0x03A0F021) /* move $s8,$sp */ |
| 775 | continue; |
| 776 | else if ((inst & 0xFF9F07FF) == 0x00800021) /* move reg,$a0-$a3 */ |
| 777 | continue; |
| 778 | else |
| 779 | break; |
| 780 | } |
| 781 | return pc + offset; |
| 782 | |
| 783 | /* FIXME schauer. The following code seems no longer necessary if we |
| 784 | always skip the typical prologue instructions. */ |
| 785 | |
| 786 | #if 0 |
| 787 | if (seen_sp_adjust) |
| 788 | return pc + offset; |
| 789 | |
| 790 | /* Well, it looks like a frameless. Let's make sure. |
| 791 | Note that we are not called on the current PC, |
| 792 | but on the function`s start PC, and I have definitely |
| 793 | seen optimized code that adjusts the SP quite later */ |
| 794 | b = block_for_pc(pc); |
| 795 | if (!b) return pc; |
| 796 | |
| 797 | f = lookup_symbol(MIPS_EFI_SYMBOL_NAME, b, LABEL_NAMESPACE, 0, NULL); |
| 798 | if (!f) return pc; |
| 799 | /* Ideally, I would like to use the adjusted info |
| 800 | from mips_frame_info(), but for all practical |
| 801 | purposes it will not matter (and it would require |
| 802 | a different definition of SKIP_PROLOGUE()) |
| 803 | |
| 804 | Actually, it would not hurt to skip the storing |
| 805 | of arguments on the stack as well. */ |
| 806 | if (((mips_extra_func_info_t)SYMBOL_VALUE(f))->pdr.frameoffset) |
| 807 | return pc + 4; |
| 808 | |
| 809 | return pc; |
| 810 | #endif |
| 811 | } |
| 812 | |
| 813 | /* Given a return value in `regbuf' with a type `valtype', |
| 814 | extract and copy its value into `valbuf'. */ |
| 815 | void |
| 816 | mips_extract_return_value (valtype, regbuf, valbuf) |
| 817 | struct type *valtype; |
| 818 | char regbuf[REGISTER_BYTES]; |
| 819 | char *valbuf; |
| 820 | { |
| 821 | int regnum; |
| 822 | |
| 823 | regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2; |
| 824 | |
| 825 | memcpy (valbuf, regbuf + REGISTER_BYTE (regnum), TYPE_LENGTH (valtype)); |
| 826 | #ifdef REGISTER_CONVERT_TO_TYPE |
| 827 | REGISTER_CONVERT_TO_TYPE(regnum, valtype, valbuf); |
| 828 | #endif |
| 829 | } |
| 830 | |
| 831 | /* Given a return value in `regbuf' with a type `valtype', |
| 832 | write it's value into the appropriate register. */ |
| 833 | void |
| 834 | mips_store_return_value (valtype, valbuf) |
| 835 | struct type *valtype; |
| 836 | char *valbuf; |
| 837 | { |
| 838 | int regnum; |
| 839 | char raw_buffer[MAX_REGISTER_RAW_SIZE]; |
| 840 | |
| 841 | regnum = TYPE_CODE (valtype) == TYPE_CODE_FLT && mips_fpu ? FP0_REGNUM : 2; |
| 842 | memcpy(raw_buffer, valbuf, TYPE_LENGTH (valtype)); |
| 843 | |
| 844 | #ifdef REGISTER_CONVERT_FROM_TYPE |
| 845 | REGISTER_CONVERT_FROM_TYPE(regnum, valtype, raw_buffer); |
| 846 | #endif |
| 847 | |
| 848 | write_register_bytes(REGISTER_BYTE (regnum), raw_buffer, TYPE_LENGTH (valtype)); |
| 849 | } |
| 850 | |
| 851 | /* Let the user turn off floating point and set the fence post for |
| 852 | heuristic_proc_start. */ |
| 853 | |
| 854 | void |
| 855 | _initialize_mips_tdep () |
| 856 | { |
| 857 | add_show_from_set |
| 858 | (add_set_cmd ("mipsfpu", class_support, var_boolean, |
| 859 | (char *) &mips_fpu, |
| 860 | "Set use of floating point coprocessor.\n\ |
| 861 | Turn off to avoid using floating point instructions when calling functions\n\ |
| 862 | or dealing with return values.", &setlist), |
| 863 | &showlist); |
| 864 | |
| 865 | add_show_from_set |
| 866 | (add_set_cmd ("heuristic-fence-post", class_support, var_uinteger, |
| 867 | (char *) &heuristic_fence_post, |
| 868 | "Set the distance searched for the start of a function.\n\ |
| 869 | Set number of bytes to be searched backward to find the beginning of a\n\ |
| 870 | function without symbols.", &setlist), |
| 871 | &showlist); |
| 872 | } |