| 1 | /* Debug register code for x86 (i386 and x86-64). |
| 2 | |
| 3 | Copyright (C) 2009-2015 Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 19 | |
| 20 | /* Support for hardware watchpoints and breakpoints using the x86 |
| 21 | debug registers. |
| 22 | |
| 23 | This provides several functions for inserting and removing |
| 24 | hardware-assisted breakpoints and watchpoints, testing if one or |
| 25 | more of the watchpoints triggered and at what address, checking |
| 26 | whether a given region can be watched, etc. |
| 27 | |
| 28 | The functions below implement debug registers sharing by reference |
| 29 | counts, and allow to watch regions up to 16 bytes long |
| 30 | (32 bytes on 64 bit hosts). */ |
| 31 | |
| 32 | #ifndef X86_DREGS_H |
| 33 | #define X86_DREGS_H 1 |
| 34 | |
| 35 | #include "break-common.h" /* target_hw_bp_type */ |
| 36 | |
| 37 | /* Low-level function vector. */ |
| 38 | |
| 39 | struct x86_dr_low_type |
| 40 | { |
| 41 | /* Set the debug control (DR7) register to a given value for |
| 42 | all LWPs. May be NULL if the debug control register cannot |
| 43 | be set. */ |
| 44 | void (*set_control) (unsigned long); |
| 45 | |
| 46 | /* Put an address into one debug register for all LWPs. May |
| 47 | be NULL if debug registers cannot be set*/ |
| 48 | void (*set_addr) (int, CORE_ADDR); |
| 49 | |
| 50 | /* Return the address in a given debug register of the current |
| 51 | LWP. */ |
| 52 | CORE_ADDR (*get_addr) (int); |
| 53 | |
| 54 | /* Return the value of the debug status (DR6) register for |
| 55 | current LWP. */ |
| 56 | unsigned long (*get_status) (void); |
| 57 | |
| 58 | /* Return the value of the debug control (DR7) register for |
| 59 | current LWP. */ |
| 60 | unsigned long (*get_control) (void); |
| 61 | |
| 62 | /* Number of bytes used for debug registers (4 or 8). */ |
| 63 | int debug_register_length; |
| 64 | }; |
| 65 | |
| 66 | extern struct x86_dr_low_type x86_dr_low; |
| 67 | |
| 68 | /* Debug registers' indices. */ |
| 69 | #define DR_FIRSTADDR 0 |
| 70 | #define DR_LASTADDR 3 |
| 71 | #define DR_NADDR 4 /* The number of debug address registers. */ |
| 72 | #define DR_STATUS 6 /* Index of debug status register (DR6). */ |
| 73 | #define DR_CONTROL 7 /* Index of debug control register (DR7). */ |
| 74 | |
| 75 | /* Global state needed to track h/w watchpoints. */ |
| 76 | |
| 77 | struct x86_debug_reg_state |
| 78 | { |
| 79 | /* Mirror the inferior's DRi registers. We keep the status and |
| 80 | control registers separated because they don't hold addresses. |
| 81 | Note that since we can change these mirrors while threads are |
| 82 | running, we never trust them to explain a cause of a trap. |
| 83 | For that, we need to peek directly in the inferior registers. */ |
| 84 | CORE_ADDR dr_mirror[DR_NADDR]; |
| 85 | unsigned dr_status_mirror, dr_control_mirror; |
| 86 | |
| 87 | /* Reference counts for each debug address register. */ |
| 88 | int dr_ref_count[DR_NADDR]; |
| 89 | }; |
| 90 | |
| 91 | /* A macro to loop over all debug address registers. */ |
| 92 | #define ALL_DEBUG_ADDRESS_REGISTERS(i) \ |
| 93 | for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++) |
| 94 | |
| 95 | /* Return a pointer to the local mirror of the debug registers of |
| 96 | process PID. This function must be provided by the client |
| 97 | if required. */ |
| 98 | extern struct x86_debug_reg_state *x86_debug_reg_state (pid_t pid); |
| 99 | |
| 100 | /* Insert a watchpoint to watch a memory region which starts at |
| 101 | address ADDR and whose length is LEN bytes. Watch memory accesses |
| 102 | of the type TYPE. Return 0 on success, -1 on failure. */ |
| 103 | extern int x86_dr_insert_watchpoint (struct x86_debug_reg_state *state, |
| 104 | enum target_hw_bp_type type, |
| 105 | CORE_ADDR addr, |
| 106 | int len); |
| 107 | |
| 108 | /* Remove a watchpoint that watched the memory region which starts at |
| 109 | address ADDR, whose length is LEN bytes, and for accesses of the |
| 110 | type TYPE. Return 0 on success, -1 on failure. */ |
| 111 | extern int x86_dr_remove_watchpoint (struct x86_debug_reg_state *state, |
| 112 | enum target_hw_bp_type type, |
| 113 | CORE_ADDR addr, |
| 114 | int len); |
| 115 | |
| 116 | /* Return non-zero if we can watch a memory region that starts at |
| 117 | address ADDR and whose length is LEN bytes. */ |
| 118 | extern int x86_dr_region_ok_for_watchpoint (struct x86_debug_reg_state *state, |
| 119 | CORE_ADDR addr, int len); |
| 120 | |
| 121 | /* If the inferior has some break/watchpoint that triggered, set the |
| 122 | address associated with that break/watchpoint and return true. |
| 123 | Otherwise, return false. */ |
| 124 | extern int x86_dr_stopped_data_address (struct x86_debug_reg_state *state, |
| 125 | CORE_ADDR *addr_p); |
| 126 | |
| 127 | /* Return true if the inferior has some watchpoint that triggered. |
| 128 | Otherwise return false. */ |
| 129 | extern int x86_dr_stopped_by_watchpoint (struct x86_debug_reg_state *state); |
| 130 | |
| 131 | #endif /* X86_DREGS_H */ |