| 1 | /* Functions specific to running gdb native on an ns32k running NetBSD |
| 2 | Copyright 1989, 1992, 1993, 1994, 1996 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 19 | |
| 20 | #include <sys/types.h> |
| 21 | #include <sys/ptrace.h> |
| 22 | #include <machine/reg.h> |
| 23 | #include <machine/frame.h> |
| 24 | #include <machine/pcb.h> |
| 25 | |
| 26 | #include "defs.h" |
| 27 | #include "inferior.h" |
| 28 | #include "target.h" |
| 29 | #include "gdbcore.h" |
| 30 | |
| 31 | #define RF(dst, src) \ |
| 32 | memcpy(®isters[REGISTER_BYTE(dst)], &src, sizeof(src)) |
| 33 | |
| 34 | #define RS(src, dst) \ |
| 35 | memcpy(&dst, ®isters[REGISTER_BYTE(src)], sizeof(dst)) |
| 36 | |
| 37 | void |
| 38 | fetch_inferior_registers (regno) |
| 39 | int regno; |
| 40 | { |
| 41 | struct reg inferior_registers; |
| 42 | struct fpreg inferior_fpregisters; |
| 43 | |
| 44 | ptrace (PT_GETREGS, inferior_pid, |
| 45 | (PTRACE_ARG3_TYPE) &inferior_registers, 0); |
| 46 | ptrace (PT_GETFPREGS, inferior_pid, |
| 47 | (PTRACE_ARG3_TYPE) &inferior_fpregisters, 0); |
| 48 | |
| 49 | RF(R0_REGNUM + 0, inferior_registers.r_r0); |
| 50 | RF(R0_REGNUM + 1, inferior_registers.r_r1); |
| 51 | RF(R0_REGNUM + 2, inferior_registers.r_r2); |
| 52 | RF(R0_REGNUM + 3, inferior_registers.r_r3); |
| 53 | RF(R0_REGNUM + 4, inferior_registers.r_r4); |
| 54 | RF(R0_REGNUM + 5, inferior_registers.r_r5); |
| 55 | RF(R0_REGNUM + 6, inferior_registers.r_r6); |
| 56 | RF(R0_REGNUM + 7, inferior_registers.r_r7); |
| 57 | |
| 58 | RF(SP_REGNUM , inferior_registers.r_sp); |
| 59 | RF(FP_REGNUM , inferior_registers.r_fp); |
| 60 | RF(PC_REGNUM , inferior_registers.r_pc); |
| 61 | RF(PS_REGNUM , inferior_registers.r_psr); |
| 62 | |
| 63 | RF(FPS_REGNUM , inferior_fpregisters.r_fsr); |
| 64 | RF(FP0_REGNUM +0, inferior_fpregisters.r_freg[0]); |
| 65 | RF(FP0_REGNUM +2, inferior_fpregisters.r_freg[2]); |
| 66 | RF(FP0_REGNUM +4, inferior_fpregisters.r_freg[4]); |
| 67 | RF(FP0_REGNUM +6, inferior_fpregisters.r_freg[6]); |
| 68 | RF(LP0_REGNUM + 1, inferior_fpregisters.r_freg[1]); |
| 69 | RF(LP0_REGNUM + 3, inferior_fpregisters.r_freg[3]); |
| 70 | RF(LP0_REGNUM + 5, inferior_fpregisters.r_freg[5]); |
| 71 | RF(LP0_REGNUM + 7, inferior_fpregisters.r_freg[7]); |
| 72 | registers_fetched (); |
| 73 | } |
| 74 | |
| 75 | void |
| 76 | store_inferior_registers (regno) |
| 77 | int regno; |
| 78 | { |
| 79 | struct reg inferior_registers; |
| 80 | struct fpreg inferior_fpregisters; |
| 81 | |
| 82 | RS(R0_REGNUM + 0, inferior_registers.r_r0); |
| 83 | RS(R0_REGNUM + 1, inferior_registers.r_r1); |
| 84 | RS(R0_REGNUM + 2, inferior_registers.r_r2); |
| 85 | RS(R0_REGNUM + 3, inferior_registers.r_r3); |
| 86 | RS(R0_REGNUM + 4, inferior_registers.r_r4); |
| 87 | RS(R0_REGNUM + 5, inferior_registers.r_r5); |
| 88 | RS(R0_REGNUM + 6, inferior_registers.r_r6); |
| 89 | RS(R0_REGNUM + 7, inferior_registers.r_r7); |
| 90 | |
| 91 | RS(SP_REGNUM , inferior_registers.r_sp); |
| 92 | RS(FP_REGNUM , inferior_registers.r_fp); |
| 93 | RS(PC_REGNUM , inferior_registers.r_pc); |
| 94 | RS(PS_REGNUM , inferior_registers.r_psr); |
| 95 | |
| 96 | RS(FPS_REGNUM , inferior_fpregisters.r_fsr); |
| 97 | RS(FP0_REGNUM +0, inferior_fpregisters.r_freg[0]); |
| 98 | RS(FP0_REGNUM +2, inferior_fpregisters.r_freg[2]); |
| 99 | RS(FP0_REGNUM +4, inferior_fpregisters.r_freg[4]); |
| 100 | RS(FP0_REGNUM +6, inferior_fpregisters.r_freg[6]); |
| 101 | RS(LP0_REGNUM + 1, inferior_fpregisters.r_freg[1]); |
| 102 | RS(LP0_REGNUM + 3, inferior_fpregisters.r_freg[3]); |
| 103 | RS(LP0_REGNUM + 5, inferior_fpregisters.r_freg[5]); |
| 104 | RS(LP0_REGNUM + 7, inferior_fpregisters.r_freg[7]); |
| 105 | |
| 106 | ptrace (PT_SETREGS, inferior_pid, |
| 107 | (PTRACE_ARG3_TYPE) &inferior_registers, 0); |
| 108 | ptrace (PT_SETFPREGS, inferior_pid, |
| 109 | (PTRACE_ARG3_TYPE) &inferior_fpregisters, 0); |
| 110 | } |
| 111 | \f |
| 112 | |
| 113 | /* XXX - Add this to machine/regs.h instead? */ |
| 114 | struct coreregs { |
| 115 | struct reg intreg; |
| 116 | struct fpreg freg; |
| 117 | }; |
| 118 | |
| 119 | /* Get registers from a core file. */ |
| 120 | static void |
| 121 | fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr) |
| 122 | char *core_reg_sect; |
| 123 | unsigned core_reg_size; |
| 124 | int which; |
| 125 | unsigned int reg_addr; /* Unused in this version */ |
| 126 | { |
| 127 | struct coreregs *core_reg; |
| 128 | |
| 129 | core_reg = (struct coreregs *)core_reg_sect; |
| 130 | |
| 131 | /* |
| 132 | * We have *all* registers |
| 133 | * in the first core section. |
| 134 | * Ignore which. |
| 135 | */ |
| 136 | |
| 137 | if (core_reg_size < sizeof(*core_reg)) { |
| 138 | fprintf_unfiltered (gdb_stderr, "Couldn't read regs from core file\n"); |
| 139 | return; |
| 140 | } |
| 141 | |
| 142 | /* Integer registers */ |
| 143 | RF(R0_REGNUM + 0, core_reg->intreg.r_r0); |
| 144 | RF(R0_REGNUM + 1, core_reg->intreg.r_r1); |
| 145 | RF(R0_REGNUM + 2, core_reg->intreg.r_r2); |
| 146 | RF(R0_REGNUM + 3, core_reg->intreg.r_r3); |
| 147 | RF(R0_REGNUM + 4, core_reg->intreg.r_r4); |
| 148 | RF(R0_REGNUM + 5, core_reg->intreg.r_r5); |
| 149 | RF(R0_REGNUM + 6, core_reg->intreg.r_r6); |
| 150 | RF(R0_REGNUM + 7, core_reg->intreg.r_r7); |
| 151 | |
| 152 | RF(SP_REGNUM , core_reg->intreg.r_sp); |
| 153 | RF(FP_REGNUM , core_reg->intreg.r_fp); |
| 154 | RF(PC_REGNUM , core_reg->intreg.r_pc); |
| 155 | RF(PS_REGNUM , core_reg->intreg.r_psr); |
| 156 | |
| 157 | /* Floating point registers */ |
| 158 | RF(FPS_REGNUM , core_reg->freg.r_fsr); |
| 159 | RF(FP0_REGNUM +0, core_reg->freg.r_freg[0]); |
| 160 | RF(FP0_REGNUM +2, core_reg->freg.r_freg[2]); |
| 161 | RF(FP0_REGNUM +4, core_reg->freg.r_freg[4]); |
| 162 | RF(FP0_REGNUM +6, core_reg->freg.r_freg[6]); |
| 163 | RF(LP0_REGNUM + 1, core_reg->freg.r_freg[1]); |
| 164 | RF(LP0_REGNUM + 3, core_reg->freg.r_freg[3]); |
| 165 | RF(LP0_REGNUM + 5, core_reg->freg.r_freg[5]); |
| 166 | RF(LP0_REGNUM + 7, core_reg->freg.r_freg[7]); |
| 167 | registers_fetched (); |
| 168 | } |
| 169 | |
| 170 | /* Register that we are able to handle ns32knbsd core file formats. |
| 171 | FIXME: is this really bfd_target_unknown_flavour? */ |
| 172 | |
| 173 | static struct core_fns nat_core_fns = |
| 174 | { |
| 175 | bfd_target_unknown_flavour, |
| 176 | fetch_core_registers, |
| 177 | NULL |
| 178 | }; |
| 179 | |
| 180 | void |
| 181 | _initialize_ns32knbsd_nat () |
| 182 | { |
| 183 | add_core_fns (&nat_core_fns); |
| 184 | } |
| 185 | \f |
| 186 | |
| 187 | /* |
| 188 | * kernel_u_size() is not helpful on NetBSD because |
| 189 | * the "u" struct is NOT in the core dump file. |
| 190 | */ |
| 191 | |
| 192 | #ifdef FETCH_KCORE_REGISTERS |
| 193 | /* |
| 194 | * Get registers from a kernel crash dump or live kernel. |
| 195 | * Called by kcore-nbsd.c:get_kcore_registers(). |
| 196 | */ |
| 197 | void |
| 198 | fetch_kcore_registers (pcb) |
| 199 | struct pcb *pcb; |
| 200 | { |
| 201 | struct switchframe sf; |
| 202 | struct reg intreg; |
| 203 | int dummy; |
| 204 | |
| 205 | /* Integer registers */ |
| 206 | if (target_read_memory((CORE_ADDR)pcb->pcb_ksp, (char *)&sf, sizeof sf)) |
| 207 | error("Cannot read integer registers."); |
| 208 | |
| 209 | /* We use the psr at kernel entry */ |
| 210 | if (target_read_memory((CORE_ADDR)pcb->pcb_onstack, (char *)&intreg, sizeof intreg)) |
| 211 | error("Cannot read processor status register."); |
| 212 | |
| 213 | dummy = 0; |
| 214 | RF(R0_REGNUM + 0, dummy); |
| 215 | RF(R0_REGNUM + 1, dummy); |
| 216 | RF(R0_REGNUM + 2, dummy); |
| 217 | RF(R0_REGNUM + 3, sf.sf_r3); |
| 218 | RF(R0_REGNUM + 4, sf.sf_r4); |
| 219 | RF(R0_REGNUM + 5, sf.sf_r5); |
| 220 | RF(R0_REGNUM + 6, sf.sf_r6); |
| 221 | RF(R0_REGNUM + 7, sf.sf_r7); |
| 222 | |
| 223 | dummy = pcb->pcb_kfp + 8; |
| 224 | RF(SP_REGNUM , dummy); |
| 225 | RF(FP_REGNUM , sf.sf_fp); |
| 226 | RF(PC_REGNUM , sf.sf_pc); |
| 227 | RF(PS_REGNUM , intreg.r_psr); |
| 228 | |
| 229 | /* Floating point registers */ |
| 230 | RF(FPS_REGNUM , pcb->pcb_fsr); |
| 231 | RF(FP0_REGNUM +0, pcb->pcb_freg[0]); |
| 232 | RF(FP0_REGNUM +2, pcb->pcb_freg[2]); |
| 233 | RF(FP0_REGNUM +4, pcb->pcb_freg[4]); |
| 234 | RF(FP0_REGNUM +6, pcb->pcb_freg[6]); |
| 235 | RF(LP0_REGNUM + 1, pcb->pcb_freg[1]); |
| 236 | RF(LP0_REGNUM + 3, pcb->pcb_freg[3]); |
| 237 | RF(LP0_REGNUM + 5, pcb->pcb_freg[5]); |
| 238 | RF(LP0_REGNUM + 7, pcb->pcb_freg[7]); |
| 239 | registers_fetched (); |
| 240 | } |
| 241 | #endif /* FETCH_KCORE_REGISTERS */ |
| 242 | |
| 243 | void |
| 244 | clear_regs() |
| 245 | { |
| 246 | double zero = 0.0; |
| 247 | int null = 0; |
| 248 | |
| 249 | /* Integer registers */ |
| 250 | RF(R0_REGNUM + 0, null); |
| 251 | RF(R0_REGNUM + 1, null); |
| 252 | RF(R0_REGNUM + 2, null); |
| 253 | RF(R0_REGNUM + 3, null); |
| 254 | RF(R0_REGNUM + 4, null); |
| 255 | RF(R0_REGNUM + 5, null); |
| 256 | RF(R0_REGNUM + 6, null); |
| 257 | RF(R0_REGNUM + 7, null); |
| 258 | |
| 259 | RF(SP_REGNUM , null); |
| 260 | RF(FP_REGNUM , null); |
| 261 | RF(PC_REGNUM , null); |
| 262 | RF(PS_REGNUM , null); |
| 263 | |
| 264 | /* Floating point registers */ |
| 265 | RF(FPS_REGNUM , zero); |
| 266 | RF(FP0_REGNUM +0, zero); |
| 267 | RF(FP0_REGNUM +2, zero); |
| 268 | RF(FP0_REGNUM +4, zero); |
| 269 | RF(FP0_REGNUM +6, zero); |
| 270 | RF(LP0_REGNUM + 0, zero); |
| 271 | RF(LP0_REGNUM + 1, zero); |
| 272 | RF(LP0_REGNUM + 2, zero); |
| 273 | RF(LP0_REGNUM + 3, zero); |
| 274 | return; |
| 275 | } |
| 276 | |
| 277 | /* Return number of args passed to a frame. |
| 278 | Can return -1, meaning no way to tell. */ |
| 279 | |
| 280 | int |
| 281 | frame_num_args(fi) |
| 282 | struct frame_info *fi; |
| 283 | { |
| 284 | CORE_ADDR enter_addr; |
| 285 | CORE_ADDR argp; |
| 286 | int inst; |
| 287 | int args; |
| 288 | int i; |
| 289 | |
| 290 | if (read_memory_integer (fi->frame, 4) == 0 && fi->pc < 0x10000) { |
| 291 | /* main is always called with three args */ |
| 292 | return(3); |
| 293 | } |
| 294 | enter_addr = ns32k_get_enter_addr(fi->pc); |
| 295 | if (enter_addr = 0) |
| 296 | return(-1); |
| 297 | argp = enter_addr == 1 ? SAVED_PC_AFTER_CALL(fi) : FRAME_SAVED_PC(fi); |
| 298 | for (i = 0; i < 16; i++) { |
| 299 | /* |
| 300 | * After a bsr gcc may emit the following instructions |
| 301 | * to remove the arguments from the stack: |
| 302 | * cmpqd 0,tos - to remove 4 bytes from the stack |
| 303 | * cmpd tos,tos - to remove 8 bytes from the stack |
| 304 | * adjsp[bwd] -n - to remove n bytes from the stack |
| 305 | * Gcc sometimes delays emitting these instructions and |
| 306 | * may even throw a branch between our feet. |
| 307 | */ |
| 308 | inst = read_memory_integer(argp , 4); |
| 309 | args = read_memory_integer(argp + 2, 4); |
| 310 | if ((inst & 0xff) == 0xea) { /* br */ |
| 311 | args = ((inst >> 8) & 0xffffff) | (args << 24); |
| 312 | if (args & 0x80) { |
| 313 | if (args & 0x40) { |
| 314 | args = ntohl(args); |
| 315 | } else { |
| 316 | args = ntohs(args & 0xffff); |
| 317 | if (args & 0x2000) |
| 318 | args |= 0xc000; |
| 319 | } |
| 320 | } else { |
| 321 | args = args & 0xff; |
| 322 | if (args & 0x40) |
| 323 | args |= 0x80; |
| 324 | } |
| 325 | argp += args; |
| 326 | continue; |
| 327 | } |
| 328 | if ((inst & 0xffff) == 0xb81f) /* cmpqd 0,tos */ |
| 329 | return(1); |
| 330 | else if ((inst & 0xffff) == 0xbdc7) /* cmpd tos,tos */ |
| 331 | return(2); |
| 332 | else if ((inst & 0xfffc) == 0xa57c) { /* adjsp[bwd] */ |
| 333 | switch (inst & 3) { |
| 334 | case 0: |
| 335 | args = ((args & 0xff) + 0x80); |
| 336 | break; |
| 337 | case 1: |
| 338 | args = ((ntohs(args) & 0xffff) + 0x8000); |
| 339 | break; |
| 340 | case 3: |
| 341 | args = -ntohl(args); |
| 342 | break; |
| 343 | default: |
| 344 | return(-1); |
| 345 | } |
| 346 | if (args / 4 > 10 || (args & 3) != 0) |
| 347 | continue; |
| 348 | return(args / 4); |
| 349 | } |
| 350 | argp += 1; |
| 351 | } |
| 352 | return(-1); |
| 353 | } |