| 1 | /* Target-dependent code for GDB, the GNU debugger. |
| 2 | |
| 3 | Copyright 2000, 2001, 2002, 2003, 2004 Free Software Foundation, |
| 4 | Inc. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 2 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software |
| 20 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 21 | Boston, MA 02111-1307, USA. */ |
| 22 | |
| 23 | #ifndef PPC_TDEP_H |
| 24 | #define PPC_TDEP_H |
| 25 | |
| 26 | struct gdbarch; |
| 27 | struct frame_info; |
| 28 | struct value; |
| 29 | struct regcache; |
| 30 | struct type; |
| 31 | |
| 32 | /* From ppc-linux-tdep.c... */ |
| 33 | enum return_value_convention ppc_sysv_abi_return_value (struct gdbarch *gdbarch, |
| 34 | struct type *valtype, |
| 35 | struct regcache *regcache, |
| 36 | gdb_byte *readbuf, |
| 37 | const gdb_byte *writebuf); |
| 38 | enum return_value_convention ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
| 39 | struct type *valtype, |
| 40 | struct regcache *regcache, |
| 41 | gdb_byte *readbuf, |
| 42 | const gdb_byte *writebuf); |
| 43 | CORE_ADDR ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, |
| 44 | struct value *function, |
| 45 | struct regcache *regcache, |
| 46 | CORE_ADDR bp_addr, int nargs, |
| 47 | struct value **args, CORE_ADDR sp, |
| 48 | int struct_return, |
| 49 | CORE_ADDR struct_addr); |
| 50 | CORE_ADDR ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, |
| 51 | struct value *function, |
| 52 | struct regcache *regcache, |
| 53 | CORE_ADDR bp_addr, int nargs, |
| 54 | struct value **args, CORE_ADDR sp, |
| 55 | int struct_return, |
| 56 | CORE_ADDR struct_addr); |
| 57 | CORE_ADDR ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, |
| 58 | CORE_ADDR bpaddr); |
| 59 | int ppc_linux_memory_remove_breakpoint (CORE_ADDR addr, |
| 60 | gdb_byte *contents_cache); |
| 61 | struct link_map_offsets *ppc_linux_svr4_fetch_link_map_offsets (void); |
| 62 | void ppc_linux_supply_gregset (struct regcache *regcache, |
| 63 | int regnum, const void *gregs, size_t size, |
| 64 | int wordsize); |
| 65 | void ppc_linux_supply_fpregset (const struct regset *regset, |
| 66 | struct regcache *regcache, |
| 67 | int regnum, const void *gregs, size_t size); |
| 68 | |
| 69 | enum return_value_convention ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, |
| 70 | struct type *valtype, |
| 71 | struct regcache *regcache, |
| 72 | gdb_byte *readbuf, |
| 73 | const gdb_byte *writebuf); |
| 74 | |
| 75 | /* From rs6000-tdep.c... */ |
| 76 | int altivec_register_p (int regno); |
| 77 | int spe_register_p (int regno); |
| 78 | |
| 79 | /* Return non-zero if the architecture described by GDBARCH has |
| 80 | floating-point registers (f0 --- f31 and fpscr). */ |
| 81 | int ppc_floating_point_unit_p (struct gdbarch *gdbarch); |
| 82 | |
| 83 | /* Register set description. */ |
| 84 | |
| 85 | struct ppc_reg_offsets |
| 86 | { |
| 87 | /* General-purpose registers. */ |
| 88 | int r0_offset; |
| 89 | int pc_offset; |
| 90 | int ps_offset; |
| 91 | int cr_offset; |
| 92 | int lr_offset; |
| 93 | int ctr_offset; |
| 94 | int xer_offset; |
| 95 | int mq_offset; |
| 96 | |
| 97 | /* Floating-point registers. */ |
| 98 | int f0_offset; |
| 99 | int fpscr_offset; |
| 100 | |
| 101 | /* AltiVec registers. */ |
| 102 | int vr0_offset; |
| 103 | int vscr_offset; |
| 104 | int vrsave_offset; |
| 105 | }; |
| 106 | |
| 107 | /* Supply register REGNUM in the general-purpose register set REGSET |
| 108 | from the buffer specified by GREGS and LEN to register cache |
| 109 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ |
| 110 | |
| 111 | extern void ppc_supply_gregset (const struct regset *regset, |
| 112 | struct regcache *regcache, |
| 113 | int regnum, const void *gregs, size_t len); |
| 114 | |
| 115 | /* Supply register REGNUM in the floating-point register set REGSET |
| 116 | from the buffer specified by FPREGS and LEN to register cache |
| 117 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ |
| 118 | |
| 119 | extern void ppc_supply_fpregset (const struct regset *regset, |
| 120 | struct regcache *regcache, |
| 121 | int regnum, const void *fpregs, size_t len); |
| 122 | |
| 123 | /* Collect register REGNUM in the general-purpose register set |
| 124 | REGSET. from register cache REGCACHE into the buffer specified by |
| 125 | GREGS and LEN. If REGNUM is -1, do this for all registers in |
| 126 | REGSET. */ |
| 127 | |
| 128 | extern void ppc_collect_gregset (const struct regset *regset, |
| 129 | const struct regcache *regcache, |
| 130 | int regnum, void *gregs, size_t len); |
| 131 | |
| 132 | /* Collect register REGNUM in the floating-point register set |
| 133 | REGSET. from register cache REGCACHE into the buffer specified by |
| 134 | FPREGS and LEN. If REGNUM is -1, do this for all registers in |
| 135 | REGSET. */ |
| 136 | |
| 137 | extern void ppc_collect_fpregset (const struct regset *regset, |
| 138 | const struct regcache *regcache, |
| 139 | int regnum, void *fpregs, size_t len); |
| 140 | |
| 141 | /* Private data that this module attaches to struct gdbarch. */ |
| 142 | |
| 143 | struct gdbarch_tdep |
| 144 | { |
| 145 | int wordsize; /* size in bytes of fixed-point word */ |
| 146 | const struct reg *regs; /* from current variant */ |
| 147 | int ppc_gp0_regnum; /* GPR register 0 */ |
| 148 | int ppc_toc_regnum; /* TOC register */ |
| 149 | int ppc_ps_regnum; /* Processor (or machine) status (%msr) */ |
| 150 | int ppc_cr_regnum; /* Condition register */ |
| 151 | int ppc_lr_regnum; /* Link register */ |
| 152 | int ppc_ctr_regnum; /* Count register */ |
| 153 | int ppc_xer_regnum; /* Integer exception register */ |
| 154 | |
| 155 | /* On PPC and RS6000 variants that have no floating-point |
| 156 | registers, the next two members will be -1. */ |
| 157 | int ppc_fp0_regnum; /* floating-point register 0 */ |
| 158 | int ppc_fpscr_regnum; /* Floating point status and condition |
| 159 | register */ |
| 160 | |
| 161 | int ppc_sr0_regnum; /* segment register 0, or -1 on |
| 162 | variants that have no segment |
| 163 | registers. */ |
| 164 | |
| 165 | int ppc_mq_regnum; /* Multiply/Divide extension register */ |
| 166 | int ppc_vr0_regnum; /* First AltiVec register */ |
| 167 | int ppc_vrsave_regnum; /* Last AltiVec register */ |
| 168 | int ppc_ev0_upper_regnum; /* First GPR upper half register */ |
| 169 | int ppc_ev0_regnum; /* First ev register */ |
| 170 | int ppc_ev31_regnum; /* Last ev register */ |
| 171 | int ppc_acc_regnum; /* SPE 'acc' register */ |
| 172 | int ppc_spefscr_regnum; /* SPE 'spefscr' register */ |
| 173 | int lr_frame_offset; /* Offset to ABI specific location where |
| 174 | link register is saved. */ |
| 175 | |
| 176 | /* An array of integers, such that sim_regno[I] is the simulator |
| 177 | register number for GDB register number I, or -1 if the |
| 178 | simulator does not implement that register. */ |
| 179 | int *sim_regno; |
| 180 | }; |
| 181 | |
| 182 | |
| 183 | /* Constants for register set sizes. */ |
| 184 | enum |
| 185 | { |
| 186 | ppc_num_gprs = 32, /* 32 general-purpose registers */ |
| 187 | ppc_num_fprs = 32, /* 32 floating-point registers */ |
| 188 | ppc_num_srs = 16, /* 16 segment registers */ |
| 189 | ppc_num_vrs = 32 /* 32 Altivec vector registers */ |
| 190 | }; |
| 191 | |
| 192 | |
| 193 | /* Constants for SPR register numbers. These are *not* GDB register |
| 194 | numbers: they are the numbers used in the PowerPC ISA itself to |
| 195 | refer to these registers. |
| 196 | |
| 197 | This table includes all the SPRs from all the variants I could find |
| 198 | documentation for. |
| 199 | |
| 200 | There may be registers from different PowerPC variants assigned the |
| 201 | same number, but that's fine: GDB and the SIM always use the |
| 202 | numbers in the context of a particular variant, so it's not |
| 203 | ambiguous. |
| 204 | |
| 205 | We need to deviate from the naming pattern when variants have |
| 206 | special-purpose registers of the same name, but with different |
| 207 | numbers. Fortunately, this is rare: look below to see how we |
| 208 | handle the 'tcr' registers on the 403/403GX and 602. */ |
| 209 | |
| 210 | enum |
| 211 | { |
| 212 | ppc_spr_mq = 0, |
| 213 | ppc_spr_xer = 1, |
| 214 | ppc_spr_rtcu = 4, |
| 215 | ppc_spr_rtcl = 5, |
| 216 | ppc_spr_lr = 8, |
| 217 | ppc_spr_ctr = 9, |
| 218 | ppc_spr_cnt = 9, |
| 219 | ppc_spr_dsisr = 18, |
| 220 | ppc_spr_dar = 19, |
| 221 | ppc_spr_dec = 22, |
| 222 | ppc_spr_sdr1 = 25, |
| 223 | ppc_spr_srr0 = 26, |
| 224 | ppc_spr_srr1 = 27, |
| 225 | ppc_spr_eie = 80, |
| 226 | ppc_spr_eid = 81, |
| 227 | ppc_spr_nri = 82, |
| 228 | ppc_spr_sp = 102, |
| 229 | ppc_spr_cmpa = 144, |
| 230 | ppc_spr_cmpb = 145, |
| 231 | ppc_spr_cmpc = 146, |
| 232 | ppc_spr_cmpd = 147, |
| 233 | ppc_spr_icr = 148, |
| 234 | ppc_spr_der = 149, |
| 235 | ppc_spr_counta = 150, |
| 236 | ppc_spr_countb = 151, |
| 237 | ppc_spr_cmpe = 152, |
| 238 | ppc_spr_cmpf = 153, |
| 239 | ppc_spr_cmpg = 154, |
| 240 | ppc_spr_cmph = 155, |
| 241 | ppc_spr_lctrl1 = 156, |
| 242 | ppc_spr_lctrl2 = 157, |
| 243 | ppc_spr_ictrl = 158, |
| 244 | ppc_spr_bar = 159, |
| 245 | ppc_spr_vrsave = 256, |
| 246 | ppc_spr_sprg0 = 272, |
| 247 | ppc_spr_sprg1 = 273, |
| 248 | ppc_spr_sprg2 = 274, |
| 249 | ppc_spr_sprg3 = 275, |
| 250 | ppc_spr_asr = 280, |
| 251 | ppc_spr_ear = 282, |
| 252 | ppc_spr_tbl = 284, |
| 253 | ppc_spr_tbu = 285, |
| 254 | ppc_spr_pvr = 287, |
| 255 | ppc_spr_spefscr = 512, |
| 256 | ppc_spr_ibat0u = 528, |
| 257 | ppc_spr_ibat0l = 529, |
| 258 | ppc_spr_ibat1u = 530, |
| 259 | ppc_spr_ibat1l = 531, |
| 260 | ppc_spr_ibat2u = 532, |
| 261 | ppc_spr_ibat2l = 533, |
| 262 | ppc_spr_ibat3u = 534, |
| 263 | ppc_spr_ibat3l = 535, |
| 264 | ppc_spr_dbat0u = 536, |
| 265 | ppc_spr_dbat0l = 537, |
| 266 | ppc_spr_dbat1u = 538, |
| 267 | ppc_spr_dbat1l = 539, |
| 268 | ppc_spr_dbat2u = 540, |
| 269 | ppc_spr_dbat2l = 541, |
| 270 | ppc_spr_dbat3u = 542, |
| 271 | ppc_spr_dbat3l = 543, |
| 272 | ppc_spr_ic_cst = 560, |
| 273 | ppc_spr_ic_adr = 561, |
| 274 | ppc_spr_ic_dat = 562, |
| 275 | ppc_spr_dc_cst = 568, |
| 276 | ppc_spr_dc_adr = 569, |
| 277 | ppc_spr_dc_dat = 570, |
| 278 | ppc_spr_dpdr = 630, |
| 279 | ppc_spr_dpir = 631, |
| 280 | ppc_spr_immr = 638, |
| 281 | ppc_spr_mi_ctr = 784, |
| 282 | ppc_spr_mi_ap = 786, |
| 283 | ppc_spr_mi_epn = 787, |
| 284 | ppc_spr_mi_twc = 789, |
| 285 | ppc_spr_mi_rpn = 790, |
| 286 | ppc_spr_mi_cam = 816, |
| 287 | ppc_spr_mi_ram0 = 817, |
| 288 | ppc_spr_mi_ram1 = 818, |
| 289 | ppc_spr_md_ctr = 792, |
| 290 | ppc_spr_m_casid = 793, |
| 291 | ppc_spr_md_ap = 794, |
| 292 | ppc_spr_md_epn = 795, |
| 293 | ppc_spr_m_twb = 796, |
| 294 | ppc_spr_md_twc = 797, |
| 295 | ppc_spr_md_rpn = 798, |
| 296 | ppc_spr_m_tw = 799, |
| 297 | ppc_spr_mi_dbcam = 816, |
| 298 | ppc_spr_mi_dbram0 = 817, |
| 299 | ppc_spr_mi_dbram1 = 818, |
| 300 | ppc_spr_md_dbcam = 824, |
| 301 | ppc_spr_md_cam = 824, |
| 302 | ppc_spr_md_dbram0 = 825, |
| 303 | ppc_spr_md_ram0 = 825, |
| 304 | ppc_spr_md_dbram1 = 826, |
| 305 | ppc_spr_md_ram1 = 826, |
| 306 | ppc_spr_ummcr0 = 936, |
| 307 | ppc_spr_upmc1 = 937, |
| 308 | ppc_spr_upmc2 = 938, |
| 309 | ppc_spr_usia = 939, |
| 310 | ppc_spr_ummcr1 = 940, |
| 311 | ppc_spr_upmc3 = 941, |
| 312 | ppc_spr_upmc4 = 942, |
| 313 | ppc_spr_zpr = 944, |
| 314 | ppc_spr_pid = 945, |
| 315 | ppc_spr_mmcr0 = 952, |
| 316 | ppc_spr_pmc1 = 953, |
| 317 | ppc_spr_sgr = 953, |
| 318 | ppc_spr_pmc2 = 954, |
| 319 | ppc_spr_dcwr = 954, |
| 320 | ppc_spr_sia = 955, |
| 321 | ppc_spr_mmcr1 = 956, |
| 322 | ppc_spr_pmc3 = 957, |
| 323 | ppc_spr_pmc4 = 958, |
| 324 | ppc_spr_sda = 959, |
| 325 | ppc_spr_tbhu = 972, |
| 326 | ppc_spr_tblu = 973, |
| 327 | ppc_spr_dmiss = 976, |
| 328 | ppc_spr_dcmp = 977, |
| 329 | ppc_spr_hash1 = 978, |
| 330 | ppc_spr_hash2 = 979, |
| 331 | ppc_spr_icdbdr = 979, |
| 332 | ppc_spr_imiss = 980, |
| 333 | ppc_spr_esr = 980, |
| 334 | ppc_spr_icmp = 981, |
| 335 | ppc_spr_dear = 981, |
| 336 | ppc_spr_rpa = 982, |
| 337 | ppc_spr_evpr = 982, |
| 338 | ppc_spr_cdbcr = 983, |
| 339 | ppc_spr_tsr = 984, |
| 340 | ppc_spr_602_tcr = 984, |
| 341 | ppc_spr_403_tcr = 986, |
| 342 | ppc_spr_ibr = 986, |
| 343 | ppc_spr_pit = 987, |
| 344 | ppc_spr_esasrr = 988, |
| 345 | ppc_spr_tbhi = 988, |
| 346 | ppc_spr_tblo = 989, |
| 347 | ppc_spr_srr2 = 990, |
| 348 | ppc_spr_sebr = 990, |
| 349 | ppc_spr_srr3 = 991, |
| 350 | ppc_spr_ser = 991, |
| 351 | ppc_spr_hid0 = 1008, |
| 352 | ppc_spr_dbsr = 1008, |
| 353 | ppc_spr_hid1 = 1009, |
| 354 | ppc_spr_iabr = 1010, |
| 355 | ppc_spr_dbcr = 1010, |
| 356 | ppc_spr_iac1 = 1012, |
| 357 | ppc_spr_dabr = 1013, |
| 358 | ppc_spr_iac2 = 1013, |
| 359 | ppc_spr_dac1 = 1014, |
| 360 | ppc_spr_dac2 = 1015, |
| 361 | ppc_spr_l2cr = 1017, |
| 362 | ppc_spr_dccr = 1018, |
| 363 | ppc_spr_ictc = 1019, |
| 364 | ppc_spr_iccr = 1019, |
| 365 | ppc_spr_thrm1 = 1020, |
| 366 | ppc_spr_pbl1 = 1020, |
| 367 | ppc_spr_thrm2 = 1021, |
| 368 | ppc_spr_pbu1 = 1021, |
| 369 | ppc_spr_thrm3 = 1022, |
| 370 | ppc_spr_pbl2 = 1022, |
| 371 | ppc_spr_fpecr = 1022, |
| 372 | ppc_spr_lt = 1022, |
| 373 | ppc_spr_pir = 1023, |
| 374 | ppc_spr_pbu2 = 1023 |
| 375 | }; |
| 376 | |
| 377 | #endif |