| 1 | /* Target-dependent code for NetBSD/powerpc. |
| 2 | |
| 3 | Copyright (C) 2002-2014 Free Software Foundation, Inc. |
| 4 | |
| 5 | Contributed by Wasabi Systems, Inc. |
| 6 | |
| 7 | This file is part of GDB. |
| 8 | |
| 9 | This program is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3 of the License, or |
| 12 | (at your option) any later version. |
| 13 | |
| 14 | This program is distributed in the hope that it will be useful, |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | GNU General Public License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License |
| 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "gdbtypes.h" |
| 24 | #include "osabi.h" |
| 25 | #include "regcache.h" |
| 26 | #include "regset.h" |
| 27 | #include "trad-frame.h" |
| 28 | #include "tramp-frame.h" |
| 29 | |
| 30 | #include "ppc-tdep.h" |
| 31 | #include "ppcnbsd-tdep.h" |
| 32 | #include "solib-svr4.h" |
| 33 | |
| 34 | /* Register offsets from <machine/reg.h>. */ |
| 35 | struct ppc_reg_offsets ppcnbsd_reg_offsets; |
| 36 | \f |
| 37 | |
| 38 | /* Core file support. */ |
| 39 | |
| 40 | /* NetBSD/powerpc register sets. */ |
| 41 | |
| 42 | const struct regset ppcnbsd_gregset = |
| 43 | { |
| 44 | &ppcnbsd_reg_offsets, |
| 45 | ppc_supply_gregset |
| 46 | }; |
| 47 | |
| 48 | const struct regset ppcnbsd_fpregset = |
| 49 | { |
| 50 | &ppcnbsd_reg_offsets, |
| 51 | ppc_supply_fpregset |
| 52 | }; |
| 53 | |
| 54 | /* Iterate over core file register note sections. */ |
| 55 | |
| 56 | static void |
| 57 | ppcnbsd_iterate_over_regset_sections (struct gdbarch *gdbarch, |
| 58 | iterate_over_regset_sections_cb *cb, |
| 59 | void *cb_data, |
| 60 | const struct regcache *regcache) |
| 61 | { |
| 62 | cb (".reg", 148, &ppcnbsd_gregset, NULL, cb_data); |
| 63 | cb (".reg2", 264, &ppcnbsd_fpregset, NULL, cb_data); |
| 64 | } |
| 65 | \f |
| 66 | |
| 67 | /* NetBSD is confused. It appears that 1.5 was using the correct SVR4 |
| 68 | convention but, 1.6 switched to the below broken convention. For |
| 69 | the moment use the broken convention. Ulgh! */ |
| 70 | |
| 71 | static enum return_value_convention |
| 72 | ppcnbsd_return_value (struct gdbarch *gdbarch, struct value *function, |
| 73 | struct type *valtype, struct regcache *regcache, |
| 74 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 75 | { |
| 76 | #if 0 |
| 77 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
| 78 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) |
| 79 | && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8) |
| 80 | && TYPE_VECTOR (valtype)) |
| 81 | && !(TYPE_LENGTH (valtype) == 1 |
| 82 | || TYPE_LENGTH (valtype) == 2 |
| 83 | || TYPE_LENGTH (valtype) == 4 |
| 84 | || TYPE_LENGTH (valtype) == 8)) |
| 85 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 86 | else |
| 87 | #endif |
| 88 | return ppc_sysv_abi_broken_return_value (gdbarch, function, valtype, |
| 89 | regcache, readbuf, writebuf); |
| 90 | } |
| 91 | \f |
| 92 | |
| 93 | /* Signal trampolines. */ |
| 94 | |
| 95 | static const struct tramp_frame ppcnbsd2_sigtramp; |
| 96 | |
| 97 | static void |
| 98 | ppcnbsd_sigtramp_cache_init (const struct tramp_frame *self, |
| 99 | struct frame_info *this_frame, |
| 100 | struct trad_frame_cache *this_cache, |
| 101 | CORE_ADDR func) |
| 102 | { |
| 103 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 104 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 105 | CORE_ADDR addr, base; |
| 106 | int i; |
| 107 | |
| 108 | base = get_frame_register_unsigned (this_frame, |
| 109 | gdbarch_sp_regnum (gdbarch)); |
| 110 | if (self == &ppcnbsd2_sigtramp) |
| 111 | addr = base + 0x10 + 2 * tdep->wordsize; |
| 112 | else |
| 113 | addr = base + 0x18 + 2 * tdep->wordsize; |
| 114 | for (i = 0; i < ppc_num_gprs; i++, addr += tdep->wordsize) |
| 115 | { |
| 116 | int regnum = i + tdep->ppc_gp0_regnum; |
| 117 | trad_frame_set_reg_addr (this_cache, regnum, addr); |
| 118 | } |
| 119 | trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, addr); |
| 120 | addr += tdep->wordsize; |
| 121 | trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, addr); |
| 122 | addr += tdep->wordsize; |
| 123 | trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, addr); |
| 124 | addr += tdep->wordsize; |
| 125 | trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, addr); |
| 126 | addr += tdep->wordsize; |
| 127 | trad_frame_set_reg_addr (this_cache, gdbarch_pc_regnum (gdbarch), |
| 128 | addr); /* SRR0? */ |
| 129 | addr += tdep->wordsize; |
| 130 | |
| 131 | /* Construct the frame ID using the function start. */ |
| 132 | trad_frame_set_id (this_cache, frame_id_build (base, func)); |
| 133 | } |
| 134 | |
| 135 | static const struct tramp_frame ppcnbsd_sigtramp = |
| 136 | { |
| 137 | SIGTRAMP_FRAME, |
| 138 | 4, |
| 139 | { |
| 140 | { 0x3821fff0, -1 }, /* add r1,r1,-16 */ |
| 141 | { 0x4e800021, -1 }, /* blrl */ |
| 142 | { 0x38610018, -1 }, /* addi r3,r1,24 */ |
| 143 | { 0x38000127, -1 }, /* li r0,295 */ |
| 144 | { 0x44000002, -1 }, /* sc */ |
| 145 | { 0x38000001, -1 }, /* li r0,1 */ |
| 146 | { 0x44000002, -1 }, /* sc */ |
| 147 | { TRAMP_SENTINEL_INSN, -1 } |
| 148 | }, |
| 149 | ppcnbsd_sigtramp_cache_init |
| 150 | }; |
| 151 | |
| 152 | /* NetBSD 2.0 introduced a slightly different signal trampoline. */ |
| 153 | |
| 154 | static const struct tramp_frame ppcnbsd2_sigtramp = |
| 155 | { |
| 156 | SIGTRAMP_FRAME, |
| 157 | 4, |
| 158 | { |
| 159 | { 0x3821fff0, -1 }, /* add r1,r1,-16 */ |
| 160 | { 0x4e800021, -1 }, /* blrl */ |
| 161 | { 0x38610010, -1 }, /* addi r3,r1,16 */ |
| 162 | { 0x38000127, -1 }, /* li r0,295 */ |
| 163 | { 0x44000002, -1 }, /* sc */ |
| 164 | { 0x38000001, -1 }, /* li r0,1 */ |
| 165 | { 0x44000002, -1 }, /* sc */ |
| 166 | { TRAMP_SENTINEL_INSN, -1 } |
| 167 | }, |
| 168 | ppcnbsd_sigtramp_cache_init |
| 169 | }; |
| 170 | \f |
| 171 | |
| 172 | static void |
| 173 | ppcnbsd_init_abi (struct gdbarch_info info, |
| 174 | struct gdbarch *gdbarch) |
| 175 | { |
| 176 | /* For NetBSD, this is an on again, off again thing. Some systems |
| 177 | do use the broken struct convention, and some don't. */ |
| 178 | set_gdbarch_return_value (gdbarch, ppcnbsd_return_value); |
| 179 | |
| 180 | /* NetBSD uses SVR4-style shared libraries. */ |
| 181 | set_solib_svr4_fetch_link_map_offsets |
| 182 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
| 183 | |
| 184 | set_gdbarch_iterate_over_regset_sections |
| 185 | (gdbarch, ppcnbsd_iterate_over_regset_sections); |
| 186 | |
| 187 | tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd_sigtramp); |
| 188 | tramp_frame_prepend_unwinder (gdbarch, &ppcnbsd2_sigtramp); |
| 189 | } |
| 190 | \f |
| 191 | |
| 192 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
| 193 | void _initialize_ppcnbsd_tdep (void); |
| 194 | |
| 195 | void |
| 196 | _initialize_ppcnbsd_tdep (void) |
| 197 | { |
| 198 | gdbarch_register_osabi (bfd_arch_powerpc, 0, GDB_OSABI_NETBSD_ELF, |
| 199 | ppcnbsd_init_abi); |
| 200 | |
| 201 | /* Avoid initializing the register offsets again if they were |
| 202 | already initailized by ppcnbsd-nat.c. */ |
| 203 | if (ppcnbsd_reg_offsets.pc_offset == 0) |
| 204 | { |
| 205 | /* General-purpose registers. */ |
| 206 | ppcnbsd_reg_offsets.r0_offset = 0; |
| 207 | ppcnbsd_reg_offsets.gpr_size = 4; |
| 208 | ppcnbsd_reg_offsets.xr_size = 4; |
| 209 | ppcnbsd_reg_offsets.lr_offset = 128; |
| 210 | ppcnbsd_reg_offsets.cr_offset = 132; |
| 211 | ppcnbsd_reg_offsets.xer_offset = 136; |
| 212 | ppcnbsd_reg_offsets.ctr_offset = 140; |
| 213 | ppcnbsd_reg_offsets.pc_offset = 144; |
| 214 | ppcnbsd_reg_offsets.ps_offset = -1; |
| 215 | ppcnbsd_reg_offsets.mq_offset = -1; |
| 216 | |
| 217 | /* Floating-point registers. */ |
| 218 | ppcnbsd_reg_offsets.f0_offset = 0; |
| 219 | ppcnbsd_reg_offsets.fpscr_offset = 256; |
| 220 | ppcnbsd_reg_offsets.fpscr_size = 4; |
| 221 | |
| 222 | /* AltiVec registers. */ |
| 223 | ppcnbsd_reg_offsets.vr0_offset = 0; |
| 224 | ppcnbsd_reg_offsets.vrsave_offset = 512; |
| 225 | ppcnbsd_reg_offsets.vscr_offset = 524; |
| 226 | } |
| 227 | } |