| 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
| 2 | Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of GDB. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 20 | Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | #include "defs.h" |
| 23 | #include "frame.h" |
| 24 | #include "inferior.h" |
| 25 | #include "target.h" |
| 26 | #include "gdbarch.h" |
| 27 | #include "gdbcmd.h" |
| 28 | |
| 29 | /* |
| 30 | * DATA STRUCTURE |
| 31 | * |
| 32 | * Here is the actual register cache. |
| 33 | */ |
| 34 | |
| 35 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
| 36 | recording if the register values have been changed (eg. by the |
| 37 | user). Therefore all registers must be written back to the |
| 38 | target when appropriate. */ |
| 39 | |
| 40 | /* REGISTERS contains the cached register values (in target byte order). */ |
| 41 | |
| 42 | char *registers; |
| 43 | |
| 44 | /* REGISTER_VALID is 0 if the register needs to be fetched, |
| 45 | 1 if it has been fetched, and |
| 46 | -1 if the register value was not available. |
| 47 | "Not available" means don't try to fetch it again. */ |
| 48 | |
| 49 | signed char *register_valid; |
| 50 | |
| 51 | /* The thread/process associated with the current set of registers. |
| 52 | For now, -1 is special, and means `no current process'. */ |
| 53 | |
| 54 | static int registers_pid = -1; |
| 55 | |
| 56 | /* |
| 57 | * FUNCTIONS: |
| 58 | */ |
| 59 | |
| 60 | /* REGISTER_CACHED() |
| 61 | |
| 62 | Returns 0 if the value is not in the cache (needs fetch). |
| 63 | >0 if the value is in the cache. |
| 64 | <0 if the value is permanently unavailable (don't ask again). */ |
| 65 | |
| 66 | int |
| 67 | register_cached (int regnum) |
| 68 | { |
| 69 | return register_valid[regnum]; |
| 70 | } |
| 71 | |
| 72 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
| 73 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ |
| 74 | |
| 75 | void |
| 76 | set_register_cached (int regnum, int state) |
| 77 | { |
| 78 | register_valid[regnum] = state; |
| 79 | } |
| 80 | |
| 81 | /* REGISTER_CHANGED |
| 82 | |
| 83 | invalidate a single register REGNUM in the cache */ |
| 84 | void |
| 85 | register_changed (int regnum) |
| 86 | { |
| 87 | set_register_cached (regnum, 0); |
| 88 | } |
| 89 | |
| 90 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, |
| 91 | else return a pointer to the start of the cache buffer. */ |
| 92 | |
| 93 | char * |
| 94 | register_buffer (int regnum) |
| 95 | { |
| 96 | if (regnum < 0) |
| 97 | return registers; |
| 98 | else |
| 99 | return ®isters[REGISTER_BYTE (regnum)]; |
| 100 | } |
| 101 | |
| 102 | /* Return whether register REGNUM is a real register. */ |
| 103 | |
| 104 | static int |
| 105 | real_register (int regnum) |
| 106 | { |
| 107 | return regnum >= 0 && regnum < NUM_REGS; |
| 108 | } |
| 109 | |
| 110 | /* Return whether register REGNUM is a pseudo register. */ |
| 111 | |
| 112 | static int |
| 113 | pseudo_register (int regnum) |
| 114 | { |
| 115 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; |
| 116 | } |
| 117 | |
| 118 | /* Fetch register REGNUM into the cache. */ |
| 119 | |
| 120 | static void |
| 121 | fetch_register (int regnum) |
| 122 | { |
| 123 | if (real_register (regnum)) |
| 124 | target_fetch_registers (regnum); |
| 125 | else if (pseudo_register (regnum)) |
| 126 | FETCH_PSEUDO_REGISTER (regnum); |
| 127 | } |
| 128 | |
| 129 | /* Write register REGNUM cached value to the target. */ |
| 130 | |
| 131 | static void |
| 132 | store_register (int regnum) |
| 133 | { |
| 134 | if (real_register (regnum)) |
| 135 | target_store_registers (regnum); |
| 136 | else if (pseudo_register (regnum)) |
| 137 | STORE_PSEUDO_REGISTER (regnum); |
| 138 | } |
| 139 | |
| 140 | /* FIND_SAVED_REGISTER () |
| 141 | |
| 142 | Return the address in which frame FRAME's value of register REGNUM |
| 143 | has been saved in memory. Or return zero if it has not been saved. |
| 144 | If REGNUM specifies the SP, the value we return is actually |
| 145 | the SP value, not an address where it was saved. */ |
| 146 | |
| 147 | CORE_ADDR |
| 148 | find_saved_register (struct frame_info *frame, int regnum) |
| 149 | { |
| 150 | register struct frame_info *frame1 = NULL; |
| 151 | register CORE_ADDR addr = 0; |
| 152 | |
| 153 | if (frame == NULL) /* No regs saved if want current frame */ |
| 154 | return 0; |
| 155 | |
| 156 | #ifdef HAVE_REGISTER_WINDOWS |
| 157 | /* We assume that a register in a register window will only be saved |
| 158 | in one place (since the name changes and/or disappears as you go |
| 159 | towards inner frames), so we only call get_frame_saved_regs on |
| 160 | the current frame. This is directly in contradiction to the |
| 161 | usage below, which assumes that registers used in a frame must be |
| 162 | saved in a lower (more interior) frame. This change is a result |
| 163 | of working on a register window machine; get_frame_saved_regs |
| 164 | always returns the registers saved within a frame, within the |
| 165 | context (register namespace) of that frame. */ |
| 166 | |
| 167 | /* However, note that we don't want this to return anything if |
| 168 | nothing is saved (if there's a frame inside of this one). Also, |
| 169 | callers to this routine asking for the stack pointer want the |
| 170 | stack pointer saved for *this* frame; this is returned from the |
| 171 | next frame. */ |
| 172 | |
| 173 | if (REGISTER_IN_WINDOW_P (regnum)) |
| 174 | { |
| 175 | frame1 = get_next_frame (frame); |
| 176 | if (!frame1) |
| 177 | return 0; /* Registers of this frame are active. */ |
| 178 | |
| 179 | /* Get the SP from the next frame in; it will be this |
| 180 | current frame. */ |
| 181 | if (regnum != SP_REGNUM) |
| 182 | frame1 = frame; |
| 183 | |
| 184 | FRAME_INIT_SAVED_REGS (frame1); |
| 185 | return frame1->saved_regs[regnum]; /* ... which might be zero */ |
| 186 | } |
| 187 | #endif /* HAVE_REGISTER_WINDOWS */ |
| 188 | |
| 189 | /* Note that this next routine assumes that registers used in |
| 190 | frame x will be saved only in the frame that x calls and |
| 191 | frames interior to it. This is not true on the sparc, but the |
| 192 | above macro takes care of it, so we should be all right. */ |
| 193 | while (1) |
| 194 | { |
| 195 | QUIT; |
| 196 | frame1 = get_prev_frame (frame1); |
| 197 | if (frame1 == 0 || frame1 == frame) |
| 198 | break; |
| 199 | FRAME_INIT_SAVED_REGS (frame1); |
| 200 | if (frame1->saved_regs[regnum]) |
| 201 | addr = frame1->saved_regs[regnum]; |
| 202 | } |
| 203 | |
| 204 | return addr; |
| 205 | } |
| 206 | |
| 207 | /* DEFAULT_GET_SAVED_REGISTER () |
| 208 | |
| 209 | Find register number REGNUM relative to FRAME and put its (raw, |
| 210 | target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the |
| 211 | variable was optimized out (and thus can't be fetched). Set *LVAL |
| 212 | to lval_memory, lval_register, or not_lval, depending on whether |
| 213 | the value was fetched from memory, from a register, or in a strange |
| 214 | and non-modifiable way (e.g. a frame pointer which was calculated |
| 215 | rather than fetched). Set *ADDRP to the address, either in memory |
| 216 | on as a REGISTER_BYTE offset into the registers array. |
| 217 | |
| 218 | Note that this implementation never sets *LVAL to not_lval. But |
| 219 | it can be replaced by defining GET_SAVED_REGISTER and supplying |
| 220 | your own. |
| 221 | |
| 222 | The argument RAW_BUFFER must point to aligned memory. */ |
| 223 | |
| 224 | static void |
| 225 | default_get_saved_register (char *raw_buffer, |
| 226 | int *optimized, |
| 227 | CORE_ADDR *addrp, |
| 228 | struct frame_info *frame, |
| 229 | int regnum, |
| 230 | enum lval_type *lval) |
| 231 | { |
| 232 | CORE_ADDR addr; |
| 233 | |
| 234 | if (!target_has_registers) |
| 235 | error ("No registers."); |
| 236 | |
| 237 | /* Normal systems don't optimize out things with register numbers. */ |
| 238 | if (optimized != NULL) |
| 239 | *optimized = 0; |
| 240 | addr = find_saved_register (frame, regnum); |
| 241 | if (addr != 0) |
| 242 | { |
| 243 | if (lval != NULL) |
| 244 | *lval = lval_memory; |
| 245 | if (regnum == SP_REGNUM) |
| 246 | { |
| 247 | if (raw_buffer != NULL) |
| 248 | { |
| 249 | /* Put it back in target format. */ |
| 250 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), |
| 251 | (LONGEST) addr); |
| 252 | } |
| 253 | if (addrp != NULL) |
| 254 | *addrp = 0; |
| 255 | return; |
| 256 | } |
| 257 | if (raw_buffer != NULL) |
| 258 | target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum)); |
| 259 | } |
| 260 | else |
| 261 | { |
| 262 | if (lval != NULL) |
| 263 | *lval = lval_register; |
| 264 | addr = REGISTER_BYTE (regnum); |
| 265 | if (raw_buffer != NULL) |
| 266 | read_register_gen (regnum, raw_buffer); |
| 267 | } |
| 268 | if (addrp != NULL) |
| 269 | *addrp = addr; |
| 270 | } |
| 271 | |
| 272 | #if !defined (GET_SAVED_REGISTER) |
| 273 | #define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ |
| 274 | default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval) |
| 275 | #endif |
| 276 | |
| 277 | void |
| 278 | get_saved_register (char *raw_buffer, |
| 279 | int *optimized, |
| 280 | CORE_ADDR *addrp, |
| 281 | struct frame_info *frame, |
| 282 | int regnum, |
| 283 | enum lval_type *lval) |
| 284 | { |
| 285 | GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval); |
| 286 | } |
| 287 | |
| 288 | /* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME |
| 289 | |
| 290 | Copy the bytes of register REGNUM, relative to the input stack frame, |
| 291 | into our memory at MYADDR, in target byte order. |
| 292 | The number of bytes copied is REGISTER_RAW_SIZE (REGNUM). |
| 293 | |
| 294 | Returns 1 if could not be read, 0 if could. */ |
| 295 | |
| 296 | /* FIXME: This function increases the confusion between FP_REGNUM |
| 297 | and the virtual/pseudo-frame pointer. */ |
| 298 | |
| 299 | static int |
| 300 | read_relative_register_raw_bytes_for_frame (int regnum, |
| 301 | char *myaddr, |
| 302 | struct frame_info *frame) |
| 303 | { |
| 304 | int optim; |
| 305 | if (regnum == FP_REGNUM && frame) |
| 306 | { |
| 307 | /* Put it back in target format. */ |
| 308 | store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM), |
| 309 | (LONGEST) FRAME_FP (frame)); |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame, |
| 315 | regnum, (enum lval_type *) NULL); |
| 316 | |
| 317 | if (register_cached (regnum) < 0) |
| 318 | return 1; /* register value not available */ |
| 319 | |
| 320 | return optim; |
| 321 | } |
| 322 | |
| 323 | /* READ_RELATIVE_REGISTER_RAW_BYTES |
| 324 | |
| 325 | Copy the bytes of register REGNUM, relative to the current stack |
| 326 | frame, into our memory at MYADDR, in target byte order. |
| 327 | The number of bytes copied is REGISTER_RAW_SIZE (REGNUM). |
| 328 | |
| 329 | Returns 1 if could not be read, 0 if could. */ |
| 330 | |
| 331 | int |
| 332 | read_relative_register_raw_bytes (int regnum, char *myaddr) |
| 333 | { |
| 334 | return read_relative_register_raw_bytes_for_frame (regnum, myaddr, |
| 335 | selected_frame); |
| 336 | } |
| 337 | |
| 338 | |
| 339 | /* Low level examining and depositing of registers. |
| 340 | |
| 341 | The caller is responsible for making sure that the inferior is |
| 342 | stopped before calling the fetching routines, or it will get |
| 343 | garbage. (a change from GDB version 3, in which the caller got the |
| 344 | value from the last stop). */ |
| 345 | |
| 346 | /* REGISTERS_CHANGED () |
| 347 | |
| 348 | Indicate that registers may have changed, so invalidate the cache. */ |
| 349 | |
| 350 | void |
| 351 | registers_changed (void) |
| 352 | { |
| 353 | int i; |
| 354 | |
| 355 | registers_pid = -1; |
| 356 | |
| 357 | /* Force cleanup of any alloca areas if using C alloca instead of |
| 358 | a builtin alloca. This particular call is used to clean up |
| 359 | areas allocated by low level target code which may build up |
| 360 | during lengthy interactions between gdb and the target before |
| 361 | gdb gives control to the user (ie watchpoints). */ |
| 362 | alloca (0); |
| 363 | |
| 364 | for (i = 0; i < ARCH_NUM_REGS; i++) |
| 365 | set_register_cached (i, 0); |
| 366 | |
| 367 | /* Assume that if all the hardware regs have changed, |
| 368 | then so have the pseudo-registers. */ |
| 369 | for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++) |
| 370 | set_register_cached (i, 0); |
| 371 | |
| 372 | if (registers_changed_hook) |
| 373 | registers_changed_hook (); |
| 374 | } |
| 375 | |
| 376 | /* REGISTERS_FETCHED () |
| 377 | |
| 378 | Indicate that all registers have been fetched, so mark them all valid. */ |
| 379 | |
| 380 | |
| 381 | void |
| 382 | registers_fetched (void) |
| 383 | { |
| 384 | int i; |
| 385 | |
| 386 | for (i = 0; i < ARCH_NUM_REGS; i++) |
| 387 | set_register_cached (i, 1); |
| 388 | /* Do not assume that the pseudo-regs have also been fetched. |
| 389 | Fetching all real regs might not account for all pseudo-regs. */ |
| 390 | } |
| 391 | |
| 392 | /* read_register_bytes and write_register_bytes are generally a *BAD* |
| 393 | idea. They are inefficient because they need to check for partial |
| 394 | updates, which can only be done by scanning through all of the |
| 395 | registers and seeing if the bytes that are being read/written fall |
| 396 | inside of an invalid register. [The main reason this is necessary |
| 397 | is that register sizes can vary, so a simple index won't suffice.] |
| 398 | It is far better to call read_register_gen and write_register_gen |
| 399 | if you want to get at the raw register contents, as it only takes a |
| 400 | regnum as an argument, and therefore can't do a partial register |
| 401 | update. |
| 402 | |
| 403 | Prior to the recent fixes to check for partial updates, both read |
| 404 | and write_register_bytes always checked to see if any registers |
| 405 | were stale, and then called target_fetch_registers (-1) to update |
| 406 | the whole set. This caused really slowed things down for remote |
| 407 | targets. */ |
| 408 | |
| 409 | /* Copy INLEN bytes of consecutive data from registers |
| 410 | starting with the INREGBYTE'th byte of register data |
| 411 | into memory at MYADDR. */ |
| 412 | |
| 413 | void |
| 414 | read_register_bytes (int inregbyte, char *myaddr, int inlen) |
| 415 | { |
| 416 | int inregend = inregbyte + inlen; |
| 417 | int regnum; |
| 418 | |
| 419 | if (registers_pid != inferior_pid) |
| 420 | { |
| 421 | registers_changed (); |
| 422 | registers_pid = inferior_pid; |
| 423 | } |
| 424 | |
| 425 | /* See if we are trying to read bytes from out-of-date registers. If so, |
| 426 | update just those registers. */ |
| 427 | |
| 428 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
| 429 | { |
| 430 | int regstart, regend; |
| 431 | |
| 432 | if (register_cached (regnum)) |
| 433 | continue; |
| 434 | |
| 435 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') |
| 436 | continue; |
| 437 | |
| 438 | regstart = REGISTER_BYTE (regnum); |
| 439 | regend = regstart + REGISTER_RAW_SIZE (regnum); |
| 440 | |
| 441 | if (regend <= inregbyte || inregend <= regstart) |
| 442 | /* The range the user wants to read doesn't overlap with regnum. */ |
| 443 | continue; |
| 444 | |
| 445 | /* We've found an uncached register where at least one byte will be read. |
| 446 | Update it from the target. */ |
| 447 | fetch_register (regnum); |
| 448 | |
| 449 | if (!register_cached (regnum)) |
| 450 | { |
| 451 | /* Sometimes pseudoregs are never marked valid, so that they |
| 452 | will be fetched every time (it can be complicated to know |
| 453 | if a pseudoreg is valid, while "fetching" them can be cheap). |
| 454 | */ |
| 455 | if (regnum < NUM_REGS) |
| 456 | error ("read_register_bytes: Couldn't update register %d.", regnum); |
| 457 | } |
| 458 | } |
| 459 | |
| 460 | if (myaddr != NULL) |
| 461 | memcpy (myaddr, register_buffer (-1) + inregbyte, inlen); |
| 462 | } |
| 463 | |
| 464 | /* Read register REGNUM into memory at MYADDR, which must be large |
| 465 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the |
| 466 | register is known to be the size of a CORE_ADDR or smaller, |
| 467 | read_register can be used instead. */ |
| 468 | |
| 469 | void |
| 470 | read_register_gen (int regnum, char *myaddr) |
| 471 | { |
| 472 | if (registers_pid != inferior_pid) |
| 473 | { |
| 474 | registers_changed (); |
| 475 | registers_pid = inferior_pid; |
| 476 | } |
| 477 | |
| 478 | if (!register_cached (regnum)) |
| 479 | fetch_register (regnum); |
| 480 | |
| 481 | memcpy (myaddr, register_buffer (regnum), |
| 482 | REGISTER_RAW_SIZE (regnum)); |
| 483 | } |
| 484 | |
| 485 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
| 486 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ |
| 487 | |
| 488 | /* Registers we shouldn't try to store. */ |
| 489 | #if !defined (CANNOT_STORE_REGISTER) |
| 490 | #define CANNOT_STORE_REGISTER(regnum) 0 |
| 491 | #endif |
| 492 | |
| 493 | void |
| 494 | write_register_gen (int regnum, char *myaddr) |
| 495 | { |
| 496 | int size; |
| 497 | |
| 498 | /* On the sparc, writing %g0 is a no-op, so we don't even want to |
| 499 | change the registers array if something writes to this register. */ |
| 500 | if (CANNOT_STORE_REGISTER (regnum)) |
| 501 | return; |
| 502 | |
| 503 | if (registers_pid != inferior_pid) |
| 504 | { |
| 505 | registers_changed (); |
| 506 | registers_pid = inferior_pid; |
| 507 | } |
| 508 | |
| 509 | size = REGISTER_RAW_SIZE (regnum); |
| 510 | |
| 511 | /* If we have a valid copy of the register, and new value == old value, |
| 512 | then don't bother doing the actual store. */ |
| 513 | |
| 514 | if (register_cached (regnum) |
| 515 | && memcmp (register_buffer (regnum), myaddr, size) == 0) |
| 516 | return; |
| 517 | |
| 518 | if (real_register (regnum)) |
| 519 | target_prepare_to_store (); |
| 520 | |
| 521 | memcpy (register_buffer (regnum), myaddr, size); |
| 522 | |
| 523 | set_register_cached (regnum, 1); |
| 524 | store_register (regnum); |
| 525 | } |
| 526 | |
| 527 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
| 528 | into registers starting with the MYREGSTART'th byte of register data. */ |
| 529 | |
| 530 | void |
| 531 | write_register_bytes (int myregstart, char *myaddr, int inlen) |
| 532 | { |
| 533 | int myregend = myregstart + inlen; |
| 534 | int regnum; |
| 535 | |
| 536 | target_prepare_to_store (); |
| 537 | |
| 538 | /* Scan through the registers updating any that are covered by the |
| 539 | range myregstart<=>myregend using write_register_gen, which does |
| 540 | nice things like handling threads, and avoiding updates when the |
| 541 | new and old contents are the same. */ |
| 542 | |
| 543 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
| 544 | { |
| 545 | int regstart, regend; |
| 546 | |
| 547 | regstart = REGISTER_BYTE (regnum); |
| 548 | regend = regstart + REGISTER_RAW_SIZE (regnum); |
| 549 | |
| 550 | /* Is this register completely outside the range the user is writing? */ |
| 551 | if (myregend <= regstart || regend <= myregstart) |
| 552 | /* do nothing */ ; |
| 553 | |
| 554 | /* Is this register completely within the range the user is writing? */ |
| 555 | else if (myregstart <= regstart && regend <= myregend) |
| 556 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
| 557 | |
| 558 | /* The register partially overlaps the range being written. */ |
| 559 | else |
| 560 | { |
| 561 | char regbuf[MAX_REGISTER_RAW_SIZE]; |
| 562 | /* What's the overlap between this register's bytes and |
| 563 | those the caller wants to write? */ |
| 564 | int overlapstart = max (regstart, myregstart); |
| 565 | int overlapend = min (regend, myregend); |
| 566 | |
| 567 | /* We may be doing a partial update of an invalid register. |
| 568 | Update it from the target before scribbling on it. */ |
| 569 | read_register_gen (regnum, regbuf); |
| 570 | |
| 571 | memcpy (registers + overlapstart, |
| 572 | myaddr + (overlapstart - myregstart), |
| 573 | overlapend - overlapstart); |
| 574 | |
| 575 | store_register (regnum); |
| 576 | } |
| 577 | } |
| 578 | } |
| 579 | |
| 580 | |
| 581 | /* Return the contents of register REGNUM as an unsigned integer. */ |
| 582 | |
| 583 | ULONGEST |
| 584 | read_register (int regnum) |
| 585 | { |
| 586 | if (registers_pid != inferior_pid) |
| 587 | { |
| 588 | registers_changed (); |
| 589 | registers_pid = inferior_pid; |
| 590 | } |
| 591 | |
| 592 | if (!register_cached (regnum)) |
| 593 | fetch_register (regnum); |
| 594 | |
| 595 | return (extract_unsigned_integer (register_buffer (regnum), |
| 596 | REGISTER_RAW_SIZE (regnum))); |
| 597 | } |
| 598 | |
| 599 | ULONGEST |
| 600 | read_register_pid (int regnum, int pid) |
| 601 | { |
| 602 | int save_pid; |
| 603 | CORE_ADDR retval; |
| 604 | |
| 605 | if (pid == inferior_pid) |
| 606 | return read_register (regnum); |
| 607 | |
| 608 | save_pid = inferior_pid; |
| 609 | |
| 610 | inferior_pid = pid; |
| 611 | |
| 612 | retval = read_register (regnum); |
| 613 | |
| 614 | inferior_pid = save_pid; |
| 615 | |
| 616 | return retval; |
| 617 | } |
| 618 | |
| 619 | /* Return the contents of register REGNUM as a signed integer. */ |
| 620 | |
| 621 | LONGEST |
| 622 | read_signed_register (int regnum) |
| 623 | { |
| 624 | if (registers_pid != inferior_pid) |
| 625 | { |
| 626 | registers_changed (); |
| 627 | registers_pid = inferior_pid; |
| 628 | } |
| 629 | |
| 630 | if (!register_cached (regnum)) |
| 631 | fetch_register (regnum); |
| 632 | |
| 633 | return (extract_signed_integer (register_buffer (regnum), |
| 634 | REGISTER_RAW_SIZE (regnum))); |
| 635 | } |
| 636 | |
| 637 | LONGEST |
| 638 | read_signed_register_pid (int regnum, int pid) |
| 639 | { |
| 640 | int save_pid; |
| 641 | LONGEST retval; |
| 642 | |
| 643 | if (pid == inferior_pid) |
| 644 | return read_signed_register (regnum); |
| 645 | |
| 646 | save_pid = inferior_pid; |
| 647 | |
| 648 | inferior_pid = pid; |
| 649 | |
| 650 | retval = read_signed_register (regnum); |
| 651 | |
| 652 | inferior_pid = save_pid; |
| 653 | |
| 654 | return retval; |
| 655 | } |
| 656 | |
| 657 | /* Store VALUE into the raw contents of register number REGNUM. */ |
| 658 | |
| 659 | void |
| 660 | write_register (int regnum, LONGEST val) |
| 661 | { |
| 662 | PTR buf; |
| 663 | int size; |
| 664 | |
| 665 | /* On the sparc, writing %g0 is a no-op, so we don't even want to |
| 666 | change the registers array if something writes to this register. */ |
| 667 | if (CANNOT_STORE_REGISTER (regnum)) |
| 668 | return; |
| 669 | |
| 670 | if (registers_pid != inferior_pid) |
| 671 | { |
| 672 | registers_changed (); |
| 673 | registers_pid = inferior_pid; |
| 674 | } |
| 675 | |
| 676 | size = REGISTER_RAW_SIZE (regnum); |
| 677 | buf = alloca (size); |
| 678 | store_signed_integer (buf, size, (LONGEST) val); |
| 679 | |
| 680 | /* If we have a valid copy of the register, and new value == old value, |
| 681 | then don't bother doing the actual store. */ |
| 682 | |
| 683 | if (register_cached (regnum) |
| 684 | && memcmp (register_buffer (regnum), buf, size) == 0) |
| 685 | return; |
| 686 | |
| 687 | if (real_register (regnum)) |
| 688 | target_prepare_to_store (); |
| 689 | |
| 690 | memcpy (register_buffer (regnum), buf, size); |
| 691 | |
| 692 | set_register_cached (regnum, 1); |
| 693 | store_register (regnum); |
| 694 | } |
| 695 | |
| 696 | void |
| 697 | write_register_pid (int regnum, CORE_ADDR val, int pid) |
| 698 | { |
| 699 | int save_pid; |
| 700 | |
| 701 | if (pid == inferior_pid) |
| 702 | { |
| 703 | write_register (regnum, val); |
| 704 | return; |
| 705 | } |
| 706 | |
| 707 | save_pid = inferior_pid; |
| 708 | |
| 709 | inferior_pid = pid; |
| 710 | |
| 711 | write_register (regnum, val); |
| 712 | |
| 713 | inferior_pid = save_pid; |
| 714 | } |
| 715 | |
| 716 | /* SUPPLY_REGISTER() |
| 717 | |
| 718 | Record that register REGNUM contains VAL. This is used when the |
| 719 | value is obtained from the inferior or core dump, so there is no |
| 720 | need to store the value there. |
| 721 | |
| 722 | If VAL is a NULL pointer, then it's probably an unsupported register. |
| 723 | We just set its value to all zeros. We might want to record this |
| 724 | fact, and report it to the users of read_register and friends. */ |
| 725 | |
| 726 | void |
| 727 | supply_register (int regnum, char *val) |
| 728 | { |
| 729 | #if 1 |
| 730 | if (registers_pid != inferior_pid) |
| 731 | { |
| 732 | registers_changed (); |
| 733 | registers_pid = inferior_pid; |
| 734 | } |
| 735 | #endif |
| 736 | |
| 737 | set_register_cached (regnum, 1); |
| 738 | if (val) |
| 739 | memcpy (register_buffer (regnum), val, |
| 740 | REGISTER_RAW_SIZE (regnum)); |
| 741 | else |
| 742 | memset (register_buffer (regnum), '\000', |
| 743 | REGISTER_RAW_SIZE (regnum)); |
| 744 | |
| 745 | /* On some architectures, e.g. HPPA, there are a few stray bits in |
| 746 | some registers, that the rest of the code would like to ignore. */ |
| 747 | |
| 748 | #ifdef CLEAN_UP_REGISTER_VALUE |
| 749 | CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum)); |
| 750 | #endif |
| 751 | } |
| 752 | |
| 753 | /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc. |
| 754 | Special handling for registers PC, SP, and FP. */ |
| 755 | |
| 756 | /* This routine is getting awfully cluttered with #if's. It's probably |
| 757 | time to turn this into READ_PC and define it in the tm.h file. |
| 758 | Ditto for write_pc. |
| 759 | |
| 760 | 1999-06-08: The following were re-written so that it assumes the |
| 761 | existence of a TARGET_READ_PC et.al. macro. A default generic |
| 762 | version of that macro is made available where needed. |
| 763 | |
| 764 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled |
| 765 | by the multi-arch framework, it will eventually be possible to |
| 766 | eliminate the intermediate read_pc_pid(). The client would call |
| 767 | TARGET_READ_PC directly. (cagney). */ |
| 768 | |
| 769 | CORE_ADDR |
| 770 | generic_target_read_pc (int pid) |
| 771 | { |
| 772 | #ifdef PC_REGNUM |
| 773 | if (PC_REGNUM >= 0) |
| 774 | { |
| 775 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid)); |
| 776 | return pc_val; |
| 777 | } |
| 778 | #endif |
| 779 | internal_error ("generic_target_read_pc"); |
| 780 | return 0; |
| 781 | } |
| 782 | |
| 783 | CORE_ADDR |
| 784 | read_pc_pid (int pid) |
| 785 | { |
| 786 | int saved_inferior_pid; |
| 787 | CORE_ADDR pc_val; |
| 788 | |
| 789 | /* In case pid != inferior_pid. */ |
| 790 | saved_inferior_pid = inferior_pid; |
| 791 | inferior_pid = pid; |
| 792 | |
| 793 | pc_val = TARGET_READ_PC (pid); |
| 794 | |
| 795 | inferior_pid = saved_inferior_pid; |
| 796 | return pc_val; |
| 797 | } |
| 798 | |
| 799 | CORE_ADDR |
| 800 | read_pc (void) |
| 801 | { |
| 802 | return read_pc_pid (inferior_pid); |
| 803 | } |
| 804 | |
| 805 | void |
| 806 | generic_target_write_pc (CORE_ADDR pc, int pid) |
| 807 | { |
| 808 | #ifdef PC_REGNUM |
| 809 | if (PC_REGNUM >= 0) |
| 810 | write_register_pid (PC_REGNUM, pc, pid); |
| 811 | if (NPC_REGNUM >= 0) |
| 812 | write_register_pid (NPC_REGNUM, pc + 4, pid); |
| 813 | if (NNPC_REGNUM >= 0) |
| 814 | write_register_pid (NNPC_REGNUM, pc + 8, pid); |
| 815 | #else |
| 816 | internal_error ("generic_target_write_pc"); |
| 817 | #endif |
| 818 | } |
| 819 | |
| 820 | void |
| 821 | write_pc_pid (CORE_ADDR pc, int pid) |
| 822 | { |
| 823 | int saved_inferior_pid; |
| 824 | |
| 825 | /* In case pid != inferior_pid. */ |
| 826 | saved_inferior_pid = inferior_pid; |
| 827 | inferior_pid = pid; |
| 828 | |
| 829 | TARGET_WRITE_PC (pc, pid); |
| 830 | |
| 831 | inferior_pid = saved_inferior_pid; |
| 832 | } |
| 833 | |
| 834 | void |
| 835 | write_pc (CORE_ADDR pc) |
| 836 | { |
| 837 | write_pc_pid (pc, inferior_pid); |
| 838 | } |
| 839 | |
| 840 | /* Cope with strage ways of getting to the stack and frame pointers */ |
| 841 | |
| 842 | CORE_ADDR |
| 843 | generic_target_read_sp (void) |
| 844 | { |
| 845 | #ifdef SP_REGNUM |
| 846 | if (SP_REGNUM >= 0) |
| 847 | return read_register (SP_REGNUM); |
| 848 | #endif |
| 849 | internal_error ("generic_target_read_sp"); |
| 850 | } |
| 851 | |
| 852 | CORE_ADDR |
| 853 | read_sp (void) |
| 854 | { |
| 855 | return TARGET_READ_SP (); |
| 856 | } |
| 857 | |
| 858 | void |
| 859 | generic_target_write_sp (CORE_ADDR val) |
| 860 | { |
| 861 | #ifdef SP_REGNUM |
| 862 | if (SP_REGNUM >= 0) |
| 863 | { |
| 864 | write_register (SP_REGNUM, val); |
| 865 | return; |
| 866 | } |
| 867 | #endif |
| 868 | internal_error ("generic_target_write_sp"); |
| 869 | } |
| 870 | |
| 871 | void |
| 872 | write_sp (CORE_ADDR val) |
| 873 | { |
| 874 | TARGET_WRITE_SP (val); |
| 875 | } |
| 876 | |
| 877 | CORE_ADDR |
| 878 | generic_target_read_fp (void) |
| 879 | { |
| 880 | #ifdef FP_REGNUM |
| 881 | if (FP_REGNUM >= 0) |
| 882 | return read_register (FP_REGNUM); |
| 883 | #endif |
| 884 | internal_error ("generic_target_read_fp"); |
| 885 | } |
| 886 | |
| 887 | CORE_ADDR |
| 888 | read_fp (void) |
| 889 | { |
| 890 | return TARGET_READ_FP (); |
| 891 | } |
| 892 | |
| 893 | void |
| 894 | generic_target_write_fp (CORE_ADDR val) |
| 895 | { |
| 896 | #ifdef FP_REGNUM |
| 897 | if (FP_REGNUM >= 0) |
| 898 | { |
| 899 | write_register (FP_REGNUM, val); |
| 900 | return; |
| 901 | } |
| 902 | #endif |
| 903 | internal_error ("generic_target_write_fp"); |
| 904 | } |
| 905 | |
| 906 | void |
| 907 | write_fp (CORE_ADDR val) |
| 908 | { |
| 909 | TARGET_WRITE_FP (val); |
| 910 | } |
| 911 | |
| 912 | /* ARGSUSED */ |
| 913 | static void |
| 914 | reg_flush_command (char *command, int from_tty) |
| 915 | { |
| 916 | /* Force-flush the register cache. */ |
| 917 | registers_changed (); |
| 918 | if (from_tty) |
| 919 | printf_filtered ("Register cache flushed.\n"); |
| 920 | } |
| 921 | |
| 922 | |
| 923 | static void |
| 924 | build_regcache (void) |
| 925 | { |
| 926 | /* We allocate some extra slop since we do a lot of memcpy's around |
| 927 | `registers', and failing-soft is better than failing hard. */ |
| 928 | int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256; |
| 929 | int sizeof_register_valid = |
| 930 | (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid); |
| 931 | registers = xmalloc (sizeof_registers); |
| 932 | memset (registers, 0, sizeof_registers); |
| 933 | register_valid = xmalloc (sizeof_register_valid); |
| 934 | memset (register_valid, 0, sizeof_register_valid); |
| 935 | } |
| 936 | |
| 937 | void |
| 938 | _initialize_regcache (void) |
| 939 | { |
| 940 | build_regcache (); |
| 941 | |
| 942 | register_gdbarch_swap (®isters, sizeof (registers), NULL); |
| 943 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); |
| 944 | register_gdbarch_swap (NULL, 0, build_regcache); |
| 945 | |
| 946 | add_com ("flushregs", class_maintenance, reg_flush_command, |
| 947 | "Force gdb to flush its register cache (maintainer command)"); |
| 948 | } |