| 1 | /* MIPS-dependent portions of the RPC protocol |
| 2 | used with a VxWorks target |
| 3 | |
| 4 | Contributed by Wind River Systems. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 2 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software |
| 20 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 21 | |
| 22 | #include <stdio.h> |
| 23 | #include "defs.h" |
| 24 | |
| 25 | #include "vx-share/regPacket.h" |
| 26 | #include "frame.h" |
| 27 | #include "inferior.h" |
| 28 | #include "wait.h" |
| 29 | #include "target.h" |
| 30 | #include "gdbcore.h" |
| 31 | #include "command.h" |
| 32 | #include "symtab.h" |
| 33 | #include "symfile.h" /* for struct complaint */ |
| 34 | |
| 35 | #include "gdb_string.h" |
| 36 | #include <errno.h> |
| 37 | #include <signal.h> |
| 38 | #include <fcntl.h> |
| 39 | #include <sys/types.h> |
| 40 | #include <sys/time.h> |
| 41 | #include <sys/socket.h> |
| 42 | #include <rpc/rpc.h> |
| 43 | #include <sys/time.h> /* UTek's <rpc/rpc.h> doesn't #incl this */ |
| 44 | #include <netdb.h> |
| 45 | #include "vx-share/ptrace.h" |
| 46 | #include "vx-share/xdr_ptrace.h" |
| 47 | #include "vx-share/xdr_ld.h" |
| 48 | #include "vx-share/xdr_rdb.h" |
| 49 | #include "vx-share/dbgRpcLib.h" |
| 50 | |
| 51 | /* get rid of value.h if possible */ |
| 52 | #include <value.h> |
| 53 | #include <symtab.h> |
| 54 | |
| 55 | /* Flag set if target has fpu */ |
| 56 | |
| 57 | extern int target_has_fp; |
| 58 | |
| 59 | /* Generic register read/write routines in remote-vx.c. */ |
| 60 | |
| 61 | extern void net_read_registers (); |
| 62 | extern void net_write_registers (); |
| 63 | |
| 64 | /* Read a register or registers from the VxWorks target. |
| 65 | REGNO is the register to read, or -1 for all; currently, |
| 66 | it is ignored. FIXME look at regno to improve efficiency. */ |
| 67 | |
| 68 | void |
| 69 | vx_read_register (regno) |
| 70 | int regno; |
| 71 | { |
| 72 | char mips_greg_packet[MIPS_GREG_PLEN]; |
| 73 | char mips_fpreg_packet[MIPS_FPREG_PLEN]; |
| 74 | |
| 75 | /* Get general-purpose registers. */ |
| 76 | |
| 77 | net_read_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_GETREGS); |
| 78 | |
| 79 | /* this code copies the registers obtained by RPC |
| 80 | stored in a structure(s) like this : |
| 81 | |
| 82 | Register(s) Offset(s) |
| 83 | gp 0-31 0x00 |
| 84 | hi 0x80 |
| 85 | lo 0x84 |
| 86 | sr 0x88 |
| 87 | pc 0x8c |
| 88 | |
| 89 | into a stucture like this: |
| 90 | |
| 91 | 0x00 GP 0-31 |
| 92 | 0x80 SR |
| 93 | 0x84 LO |
| 94 | 0x88 HI |
| 95 | 0x8C BAD --- Not available currently |
| 96 | 0x90 CAUSE --- Not available currently |
| 97 | 0x94 PC |
| 98 | 0x98 FP 0-31 |
| 99 | 0x118 FCSR |
| 100 | 0x11C FIR --- Not available currently |
| 101 | 0x120 FP --- Not available currently |
| 102 | |
| 103 | structure is 0x124 (292) bytes in length */ |
| 104 | |
| 105 | /* Copy the general registers. */ |
| 106 | |
| 107 | bcopy (&mips_greg_packet[MIPS_R_GP0], ®isters[0], 32 * MIPS_GREG_SIZE); |
| 108 | |
| 109 | /* Copy SR, LO, HI, and PC. */ |
| 110 | |
| 111 | bcopy (&mips_greg_packet[MIPS_R_SR], |
| 112 | ®isters[REGISTER_BYTE (PS_REGNUM)], MIPS_GREG_SIZE); |
| 113 | bcopy (&mips_greg_packet[MIPS_R_LO], |
| 114 | ®isters[REGISTER_BYTE (LO_REGNUM)], MIPS_GREG_SIZE); |
| 115 | bcopy (&mips_greg_packet[MIPS_R_HI], |
| 116 | ®isters[REGISTER_BYTE (HI_REGNUM)], MIPS_GREG_SIZE); |
| 117 | bcopy (&mips_greg_packet[MIPS_R_PC], |
| 118 | ®isters[REGISTER_BYTE (PC_REGNUM)], MIPS_GREG_SIZE); |
| 119 | |
| 120 | /* If the target has floating point registers, fetch them. |
| 121 | Otherwise, zero the floating point register values in |
| 122 | registers[] for good measure, even though we might not |
| 123 | need to. */ |
| 124 | |
| 125 | if (target_has_fp) |
| 126 | { |
| 127 | net_read_registers (mips_fpreg_packet, MIPS_FPREG_PLEN, |
| 128 | PTRACE_GETFPREGS); |
| 129 | |
| 130 | /* Copy the floating point registers. */ |
| 131 | |
| 132 | bcopy (&mips_fpreg_packet[MIPS_R_FP0], |
| 133 | ®isters[REGISTER_BYTE (FP0_REGNUM)], |
| 134 | REGISTER_RAW_SIZE (FP0_REGNUM) * 32); |
| 135 | |
| 136 | /* Copy the floating point control/status register (fpcsr). */ |
| 137 | |
| 138 | bcopy (&mips_fpreg_packet[MIPS_R_FPCSR], |
| 139 | ®isters[REGISTER_BYTE (FCRCS_REGNUM)], |
| 140 | REGISTER_RAW_SIZE (FCRCS_REGNUM)); |
| 141 | } |
| 142 | else |
| 143 | { |
| 144 | bzero ((char *) ®isters[REGISTER_BYTE (FP0_REGNUM)], |
| 145 | REGISTER_RAW_SIZE (FP0_REGNUM) * 32); |
| 146 | bzero ((char *) ®isters[REGISTER_BYTE (FCRCS_REGNUM)], |
| 147 | REGISTER_RAW_SIZE (FCRCS_REGNUM)); |
| 148 | } |
| 149 | |
| 150 | /* Mark the register cache valid. */ |
| 151 | |
| 152 | registers_fetched (); |
| 153 | } |
| 154 | |
| 155 | /* Store a register or registers into the VxWorks target. |
| 156 | REGNO is the register to store, or -1 for all; currently, |
| 157 | it is ignored. FIXME look at regno to improve efficiency. */ |
| 158 | |
| 159 | vx_write_register (regno) |
| 160 | int regno; |
| 161 | { |
| 162 | char mips_greg_packet[MIPS_GREG_PLEN]; |
| 163 | char mips_fpreg_packet[MIPS_FPREG_PLEN]; |
| 164 | |
| 165 | /* Store general registers. */ |
| 166 | |
| 167 | bcopy (®isters[0], &mips_greg_packet[MIPS_R_GP0], 32 * MIPS_GREG_SIZE); |
| 168 | |
| 169 | /* Copy SR, LO, HI, and PC. */ |
| 170 | |
| 171 | bcopy (®isters[REGISTER_BYTE (PS_REGNUM)], |
| 172 | &mips_greg_packet[MIPS_R_SR], MIPS_GREG_SIZE); |
| 173 | bcopy (®isters[REGISTER_BYTE (LO_REGNUM)], |
| 174 | &mips_greg_packet[MIPS_R_LO], MIPS_GREG_SIZE); |
| 175 | bcopy (®isters[REGISTER_BYTE (HI_REGNUM)], |
| 176 | &mips_greg_packet[MIPS_R_HI], MIPS_GREG_SIZE); |
| 177 | bcopy (®isters[REGISTER_BYTE (PC_REGNUM)], |
| 178 | &mips_greg_packet[MIPS_R_PC], MIPS_GREG_SIZE); |
| 179 | |
| 180 | net_write_registers (mips_greg_packet, MIPS_GREG_PLEN, PTRACE_SETREGS); |
| 181 | |
| 182 | /* Store floating point registers if the target has them. */ |
| 183 | |
| 184 | if (target_has_fp) |
| 185 | { |
| 186 | /* Copy the floating point data registers. */ |
| 187 | |
| 188 | bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)], |
| 189 | &mips_fpreg_packet[MIPS_R_FP0], |
| 190 | REGISTER_RAW_SIZE (FP0_REGNUM) * 32); |
| 191 | |
| 192 | /* Copy the floating point control/status register (fpcsr). */ |
| 193 | |
| 194 | bcopy (®isters[REGISTER_BYTE (FCRCS_REGNUM)], |
| 195 | &mips_fpreg_packet[MIPS_R_FPCSR], |
| 196 | REGISTER_RAW_SIZE (FCRCS_REGNUM)); |
| 197 | |
| 198 | net_write_registers (mips_fpreg_packet, MIPS_FPREG_PLEN, |
| 199 | PTRACE_SETFPREGS); |
| 200 | } |
| 201 | } |