| 1 | /* Target-specific definition for a Renesas Super-H. |
| 2 | Copyright (C) 1993-2017 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 18 | |
| 19 | #ifndef SH_TDEP_H |
| 20 | #define SH_TDEP_H |
| 21 | |
| 22 | /* Contributed by Steve Chamberlain sac@cygnus.com. */ |
| 23 | |
| 24 | /* Registers for all SH variants. Used also by sh3-rom.c. */ |
| 25 | enum |
| 26 | { |
| 27 | R0_REGNUM = 0, |
| 28 | STRUCT_RETURN_REGNUM = 2, |
| 29 | ARG0_REGNUM = 4, |
| 30 | ARGLAST_REGNUM = 7, |
| 31 | FP_REGNUM = 14, |
| 32 | PC_REGNUM = 16, |
| 33 | PR_REGNUM = 17, |
| 34 | GBR_REGNUM = 18, |
| 35 | VBR_REGNUM = 19, |
| 36 | MACH_REGNUM = 20, |
| 37 | MACL_REGNUM = 21, |
| 38 | SR_REGNUM = 22, |
| 39 | FPUL_REGNUM = 23, |
| 40 | /* Floating point registers */ |
| 41 | FPSCR_REGNUM = 24, |
| 42 | FR0_REGNUM = 25, |
| 43 | FLOAT_ARG0_REGNUM = 29, |
| 44 | FLOAT_ARGLAST_REGNUM = 36, |
| 45 | FP_LAST_REGNUM = 40, |
| 46 | /* sh3,sh4 registers */ |
| 47 | SSR_REGNUM = 41, |
| 48 | SPC_REGNUM = 42, |
| 49 | /* DSP registers */ |
| 50 | DSR_REGNUM = 24, |
| 51 | A0G_REGNUM = 25, |
| 52 | A0_REGNUM = 26, |
| 53 | A1G_REGNUM = 27, |
| 54 | A1_REGNUM = 28, |
| 55 | M0_REGNUM = 29, |
| 56 | M1_REGNUM = 30, |
| 57 | X0_REGNUM = 31, |
| 58 | X1_REGNUM = 32, |
| 59 | Y0_REGNUM = 33, |
| 60 | Y1_REGNUM = 34, |
| 61 | MOD_REGNUM = 40, |
| 62 | RS_REGNUM = 43, |
| 63 | RE_REGNUM = 44, |
| 64 | DSP_R0_BANK_REGNUM = 51, |
| 65 | DSP_R7_BANK_REGNUM = 58, |
| 66 | /* sh2a register */ |
| 67 | R0_BANK0_REGNUM = 43, |
| 68 | MACHB_REGNUM = 58, |
| 69 | IVNB_REGNUM = 59, |
| 70 | PRB_REGNUM = 60, |
| 71 | GBRB_REGNUM = 61, |
| 72 | MACLB_REGNUM = 62, |
| 73 | BANK_REGNUM = 63, |
| 74 | IBCR_REGNUM = 64, |
| 75 | IBNR_REGNUM = 65, |
| 76 | TBR_REGNUM = 66, |
| 77 | PSEUDO_BANK_REGNUM = 67, |
| 78 | /* Floating point pseudo registers */ |
| 79 | DR0_REGNUM = 68, |
| 80 | DR_LAST_REGNUM = 75, |
| 81 | FV0_REGNUM = 76, |
| 82 | FV_LAST_REGNUM = 79 |
| 83 | }; |
| 84 | |
| 85 | /* This structure describes a register in a core-file. */ |
| 86 | struct sh_corefile_regmap |
| 87 | { |
| 88 | int regnum; |
| 89 | unsigned int offset; |
| 90 | }; |
| 91 | |
| 92 | struct gdbarch_tdep |
| 93 | { |
| 94 | /* Non-NULL when debugging from a core file. Provides the offset |
| 95 | where each general-purpose register is stored inside the associated |
| 96 | core file section. */ |
| 97 | struct sh_corefile_regmap *core_gregmap; |
| 98 | int sizeof_gregset; |
| 99 | /* Non-NULL when debugging from a core file and when FP registers are |
| 100 | available. Provides the offset where each FP register is stored |
| 101 | inside the associated core file section. */ |
| 102 | struct sh_corefile_regmap *core_fpregmap; |
| 103 | int sizeof_fpregset; |
| 104 | }; |
| 105 | |
| 106 | extern const struct regset sh_corefile_gregset; |
| 107 | |
| 108 | void sh_corefile_supply_regset (const struct regset *regset, |
| 109 | struct regcache *regcache, |
| 110 | int regnum, const void *regs, size_t len); |
| 111 | void sh_corefile_collect_regset (const struct regset *regset, |
| 112 | const struct regcache *regcache, |
| 113 | int regnum, void *regs, size_t len); |
| 114 | #endif /* SH_TDEP_H */ |