| 1 | /* Functions specific to running gdb native on a SPARC running SunOS4. |
| 2 | Copyright 1989, 1992, 1993, 1994 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ |
| 19 | |
| 20 | #include "defs.h" |
| 21 | #include "inferior.h" |
| 22 | #include "target.h" |
| 23 | |
| 24 | #include <signal.h> |
| 25 | #include <sys/ptrace.h> |
| 26 | #include <sys/wait.h> |
| 27 | #include <machine/reg.h> |
| 28 | |
| 29 | /* We don't store all registers immediately when requested, since they |
| 30 | get sent over in large chunks anyway. Instead, we accumulate most |
| 31 | of the changes and send them over once. "deferred_stores" keeps |
| 32 | track of which sets of registers we have locally-changed copies of, |
| 33 | so we only need send the groups that have changed. */ |
| 34 | |
| 35 | #define INT_REGS 1 |
| 36 | #define STACK_REGS 2 |
| 37 | #define FP_REGS 4 |
| 38 | |
| 39 | /* Fetch one or more registers from the inferior. REGNO == -1 to get |
| 40 | them all. We actually fetch more than requested, when convenient, |
| 41 | marking them as valid so we won't fetch them again. */ |
| 42 | |
| 43 | void |
| 44 | fetch_inferior_registers (regno) |
| 45 | int regno; |
| 46 | { |
| 47 | struct regs inferior_registers; |
| 48 | struct fp_status inferior_fp_registers; |
| 49 | int i; |
| 50 | |
| 51 | /* We should never be called with deferred stores, because a prerequisite |
| 52 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ |
| 53 | if (deferred_stores) abort(); |
| 54 | |
| 55 | DO_DEFERRED_STORES; |
| 56 | |
| 57 | /* Global and Out regs are fetched directly, as well as the control |
| 58 | registers. If we're getting one of the in or local regs, |
| 59 | and the stack pointer has not yet been fetched, |
| 60 | we have to do that first, since they're found in memory relative |
| 61 | to the stack pointer. */ |
| 62 | if (regno < O7_REGNUM /* including -1 */ |
| 63 | || regno >= Y_REGNUM |
| 64 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) |
| 65 | { |
| 66 | if (0 != ptrace (PTRACE_GETREGS, inferior_pid, |
| 67 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) |
| 68 | perror("ptrace_getregs"); |
| 69 | |
| 70 | registers[REGISTER_BYTE (0)] = 0; |
| 71 | memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1, |
| 72 | 15 * REGISTER_RAW_SIZE (G0_REGNUM)); |
| 73 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; |
| 74 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; |
| 75 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; |
| 76 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; |
| 77 | |
| 78 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) |
| 79 | register_valid[i] = 1; |
| 80 | register_valid[Y_REGNUM] = 1; |
| 81 | register_valid[PS_REGNUM] = 1; |
| 82 | register_valid[PC_REGNUM] = 1; |
| 83 | register_valid[NPC_REGNUM] = 1; |
| 84 | /* If we don't set these valid, read_register_bytes() rereads |
| 85 | all the regs every time it is called! FIXME. */ |
| 86 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ |
| 87 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ |
| 88 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ |
| 89 | } |
| 90 | |
| 91 | /* Floating point registers */ |
| 92 | if (regno == -1 || |
| 93 | regno == FPS_REGNUM || |
| 94 | (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) |
| 95 | { |
| 96 | if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, |
| 97 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, |
| 98 | 0)) |
| 99 | perror("ptrace_getfpregs"); |
| 100 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers, |
| 101 | sizeof inferior_fp_registers.fpu_fr); |
| 102 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], |
| 103 | &inferior_fp_registers.Fpu_fsr, |
| 104 | sizeof (FPU_FSR_TYPE)); |
| 105 | for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) |
| 106 | register_valid[i] = 1; |
| 107 | register_valid[FPS_REGNUM] = 1; |
| 108 | } |
| 109 | |
| 110 | /* These regs are saved on the stack by the kernel. Only read them |
| 111 | all (16 ptrace calls!) if we really need them. */ |
| 112 | if (regno == -1) |
| 113 | { |
| 114 | target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], |
| 115 | ®isters[REGISTER_BYTE (L0_REGNUM)], |
| 116 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); |
| 117 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) |
| 118 | register_valid[i] = 1; |
| 119 | } |
| 120 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) |
| 121 | { |
| 122 | CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; |
| 123 | i = REGISTER_BYTE (regno); |
| 124 | if (register_valid[regno]) |
| 125 | printf_unfiltered("register %d valid and read\n", regno); |
| 126 | target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), |
| 127 | ®isters[i], REGISTER_RAW_SIZE (regno), 0); |
| 128 | register_valid[regno] = 1; |
| 129 | } |
| 130 | } |
| 131 | |
| 132 | /* Store our register values back into the inferior. |
| 133 | If REGNO is -1, do this for all registers. |
| 134 | Otherwise, REGNO specifies which register (so we can save time). */ |
| 135 | |
| 136 | void |
| 137 | store_inferior_registers (regno) |
| 138 | int regno; |
| 139 | { |
| 140 | struct regs inferior_registers; |
| 141 | struct fp_status inferior_fp_registers; |
| 142 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; |
| 143 | |
| 144 | /* First decide which pieces of machine-state we need to modify. |
| 145 | Default for regno == -1 case is all pieces. */ |
| 146 | if (regno >= 0) |
| 147 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) |
| 148 | { |
| 149 | wanna_store = FP_REGS; |
| 150 | } |
| 151 | else |
| 152 | { |
| 153 | if (regno == SP_REGNUM) |
| 154 | wanna_store = INT_REGS + STACK_REGS; |
| 155 | else if (regno < L0_REGNUM || regno > I7_REGNUM) |
| 156 | wanna_store = INT_REGS; |
| 157 | else if (regno == FPS_REGNUM) |
| 158 | wanna_store = FP_REGS; |
| 159 | else |
| 160 | wanna_store = STACK_REGS; |
| 161 | } |
| 162 | |
| 163 | /* See if we're forcing the stores to happen now, or deferring. */ |
| 164 | if (regno == -2) |
| 165 | { |
| 166 | wanna_store = deferred_stores; |
| 167 | deferred_stores = 0; |
| 168 | } |
| 169 | else |
| 170 | { |
| 171 | if (wanna_store == STACK_REGS) |
| 172 | { |
| 173 | /* Fall through and just store one stack reg. If we deferred |
| 174 | it, we'd have to store them all, or remember more info. */ |
| 175 | } |
| 176 | else |
| 177 | { |
| 178 | deferred_stores |= wanna_store; |
| 179 | return; |
| 180 | } |
| 181 | } |
| 182 | |
| 183 | if (wanna_store & STACK_REGS) |
| 184 | { |
| 185 | CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; |
| 186 | |
| 187 | if (regno < 0 || regno == SP_REGNUM) |
| 188 | { |
| 189 | if (!register_valid[L0_REGNUM+5]) abort(); |
| 190 | target_xfer_memory (sp, |
| 191 | ®isters[REGISTER_BYTE (L0_REGNUM)], |
| 192 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); |
| 193 | } |
| 194 | else |
| 195 | { |
| 196 | if (!register_valid[regno]) abort(); |
| 197 | target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), |
| 198 | ®isters[REGISTER_BYTE (regno)], |
| 199 | REGISTER_RAW_SIZE (regno), 1); |
| 200 | } |
| 201 | |
| 202 | } |
| 203 | |
| 204 | if (wanna_store & INT_REGS) |
| 205 | { |
| 206 | if (!register_valid[G1_REGNUM]) abort(); |
| 207 | |
| 208 | memcpy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (G1_REGNUM)], |
| 209 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); |
| 210 | |
| 211 | inferior_registers.r_ps = |
| 212 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; |
| 213 | inferior_registers.r_pc = |
| 214 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; |
| 215 | inferior_registers.r_npc = |
| 216 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; |
| 217 | inferior_registers.r_y = |
| 218 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; |
| 219 | |
| 220 | if (0 != ptrace (PTRACE_SETREGS, inferior_pid, |
| 221 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) |
| 222 | perror("ptrace_setregs"); |
| 223 | } |
| 224 | |
| 225 | if (wanna_store & FP_REGS) |
| 226 | { |
| 227 | if (!register_valid[FP0_REGNUM+9]) abort(); |
| 228 | memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], |
| 229 | sizeof inferior_fp_registers.fpu_fr); |
| 230 | memcpy (&inferior_fp_registers.Fpu_fsr, |
| 231 | ®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE)); |
| 232 | if (0 != |
| 233 | ptrace (PTRACE_SETFPREGS, inferior_pid, |
| 234 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) |
| 235 | perror("ptrace_setfpregs"); |
| 236 | } |
| 237 | } |
| 238 | |
| 239 | |
| 240 | void |
| 241 | fetch_core_registers (core_reg_sect, core_reg_size, which, ignore) |
| 242 | char *core_reg_sect; |
| 243 | unsigned core_reg_size; |
| 244 | int which; |
| 245 | unsigned int ignore; /* reg addr, unused in this version */ |
| 246 | { |
| 247 | |
| 248 | if (which == 0) { |
| 249 | |
| 250 | /* Integer registers */ |
| 251 | |
| 252 | #define gregs ((struct regs *)core_reg_sect) |
| 253 | /* G0 *always* holds 0. */ |
| 254 | *(int *)®isters[REGISTER_BYTE (0)] = 0; |
| 255 | |
| 256 | /* The globals and output registers. */ |
| 257 | memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, |
| 258 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); |
| 259 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; |
| 260 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; |
| 261 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; |
| 262 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; |
| 263 | |
| 264 | /* My best guess at where to get the locals and input |
| 265 | registers is exactly where they usually are, right above |
| 266 | the stack pointer. If the core dump was caused by a bus error |
| 267 | from blowing away the stack pointer (as is possible) then this |
| 268 | won't work, but it's worth the try. */ |
| 269 | { |
| 270 | int sp; |
| 271 | |
| 272 | sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; |
| 273 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], |
| 274 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) |
| 275 | { |
| 276 | /* fprintf_unfiltered so user can still use gdb */ |
| 277 | fprintf_unfiltered (gdb_stderr, |
| 278 | "Couldn't read input and local registers from core file\n"); |
| 279 | } |
| 280 | } |
| 281 | } else if (which == 2) { |
| 282 | |
| 283 | /* Floating point registers */ |
| 284 | |
| 285 | #define fpuregs ((struct fpu *) core_reg_sect) |
| 286 | if (core_reg_size >= sizeof (struct fpu)) |
| 287 | { |
| 288 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs, |
| 289 | sizeof (fpuregs->fpu_regs)); |
| 290 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr, |
| 291 | sizeof (FPU_FSR_TYPE)); |
| 292 | } |
| 293 | else |
| 294 | fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n"); |
| 295 | } |
| 296 | } |
| 297 | |