| 1 | /* Target-dependent code for the SPARC for GDB, the GNU debugger. |
| 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ |
| 19 | |
| 20 | #include "defs.h" |
| 21 | #include "frame.h" |
| 22 | #include "inferior.h" |
| 23 | #include "obstack.h" |
| 24 | #include "target.h" |
| 25 | #include "ieee-float.h" |
| 26 | |
| 27 | #include "symfile.h" /* for objfiles.h */ |
| 28 | #include "objfiles.h" /* for find_pc_section */ |
| 29 | |
| 30 | #ifdef USE_PROC_FS |
| 31 | #include <sys/procfs.h> |
| 32 | #endif |
| 33 | |
| 34 | #include "gdbcore.h" |
| 35 | |
| 36 | /* From infrun.c */ |
| 37 | extern int stop_after_trap; |
| 38 | |
| 39 | /* We don't store all registers immediately when requested, since they |
| 40 | get sent over in large chunks anyway. Instead, we accumulate most |
| 41 | of the changes and send them over once. "deferred_stores" keeps |
| 42 | track of which sets of registers we have locally-changed copies of, |
| 43 | so we only need send the groups that have changed. */ |
| 44 | |
| 45 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ |
| 46 | |
| 47 | typedef enum |
| 48 | { |
| 49 | Error, not_branch, bicc, bicca, ba, baa, ticc, ta |
| 50 | } branch_type; |
| 51 | |
| 52 | /* Simulate single-step ptrace call for sun4. Code written by Gary |
| 53 | Beihl (beihl@mcc.com). */ |
| 54 | |
| 55 | /* npc4 and next_pc describe the situation at the time that the |
| 56 | step-breakpoint was set, not necessary the current value of NPC_REGNUM. */ |
| 57 | static CORE_ADDR next_pc, npc4, target; |
| 58 | static int brknpc4, brktrg; |
| 59 | typedef char binsn_quantum[BREAKPOINT_MAX]; |
| 60 | static binsn_quantum break_mem[3]; |
| 61 | |
| 62 | /* Non-zero if we just simulated a single-step ptrace call. This is |
| 63 | needed because we cannot remove the breakpoints in the inferior |
| 64 | process until after the `wait' in `wait_for_inferior'. Used for |
| 65 | sun4. */ |
| 66 | |
| 67 | int one_stepped; |
| 68 | |
| 69 | /* single_step() is called just before we want to resume the inferior, |
| 70 | if we want to single-step it but there is no hardware or kernel single-step |
| 71 | support (as on all SPARCs). We find all the possible targets of the |
| 72 | coming instruction and breakpoint them. |
| 73 | |
| 74 | single_step is also called just after the inferior stops. If we had |
| 75 | set up a simulated single-step, we undo our damage. */ |
| 76 | |
| 77 | void |
| 78 | single_step (ignore) |
| 79 | int ignore; /* pid, but we don't need it */ |
| 80 | { |
| 81 | branch_type br, isannulled(); |
| 82 | CORE_ADDR pc; |
| 83 | long pc_instruction; |
| 84 | |
| 85 | if (!one_stepped) |
| 86 | { |
| 87 | /* Always set breakpoint for NPC. */ |
| 88 | next_pc = read_register (NPC_REGNUM); |
| 89 | npc4 = next_pc + 4; /* branch not taken */ |
| 90 | |
| 91 | target_insert_breakpoint (next_pc, break_mem[0]); |
| 92 | /* printf ("set break at %x\n",next_pc); */ |
| 93 | |
| 94 | pc = read_register (PC_REGNUM); |
| 95 | pc_instruction = read_memory_integer (pc, sizeof(pc_instruction)); |
| 96 | br = isannulled (pc_instruction, pc, &target); |
| 97 | brknpc4 = brktrg = 0; |
| 98 | |
| 99 | if (br == bicca) |
| 100 | { |
| 101 | /* Conditional annulled branch will either end up at |
| 102 | npc (if taken) or at npc+4 (if not taken). |
| 103 | Trap npc+4. */ |
| 104 | brknpc4 = 1; |
| 105 | target_insert_breakpoint (npc4, break_mem[1]); |
| 106 | } |
| 107 | else if (br == baa && target != next_pc) |
| 108 | { |
| 109 | /* Unconditional annulled branch will always end up at |
| 110 | the target. */ |
| 111 | brktrg = 1; |
| 112 | target_insert_breakpoint (target, break_mem[2]); |
| 113 | } |
| 114 | |
| 115 | /* We are ready to let it go */ |
| 116 | one_stepped = 1; |
| 117 | return; |
| 118 | } |
| 119 | else |
| 120 | { |
| 121 | /* Remove breakpoints */ |
| 122 | target_remove_breakpoint (next_pc, break_mem[0]); |
| 123 | |
| 124 | if (brknpc4) |
| 125 | target_remove_breakpoint (npc4, break_mem[1]); |
| 126 | |
| 127 | if (brktrg) |
| 128 | target_remove_breakpoint (target, break_mem[2]); |
| 129 | |
| 130 | one_stepped = 0; |
| 131 | } |
| 132 | } |
| 133 | \f |
| 134 | #define FRAME_SAVED_L0 0 /* Byte offset from SP */ |
| 135 | #define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (0)) /* Byte offset from SP */ |
| 136 | |
| 137 | CORE_ADDR |
| 138 | sparc_frame_chain (thisframe) |
| 139 | FRAME thisframe; |
| 140 | { |
| 141 | REGISTER_TYPE retval; |
| 142 | int err; |
| 143 | CORE_ADDR addr; |
| 144 | |
| 145 | addr = thisframe->frame + FRAME_SAVED_I0 + |
| 146 | REGISTER_RAW_SIZE (FP_REGNUM) * (FP_REGNUM - I0_REGNUM); |
| 147 | err = target_read_memory (addr, (char *) &retval, sizeof (REGISTER_TYPE)); |
| 148 | if (err) |
| 149 | return 0; |
| 150 | SWAP_TARGET_AND_HOST (&retval, sizeof (retval)); |
| 151 | return retval; |
| 152 | } |
| 153 | |
| 154 | CORE_ADDR |
| 155 | sparc_extract_struct_value_address (regbuf) |
| 156 | char regbuf[REGISTER_BYTES]; |
| 157 | { |
| 158 | /* FIXME, handle byte swapping */ |
| 159 | return read_memory_integer (((int *)(regbuf))[SP_REGNUM]+(16*4), |
| 160 | sizeof (CORE_ADDR)); |
| 161 | } |
| 162 | |
| 163 | /* Find the pc saved in frame FRAME. */ |
| 164 | |
| 165 | CORE_ADDR |
| 166 | frame_saved_pc (frame) |
| 167 | FRAME frame; |
| 168 | { |
| 169 | REGISTER_TYPE retval; |
| 170 | CORE_ADDR addr,prev_pc; |
| 171 | |
| 172 | if (get_current_frame () == frame) /* FIXME, debug check. Remove >=gdb-4.6 */ |
| 173 | { |
| 174 | if (read_register (SP_REGNUM) != frame->bottom) abort(); |
| 175 | } |
| 176 | |
| 177 | addr = (frame->bottom + FRAME_SAVED_I0 + |
| 178 | REGISTER_RAW_SIZE (I7_REGNUM) * (I7_REGNUM - I0_REGNUM)); |
| 179 | read_memory (addr, (char *) &retval, sizeof (REGISTER_TYPE)); |
| 180 | SWAP_TARGET_AND_HOST (&retval, sizeof (retval)); |
| 181 | |
| 182 | /* CORE_ADDR isn't always the same size as REGISTER_TYPE, so convert. */ |
| 183 | |
| 184 | prev_pc = (CORE_ADDR) retval; |
| 185 | return PC_ADJUST (prev_pc); |
| 186 | } |
| 187 | |
| 188 | /* |
| 189 | * Since an individual frame in the frame cache is defined by two |
| 190 | * arguments (a frame pointer and a stack pointer), we need two |
| 191 | * arguments to get info for an arbitrary stack frame. This routine |
| 192 | * takes two arguments and makes the cached frames look as if these |
| 193 | * two arguments defined a frame on the cache. This allows the rest |
| 194 | * of info frame to extract the important arguments without |
| 195 | * difficulty. |
| 196 | */ |
| 197 | FRAME |
| 198 | setup_arbitrary_frame (argc, argv) |
| 199 | int argc; |
| 200 | FRAME_ADDR *argv; |
| 201 | { |
| 202 | FRAME fid; |
| 203 | |
| 204 | if (argc != 2) |
| 205 | error ("Sparc frame specifications require two arguments: fp and sp"); |
| 206 | |
| 207 | fid = create_new_frame (argv[0], 0); |
| 208 | |
| 209 | if (!fid) |
| 210 | fatal ("internal: create_new_frame returned invalid frame id"); |
| 211 | |
| 212 | fid->bottom = argv[1]; |
| 213 | fid->pc = FRAME_SAVED_PC (fid); |
| 214 | return fid; |
| 215 | } |
| 216 | |
| 217 | /* This code was written by Gary Beihl (beihl@mcc.com). |
| 218 | It was modified by Michael Tiemann (tiemann@corto.inria.fr). */ |
| 219 | |
| 220 | /* |
| 221 | * This routine appears to be passed a size by which to increase the |
| 222 | * stack. It then executes a save instruction in the inferior to |
| 223 | * increase the stack by this amount. Only the register window system |
| 224 | * should be affected by this; the program counter & etc. will not be. |
| 225 | * |
| 226 | * This instructions used for this purpose are: |
| 227 | * |
| 228 | * sethi %hi(0x0),g1 * |
| 229 | * add g1,0x1ee0,g1 * |
| 230 | * save sp,g1,sp |
| 231 | * sethi %hi(0x0),g1 * |
| 232 | * add g1,0x1ee0,g1 * |
| 233 | * t g0,0x1,o0 |
| 234 | * sethi %hi(0x0),g0 (nop) |
| 235 | * |
| 236 | * I presume that these set g1 to be the negative of the size, do a |
| 237 | * save (putting the stack pointer at sp - size) and restore the |
| 238 | * original contents of g1. A * indicates that the actual value of |
| 239 | * the instruction is modified below. |
| 240 | */ |
| 241 | static unsigned int save_insn_opcodes[] = { |
| 242 | 0x03000000, 0x82007ee0, 0x9de38001, 0x03000000, |
| 243 | 0x82007ee0, 0x91d02001, 0x01000000 }; |
| 244 | |
| 245 | /* FIXME: |
| 246 | The person who wrote function calls on the SPARC didn't understand the |
| 247 | SPARC stack. There is no need to call into the inferior to run a save |
| 248 | instruction and then do it again for a restore instruction. Save and |
| 249 | restore amount to add-to-SP and move-to-SP when all has been said and |
| 250 | done. You simply modify the stack in memory to look like a function |
| 251 | has been called -- the same way any other architecture does it. |
| 252 | |
| 253 | That would fix the sparc xfail in testsuite/gdb.t06/signals.exp, make |
| 254 | function calls much faster, and would clean up some very poor code. */ |
| 255 | |
| 256 | |
| 257 | /* Neither do_save_insn or do_restore_insn save stack configuration |
| 258 | (current_frame, etc), |
| 259 | since the stack is in an indeterminate state through the call to |
| 260 | each of them. That is the responsibility of the routine which calls them. */ |
| 261 | |
| 262 | static void |
| 263 | do_save_insn (size) |
| 264 | int size; |
| 265 | { |
| 266 | int g1 = read_register (G1_REGNUM); |
| 267 | CORE_ADDR sp = read_register (SP_REGNUM); |
| 268 | CORE_ADDR pc = read_register (PC_REGNUM); |
| 269 | CORE_ADDR npc = read_register (NPC_REGNUM); |
| 270 | CORE_ADDR fake_pc = sp - sizeof (save_insn_opcodes); |
| 271 | struct inferior_status inf_status; |
| 272 | |
| 273 | save_inferior_status (&inf_status, 0); /* Don't restore stack info */ |
| 274 | /* |
| 275 | * See above. |
| 276 | */ |
| 277 | save_insn_opcodes[0] = 0x03000000 | ((-size >> 10) & 0x3fffff); |
| 278 | save_insn_opcodes[1] = 0x82006000 | (-size & 0x3ff); |
| 279 | save_insn_opcodes[3] = 0x03000000 | ((g1 >> 10) & 0x3fffff); |
| 280 | save_insn_opcodes[4] = 0x82006000 | (g1 & 0x3ff); |
| 281 | write_memory (fake_pc, (char *)save_insn_opcodes, sizeof (save_insn_opcodes)); |
| 282 | |
| 283 | clear_proceed_status (); |
| 284 | stop_after_trap = 1; |
| 285 | proceed (fake_pc, 0, 0); |
| 286 | |
| 287 | write_register (PC_REGNUM, pc); |
| 288 | write_register (NPC_REGNUM, npc); |
| 289 | restore_inferior_status (&inf_status); |
| 290 | } |
| 291 | |
| 292 | /* |
| 293 | * This routine takes a program counter value. It restores the |
| 294 | * register window system to the frame above the current one. |
| 295 | * THIS ROUTINE CLOBBERS PC AND NPC IN THE TARGET! |
| 296 | */ |
| 297 | |
| 298 | /* The following insns translate to: |
| 299 | |
| 300 | restore %g0,%g0,%g0 |
| 301 | t %g0,1 |
| 302 | sethi %hi(0),%g0 */ |
| 303 | |
| 304 | static unsigned int restore_insn_opcodes[] = { |
| 305 | 0x81e80000, 0x91d02001, 0x01000000 }; |
| 306 | |
| 307 | static void |
| 308 | do_restore_insn () |
| 309 | { |
| 310 | CORE_ADDR sp = read_register (SP_REGNUM); |
| 311 | CORE_ADDR fake_pc = sp - sizeof (restore_insn_opcodes); |
| 312 | struct inferior_status inf_status; |
| 313 | |
| 314 | save_inferior_status (&inf_status, 0); /* Don't restore stack info */ |
| 315 | |
| 316 | write_memory (fake_pc, (char *)restore_insn_opcodes, |
| 317 | sizeof (restore_insn_opcodes)); |
| 318 | |
| 319 | clear_proceed_status (); |
| 320 | stop_after_trap = 1; |
| 321 | proceed (fake_pc, 0, 0); |
| 322 | |
| 323 | restore_inferior_status (&inf_status); |
| 324 | } |
| 325 | |
| 326 | /* Given a pc value, skip it forward past the function prologue by |
| 327 | disassembling instructions that appear to be a prologue. |
| 328 | |
| 329 | If FRAMELESS_P is set, we are only testing to see if the function |
| 330 | is frameless. This allows a quicker answer. |
| 331 | |
| 332 | This routine should be more specific in its actions; making sure |
| 333 | that it uses the same register in the initial prologue section. */ |
| 334 | CORE_ADDR |
| 335 | skip_prologue (start_pc, frameless_p) |
| 336 | CORE_ADDR start_pc; |
| 337 | int frameless_p; |
| 338 | { |
| 339 | union |
| 340 | { |
| 341 | unsigned long int code; |
| 342 | struct |
| 343 | { |
| 344 | unsigned int op:2; |
| 345 | unsigned int rd:5; |
| 346 | unsigned int op2:3; |
| 347 | unsigned int imm22:22; |
| 348 | } sethi; |
| 349 | struct |
| 350 | { |
| 351 | unsigned int op:2; |
| 352 | unsigned int rd:5; |
| 353 | unsigned int op3:6; |
| 354 | unsigned int rs1:5; |
| 355 | unsigned int i:1; |
| 356 | unsigned int simm13:13; |
| 357 | } add; |
| 358 | int i; |
| 359 | } x; |
| 360 | int dest = -1; |
| 361 | CORE_ADDR pc = start_pc; |
| 362 | |
| 363 | x.i = read_memory_integer (pc, 4); |
| 364 | |
| 365 | /* Recognize the `sethi' insn and record its destination. */ |
| 366 | if (x.sethi.op == 0 && x.sethi.op2 == 4) |
| 367 | { |
| 368 | dest = x.sethi.rd; |
| 369 | pc += 4; |
| 370 | x.i = read_memory_integer (pc, 4); |
| 371 | } |
| 372 | |
| 373 | /* Recognize an add immediate value to register to either %g1 or |
| 374 | the destination register recorded above. Actually, this might |
| 375 | well recognize several different arithmetic operations. |
| 376 | It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1" |
| 377 | followed by "save %sp, %g1, %sp" is a valid prologue (Not that |
| 378 | I imagine any compiler really does that, however). */ |
| 379 | if (x.add.op == 2 && x.add.i && (x.add.rd == 1 || x.add.rd == dest)) |
| 380 | { |
| 381 | pc += 4; |
| 382 | x.i = read_memory_integer (pc, 4); |
| 383 | } |
| 384 | |
| 385 | /* This recognizes any SAVE insn. But why do the XOR and then |
| 386 | the compare? That's identical to comparing against 60 (as long |
| 387 | as there isn't any sign extension). */ |
| 388 | if (x.add.op == 2 && (x.add.op3 ^ 32) == 28) |
| 389 | { |
| 390 | pc += 4; |
| 391 | if (frameless_p) /* If the save is all we care about, */ |
| 392 | return pc; /* return before doing more work */ |
| 393 | x.i = read_memory_integer (pc, 4); |
| 394 | } |
| 395 | else |
| 396 | { |
| 397 | /* Without a save instruction, it's not a prologue. */ |
| 398 | return start_pc; |
| 399 | } |
| 400 | |
| 401 | /* Now we need to recognize stores into the frame from the input |
| 402 | registers. This recognizes all non alternate stores of input |
| 403 | register, into a location offset from the frame pointer. */ |
| 404 | while (x.add.op == 3 |
| 405 | && (x.add.op3 & 0x3c) == 4 /* Store, non-alternate. */ |
| 406 | && (x.add.rd & 0x18) == 0x18 /* Input register. */ |
| 407 | && x.add.i /* Immediate mode. */ |
| 408 | && x.add.rs1 == 30 /* Off of frame pointer. */ |
| 409 | /* Into reserved stack space. */ |
| 410 | && x.add.simm13 >= 0x44 |
| 411 | && x.add.simm13 < 0x5b) |
| 412 | { |
| 413 | pc += 4; |
| 414 | x.i = read_memory_integer (pc, 4); |
| 415 | } |
| 416 | return pc; |
| 417 | } |
| 418 | |
| 419 | /* Check instruction at ADDR to see if it is an annulled branch. |
| 420 | All other instructions will go to NPC or will trap. |
| 421 | Set *TARGET if we find a canidate branch; set to zero if not. */ |
| 422 | |
| 423 | branch_type |
| 424 | isannulled (instruction, addr, target) |
| 425 | long instruction; |
| 426 | CORE_ADDR addr, *target; |
| 427 | { |
| 428 | branch_type val = not_branch; |
| 429 | long int offset; /* Must be signed for sign-extend. */ |
| 430 | union |
| 431 | { |
| 432 | unsigned long int code; |
| 433 | struct |
| 434 | { |
| 435 | unsigned int op:2; |
| 436 | unsigned int a:1; |
| 437 | unsigned int cond:4; |
| 438 | unsigned int op2:3; |
| 439 | unsigned int disp22:22; |
| 440 | } b; |
| 441 | } insn; |
| 442 | |
| 443 | *target = 0; |
| 444 | insn.code = instruction; |
| 445 | |
| 446 | if (insn.b.op == 0 |
| 447 | && (insn.b.op2 == 2 || insn.b.op2 == 6 || insn.b.op2 == 7)) |
| 448 | { |
| 449 | if (insn.b.cond == 8) |
| 450 | val = insn.b.a ? baa : ba; |
| 451 | else |
| 452 | val = insn.b.a ? bicca : bicc; |
| 453 | offset = 4 * ((int) (insn.b.disp22 << 10) >> 10); |
| 454 | *target = addr + offset; |
| 455 | } |
| 456 | |
| 457 | return val; |
| 458 | } |
| 459 | |
| 460 | /* sparc_frame_find_saved_regs () |
| 461 | |
| 462 | Stores, into a struct frame_saved_regs, |
| 463 | the addresses of the saved registers of frame described by FRAME_INFO. |
| 464 | This includes special registers such as pc and fp saved in special |
| 465 | ways in the stack frame. sp is even more special: |
| 466 | the address we return for it IS the sp for the next frame. |
| 467 | |
| 468 | Note that on register window machines, we are currently making the |
| 469 | assumption that window registers are being saved somewhere in the |
| 470 | frame in which they are being used. If they are stored in an |
| 471 | inferior frame, find_saved_register will break. |
| 472 | |
| 473 | On the Sun 4, the only time all registers are saved is when |
| 474 | a dummy frame is involved. Otherwise, the only saved registers |
| 475 | are the LOCAL and IN registers which are saved as a result |
| 476 | of the "save/restore" opcodes. This condition is determined |
| 477 | by address rather than by value. |
| 478 | |
| 479 | The "pc" is not stored in a frame on the SPARC. (What is stored |
| 480 | is a return address minus 8.) sparc_pop_frame knows how to |
| 481 | deal with that. Other routines might or might not. |
| 482 | |
| 483 | See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information |
| 484 | about how this works. */ |
| 485 | |
| 486 | void |
| 487 | sparc_frame_find_saved_regs (fi, saved_regs_addr) |
| 488 | struct frame_info *fi; |
| 489 | struct frame_saved_regs *saved_regs_addr; |
| 490 | { |
| 491 | register int regnum; |
| 492 | FRAME_ADDR frame = read_register (FP_REGNUM); |
| 493 | FRAME fid = FRAME_INFO_ID (fi); |
| 494 | |
| 495 | if (!fid) |
| 496 | fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); |
| 497 | |
| 498 | memset (saved_regs_addr, 0, sizeof (*saved_regs_addr)); |
| 499 | |
| 500 | /* Old test. |
| 501 | if (fi->pc >= frame - CALL_DUMMY_LENGTH - 0x140 |
| 502 | && fi->pc <= frame) */ |
| 503 | |
| 504 | if (fi->pc >= (fi->bottom ? fi->bottom : |
| 505 | read_register (SP_REGNUM)) |
| 506 | && fi->pc <= FRAME_FP(fi)) |
| 507 | { |
| 508 | /* Dummy frame. All but the window regs are in there somewhere. */ |
| 509 | for (regnum = G1_REGNUM; regnum < G1_REGNUM+7; regnum++) |
| 510 | saved_regs_addr->regs[regnum] = |
| 511 | frame + (regnum - G0_REGNUM) * 4 - 0xa0; |
| 512 | for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) |
| 513 | saved_regs_addr->regs[regnum] = |
| 514 | frame + (regnum - I0_REGNUM) * 4 - 0xc0; |
| 515 | for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++) |
| 516 | saved_regs_addr->regs[regnum] = |
| 517 | frame + (regnum - FP0_REGNUM) * 4 - 0x80; |
| 518 | for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++) |
| 519 | saved_regs_addr->regs[regnum] = |
| 520 | frame + (regnum - Y_REGNUM) * 4 - 0xe0; |
| 521 | frame = fi->bottom ? |
| 522 | fi->bottom : read_register (SP_REGNUM); |
| 523 | } |
| 524 | else |
| 525 | { |
| 526 | /* Normal frame. Just Local and In registers */ |
| 527 | frame = fi->bottom ? |
| 528 | fi->bottom : read_register (SP_REGNUM); |
| 529 | for (regnum = L0_REGNUM; regnum < L0_REGNUM+16; regnum++) |
| 530 | saved_regs_addr->regs[regnum] = frame + (regnum-L0_REGNUM) * 4; |
| 531 | } |
| 532 | if (fi->next) |
| 533 | { |
| 534 | /* Pull off either the next frame pointer or the stack pointer */ |
| 535 | FRAME_ADDR next_next_frame = |
| 536 | (fi->next->bottom ? |
| 537 | fi->next->bottom : |
| 538 | read_register (SP_REGNUM)); |
| 539 | for (regnum = O0_REGNUM; regnum < O0_REGNUM+8; regnum++) |
| 540 | saved_regs_addr->regs[regnum] = next_next_frame + regnum * 4; |
| 541 | } |
| 542 | /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */ |
| 543 | saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi); |
| 544 | } |
| 545 | |
| 546 | /* Push an empty stack frame, and record in it the current PC, regs, etc. |
| 547 | |
| 548 | Note that the write's are of registers in the context of the newly |
| 549 | pushed frame. Thus the the fp*'s, the g*'s, the i*'s, and |
| 550 | the randoms, of the new frame, are being saved. The locals and outs |
| 551 | are new; they don't need to be saved. The i's and l's of |
| 552 | the last frame were saved by the do_save_insn in the register |
| 553 | file (now on the stack, since a context switch happended imm after). |
| 554 | |
| 555 | The return pointer register %i7 does not have |
| 556 | the pc saved into it (return from this frame will be accomplished |
| 557 | by a POP_FRAME). In fact, we must leave it unclobbered, since we |
| 558 | must preserve it in the calling routine except across call instructions. */ |
| 559 | |
| 560 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ |
| 561 | |
| 562 | void |
| 563 | sparc_push_dummy_frame () |
| 564 | { |
| 565 | CORE_ADDR fp; |
| 566 | char register_temp[REGISTER_BYTES]; |
| 567 | |
| 568 | do_save_insn (0x140); /* FIXME where does this value come from? */ |
| 569 | fp = read_register (FP_REGNUM); |
| 570 | |
| 571 | read_register_bytes (REGISTER_BYTE (FP0_REGNUM), register_temp, 32 * 4); |
| 572 | write_memory (fp - 0x80, register_temp, 32 * 4); |
| 573 | |
| 574 | read_register_bytes (REGISTER_BYTE (G0_REGNUM), register_temp, 8 * 4); |
| 575 | write_memory (fp - 0xa0, register_temp, 8 * 4); |
| 576 | |
| 577 | read_register_bytes (REGISTER_BYTE (I0_REGNUM), register_temp, 8 * 4); |
| 578 | write_memory (fp - 0xc0, register_temp, 8 * 4); |
| 579 | |
| 580 | /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */ |
| 581 | read_register_bytes (REGISTER_BYTE (Y_REGNUM), register_temp, 8 * 4); |
| 582 | write_memory (fp - 0xe0, register_temp, 8 * 4); |
| 583 | } |
| 584 | |
| 585 | /* Discard from the stack the innermost frame, restoring all saved registers. |
| 586 | |
| 587 | Note that the values stored in fsr by get_frame_saved_regs are *in |
| 588 | the context of the called frame*. What this means is that the i |
| 589 | regs of fsr must be restored into the o regs of the (calling) frame that |
| 590 | we pop into. We don't care about the output regs of the calling frame, |
| 591 | since unless it's a dummy frame, it won't have any output regs in it. |
| 592 | |
| 593 | We never have to bother with %l (local) regs, since the called routine's |
| 594 | locals get tossed, and the calling routine's locals are already saved |
| 595 | on its stack. */ |
| 596 | |
| 597 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ |
| 598 | |
| 599 | void |
| 600 | sparc_pop_frame () |
| 601 | { |
| 602 | register FRAME frame = get_current_frame (); |
| 603 | register CORE_ADDR pc; |
| 604 | struct frame_saved_regs fsr; |
| 605 | struct frame_info *fi; |
| 606 | char raw_buffer[REGISTER_BYTES]; |
| 607 | |
| 608 | fi = get_frame_info (frame); |
| 609 | get_frame_saved_regs (fi, &fsr); |
| 610 | do_restore_insn (); |
| 611 | if (fsr.regs[FP0_REGNUM]) |
| 612 | { |
| 613 | read_memory (fsr.regs[FP0_REGNUM], raw_buffer, 32 * 4); |
| 614 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), raw_buffer, 32 * 4); |
| 615 | } |
| 616 | if (fsr.regs[G1_REGNUM]) |
| 617 | { |
| 618 | read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * 4); |
| 619 | write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer, 7 * 4); |
| 620 | } |
| 621 | if (fsr.regs[I0_REGNUM]) |
| 622 | { |
| 623 | read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * 4); |
| 624 | write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer, 8 * 4); |
| 625 | } |
| 626 | if (fsr.regs[PS_REGNUM]) |
| 627 | write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4)); |
| 628 | if (fsr.regs[Y_REGNUM]) |
| 629 | write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], 4)); |
| 630 | if (fsr.regs[PC_REGNUM]) |
| 631 | { |
| 632 | /* Explicitly specified PC (and maybe NPC) -- just restore them. */ |
| 633 | write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM], 4)); |
| 634 | if (fsr.regs[NPC_REGNUM]) |
| 635 | write_register (NPC_REGNUM, |
| 636 | read_memory_integer (fsr.regs[NPC_REGNUM], 4)); |
| 637 | } |
| 638 | else if (fsr.regs[I7_REGNUM]) |
| 639 | { |
| 640 | /* Return address in %i7 -- adjust it, then restore PC and NPC from it */ |
| 641 | pc = PC_ADJUST (read_memory_integer (fsr.regs[I7_REGNUM], 4)); |
| 642 | write_register (PC_REGNUM, pc); |
| 643 | write_register (NPC_REGNUM, pc + 4); |
| 644 | } |
| 645 | flush_cached_frames (); |
| 646 | set_current_frame ( create_new_frame (read_register (FP_REGNUM), |
| 647 | read_pc ())); |
| 648 | } |
| 649 | |
| 650 | /* On the Sun 4 under SunOS, the compile will leave a fake insn which |
| 651 | encodes the structure size being returned. If we detect such |
| 652 | a fake insn, step past it. */ |
| 653 | |
| 654 | CORE_ADDR |
| 655 | sparc_pc_adjust(pc) |
| 656 | CORE_ADDR pc; |
| 657 | { |
| 658 | long insn; |
| 659 | int err; |
| 660 | |
| 661 | err = target_read_memory (pc + 8, (char *)&insn, sizeof(long)); |
| 662 | SWAP_TARGET_AND_HOST (&insn, sizeof(long)); |
| 663 | if ((err == 0) && (insn & 0xfffffe00) == 0) |
| 664 | return pc+12; |
| 665 | else |
| 666 | return pc+8; |
| 667 | } |
| 668 | |
| 669 | |
| 670 | /* Structure of SPARC extended floating point numbers. |
| 671 | This information is not currently used by GDB, since no current SPARC |
| 672 | implementations support extended float. */ |
| 673 | |
| 674 | const struct ext_format ext_format_sparc = { |
| 675 | /* tot sbyte smask expbyte manbyte */ |
| 676 | 16, 0, 0x80, 0,1, 4,8, /* sparc */ |
| 677 | }; |
| 678 | \f |
| 679 | #ifdef USE_PROC_FS /* Target dependent support for /proc */ |
| 680 | |
| 681 | /* The /proc interface divides the target machine's register set up into |
| 682 | two different sets, the general register set (gregset) and the floating |
| 683 | point register set (fpregset). For each set, there is an ioctl to get |
| 684 | the current register set and another ioctl to set the current values. |
| 685 | |
| 686 | The actual structure passed through the ioctl interface is, of course, |
| 687 | naturally machine dependent, and is different for each set of registers. |
| 688 | For the sparc for example, the general register set is typically defined |
| 689 | by: |
| 690 | |
| 691 | typedef int gregset_t[38]; |
| 692 | |
| 693 | #define R_G0 0 |
| 694 | ... |
| 695 | #define R_TBR 37 |
| 696 | |
| 697 | and the floating point set by: |
| 698 | |
| 699 | typedef struct prfpregset { |
| 700 | union { |
| 701 | u_long pr_regs[32]; |
| 702 | double pr_dregs[16]; |
| 703 | } pr_fr; |
| 704 | void * pr_filler; |
| 705 | u_long pr_fsr; |
| 706 | u_char pr_qcnt; |
| 707 | u_char pr_q_entrysize; |
| 708 | u_char pr_en; |
| 709 | u_long pr_q[64]; |
| 710 | } prfpregset_t; |
| 711 | |
| 712 | These routines provide the packing and unpacking of gregset_t and |
| 713 | fpregset_t formatted data. |
| 714 | |
| 715 | */ |
| 716 | |
| 717 | |
| 718 | /* Given a pointer to a general register set in /proc format (gregset_t *), |
| 719 | unpack the register contents and supply them as gdb's idea of the current |
| 720 | register values. */ |
| 721 | |
| 722 | void |
| 723 | supply_gregset (gregsetp) |
| 724 | prgregset_t *gregsetp; |
| 725 | { |
| 726 | register int regi; |
| 727 | register prgreg_t *regp = (prgreg_t *) gregsetp; |
| 728 | |
| 729 | /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */ |
| 730 | for (regi = G0_REGNUM ; regi <= I7_REGNUM ; regi++) |
| 731 | { |
| 732 | supply_register (regi, (char *) (regp + regi)); |
| 733 | } |
| 734 | |
| 735 | /* These require a bit more care. */ |
| 736 | supply_register (PS_REGNUM, (char *) (regp + R_PS)); |
| 737 | supply_register (PC_REGNUM, (char *) (regp + R_PC)); |
| 738 | supply_register (NPC_REGNUM,(char *) (regp + R_nPC)); |
| 739 | supply_register (Y_REGNUM, (char *) (regp + R_Y)); |
| 740 | } |
| 741 | |
| 742 | void |
| 743 | fill_gregset (gregsetp, regno) |
| 744 | prgregset_t *gregsetp; |
| 745 | int regno; |
| 746 | { |
| 747 | int regi; |
| 748 | register prgreg_t *regp = (prgreg_t *) gregsetp; |
| 749 | extern char registers[]; |
| 750 | |
| 751 | for (regi = 0 ; regi <= R_I7 ; regi++) |
| 752 | { |
| 753 | if ((regno == -1) || (regno == regi)) |
| 754 | { |
| 755 | *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)]; |
| 756 | } |
| 757 | } |
| 758 | if ((regno == -1) || (regno == PS_REGNUM)) |
| 759 | { |
| 760 | *(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; |
| 761 | } |
| 762 | if ((regno == -1) || (regno == PC_REGNUM)) |
| 763 | { |
| 764 | *(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; |
| 765 | } |
| 766 | if ((regno == -1) || (regno == NPC_REGNUM)) |
| 767 | { |
| 768 | *(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; |
| 769 | } |
| 770 | if ((regno == -1) || (regno == Y_REGNUM)) |
| 771 | { |
| 772 | *(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; |
| 773 | } |
| 774 | } |
| 775 | |
| 776 | #if defined (FP0_REGNUM) |
| 777 | |
| 778 | /* Given a pointer to a floating point register set in /proc format |
| 779 | (fpregset_t *), unpack the register contents and supply them as gdb's |
| 780 | idea of the current floating point register values. */ |
| 781 | |
| 782 | void |
| 783 | supply_fpregset (fpregsetp) |
| 784 | prfpregset_t *fpregsetp; |
| 785 | { |
| 786 | register int regi; |
| 787 | char *from; |
| 788 | |
| 789 | for (regi = FP0_REGNUM ; regi < FP0_REGNUM+32 ; regi++) |
| 790 | { |
| 791 | from = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; |
| 792 | supply_register (regi, from); |
| 793 | } |
| 794 | supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr)); |
| 795 | } |
| 796 | |
| 797 | /* Given a pointer to a floating point register set in /proc format |
| 798 | (fpregset_t *), update the register specified by REGNO from gdb's idea |
| 799 | of the current floating point register set. If REGNO is -1, update |
| 800 | them all. */ |
| 801 | |
| 802 | void |
| 803 | fill_fpregset (fpregsetp, regno) |
| 804 | prfpregset_t *fpregsetp; |
| 805 | int regno; |
| 806 | { |
| 807 | int regi; |
| 808 | char *to; |
| 809 | char *from; |
| 810 | extern char registers[]; |
| 811 | |
| 812 | for (regi = FP0_REGNUM ; regi < FP0_REGNUM+32 ; regi++) |
| 813 | { |
| 814 | if ((regno == -1) || (regno == regi)) |
| 815 | { |
| 816 | from = (char *) ®isters[REGISTER_BYTE (regi)]; |
| 817 | to = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; |
| 818 | memcpy (to, from, REGISTER_RAW_SIZE (regi)); |
| 819 | } |
| 820 | } |
| 821 | if ((regno == -1) || (regno == FPS_REGNUM)) |
| 822 | { |
| 823 | fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)]; |
| 824 | } |
| 825 | } |
| 826 | |
| 827 | #endif /* defined (FP0_REGNUM) */ |
| 828 | |
| 829 | #endif /* USE_PROC_FS */ |
| 830 | |
| 831 | |
| 832 | #ifdef GET_LONGJMP_TARGET |
| 833 | |
| 834 | /* Figure out where the longjmp will land. We expect that we have just entered |
| 835 | longjmp and haven't yet setup the stack frame, so the args are still in the |
| 836 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we |
| 837 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. |
| 838 | This routine returns true on success */ |
| 839 | |
| 840 | int |
| 841 | get_longjmp_target(pc) |
| 842 | CORE_ADDR *pc; |
| 843 | { |
| 844 | CORE_ADDR jb_addr; |
| 845 | |
| 846 | jb_addr = read_register(O0_REGNUM); |
| 847 | |
| 848 | if (target_read_memory(jb_addr + JB_PC * JB_ELEMENT_SIZE, (char *) pc, |
| 849 | sizeof(CORE_ADDR))) |
| 850 | return 0; |
| 851 | |
| 852 | SWAP_TARGET_AND_HOST(pc, sizeof(CORE_ADDR)); |
| 853 | |
| 854 | return 1; |
| 855 | } |
| 856 | #endif /* GET_LONGJMP_TARGET */ |
| 857 | |
| 858 | /* So far used only for sparc solaris. In sparc solaris, we recognize |
| 859 | a trampoline by it's section name. That is, if the pc is in a |
| 860 | section named ".plt" then we are in a trampline. */ |
| 861 | |
| 862 | int |
| 863 | in_solib_trampoline(pc, name) |
| 864 | CORE_ADDR pc; |
| 865 | char *name; |
| 866 | { |
| 867 | struct obj_section *s; |
| 868 | int retval = 0; |
| 869 | |
| 870 | s = find_pc_section(pc); |
| 871 | |
| 872 | retval = (s != NULL |
| 873 | && s->sec_ptr->name != NULL |
| 874 | && STREQ (s->sec_ptr->name, ".plt")); |
| 875 | return(retval); |
| 876 | } |
| 877 | |