| 1 | /* SPU target-dependent code for GDB, the GNU debugger. |
| 2 | Copyright (C) 2006, 2007 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of GDB. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
| 19 | Boston, MA 02110-1301, USA. */ |
| 20 | |
| 21 | #ifndef SPU_TDEP_H |
| 22 | #define SPU_TDEP_H |
| 23 | |
| 24 | /* Number of registers. */ |
| 25 | #define SPU_NUM_REGS 130 |
| 26 | #define SPU_NUM_PSEUDO_REGS 6 |
| 27 | #define SPU_NUM_GPRS 128 |
| 28 | |
| 29 | /* Register numbers of various important registers. */ |
| 30 | enum spu_regnum |
| 31 | { |
| 32 | /* SPU calling convention. */ |
| 33 | SPU_LR_REGNUM = 0, /* Link register. */ |
| 34 | SPU_RAW_SP_REGNUM = 1, /* Stack pointer (full register). */ |
| 35 | SPU_ARG1_REGNUM = 3, /* First argument register. */ |
| 36 | SPU_ARGN_REGNUM = 74, /* Last argument register. */ |
| 37 | SPU_SAVED1_REGNUM = 80, /* First call-saved register. */ |
| 38 | SPU_SAVEDN_REGNUM = 127, /* Last call-saved register. */ |
| 39 | SPU_FP_REGNUM = 127, /* Frame pointer. */ |
| 40 | |
| 41 | /* Special registers. */ |
| 42 | SPU_ID_REGNUM = 128, /* SPU ID register. */ |
| 43 | SPU_PC_REGNUM = 129, /* Next program counter. */ |
| 44 | SPU_SP_REGNUM = 130, /* Stack pointer (preferred slot). */ |
| 45 | SPU_FPSCR_REGNUM = 131, /* Floating point status/control register. */ |
| 46 | SPU_SRR0_REGNUM = 132, /* SRR0 register. */ |
| 47 | SPU_LSLR_REGNUM = 133, /* Local store limit register. */ |
| 48 | SPU_DECR_REGNUM = 134, /* Decrementer value. */ |
| 49 | SPU_DECR_STATUS_REGNUM = 135 /* Decrementer status. */ |
| 50 | }; |
| 51 | |
| 52 | /* Local store. */ |
| 53 | #define SPU_LS_SIZE 0x40000 |
| 54 | |
| 55 | #endif |