| 1 | /* Target-dependent code for the NEC V850 for GDB, the GNU debugger. |
| 2 | |
| 3 | Copyright (C) 1996, 1998-2005, 2007-2012 Free Software Foundation, |
| 4 | Inc. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
| 20 | |
| 21 | #include "defs.h" |
| 22 | #include "frame.h" |
| 23 | #include "frame-base.h" |
| 24 | #include "trad-frame.h" |
| 25 | #include "frame-unwind.h" |
| 26 | #include "dwarf2-frame.h" |
| 27 | #include "gdbtypes.h" |
| 28 | #include "inferior.h" |
| 29 | #include "gdb_string.h" |
| 30 | #include "gdb_assert.h" |
| 31 | #include "gdbcore.h" |
| 32 | #include "arch-utils.h" |
| 33 | #include "regcache.h" |
| 34 | #include "dis-asm.h" |
| 35 | #include "osabi.h" |
| 36 | |
| 37 | enum |
| 38 | { |
| 39 | E_R0_REGNUM, |
| 40 | E_R1_REGNUM, |
| 41 | E_R2_REGNUM, |
| 42 | E_R3_REGNUM, E_SP_REGNUM = E_R3_REGNUM, |
| 43 | E_R4_REGNUM, |
| 44 | E_R5_REGNUM, |
| 45 | E_R6_REGNUM, E_ARG0_REGNUM = E_R6_REGNUM, |
| 46 | E_R7_REGNUM, |
| 47 | E_R8_REGNUM, |
| 48 | E_R9_REGNUM, E_ARGLAST_REGNUM = E_R9_REGNUM, |
| 49 | E_R10_REGNUM, E_V0_REGNUM = E_R10_REGNUM, |
| 50 | E_R11_REGNUM, E_V1_REGNUM = E_R11_REGNUM, |
| 51 | E_R12_REGNUM, |
| 52 | E_R13_REGNUM, |
| 53 | E_R14_REGNUM, |
| 54 | E_R15_REGNUM, |
| 55 | E_R16_REGNUM, |
| 56 | E_R17_REGNUM, |
| 57 | E_R18_REGNUM, |
| 58 | E_R19_REGNUM, |
| 59 | E_R20_REGNUM, |
| 60 | E_R21_REGNUM, |
| 61 | E_R22_REGNUM, |
| 62 | E_R23_REGNUM, |
| 63 | E_R24_REGNUM, |
| 64 | E_R25_REGNUM, |
| 65 | E_R26_REGNUM, |
| 66 | E_R27_REGNUM, |
| 67 | E_R28_REGNUM, |
| 68 | E_R29_REGNUM, E_FP_REGNUM = E_R29_REGNUM, |
| 69 | E_R30_REGNUM, E_EP_REGNUM = E_R30_REGNUM, |
| 70 | E_R31_REGNUM, E_LP_REGNUM = E_R31_REGNUM, |
| 71 | E_R32_REGNUM, E_SR0_REGNUM = E_R32_REGNUM, |
| 72 | E_R33_REGNUM, |
| 73 | E_R34_REGNUM, |
| 74 | E_R35_REGNUM, |
| 75 | E_R36_REGNUM, |
| 76 | E_R37_REGNUM, E_PS_REGNUM = E_R37_REGNUM, |
| 77 | E_R38_REGNUM, |
| 78 | E_R39_REGNUM, |
| 79 | E_R40_REGNUM, |
| 80 | E_R41_REGNUM, |
| 81 | E_R42_REGNUM, |
| 82 | E_R43_REGNUM, |
| 83 | E_R44_REGNUM, |
| 84 | E_R45_REGNUM, |
| 85 | E_R46_REGNUM, |
| 86 | E_R47_REGNUM, |
| 87 | E_R48_REGNUM, |
| 88 | E_R49_REGNUM, |
| 89 | E_R50_REGNUM, |
| 90 | E_R51_REGNUM, |
| 91 | E_R52_REGNUM, E_CTBP_REGNUM = E_R52_REGNUM, |
| 92 | E_R53_REGNUM, |
| 93 | E_R54_REGNUM, |
| 94 | E_R55_REGNUM, |
| 95 | E_R56_REGNUM, |
| 96 | E_R57_REGNUM, |
| 97 | E_R58_REGNUM, |
| 98 | E_R59_REGNUM, |
| 99 | E_R60_REGNUM, |
| 100 | E_R61_REGNUM, |
| 101 | E_R62_REGNUM, |
| 102 | E_R63_REGNUM, |
| 103 | E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM, |
| 104 | E_R65_REGNUM, E_NUM_OF_V850_REGS = E_R65_REGNUM, E_NUM_OF_V850E_REGS = E_R65_REGNUM, |
| 105 | |
| 106 | /* mpu0 system registers */ |
| 107 | E_R66_REGNUM, |
| 108 | E_R67_REGNUM, |
| 109 | E_R68_REGNUM, |
| 110 | E_R69_REGNUM, |
| 111 | E_R70_REGNUM, |
| 112 | E_R71_REGNUM, |
| 113 | E_R72_REGNUM, |
| 114 | E_R73_REGNUM, |
| 115 | E_R74_REGNUM, |
| 116 | E_R75_REGNUM, |
| 117 | E_R76_REGNUM, |
| 118 | E_R77_REGNUM, |
| 119 | E_R78_REGNUM, |
| 120 | E_R79_REGNUM, |
| 121 | E_R80_REGNUM, |
| 122 | E_R81_REGNUM, |
| 123 | E_R82_REGNUM, |
| 124 | E_R83_REGNUM, |
| 125 | E_R84_REGNUM, |
| 126 | E_R85_REGNUM, |
| 127 | E_R86_REGNUM, |
| 128 | E_R87_REGNUM, |
| 129 | E_R88_REGNUM, |
| 130 | E_R89_REGNUM, |
| 131 | E_R90_REGNUM, |
| 132 | E_R91_REGNUM, |
| 133 | E_R92_REGNUM, |
| 134 | E_R93_REGNUM, |
| 135 | |
| 136 | /* mpu1 system registers */ |
| 137 | |
| 138 | E_R94_REGNUM, |
| 139 | E_R95_REGNUM, |
| 140 | E_R96_REGNUM, |
| 141 | E_R97_REGNUM, |
| 142 | E_R98_REGNUM, |
| 143 | E_R99_REGNUM, |
| 144 | E_R100_REGNUM, |
| 145 | E_R101_REGNUM, |
| 146 | E_R102_REGNUM, |
| 147 | E_R103_REGNUM, |
| 148 | E_R104_REGNUM, |
| 149 | E_R105_REGNUM, |
| 150 | E_R106_REGNUM, |
| 151 | E_R107_REGNUM, |
| 152 | E_R108_REGNUM, |
| 153 | E_R109_REGNUM, |
| 154 | E_R110_REGNUM, |
| 155 | E_R111_REGNUM, |
| 156 | E_R112_REGNUM, |
| 157 | E_R113_REGNUM, |
| 158 | E_R114_REGNUM, |
| 159 | E_R115_REGNUM, |
| 160 | E_R116_REGNUM, |
| 161 | E_R117_REGNUM, |
| 162 | E_R118_REGNUM, |
| 163 | E_R119_REGNUM, |
| 164 | E_R120_REGNUM, |
| 165 | E_R121_REGNUM, |
| 166 | |
| 167 | /* fpu system registers */ |
| 168 | E_R122_REGNUM, |
| 169 | E_R123_REGNUM, |
| 170 | E_R124_REGNUM, |
| 171 | E_R125_REGNUM, |
| 172 | E_R126_REGNUM, |
| 173 | E_R127_REGNUM, |
| 174 | E_R128_REGNUM, E_FPSR_REGNUM = E_R128_REGNUM, |
| 175 | E_R129_REGNUM, E_FPEPC_REGNUM = E_R129_REGNUM, |
| 176 | E_R130_REGNUM, E_FPST_REGNUM = E_R130_REGNUM, |
| 177 | E_R131_REGNUM, E_FPCC_REGNUM = E_R131_REGNUM, |
| 178 | E_R132_REGNUM, E_FPCFG_REGNUM = E_R132_REGNUM, |
| 179 | E_R133_REGNUM, |
| 180 | E_R134_REGNUM, |
| 181 | E_R135_REGNUM, |
| 182 | E_R136_REGNUM, |
| 183 | E_R137_REGNUM, |
| 184 | E_R138_REGNUM, |
| 185 | E_R139_REGNUM, |
| 186 | E_R140_REGNUM, |
| 187 | E_R141_REGNUM, |
| 188 | E_R142_REGNUM, |
| 189 | E_R143_REGNUM, |
| 190 | E_R144_REGNUM, |
| 191 | E_R145_REGNUM, |
| 192 | E_R146_REGNUM, |
| 193 | E_R147_REGNUM, |
| 194 | E_R148_REGNUM, |
| 195 | E_NUM_REGS |
| 196 | }; |
| 197 | |
| 198 | enum |
| 199 | { |
| 200 | v850_reg_size = 4 |
| 201 | }; |
| 202 | |
| 203 | /* Size of return datatype which fits into all return registers. */ |
| 204 | enum |
| 205 | { |
| 206 | E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size |
| 207 | }; |
| 208 | |
| 209 | struct v850_frame_cache |
| 210 | { |
| 211 | /* Base address. */ |
| 212 | CORE_ADDR base; |
| 213 | LONGEST sp_offset; |
| 214 | CORE_ADDR pc; |
| 215 | |
| 216 | /* Flag showing that a frame has been created in the prologue code. */ |
| 217 | int uses_fp; |
| 218 | |
| 219 | /* Saved registers. */ |
| 220 | struct trad_frame_saved_reg *saved_regs; |
| 221 | }; |
| 222 | |
| 223 | /* Info gleaned from scanning a function's prologue. */ |
| 224 | struct pifsr /* Info about one saved register. */ |
| 225 | { |
| 226 | int offset; /* Offset from sp or fp. */ |
| 227 | int cur_frameoffset; /* Current frameoffset. */ |
| 228 | int reg; /* Saved register number. */ |
| 229 | }; |
| 230 | |
| 231 | static const char * |
| 232 | v850_register_name (struct gdbarch *gdbarch, int regnum) |
| 233 | { |
| 234 | static const char *v850_reg_names[] = |
| 235 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 236 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 237 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
| 238 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
| 239 | "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", |
| 240 | "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", |
| 241 | "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23", |
| 242 | "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", |
| 243 | "pc", "fp" |
| 244 | }; |
| 245 | if (regnum < 0 || regnum > E_NUM_OF_V850_REGS) |
| 246 | return NULL; |
| 247 | return v850_reg_names[regnum]; |
| 248 | } |
| 249 | |
| 250 | static const char * |
| 251 | v850e_register_name (struct gdbarch *gdbarch, int regnum) |
| 252 | { |
| 253 | static const char *v850e_reg_names[] = |
| 254 | { |
| 255 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 256 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 257 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
| 258 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
| 259 | "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", |
| 260 | "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", |
| 261 | "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23", |
| 262 | "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", |
| 263 | "pc", "fp" |
| 264 | }; |
| 265 | if (regnum < 0 || regnum > E_NUM_OF_V850E_REGS) |
| 266 | return NULL; |
| 267 | return v850e_reg_names[regnum]; |
| 268 | } |
| 269 | |
| 270 | static const char * |
| 271 | v850e2_register_name (struct gdbarch *gdbarch, int regnum) |
| 272 | { |
| 273 | static const char *v850e2_reg_names[] = |
| 274 | { |
| 275 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
| 276 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
| 277 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
| 278 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
| 279 | |
| 280 | "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", |
| 281 | "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", |
| 282 | "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23", |
| 283 | "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", |
| 284 | "pc", "fp" |
| 285 | |
| 286 | /* mpu0 system registers */ |
| 287 | "vip", "sr33", "sr34", "sr35", "vmecr", "vmtid", "vmadr", "sr39", |
| 288 | "vpecr", "vptid", "vpadr", "sr43", "vdecr", "vdtid", "sr46", "sr47", |
| 289 | "sr48", "sr49", "sr50", "sr51", "sr52", "sr53", "sr54", "sr55", |
| 290 | "sr56", "sr57", "sr58", "sr59", |
| 291 | |
| 292 | /* mpu1 system registers */ |
| 293 | "mpm", "mpc", "tid", "ppa", "ppm", "ppc", "dcc", "dcv0", |
| 294 | "dcv1", "sr69", "spal", "spau", "ipa0l", "ipa0u", "ipa1l", "ipa1u", |
| 295 | "iap2l", "ipa2u", "ipa3l", "ipa3u", "dpa0l", "dpa0u", "dpa1l", "dpa1u", |
| 296 | "dpa2l", "dpa2u", "dpa3l", "dpa3u", |
| 297 | |
| 298 | /* fpu system registers */ |
| 299 | "sr88", "sr89", "sr90", "sr91", "sr92", "sr93", "fpsr", "fpepc", |
| 300 | "fpst", "fpcc", "fpcfg", "sr99", "sr100", "sr101", "sr102", "sr103", |
| 301 | "sr104", "sr105", "sr106", "sr107", "sr108", "sr109", "sr110", "sr111", |
| 302 | "sr112", "sr113", "sr114", "sr115" |
| 303 | }; |
| 304 | if (regnum < 0 || regnum >= E_NUM_REGS) |
| 305 | return NULL; |
| 306 | return v850e2_reg_names[regnum]; |
| 307 | } |
| 308 | |
| 309 | /* Returns the default type for register N. */ |
| 310 | |
| 311 | static struct type * |
| 312 | v850_register_type (struct gdbarch *gdbarch, int regnum) |
| 313 | { |
| 314 | if (regnum == E_PC_REGNUM) |
| 315 | return builtin_type (gdbarch)->builtin_func_ptr; |
| 316 | return builtin_type (gdbarch)->builtin_int32; |
| 317 | } |
| 318 | |
| 319 | static int |
| 320 | v850_type_is_scalar (struct type *t) |
| 321 | { |
| 322 | return (TYPE_CODE (t) != TYPE_CODE_STRUCT |
| 323 | && TYPE_CODE (t) != TYPE_CODE_UNION |
| 324 | && TYPE_CODE (t) != TYPE_CODE_ARRAY); |
| 325 | } |
| 326 | |
| 327 | /* Should call_function allocate stack space for a struct return? */ |
| 328 | static int |
| 329 | v850_use_struct_convention (struct type *type) |
| 330 | { |
| 331 | int i; |
| 332 | struct type *fld_type, *tgt_type; |
| 333 | |
| 334 | /* 1. The value is greater than 8 bytes -> returned by copying. */ |
| 335 | if (TYPE_LENGTH (type) > 8) |
| 336 | return 1; |
| 337 | |
| 338 | /* 2. The value is a single basic type -> returned in register. */ |
| 339 | if (v850_type_is_scalar (type)) |
| 340 | return 0; |
| 341 | |
| 342 | /* The value is a structure or union with a single element and that |
| 343 | element is either a single basic type or an array of a single basic |
| 344 | type whose size is greater than or equal to 4 -> returned in register. */ |
| 345 | if ((TYPE_CODE (type) == TYPE_CODE_STRUCT |
| 346 | || TYPE_CODE (type) == TYPE_CODE_UNION) |
| 347 | && TYPE_NFIELDS (type) == 1) |
| 348 | { |
| 349 | fld_type = TYPE_FIELD_TYPE (type, 0); |
| 350 | if (v850_type_is_scalar (fld_type) && TYPE_LENGTH (fld_type) >= 4) |
| 351 | return 0; |
| 352 | |
| 353 | if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY) |
| 354 | { |
| 355 | tgt_type = TYPE_TARGET_TYPE (fld_type); |
| 356 | if (v850_type_is_scalar (tgt_type) && TYPE_LENGTH (tgt_type) >= 4) |
| 357 | return 0; |
| 358 | } |
| 359 | } |
| 360 | |
| 361 | /* The value is a structure whose first element is an integer or a float, |
| 362 | and which contains no arrays of more than two elements -> returned in |
| 363 | register. */ |
| 364 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT |
| 365 | && v850_type_is_scalar (TYPE_FIELD_TYPE (type, 0)) |
| 366 | && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4) |
| 367 | { |
| 368 | for (i = 1; i < TYPE_NFIELDS (type); ++i) |
| 369 | { |
| 370 | fld_type = TYPE_FIELD_TYPE (type, 0); |
| 371 | if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY) |
| 372 | { |
| 373 | tgt_type = TYPE_TARGET_TYPE (fld_type); |
| 374 | if (TYPE_LENGTH (fld_type) >= 0 && TYPE_LENGTH (tgt_type) >= 0 |
| 375 | && TYPE_LENGTH (fld_type) / TYPE_LENGTH (tgt_type) > 2) |
| 376 | return 1; |
| 377 | } |
| 378 | } |
| 379 | return 0; |
| 380 | } |
| 381 | |
| 382 | /* The value is a union which contains at least one field which |
| 383 | would be returned in registers according to these rules -> |
| 384 | returned in register. */ |
| 385 | if (TYPE_CODE (type) == TYPE_CODE_UNION) |
| 386 | { |
| 387 | for (i = 0; i < TYPE_NFIELDS (type); ++i) |
| 388 | { |
| 389 | fld_type = TYPE_FIELD_TYPE (type, 0); |
| 390 | if (!v850_use_struct_convention (fld_type)) |
| 391 | return 0; |
| 392 | } |
| 393 | } |
| 394 | |
| 395 | return 1; |
| 396 | } |
| 397 | |
| 398 | /* Structure for mapping bits in register lists to register numbers. */ |
| 399 | struct reg_list |
| 400 | { |
| 401 | long mask; |
| 402 | int regno; |
| 403 | }; |
| 404 | |
| 405 | /* Helper function for v850_scan_prologue to handle prepare instruction. */ |
| 406 | |
| 407 | static void |
| 408 | v850_handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr, |
| 409 | struct v850_frame_cache *pi, struct pifsr **pifsr_ptr) |
| 410 | { |
| 411 | CORE_ADDR current_pc = *current_pc_ptr; |
| 412 | struct pifsr *pifsr = *pifsr_ptr; |
| 413 | long next = insn2 & 0xffff; |
| 414 | long list12 = ((insn & 1) << 16) + (next & 0xffe0); |
| 415 | long offset = (insn & 0x3e) << 1; |
| 416 | static struct reg_list reg_table[] = |
| 417 | { |
| 418 | {0x00800, 20}, /* r20 */ |
| 419 | {0x00400, 21}, /* r21 */ |
| 420 | {0x00200, 22}, /* r22 */ |
| 421 | {0x00100, 23}, /* r23 */ |
| 422 | {0x08000, 24}, /* r24 */ |
| 423 | {0x04000, 25}, /* r25 */ |
| 424 | {0x02000, 26}, /* r26 */ |
| 425 | {0x01000, 27}, /* r27 */ |
| 426 | {0x00080, 28}, /* r28 */ |
| 427 | {0x00040, 29}, /* r29 */ |
| 428 | {0x10000, 30}, /* ep */ |
| 429 | {0x00020, 31}, /* lp */ |
| 430 | {0, 0} /* end of table */ |
| 431 | }; |
| 432 | int i; |
| 433 | |
| 434 | if ((next & 0x1f) == 0x0b) /* skip imm16 argument */ |
| 435 | current_pc += 2; |
| 436 | else if ((next & 0x1f) == 0x13) /* skip imm16 argument */ |
| 437 | current_pc += 2; |
| 438 | else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */ |
| 439 | current_pc += 4; |
| 440 | |
| 441 | /* Calculate the total size of the saved registers, and add it to the |
| 442 | immediate value used to adjust SP. */ |
| 443 | for (i = 0; reg_table[i].mask != 0; i++) |
| 444 | if (list12 & reg_table[i].mask) |
| 445 | offset += v850_reg_size; |
| 446 | pi->sp_offset -= offset; |
| 447 | |
| 448 | /* Calculate the offsets of the registers relative to the value the SP |
| 449 | will have after the registers have been pushed and the imm5 value has |
| 450 | been subtracted from it. */ |
| 451 | if (pifsr) |
| 452 | { |
| 453 | for (i = 0; reg_table[i].mask != 0; i++) |
| 454 | { |
| 455 | if (list12 & reg_table[i].mask) |
| 456 | { |
| 457 | int reg = reg_table[i].regno; |
| 458 | offset -= v850_reg_size; |
| 459 | pifsr->reg = reg; |
| 460 | pifsr->offset = offset; |
| 461 | pifsr->cur_frameoffset = pi->sp_offset; |
| 462 | pifsr++; |
| 463 | } |
| 464 | } |
| 465 | } |
| 466 | |
| 467 | /* Set result parameters. */ |
| 468 | *current_pc_ptr = current_pc; |
| 469 | *pifsr_ptr = pifsr; |
| 470 | } |
| 471 | |
| 472 | |
| 473 | /* Helper function for v850_scan_prologue to handle pushm/pushl instructions. |
| 474 | The SR bit of the register list is not supported. gcc does not generate |
| 475 | this bit. */ |
| 476 | |
| 477 | static void |
| 478 | v850_handle_pushm (int insn, int insn2, struct v850_frame_cache *pi, |
| 479 | struct pifsr **pifsr_ptr) |
| 480 | { |
| 481 | struct pifsr *pifsr = *pifsr_ptr; |
| 482 | long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0); |
| 483 | long offset = 0; |
| 484 | static struct reg_list pushml_reg_table[] = |
| 485 | { |
| 486 | {0x80000, E_PS_REGNUM}, /* PSW */ |
| 487 | {0x40000, 1}, /* r1 */ |
| 488 | {0x20000, 2}, /* r2 */ |
| 489 | {0x10000, 3}, /* r3 */ |
| 490 | {0x00800, 4}, /* r4 */ |
| 491 | {0x00400, 5}, /* r5 */ |
| 492 | {0x00200, 6}, /* r6 */ |
| 493 | {0x00100, 7}, /* r7 */ |
| 494 | {0x08000, 8}, /* r8 */ |
| 495 | {0x04000, 9}, /* r9 */ |
| 496 | {0x02000, 10}, /* r10 */ |
| 497 | {0x01000, 11}, /* r11 */ |
| 498 | {0x00080, 12}, /* r12 */ |
| 499 | {0x00040, 13}, /* r13 */ |
| 500 | {0x00020, 14}, /* r14 */ |
| 501 | {0x00010, 15}, /* r15 */ |
| 502 | {0, 0} /* end of table */ |
| 503 | }; |
| 504 | static struct reg_list pushmh_reg_table[] = |
| 505 | { |
| 506 | {0x80000, 16}, /* r16 */ |
| 507 | {0x40000, 17}, /* r17 */ |
| 508 | {0x20000, 18}, /* r18 */ |
| 509 | {0x10000, 19}, /* r19 */ |
| 510 | {0x00800, 20}, /* r20 */ |
| 511 | {0x00400, 21}, /* r21 */ |
| 512 | {0x00200, 22}, /* r22 */ |
| 513 | {0x00100, 23}, /* r23 */ |
| 514 | {0x08000, 24}, /* r24 */ |
| 515 | {0x04000, 25}, /* r25 */ |
| 516 | {0x02000, 26}, /* r26 */ |
| 517 | {0x01000, 27}, /* r27 */ |
| 518 | {0x00080, 28}, /* r28 */ |
| 519 | {0x00040, 29}, /* r29 */ |
| 520 | {0x00010, 30}, /* r30 */ |
| 521 | {0x00020, 31}, /* r31 */ |
| 522 | {0, 0} /* end of table */ |
| 523 | }; |
| 524 | struct reg_list *reg_table; |
| 525 | int i; |
| 526 | |
| 527 | /* Is this a pushml or a pushmh? */ |
| 528 | if ((insn2 & 7) == 1) |
| 529 | reg_table = pushml_reg_table; |
| 530 | else |
| 531 | reg_table = pushmh_reg_table; |
| 532 | |
| 533 | /* Calculate the total size of the saved registers, and add it to the |
| 534 | immediate value used to adjust SP. */ |
| 535 | for (i = 0; reg_table[i].mask != 0; i++) |
| 536 | if (list12 & reg_table[i].mask) |
| 537 | offset += v850_reg_size; |
| 538 | pi->sp_offset -= offset; |
| 539 | |
| 540 | /* Calculate the offsets of the registers relative to the value the SP |
| 541 | will have after the registers have been pushed and the imm5 value is |
| 542 | subtracted from it. */ |
| 543 | if (pifsr) |
| 544 | { |
| 545 | for (i = 0; reg_table[i].mask != 0; i++) |
| 546 | { |
| 547 | if (list12 & reg_table[i].mask) |
| 548 | { |
| 549 | int reg = reg_table[i].regno; |
| 550 | offset -= v850_reg_size; |
| 551 | pifsr->reg = reg; |
| 552 | pifsr->offset = offset; |
| 553 | pifsr->cur_frameoffset = pi->sp_offset; |
| 554 | pifsr++; |
| 555 | } |
| 556 | } |
| 557 | } |
| 558 | |
| 559 | /* Set result parameters. */ |
| 560 | *pifsr_ptr = pifsr; |
| 561 | } |
| 562 | |
| 563 | /* Helper function to evaluate if register is one of the "save" registers. |
| 564 | This allows to simplify conditionals in v850_analyze_prologue a lot. */ |
| 565 | |
| 566 | static int |
| 567 | v850_is_save_register (int reg) |
| 568 | { |
| 569 | /* The caller-save registers are R2, R20 - R29 and R31. All other |
| 570 | registers are either special purpose (PC, SP), argument registers, |
| 571 | or just considered free for use in the caller. */ |
| 572 | return reg == E_R2_REGNUM |
| 573 | || (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM) |
| 574 | || reg == E_R31_REGNUM; |
| 575 | } |
| 576 | |
| 577 | /* Scan the prologue of the function that contains PC, and record what |
| 578 | we find in PI. Returns the pc after the prologue. Note that the |
| 579 | addresses saved in frame->saved_regs are just frame relative (negative |
| 580 | offsets from the frame pointer). This is because we don't know the |
| 581 | actual value of the frame pointer yet. In some circumstances, the |
| 582 | frame pointer can't be determined till after we have scanned the |
| 583 | prologue. */ |
| 584 | |
| 585 | static CORE_ADDR |
| 586 | v850_analyze_prologue (struct gdbarch *gdbarch, |
| 587 | CORE_ADDR func_addr, CORE_ADDR pc, |
| 588 | struct v850_frame_cache *pi, ULONGEST ctbp) |
| 589 | { |
| 590 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 591 | CORE_ADDR prologue_end, current_pc; |
| 592 | struct pifsr pifsrs[E_NUM_REGS + 1]; |
| 593 | struct pifsr *pifsr, *pifsr_tmp; |
| 594 | int fp_used; |
| 595 | int ep_used; |
| 596 | int reg; |
| 597 | CORE_ADDR save_pc, save_end; |
| 598 | int regsave_func_p; |
| 599 | int r12_tmp; |
| 600 | |
| 601 | memset (&pifsrs, 0, sizeof pifsrs); |
| 602 | pifsr = &pifsrs[0]; |
| 603 | |
| 604 | prologue_end = pc; |
| 605 | |
| 606 | /* Now, search the prologue looking for instructions that setup fp, save |
| 607 | rp, adjust sp and such. We also record the frame offset of any saved |
| 608 | registers. */ |
| 609 | |
| 610 | pi->sp_offset = 0; |
| 611 | pi->uses_fp = 0; |
| 612 | ep_used = 0; |
| 613 | regsave_func_p = 0; |
| 614 | save_pc = 0; |
| 615 | save_end = 0; |
| 616 | r12_tmp = 0; |
| 617 | |
| 618 | for (current_pc = func_addr; current_pc < prologue_end;) |
| 619 | { |
| 620 | int insn; |
| 621 | int insn2 = -1; /* dummy value */ |
| 622 | |
| 623 | insn = read_memory_integer (current_pc, 2, byte_order); |
| 624 | current_pc += 2; |
| 625 | if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */ |
| 626 | { |
| 627 | insn2 = read_memory_integer (current_pc, 2, byte_order); |
| 628 | current_pc += 2; |
| 629 | } |
| 630 | |
| 631 | if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p) |
| 632 | { /* jarl <func>,10 */ |
| 633 | long low_disp = insn2 & ~(long) 1; |
| 634 | long disp = (((((insn & 0x3f) << 16) + low_disp) |
| 635 | & ~(long) 1) ^ 0x00200000) - 0x00200000; |
| 636 | |
| 637 | save_pc = current_pc; |
| 638 | save_end = prologue_end; |
| 639 | regsave_func_p = 1; |
| 640 | current_pc += disp - 4; |
| 641 | prologue_end = (current_pc |
| 642 | + (2 * 3) /* moves to/from ep */ |
| 643 | + 4 /* addi <const>,sp,sp */ |
| 644 | + 2 /* jmp [r10] */ |
| 645 | + (2 * 12) /* sst.w to save r2, r20-r29, r31 */ |
| 646 | + 20); /* slop area */ |
| 647 | } |
| 648 | else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p) |
| 649 | { /* callt <imm6> */ |
| 650 | long adr = ctbp + ((insn & 0x3f) << 1); |
| 651 | |
| 652 | save_pc = current_pc; |
| 653 | save_end = prologue_end; |
| 654 | regsave_func_p = 1; |
| 655 | current_pc = ctbp + (read_memory_unsigned_integer (adr, 2, byte_order) |
| 656 | & 0xffff); |
| 657 | prologue_end = (current_pc |
| 658 | + (2 * 3) /* prepare list2,imm5,sp/imm */ |
| 659 | + 4 /* ctret */ |
| 660 | + 20); /* slop area */ |
| 661 | continue; |
| 662 | } |
| 663 | else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */ |
| 664 | { |
| 665 | v850_handle_prepare (insn, insn2, ¤t_pc, pi, &pifsr); |
| 666 | continue; |
| 667 | } |
| 668 | else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144) |
| 669 | { /* ctret after processing register save. */ |
| 670 | current_pc = save_pc; |
| 671 | prologue_end = save_end; |
| 672 | regsave_func_p = 0; |
| 673 | continue; |
| 674 | } |
| 675 | else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1) |
| 676 | { /* pushml, pushmh */ |
| 677 | v850_handle_pushm (insn, insn2, pi, &pifsr); |
| 678 | continue; |
| 679 | } |
| 680 | else if ((insn & 0xffe0) == 0x0060 && regsave_func_p) |
| 681 | { /* jmp after processing register save. */ |
| 682 | current_pc = save_pc; |
| 683 | prologue_end = save_end; |
| 684 | regsave_func_p = 0; |
| 685 | continue; |
| 686 | } |
| 687 | else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */ |
| 688 | || (insn & 0xffe0) == 0x0060 /* jmp */ |
| 689 | || (insn & 0x0780) == 0x0580) /* branch */ |
| 690 | { |
| 691 | break; /* Ran into end of prologue. */ |
| 692 | } |
| 693 | |
| 694 | else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240)) |
| 695 | /* add <imm>,sp */ |
| 696 | pi->sp_offset += ((insn & 0x1f) ^ 0x10) - 0x10; |
| 697 | else if (insn == ((E_SP_REGNUM << 11) | 0x0600 | E_SP_REGNUM)) |
| 698 | /* addi <imm>,sp,sp */ |
| 699 | pi->sp_offset += insn2; |
| 700 | else if (insn == ((E_FP_REGNUM << 11) | 0x0000 | E_SP_REGNUM)) |
| 701 | /* mov sp,fp */ |
| 702 | pi->uses_fp = 1; |
| 703 | else if (insn == ((E_R12_REGNUM << 11) | 0x0640 | E_R0_REGNUM)) |
| 704 | /* movhi hi(const),r0,r12 */ |
| 705 | r12_tmp = insn2 << 16; |
| 706 | else if (insn == ((E_R12_REGNUM << 11) | 0x0620 | E_R12_REGNUM)) |
| 707 | /* movea lo(const),r12,r12 */ |
| 708 | r12_tmp += insn2; |
| 709 | else if (insn == ((E_SP_REGNUM << 11) | 0x01c0 | E_R12_REGNUM) && r12_tmp) |
| 710 | /* add r12,sp */ |
| 711 | pi->sp_offset += r12_tmp; |
| 712 | else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_SP_REGNUM)) |
| 713 | /* mov sp,ep */ |
| 714 | ep_used = 1; |
| 715 | else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_R1_REGNUM)) |
| 716 | /* mov r1,ep */ |
| 717 | ep_used = 0; |
| 718 | else if (((insn & 0x07ff) == (0x0760 | E_SP_REGNUM) |
| 719 | || (pi->uses_fp |
| 720 | && (insn & 0x07ff) == (0x0760 | E_FP_REGNUM))) |
| 721 | && pifsr |
| 722 | && v850_is_save_register (reg = (insn >> 11) & 0x1f)) |
| 723 | { |
| 724 | /* st.w <reg>,<offset>[sp] or st.w <reg>,<offset>[fp] */ |
| 725 | pifsr->reg = reg; |
| 726 | pifsr->offset = insn2 & ~1; |
| 727 | pifsr->cur_frameoffset = pi->sp_offset; |
| 728 | pifsr++; |
| 729 | } |
| 730 | else if (ep_used |
| 731 | && ((insn & 0x0781) == 0x0501) |
| 732 | && pifsr |
| 733 | && v850_is_save_register (reg = (insn >> 11) & 0x1f)) |
| 734 | { |
| 735 | /* sst.w <reg>,<offset>[ep] */ |
| 736 | pifsr->reg = reg; |
| 737 | pifsr->offset = (insn & 0x007e) << 1; |
| 738 | pifsr->cur_frameoffset = pi->sp_offset; |
| 739 | pifsr++; |
| 740 | } |
| 741 | } |
| 742 | |
| 743 | /* Fix up any offsets to the final offset. If a frame pointer was created, |
| 744 | use it instead of the stack pointer. */ |
| 745 | for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++) |
| 746 | { |
| 747 | pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset; |
| 748 | pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset; |
| 749 | } |
| 750 | |
| 751 | return current_pc; |
| 752 | } |
| 753 | |
| 754 | /* Return the address of the first code past the prologue of the function. */ |
| 755 | |
| 756 | static CORE_ADDR |
| 757 | v850_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
| 758 | { |
| 759 | CORE_ADDR func_addr, func_end; |
| 760 | |
| 761 | /* See what the symbol table says. */ |
| 762 | |
| 763 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) |
| 764 | { |
| 765 | struct symtab_and_line sal; |
| 766 | |
| 767 | sal = find_pc_line (func_addr, 0); |
| 768 | if (sal.line != 0 && sal.end < func_end) |
| 769 | return sal.end; |
| 770 | |
| 771 | /* Either there's no line info, or the line after the prologue is after |
| 772 | the end of the function. In this case, there probably isn't a |
| 773 | prologue. */ |
| 774 | return pc; |
| 775 | } |
| 776 | |
| 777 | /* We can't find the start of this function, so there's nothing we |
| 778 | can do. */ |
| 779 | return pc; |
| 780 | } |
| 781 | |
| 782 | static CORE_ADDR |
| 783 | v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp) |
| 784 | { |
| 785 | return sp & ~3; |
| 786 | } |
| 787 | |
| 788 | /* Setup arguments and LP for a call to the target. First four args |
| 789 | go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs |
| 790 | are passed by reference. 64 bit quantities (doubles and long longs) |
| 791 | may be split between the regs and the stack. When calling a function |
| 792 | that returns a struct, a pointer to the struct is passed in as a secret |
| 793 | first argument (always in R6). |
| 794 | |
| 795 | Stack space for the args has NOT been allocated: that job is up to us. */ |
| 796 | |
| 797 | static CORE_ADDR |
| 798 | v850_push_dummy_call (struct gdbarch *gdbarch, |
| 799 | struct value *function, |
| 800 | struct regcache *regcache, |
| 801 | CORE_ADDR bp_addr, |
| 802 | int nargs, |
| 803 | struct value **args, |
| 804 | CORE_ADDR sp, |
| 805 | int struct_return, |
| 806 | CORE_ADDR struct_addr) |
| 807 | { |
| 808 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 809 | int argreg; |
| 810 | int argnum; |
| 811 | int len = 0; |
| 812 | int stack_offset; |
| 813 | |
| 814 | /* The offset onto the stack at which we will start copying parameters |
| 815 | (after the registers are used up) begins at 16 rather than at zero. |
| 816 | That's how the ABI is defined, though there's no indication that these |
| 817 | 16 bytes are used for anything, not even for saving incoming |
| 818 | argument registers. */ |
| 819 | stack_offset = 16; |
| 820 | |
| 821 | /* Now make space on the stack for the args. */ |
| 822 | for (argnum = 0; argnum < nargs; argnum++) |
| 823 | len += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3); |
| 824 | sp -= len + stack_offset; |
| 825 | |
| 826 | argreg = E_ARG0_REGNUM; |
| 827 | /* The struct_return pointer occupies the first parameter register. */ |
| 828 | if (struct_return) |
| 829 | regcache_cooked_write_unsigned (regcache, argreg++, struct_addr); |
| 830 | |
| 831 | /* Now load as many as possible of the first arguments into |
| 832 | registers, and push the rest onto the stack. There are 16 bytes |
| 833 | in four registers available. Loop thru args from first to last. */ |
| 834 | for (argnum = 0; argnum < nargs; argnum++) |
| 835 | { |
| 836 | int len; |
| 837 | gdb_byte *val; |
| 838 | gdb_byte valbuf[v850_reg_size]; |
| 839 | |
| 840 | if (!v850_type_is_scalar (value_type (*args)) |
| 841 | && TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS) |
| 842 | { |
| 843 | store_unsigned_integer (valbuf, 4, byte_order, |
| 844 | value_address (*args)); |
| 845 | len = 4; |
| 846 | val = valbuf; |
| 847 | } |
| 848 | else |
| 849 | { |
| 850 | len = TYPE_LENGTH (value_type (*args)); |
| 851 | val = (gdb_byte *) value_contents (*args); |
| 852 | } |
| 853 | |
| 854 | while (len > 0) |
| 855 | if (argreg <= E_ARGLAST_REGNUM) |
| 856 | { |
| 857 | CORE_ADDR regval; |
| 858 | |
| 859 | regval = extract_unsigned_integer (val, v850_reg_size, byte_order); |
| 860 | regcache_cooked_write_unsigned (regcache, argreg, regval); |
| 861 | |
| 862 | len -= v850_reg_size; |
| 863 | val += v850_reg_size; |
| 864 | argreg++; |
| 865 | } |
| 866 | else |
| 867 | { |
| 868 | write_memory (sp + stack_offset, val, 4); |
| 869 | |
| 870 | len -= 4; |
| 871 | val += 4; |
| 872 | stack_offset += 4; |
| 873 | } |
| 874 | args++; |
| 875 | } |
| 876 | |
| 877 | /* Store return address. */ |
| 878 | regcache_cooked_write_unsigned (regcache, E_LP_REGNUM, bp_addr); |
| 879 | |
| 880 | /* Update stack pointer. */ |
| 881 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); |
| 882 | |
| 883 | return sp; |
| 884 | } |
| 885 | |
| 886 | static void |
| 887 | v850_extract_return_value (struct type *type, struct regcache *regcache, |
| 888 | gdb_byte *valbuf) |
| 889 | { |
| 890 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
| 891 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 892 | int len = TYPE_LENGTH (type); |
| 893 | |
| 894 | if (len <= v850_reg_size) |
| 895 | { |
| 896 | ULONGEST val; |
| 897 | |
| 898 | regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val); |
| 899 | store_unsigned_integer (valbuf, len, byte_order, val); |
| 900 | } |
| 901 | else if (len <= 2 * v850_reg_size) |
| 902 | { |
| 903 | int i, regnum = E_V0_REGNUM; |
| 904 | gdb_byte buf[v850_reg_size]; |
| 905 | for (i = 0; len > 0; i += 4, len -= 4) |
| 906 | { |
| 907 | regcache_raw_read (regcache, regnum++, buf); |
| 908 | memcpy (valbuf + i, buf, len > 4 ? 4 : len); |
| 909 | } |
| 910 | } |
| 911 | } |
| 912 | |
| 913 | static void |
| 914 | v850_store_return_value (struct type *type, struct regcache *regcache, |
| 915 | const gdb_byte *valbuf) |
| 916 | { |
| 917 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
| 918 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
| 919 | int len = TYPE_LENGTH (type); |
| 920 | |
| 921 | if (len <= v850_reg_size) |
| 922 | regcache_cooked_write_unsigned |
| 923 | (regcache, E_V0_REGNUM, |
| 924 | extract_unsigned_integer (valbuf, len, byte_order)); |
| 925 | else if (len <= 2 * v850_reg_size) |
| 926 | { |
| 927 | int i, regnum = E_V0_REGNUM; |
| 928 | for (i = 0; i < len; i += 4) |
| 929 | regcache_raw_write (regcache, regnum++, valbuf + i); |
| 930 | } |
| 931 | } |
| 932 | |
| 933 | static enum return_value_convention |
| 934 | v850_return_value (struct gdbarch *gdbarch, struct type *func_type, |
| 935 | struct type *type, struct regcache *regcache, |
| 936 | gdb_byte *readbuf, const gdb_byte *writebuf) |
| 937 | { |
| 938 | if (v850_use_struct_convention (type)) |
| 939 | return RETURN_VALUE_STRUCT_CONVENTION; |
| 940 | if (writebuf) |
| 941 | v850_store_return_value (type, regcache, writebuf); |
| 942 | else if (readbuf) |
| 943 | v850_extract_return_value (type, regcache, readbuf); |
| 944 | return RETURN_VALUE_REGISTER_CONVENTION; |
| 945 | } |
| 946 | |
| 947 | const static unsigned char * |
| 948 | v850_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr) |
| 949 | { |
| 950 | static unsigned char breakpoint[] = { 0x85, 0x05 }; |
| 951 | *lenptr = sizeof (breakpoint); |
| 952 | return breakpoint; |
| 953 | } |
| 954 | |
| 955 | static struct v850_frame_cache * |
| 956 | v850_alloc_frame_cache (struct frame_info *this_frame) |
| 957 | { |
| 958 | struct v850_frame_cache *cache; |
| 959 | int i; |
| 960 | |
| 961 | cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache); |
| 962 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
| 963 | |
| 964 | /* Base address. */ |
| 965 | cache->base = 0; |
| 966 | cache->sp_offset = 0; |
| 967 | cache->pc = 0; |
| 968 | |
| 969 | /* Frameless until proven otherwise. */ |
| 970 | cache->uses_fp = 0; |
| 971 | |
| 972 | return cache; |
| 973 | } |
| 974 | |
| 975 | static struct v850_frame_cache * |
| 976 | v850_frame_cache (struct frame_info *this_frame, void **this_cache) |
| 977 | { |
| 978 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
| 979 | struct v850_frame_cache *cache; |
| 980 | CORE_ADDR current_pc; |
| 981 | int i; |
| 982 | |
| 983 | if (*this_cache) |
| 984 | return *this_cache; |
| 985 | |
| 986 | cache = v850_alloc_frame_cache (this_frame); |
| 987 | *this_cache = cache; |
| 988 | |
| 989 | /* In principle, for normal frames, fp holds the frame pointer, |
| 990 | which holds the base address for the current stack frame. |
| 991 | However, for functions that don't need it, the frame pointer is |
| 992 | optional. For these "frameless" functions the frame pointer is |
| 993 | actually the frame pointer of the calling frame. */ |
| 994 | cache->base = get_frame_register_unsigned (this_frame, E_FP_REGNUM); |
| 995 | if (cache->base == 0) |
| 996 | return cache; |
| 997 | |
| 998 | cache->pc = get_frame_func (this_frame); |
| 999 | current_pc = get_frame_pc (this_frame); |
| 1000 | if (cache->pc != 0) |
| 1001 | { |
| 1002 | ULONGEST ctbp; |
| 1003 | ctbp = get_frame_register_unsigned (this_frame, E_CTBP_REGNUM); |
| 1004 | v850_analyze_prologue (gdbarch, cache->pc, current_pc, cache, ctbp); |
| 1005 | } |
| 1006 | |
| 1007 | if (!cache->uses_fp) |
| 1008 | { |
| 1009 | /* We didn't find a valid frame, which means that CACHE->base |
| 1010 | currently holds the frame pointer for our calling frame. If |
| 1011 | we're at the start of a function, or somewhere half-way its |
| 1012 | prologue, the function's frame probably hasn't been fully |
| 1013 | setup yet. Try to reconstruct the base address for the stack |
| 1014 | frame by looking at the stack pointer. For truly "frameless" |
| 1015 | functions this might work too. */ |
| 1016 | cache->base = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
| 1017 | } |
| 1018 | |
| 1019 | /* Now that we have the base address for the stack frame we can |
| 1020 | calculate the value of sp in the calling frame. */ |
| 1021 | trad_frame_set_value (cache->saved_regs, E_SP_REGNUM, |
| 1022 | cache->base - cache->sp_offset); |
| 1023 | |
| 1024 | /* Adjust all the saved registers such that they contain addresses |
| 1025 | instead of offsets. */ |
| 1026 | for (i = 0; i < E_NUM_REGS; i++) |
| 1027 | if (trad_frame_addr_p (cache->saved_regs, i)) |
| 1028 | cache->saved_regs[i].addr += cache->base; |
| 1029 | |
| 1030 | /* The call instruction moves the caller's PC in the callee's LP. |
| 1031 | Since this is an unwind, do the reverse. Copy the location of LP |
| 1032 | into PC (the address / regnum) so that a request for PC will be |
| 1033 | converted into a request for the LP. */ |
| 1034 | |
| 1035 | cache->saved_regs[E_PC_REGNUM] = cache->saved_regs[E_LP_REGNUM]; |
| 1036 | |
| 1037 | return cache; |
| 1038 | } |
| 1039 | |
| 1040 | |
| 1041 | static struct value * |
| 1042 | v850_frame_prev_register (struct frame_info *this_frame, |
| 1043 | void **this_cache, int regnum) |
| 1044 | { |
| 1045 | struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache); |
| 1046 | |
| 1047 | gdb_assert (regnum >= 0); |
| 1048 | |
| 1049 | return trad_frame_get_prev_register (this_frame, cache->saved_regs, regnum); |
| 1050 | } |
| 1051 | |
| 1052 | static void |
| 1053 | v850_frame_this_id (struct frame_info *this_frame, void **this_cache, |
| 1054 | struct frame_id *this_id) |
| 1055 | { |
| 1056 | struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache); |
| 1057 | |
| 1058 | /* This marks the outermost frame. */ |
| 1059 | if (cache->base == 0) |
| 1060 | return; |
| 1061 | |
| 1062 | *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc); |
| 1063 | } |
| 1064 | |
| 1065 | static const struct frame_unwind v850_frame_unwind = { |
| 1066 | NORMAL_FRAME, |
| 1067 | default_frame_unwind_stop_reason, |
| 1068 | v850_frame_this_id, |
| 1069 | v850_frame_prev_register, |
| 1070 | NULL, |
| 1071 | default_frame_sniffer |
| 1072 | }; |
| 1073 | |
| 1074 | static CORE_ADDR |
| 1075 | v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 1076 | { |
| 1077 | return frame_unwind_register_unsigned (next_frame, |
| 1078 | gdbarch_sp_regnum (gdbarch)); |
| 1079 | } |
| 1080 | |
| 1081 | static CORE_ADDR |
| 1082 | v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
| 1083 | { |
| 1084 | return frame_unwind_register_unsigned (next_frame, |
| 1085 | gdbarch_pc_regnum (gdbarch)); |
| 1086 | } |
| 1087 | |
| 1088 | static struct frame_id |
| 1089 | v850_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
| 1090 | { |
| 1091 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, |
| 1092 | gdbarch_sp_regnum (gdbarch)); |
| 1093 | return frame_id_build (sp, get_frame_pc (this_frame)); |
| 1094 | } |
| 1095 | |
| 1096 | static CORE_ADDR |
| 1097 | v850_frame_base_address (struct frame_info *this_frame, void **this_cache) |
| 1098 | { |
| 1099 | struct v850_frame_cache *cache = v850_frame_cache (this_frame, this_cache); |
| 1100 | |
| 1101 | return cache->base; |
| 1102 | } |
| 1103 | |
| 1104 | static const struct frame_base v850_frame_base = { |
| 1105 | &v850_frame_unwind, |
| 1106 | v850_frame_base_address, |
| 1107 | v850_frame_base_address, |
| 1108 | v850_frame_base_address |
| 1109 | }; |
| 1110 | |
| 1111 | static struct gdbarch * |
| 1112 | v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
| 1113 | { |
| 1114 | struct gdbarch *gdbarch; |
| 1115 | |
| 1116 | /* Change the register names based on the current machine type. */ |
| 1117 | if (info.bfd_arch_info->arch != bfd_arch_v850) |
| 1118 | return NULL; |
| 1119 | |
| 1120 | gdbarch = gdbarch_alloc (&info, NULL); |
| 1121 | |
| 1122 | switch (info.bfd_arch_info->mach) |
| 1123 | { |
| 1124 | case bfd_mach_v850: |
| 1125 | set_gdbarch_register_name (gdbarch, v850_register_name); |
| 1126 | break; |
| 1127 | case bfd_mach_v850e: |
| 1128 | case bfd_mach_v850e1: |
| 1129 | set_gdbarch_register_name (gdbarch, v850e_register_name); |
| 1130 | break; |
| 1131 | case bfd_mach_v850e2: |
| 1132 | case bfd_mach_v850e2v3: |
| 1133 | set_gdbarch_register_name (gdbarch, v850e2_register_name); |
| 1134 | break; |
| 1135 | } |
| 1136 | |
| 1137 | set_gdbarch_num_regs (gdbarch, E_NUM_REGS); |
| 1138 | set_gdbarch_num_pseudo_regs (gdbarch, 0); |
| 1139 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); |
| 1140 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); |
| 1141 | set_gdbarch_fp0_regnum (gdbarch, -1); |
| 1142 | |
| 1143 | set_gdbarch_register_type (gdbarch, v850_register_type); |
| 1144 | |
| 1145 | set_gdbarch_char_signed (gdbarch, 1); |
| 1146 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); |
| 1147 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1148 | set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1149 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 1150 | |
| 1151 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1152 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 1153 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); |
| 1154 | |
| 1155 | set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1156 | set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); |
| 1157 | |
| 1158 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
| 1159 | set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc); |
| 1160 | |
| 1161 | set_gdbarch_return_value (gdbarch, v850_return_value); |
| 1162 | set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call); |
| 1163 | set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue); |
| 1164 | |
| 1165 | set_gdbarch_print_insn (gdbarch, print_insn_v850); |
| 1166 | |
| 1167 | set_gdbarch_frame_align (gdbarch, v850_frame_align); |
| 1168 | set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp); |
| 1169 | set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc); |
| 1170 | set_gdbarch_dummy_id (gdbarch, v850_dummy_id); |
| 1171 | frame_base_set_default (gdbarch, &v850_frame_base); |
| 1172 | |
| 1173 | /* Hook in ABI-specific overrides, if they have been registered. */ |
| 1174 | gdbarch_init_osabi (info, gdbarch); |
| 1175 | |
| 1176 | dwarf2_append_unwinders (gdbarch); |
| 1177 | frame_unwind_append_unwinder (gdbarch, &v850_frame_unwind); |
| 1178 | |
| 1179 | return gdbarch; |
| 1180 | } |
| 1181 | |
| 1182 | extern initialize_file_ftype _initialize_v850_tdep; /* -Wmissing-prototypes */ |
| 1183 | |
| 1184 | void |
| 1185 | _initialize_v850_tdep (void) |
| 1186 | { |
| 1187 | register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init); |
| 1188 | } |