| 1 | /* Target-dependent code for the x86-64 for GDB, the GNU debugger. |
| 2 | |
| 3 | Copyright 2001, 2002, 2003 Free Software Foundation, Inc. |
| 4 | Contributed by Jiri Smid, SuSE Labs. |
| 5 | |
| 6 | This file is part of GDB. |
| 7 | |
| 8 | This program is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 2 of the License, or |
| 11 | (at your option) any later version. |
| 12 | |
| 13 | This program is distributed in the hope that it will be useful, |
| 14 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | GNU General Public License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this program; if not, write to the Free Software |
| 20 | Foundation, Inc., 59 Temple Place - Suite 330, |
| 21 | Boston, MA 02111-1307, USA. */ |
| 22 | |
| 23 | #include "defs.h" |
| 24 | #include "inferior.h" |
| 25 | #include "gdbcore.h" |
| 26 | #include "gdbcmd.h" |
| 27 | #include "arch-utils.h" |
| 28 | #include "regcache.h" |
| 29 | #include "symfile.h" |
| 30 | #include "objfiles.h" |
| 31 | #include "x86-64-tdep.h" |
| 32 | #include "dwarf2cfi.h" |
| 33 | #include "gdb_assert.h" |
| 34 | #include "block.h" |
| 35 | |
| 36 | /* Register numbers of various important registers. */ |
| 37 | #define RAX_REGNUM 0 |
| 38 | #define RDX_REGNUM 3 |
| 39 | #define RDI_REGNUM 5 |
| 40 | #define EFLAGS_REGNUM 17 |
| 41 | #define ST0_REGNUM 22 |
| 42 | #define XMM1_REGNUM 39 |
| 43 | |
| 44 | struct register_info |
| 45 | { |
| 46 | int size; |
| 47 | char *name; |
| 48 | struct type **type; |
| 49 | }; |
| 50 | |
| 51 | /* x86_64_register_raw_size_table[i] is the number of bytes of storage in |
| 52 | GDB's register array occupied by register i. */ |
| 53 | static struct register_info x86_64_register_info_table[] = { |
| 54 | /* 0 */ {8, "rax", &builtin_type_int64}, |
| 55 | /* 1 */ {8, "rbx", &builtin_type_int64}, |
| 56 | /* 2 */ {8, "rcx", &builtin_type_int64}, |
| 57 | /* 3 */ {8, "rdx", &builtin_type_int64}, |
| 58 | /* 4 */ {8, "rsi", &builtin_type_int64}, |
| 59 | /* 5 */ {8, "rdi", &builtin_type_int64}, |
| 60 | /* 6 */ {8, "rbp", &builtin_type_void_func_ptr}, |
| 61 | /* 7 */ {8, "rsp", &builtin_type_void_func_ptr}, |
| 62 | /* 8 */ {8, "r8", &builtin_type_int64}, |
| 63 | /* 9 */ {8, "r9", &builtin_type_int64}, |
| 64 | /* 10 */ {8, "r10", &builtin_type_int64}, |
| 65 | /* 11 */ {8, "r11", &builtin_type_int64}, |
| 66 | /* 12 */ {8, "r12", &builtin_type_int64}, |
| 67 | /* 13 */ {8, "r13", &builtin_type_int64}, |
| 68 | /* 14 */ {8, "r14", &builtin_type_int64}, |
| 69 | /* 15 */ {8, "r15", &builtin_type_int64}, |
| 70 | /* 16 */ {8, "rip", &builtin_type_void_func_ptr}, |
| 71 | /* 17 */ {4, "eflags", &builtin_type_int32}, |
| 72 | /* 18 */ {4, "ds", &builtin_type_int32}, |
| 73 | /* 19 */ {4, "es", &builtin_type_int32}, |
| 74 | /* 20 */ {4, "fs", &builtin_type_int32}, |
| 75 | /* 21 */ {4, "gs", &builtin_type_int32}, |
| 76 | /* 22 */ {10, "st0", &builtin_type_i387_ext}, |
| 77 | /* 23 */ {10, "st1", &builtin_type_i387_ext}, |
| 78 | /* 24 */ {10, "st2", &builtin_type_i387_ext}, |
| 79 | /* 25 */ {10, "st3", &builtin_type_i387_ext}, |
| 80 | /* 26 */ {10, "st4", &builtin_type_i387_ext}, |
| 81 | /* 27 */ {10, "st5", &builtin_type_i387_ext}, |
| 82 | /* 28 */ {10, "st6", &builtin_type_i387_ext}, |
| 83 | /* 29 */ {10, "st7", &builtin_type_i387_ext}, |
| 84 | /* 30 */ {4, "fctrl", &builtin_type_int32}, |
| 85 | /* 31 */ {4, "fstat", &builtin_type_int32}, |
| 86 | /* 32 */ {4, "ftag", &builtin_type_int32}, |
| 87 | /* 33 */ {4, "fiseg", &builtin_type_int32}, |
| 88 | /* 34 */ {4, "fioff", &builtin_type_int32}, |
| 89 | /* 35 */ {4, "foseg", &builtin_type_int32}, |
| 90 | /* 36 */ {4, "fooff", &builtin_type_int32}, |
| 91 | /* 37 */ {4, "fop", &builtin_type_int32}, |
| 92 | /* 38 */ {16, "xmm0", &builtin_type_v4sf}, |
| 93 | /* 39 */ {16, "xmm1", &builtin_type_v4sf}, |
| 94 | /* 40 */ {16, "xmm2", &builtin_type_v4sf}, |
| 95 | /* 41 */ {16, "xmm3", &builtin_type_v4sf}, |
| 96 | /* 42 */ {16, "xmm4", &builtin_type_v4sf}, |
| 97 | /* 43 */ {16, "xmm5", &builtin_type_v4sf}, |
| 98 | /* 44 */ {16, "xmm6", &builtin_type_v4sf}, |
| 99 | /* 45 */ {16, "xmm7", &builtin_type_v4sf}, |
| 100 | /* 46 */ {16, "xmm8", &builtin_type_v4sf}, |
| 101 | /* 47 */ {16, "xmm9", &builtin_type_v4sf}, |
| 102 | /* 48 */ {16, "xmm10", &builtin_type_v4sf}, |
| 103 | /* 49 */ {16, "xmm11", &builtin_type_v4sf}, |
| 104 | /* 50 */ {16, "xmm12", &builtin_type_v4sf}, |
| 105 | /* 51 */ {16, "xmm13", &builtin_type_v4sf}, |
| 106 | /* 52 */ {16, "xmm14", &builtin_type_v4sf}, |
| 107 | /* 53 */ {16, "xmm15", &builtin_type_v4sf}, |
| 108 | /* 54 */ {4, "mxcsr", &builtin_type_int32} |
| 109 | }; |
| 110 | |
| 111 | /* This array is a mapping from Dwarf-2 register |
| 112 | numbering to GDB's one. Dwarf-2 numbering is |
| 113 | defined in x86-64 ABI, section 3.6. */ |
| 114 | static int x86_64_dwarf2gdb_regno_map[] = { |
| 115 | 0, 1, 2, 3, /* RAX - RDX */ |
| 116 | 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */ |
| 117 | 8, 9, 10, 11, /* R8 - R11 */ |
| 118 | 12, 13, 14, 15, /* R12 - R15 */ |
| 119 | -1, /* RA - not mapped */ |
| 120 | XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */ |
| 121 | XMM1_REGNUM + 1, XMM1_REGNUM + 2, |
| 122 | XMM1_REGNUM + 3, XMM1_REGNUM + 4, |
| 123 | XMM1_REGNUM + 5, XMM1_REGNUM + 6, |
| 124 | XMM1_REGNUM + 7, XMM1_REGNUM + 8, |
| 125 | XMM1_REGNUM + 9, XMM1_REGNUM + 10, |
| 126 | XMM1_REGNUM + 11, XMM1_REGNUM + 12, |
| 127 | XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */ |
| 128 | ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */ |
| 129 | ST0_REGNUM + 2, ST0_REGNUM + 3, |
| 130 | ST0_REGNUM + 4, ST0_REGNUM + 5, |
| 131 | ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */ |
| 132 | }; |
| 133 | |
| 134 | static int x86_64_dwarf2gdb_regno_map_length = |
| 135 | sizeof (x86_64_dwarf2gdb_regno_map) / |
| 136 | sizeof (x86_64_dwarf2gdb_regno_map[0]); |
| 137 | |
| 138 | /* Number of all registers */ |
| 139 | #define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \ |
| 140 | sizeof (x86_64_register_info_table[0])) |
| 141 | |
| 142 | /* Number of general registers. */ |
| 143 | #define X86_64_NUM_GREGS (22) |
| 144 | |
| 145 | int x86_64_num_regs = X86_64_NUM_REGS; |
| 146 | int x86_64_num_gregs = X86_64_NUM_GREGS; |
| 147 | |
| 148 | /* Did we already print a note about frame pointer? */ |
| 149 | int omit_fp_note_printed = 0; |
| 150 | |
| 151 | /* Number of bytes of storage in the actual machine representation for |
| 152 | register REGNO. */ |
| 153 | int |
| 154 | x86_64_register_raw_size (int regno) |
| 155 | { |
| 156 | return x86_64_register_info_table[regno].size; |
| 157 | } |
| 158 | |
| 159 | /* x86_64_register_byte_table[i] is the offset into the register file of the |
| 160 | start of register number i. We initialize this from |
| 161 | x86_64_register_info_table. */ |
| 162 | int x86_64_register_byte_table[X86_64_NUM_REGS]; |
| 163 | |
| 164 | /* Index within `registers' of the first byte of the space for register REGNO. */ |
| 165 | int |
| 166 | x86_64_register_byte (int regno) |
| 167 | { |
| 168 | return x86_64_register_byte_table[regno]; |
| 169 | } |
| 170 | |
| 171 | /* Return the GDB type object for the "standard" data type of data in |
| 172 | register N. */ |
| 173 | static struct type * |
| 174 | x86_64_register_virtual_type (int regno) |
| 175 | { |
| 176 | return *x86_64_register_info_table[regno].type; |
| 177 | } |
| 178 | |
| 179 | /* x86_64_register_convertible is true if register N's virtual format is |
| 180 | different from its raw format. Note that this definition assumes |
| 181 | that the host supports IEEE 32-bit floats, since it doesn't say |
| 182 | that SSE registers need conversion. Even if we can't find a |
| 183 | counterexample, this is still sloppy. */ |
| 184 | int |
| 185 | x86_64_register_convertible (int regno) |
| 186 | { |
| 187 | return IS_FP_REGNUM (regno); |
| 188 | } |
| 189 | |
| 190 | /* Convert data from raw format for register REGNUM in buffer FROM to |
| 191 | virtual format with type TYPE in buffer TO. In principle both |
| 192 | formats are identical except that the virtual format has two extra |
| 193 | bytes appended that aren't used. We set these to zero. */ |
| 194 | void |
| 195 | x86_64_register_convert_to_virtual (int regnum, struct type *type, |
| 196 | char *from, char *to) |
| 197 | { |
| 198 | char buf[12]; |
| 199 | |
| 200 | /* We only support floating-point values. */ |
| 201 | if (TYPE_CODE (type) != TYPE_CODE_FLT) |
| 202 | { |
| 203 | warning ("Cannot convert floating-point register value " |
| 204 | "to non-floating-point type."); |
| 205 | memset (to, 0, TYPE_LENGTH (type)); |
| 206 | return; |
| 207 | } |
| 208 | /* First add the necessary padding. */ |
| 209 | memcpy (buf, from, FPU_REG_RAW_SIZE); |
| 210 | memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE); |
| 211 | /* Convert to TYPE. This should be a no-op, if TYPE is equivalent |
| 212 | to the extended floating-point format used by the FPU. */ |
| 213 | convert_typed_floating (to, type, buf, |
| 214 | x86_64_register_virtual_type (regnum)); |
| 215 | } |
| 216 | |
| 217 | /* Convert data from virtual format with type TYPE in buffer FROM to |
| 218 | raw format for register REGNUM in buffer TO. Simply omit the two |
| 219 | unused bytes. */ |
| 220 | |
| 221 | void |
| 222 | x86_64_register_convert_to_raw (struct type *type, int regnum, |
| 223 | char *from, char *to) |
| 224 | { |
| 225 | gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12); |
| 226 | /* Simply omit the two unused bytes. */ |
| 227 | memcpy (to, from, FPU_REG_RAW_SIZE); |
| 228 | } |
| 229 | |
| 230 | /* Dwarf-2 <-> GDB register numbers mapping. */ |
| 231 | int |
| 232 | x86_64_dwarf2_reg_to_regnum (int dw_reg) |
| 233 | { |
| 234 | if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length) |
| 235 | { |
| 236 | warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg); |
| 237 | return dw_reg; |
| 238 | } |
| 239 | |
| 240 | return x86_64_dwarf2gdb_regno_map[dw_reg]; |
| 241 | } |
| 242 | |
| 243 | /* This is the variable that is set with "set disassembly-flavour", and |
| 244 | its legitimate values. */ |
| 245 | static const char att_flavour[] = "att"; |
| 246 | static const char intel_flavour[] = "intel"; |
| 247 | static const char *valid_flavours[] = { |
| 248 | att_flavour, |
| 249 | intel_flavour, |
| 250 | NULL |
| 251 | }; |
| 252 | static const char *disassembly_flavour = att_flavour; |
| 253 | |
| 254 | /* Push the return address (pointing to the call dummy) onto the stack |
| 255 | and return the new value for the stack pointer. */ |
| 256 | |
| 257 | static CORE_ADDR |
| 258 | x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
| 259 | { |
| 260 | char buf[8]; |
| 261 | |
| 262 | store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ()); |
| 263 | write_memory (sp - 8, buf, 8); |
| 264 | return sp - 8; |
| 265 | } |
| 266 | |
| 267 | static void |
| 268 | x86_64_pop_frame (void) |
| 269 | { |
| 270 | generic_pop_current_frame (cfi_pop_frame); |
| 271 | } |
| 272 | \f |
| 273 | |
| 274 | /* The returning of values is done according to the special algorithm. |
| 275 | Some types are returned in registers an some (big structures) in memory. |
| 276 | See ABI for details. |
| 277 | */ |
| 278 | |
| 279 | #define MAX_CLASSES 4 |
| 280 | |
| 281 | enum x86_64_reg_class |
| 282 | { |
| 283 | X86_64_NO_CLASS, |
| 284 | X86_64_INTEGER_CLASS, |
| 285 | X86_64_INTEGERSI_CLASS, |
| 286 | X86_64_SSE_CLASS, |
| 287 | X86_64_SSESF_CLASS, |
| 288 | X86_64_SSEDF_CLASS, |
| 289 | X86_64_SSEUP_CLASS, |
| 290 | X86_64_X87_CLASS, |
| 291 | X86_64_X87UP_CLASS, |
| 292 | X86_64_MEMORY_CLASS |
| 293 | }; |
| 294 | |
| 295 | /* Return the union class of CLASS1 and CLASS2. |
| 296 | See the x86-64 ABI for details. */ |
| 297 | |
| 298 | static enum x86_64_reg_class |
| 299 | merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) |
| 300 | { |
| 301 | /* Rule #1: If both classes are equal, this is the resulting class. */ |
| 302 | if (class1 == class2) |
| 303 | return class1; |
| 304 | |
| 305 | /* Rule #2: If one of the classes is NO_CLASS, the resulting class |
| 306 | is the other class. */ |
| 307 | if (class1 == X86_64_NO_CLASS) |
| 308 | return class2; |
| 309 | if (class2 == X86_64_NO_CLASS) |
| 310 | return class1; |
| 311 | |
| 312 | /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */ |
| 313 | if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS) |
| 314 | return X86_64_MEMORY_CLASS; |
| 315 | |
| 316 | /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */ |
| 317 | if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS) |
| 318 | || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS)) |
| 319 | return X86_64_INTEGERSI_CLASS; |
| 320 | if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS |
| 321 | || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS) |
| 322 | return X86_64_INTEGER_CLASS; |
| 323 | |
| 324 | /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */ |
| 325 | if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS |
| 326 | || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS) |
| 327 | return X86_64_MEMORY_CLASS; |
| 328 | |
| 329 | /* Rule #6: Otherwise class SSE is used. */ |
| 330 | return X86_64_SSE_CLASS; |
| 331 | } |
| 332 | |
| 333 | /* Classify the argument type. CLASSES will be filled by the register |
| 334 | class used to pass each word of the operand. The number of words |
| 335 | is returned. In case the parameter should be passed in memory, 0 |
| 336 | is returned. As a special case for zero sized containers, |
| 337 | classes[0] will be NO_CLASS and 1 is returned. |
| 338 | |
| 339 | See the x86-64 psABI for details. */ |
| 340 | |
| 341 | static int |
| 342 | classify_argument (struct type *type, |
| 343 | enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) |
| 344 | { |
| 345 | int bytes = TYPE_LENGTH (type); |
| 346 | int words = (bytes + 8 - 1) / 8; |
| 347 | |
| 348 | switch (TYPE_CODE (type)) |
| 349 | { |
| 350 | case TYPE_CODE_ARRAY: |
| 351 | case TYPE_CODE_STRUCT: |
| 352 | case TYPE_CODE_UNION: |
| 353 | { |
| 354 | int i; |
| 355 | enum x86_64_reg_class subclasses[MAX_CLASSES]; |
| 356 | |
| 357 | /* On x86-64 we pass structures larger than 16 bytes on the stack. */ |
| 358 | if (bytes > 16) |
| 359 | return 0; |
| 360 | |
| 361 | for (i = 0; i < words; i++) |
| 362 | classes[i] = X86_64_NO_CLASS; |
| 363 | |
| 364 | /* Zero sized arrays or structures are NO_CLASS. We return 0 |
| 365 | to signalize memory class, so handle it as special case. */ |
| 366 | if (!words) |
| 367 | { |
| 368 | classes[0] = X86_64_NO_CLASS; |
| 369 | return 1; |
| 370 | } |
| 371 | switch (TYPE_CODE (type)) |
| 372 | { |
| 373 | case TYPE_CODE_STRUCT: |
| 374 | { |
| 375 | int j; |
| 376 | for (j = 0; j < TYPE_NFIELDS (type); ++j) |
| 377 | { |
| 378 | int num = classify_argument (TYPE_FIELDS (type)[j].type, |
| 379 | subclasses, |
| 380 | (TYPE_FIELDS (type)[j].loc. |
| 381 | bitpos + bit_offset) % 256); |
| 382 | if (!num) |
| 383 | return 0; |
| 384 | for (i = 0; i < num; i++) |
| 385 | { |
| 386 | int pos = |
| 387 | (TYPE_FIELDS (type)[j].loc.bitpos + |
| 388 | bit_offset) / 8 / 8; |
| 389 | classes[i + pos] = |
| 390 | merge_classes (subclasses[i], classes[i + pos]); |
| 391 | } |
| 392 | } |
| 393 | } |
| 394 | break; |
| 395 | case TYPE_CODE_ARRAY: |
| 396 | { |
| 397 | int num; |
| 398 | |
| 399 | num = classify_argument (TYPE_TARGET_TYPE (type), |
| 400 | subclasses, bit_offset); |
| 401 | if (!num) |
| 402 | return 0; |
| 403 | |
| 404 | /* The partial classes are now full classes. */ |
| 405 | if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4) |
| 406 | subclasses[0] = X86_64_SSE_CLASS; |
| 407 | if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4) |
| 408 | subclasses[0] = X86_64_INTEGER_CLASS; |
| 409 | |
| 410 | for (i = 0; i < words; i++) |
| 411 | classes[i] = subclasses[i % num]; |
| 412 | } |
| 413 | break; |
| 414 | case TYPE_CODE_UNION: |
| 415 | { |
| 416 | int j; |
| 417 | { |
| 418 | for (j = 0; j < TYPE_NFIELDS (type); ++j) |
| 419 | { |
| 420 | int num; |
| 421 | num = classify_argument (TYPE_FIELDS (type)[j].type, |
| 422 | subclasses, bit_offset); |
| 423 | if (!num) |
| 424 | return 0; |
| 425 | for (i = 0; i < num; i++) |
| 426 | classes[i] = merge_classes (subclasses[i], classes[i]); |
| 427 | } |
| 428 | } |
| 429 | } |
| 430 | break; |
| 431 | default: |
| 432 | break; |
| 433 | } |
| 434 | /* Final merger cleanup. */ |
| 435 | for (i = 0; i < words; i++) |
| 436 | { |
| 437 | /* If one class is MEMORY, everything should be passed in |
| 438 | memory. */ |
| 439 | if (classes[i] == X86_64_MEMORY_CLASS) |
| 440 | return 0; |
| 441 | |
| 442 | /* The X86_64_SSEUP_CLASS should be always preceeded by |
| 443 | X86_64_SSE_CLASS. */ |
| 444 | if (classes[i] == X86_64_SSEUP_CLASS |
| 445 | && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS)) |
| 446 | classes[i] = X86_64_SSE_CLASS; |
| 447 | |
| 448 | /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */ |
| 449 | if (classes[i] == X86_64_X87UP_CLASS |
| 450 | && (i == 0 || classes[i - 1] != X86_64_X87_CLASS)) |
| 451 | classes[i] = X86_64_SSE_CLASS; |
| 452 | } |
| 453 | return words; |
| 454 | } |
| 455 | break; |
| 456 | case TYPE_CODE_FLT: |
| 457 | switch (bytes) |
| 458 | { |
| 459 | case 4: |
| 460 | if (!(bit_offset % 64)) |
| 461 | classes[0] = X86_64_SSESF_CLASS; |
| 462 | else |
| 463 | classes[0] = X86_64_SSE_CLASS; |
| 464 | return 1; |
| 465 | case 8: |
| 466 | classes[0] = X86_64_SSEDF_CLASS; |
| 467 | return 1; |
| 468 | case 16: |
| 469 | classes[0] = X86_64_X87_CLASS; |
| 470 | classes[1] = X86_64_X87UP_CLASS; |
| 471 | return 2; |
| 472 | } |
| 473 | break; |
| 474 | case TYPE_CODE_INT: |
| 475 | case TYPE_CODE_PTR: |
| 476 | switch (bytes) |
| 477 | { |
| 478 | case 1: |
| 479 | case 2: |
| 480 | case 4: |
| 481 | case 8: |
| 482 | if (bytes * 8 + bit_offset <= 32) |
| 483 | classes[0] = X86_64_INTEGERSI_CLASS; |
| 484 | else |
| 485 | classes[0] = X86_64_INTEGER_CLASS; |
| 486 | return 1; |
| 487 | case 16: |
| 488 | classes[0] = classes[1] = X86_64_INTEGER_CLASS; |
| 489 | return 2; |
| 490 | default: |
| 491 | break; |
| 492 | } |
| 493 | case TYPE_CODE_VOID: |
| 494 | return 0; |
| 495 | default: /* Avoid warning. */ |
| 496 | break; |
| 497 | } |
| 498 | internal_error (__FILE__, __LINE__, |
| 499 | "classify_argument: unknown argument type"); |
| 500 | } |
| 501 | |
| 502 | /* Examine the argument and set *INT_NREGS and *SSE_NREGS to the |
| 503 | number of registers required based on the information passed in |
| 504 | CLASSES. Return 0 if parameter should be passed in memory. */ |
| 505 | |
| 506 | static int |
| 507 | examine_argument (enum x86_64_reg_class classes[MAX_CLASSES], |
| 508 | int n, int *int_nregs, int *sse_nregs) |
| 509 | { |
| 510 | *int_nregs = 0; |
| 511 | *sse_nregs = 0; |
| 512 | if (!n) |
| 513 | return 0; |
| 514 | for (n--; n >= 0; n--) |
| 515 | switch (classes[n]) |
| 516 | { |
| 517 | case X86_64_INTEGER_CLASS: |
| 518 | case X86_64_INTEGERSI_CLASS: |
| 519 | (*int_nregs)++; |
| 520 | break; |
| 521 | case X86_64_SSE_CLASS: |
| 522 | case X86_64_SSESF_CLASS: |
| 523 | case X86_64_SSEDF_CLASS: |
| 524 | (*sse_nregs)++; |
| 525 | break; |
| 526 | case X86_64_NO_CLASS: |
| 527 | case X86_64_SSEUP_CLASS: |
| 528 | case X86_64_X87_CLASS: |
| 529 | case X86_64_X87UP_CLASS: |
| 530 | break; |
| 531 | case X86_64_MEMORY_CLASS: |
| 532 | internal_error (__FILE__, __LINE__, |
| 533 | "examine_argument: unexpected memory class"); |
| 534 | } |
| 535 | return 1; |
| 536 | } |
| 537 | |
| 538 | #define RET_INT_REGS 2 |
| 539 | #define RET_SSE_REGS 2 |
| 540 | |
| 541 | /* Check if the structure in value_type is returned in registers or in |
| 542 | memory. If this function returns 1, GDB will call |
| 543 | STORE_STRUCT_RETURN and EXTRACT_STRUCT_VALUE_ADDRESS else |
| 544 | STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE will be used. */ |
| 545 | int |
| 546 | x86_64_use_struct_convention (int gcc_p, struct type *value_type) |
| 547 | { |
| 548 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 549 | int n = classify_argument (value_type, class, 0); |
| 550 | int needed_intregs; |
| 551 | int needed_sseregs; |
| 552 | |
| 553 | return (!n || |
| 554 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || |
| 555 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS); |
| 556 | } |
| 557 | |
| 558 | /* Extract from an array REGBUF containing the (raw) register state, a |
| 559 | function return value of TYPE, and copy that, in virtual format, |
| 560 | into VALBUF. */ |
| 561 | |
| 562 | void |
| 563 | x86_64_extract_return_value (struct type *type, struct regcache *regcache, |
| 564 | void *valbuf) |
| 565 | { |
| 566 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 567 | int n = classify_argument (type, class, 0); |
| 568 | int needed_intregs; |
| 569 | int needed_sseregs; |
| 570 | int intreg = 0; |
| 571 | int ssereg = 0; |
| 572 | int offset = 0; |
| 573 | int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM }; |
| 574 | int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM }; |
| 575 | |
| 576 | if (!n || |
| 577 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || |
| 578 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS) |
| 579 | { /* memory class */ |
| 580 | CORE_ADDR addr; |
| 581 | regcache_cooked_read (regcache, RAX_REGNUM, &addr); |
| 582 | read_memory (addr, valbuf, TYPE_LENGTH (type)); |
| 583 | return; |
| 584 | } |
| 585 | else |
| 586 | { |
| 587 | int i; |
| 588 | for (i = 0; i < n; i++) |
| 589 | { |
| 590 | switch (class[i]) |
| 591 | { |
| 592 | case X86_64_NO_CLASS: |
| 593 | break; |
| 594 | case X86_64_INTEGER_CLASS: |
| 595 | regcache_cooked_read (regcache, ret_int_r[(intreg + 1) / 2], |
| 596 | (char *) valbuf + offset); |
| 597 | offset += 8; |
| 598 | intreg += 2; |
| 599 | break; |
| 600 | case X86_64_INTEGERSI_CLASS: |
| 601 | regcache_cooked_read_part (regcache, ret_int_r[intreg / 2], |
| 602 | 0, 4, (char *) valbuf + offset); |
| 603 | offset += 8; |
| 604 | intreg++; |
| 605 | break; |
| 606 | case X86_64_SSEDF_CLASS: |
| 607 | case X86_64_SSESF_CLASS: |
| 608 | case X86_64_SSE_CLASS: |
| 609 | regcache_cooked_read_part (regcache, |
| 610 | ret_sse_r[(ssereg + 1) / 2], 0, 8, |
| 611 | (char *) valbuf + offset); |
| 612 | offset += 8; |
| 613 | ssereg += 2; |
| 614 | break; |
| 615 | case X86_64_SSEUP_CLASS: |
| 616 | regcache_cooked_read_part (regcache, ret_sse_r[ssereg / 2], |
| 617 | 0, 8, (char *) valbuf + offset); |
| 618 | offset += 8; |
| 619 | ssereg++; |
| 620 | break; |
| 621 | case X86_64_X87_CLASS: |
| 622 | regcache_cooked_read_part (regcache, FP0_REGNUM, |
| 623 | 0, 8, (char *) valbuf + offset); |
| 624 | offset += 8; |
| 625 | break; |
| 626 | case X86_64_X87UP_CLASS: |
| 627 | regcache_cooked_read_part (regcache, FP0_REGNUM, |
| 628 | 8, 2, (char *) valbuf + offset); |
| 629 | offset += 8; |
| 630 | break; |
| 631 | case X86_64_MEMORY_CLASS: |
| 632 | default: |
| 633 | internal_error (__FILE__, __LINE__, |
| 634 | "Unexpected argument class"); |
| 635 | } |
| 636 | } |
| 637 | } |
| 638 | } |
| 639 | |
| 640 | static void |
| 641 | x86_64_frame_init_saved_regs (struct frame_info *fi) |
| 642 | { |
| 643 | /* Do nothing. Everything is handled by the stack unwinding code. */ |
| 644 | } |
| 645 | |
| 646 | #define INT_REGS 6 |
| 647 | #define SSE_REGS 16 |
| 648 | |
| 649 | CORE_ADDR |
| 650 | x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
| 651 | int struct_return, CORE_ADDR struct_addr) |
| 652 | { |
| 653 | int intreg = 0; |
| 654 | int ssereg = 0; |
| 655 | int i; |
| 656 | static int int_parameter_registers[INT_REGS] = { |
| 657 | 5 /* RDI */ , 4 /* RSI */ , |
| 658 | 3 /* RDX */ , 2 /* RCX */ , |
| 659 | 8 /* R8 */ , 9 /* R9 */ |
| 660 | }; |
| 661 | /* XMM0 - XMM15 */ |
| 662 | static int sse_parameter_registers[SSE_REGS] = { |
| 663 | XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2, |
| 664 | XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6, |
| 665 | XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10, |
| 666 | XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14 |
| 667 | }; |
| 668 | int stack_values_count = 0; |
| 669 | int *stack_values; |
| 670 | stack_values = alloca (nargs * sizeof (int)); |
| 671 | for (i = 0; i < nargs; i++) |
| 672 | { |
| 673 | enum x86_64_reg_class class[MAX_CLASSES]; |
| 674 | int n = classify_argument (args[i]->type, class, 0); |
| 675 | int needed_intregs; |
| 676 | int needed_sseregs; |
| 677 | |
| 678 | if (!n || |
| 679 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) |
| 680 | || intreg / 2 + needed_intregs > INT_REGS |
| 681 | || ssereg / 2 + needed_sseregs > SSE_REGS) |
| 682 | { /* memory class */ |
| 683 | stack_values[stack_values_count++] = i; |
| 684 | } |
| 685 | else |
| 686 | { |
| 687 | int j; |
| 688 | for (j = 0; j < n; j++) |
| 689 | { |
| 690 | int offset = 0; |
| 691 | switch (class[j]) |
| 692 | { |
| 693 | case X86_64_NO_CLASS: |
| 694 | break; |
| 695 | case X86_64_INTEGER_CLASS: |
| 696 | deprecated_write_register_gen (int_parameter_registers |
| 697 | [(intreg + 1) / 2], |
| 698 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 699 | offset += 8; |
| 700 | intreg += 2; |
| 701 | break; |
| 702 | case X86_64_INTEGERSI_CLASS: |
| 703 | deprecated_write_register_gen (int_parameter_registers[intreg / 2], |
| 704 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 705 | offset += 8; |
| 706 | intreg++; |
| 707 | break; |
| 708 | case X86_64_SSEDF_CLASS: |
| 709 | case X86_64_SSESF_CLASS: |
| 710 | case X86_64_SSE_CLASS: |
| 711 | deprecated_write_register_gen (sse_parameter_registers |
| 712 | [(ssereg + 1) / 2], |
| 713 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 714 | offset += 8; |
| 715 | ssereg += 2; |
| 716 | break; |
| 717 | case X86_64_SSEUP_CLASS: |
| 718 | deprecated_write_register_gen (sse_parameter_registers[ssereg / 2], |
| 719 | VALUE_CONTENTS_ALL (args[i]) + offset); |
| 720 | offset += 8; |
| 721 | ssereg++; |
| 722 | break; |
| 723 | case X86_64_X87_CLASS: |
| 724 | case X86_64_MEMORY_CLASS: |
| 725 | stack_values[stack_values_count++] = i; |
| 726 | break; |
| 727 | case X86_64_X87UP_CLASS: |
| 728 | break; |
| 729 | default: |
| 730 | internal_error (__FILE__, __LINE__, |
| 731 | "Unexpected argument class"); |
| 732 | } |
| 733 | intreg += intreg % 2; |
| 734 | ssereg += ssereg % 2; |
| 735 | } |
| 736 | } |
| 737 | } |
| 738 | while (--stack_values_count >= 0) |
| 739 | { |
| 740 | struct value *arg = args[stack_values[stack_values_count]]; |
| 741 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg)); |
| 742 | len += 7; |
| 743 | len -= len % 8; |
| 744 | sp -= len; |
| 745 | write_memory (sp, VALUE_CONTENTS_ALL (arg), len); |
| 746 | } |
| 747 | return sp; |
| 748 | } |
| 749 | |
| 750 | /* Write into the appropriate registers a function return value stored |
| 751 | in VALBUF of type TYPE, given in virtual format. */ |
| 752 | void |
| 753 | x86_64_store_return_value (struct type *type, struct regcache *regcache, |
| 754 | const void *valbuf) |
| 755 | { |
| 756 | int len = TYPE_LENGTH (type); |
| 757 | |
| 758 | if (TYPE_CODE_FLT == TYPE_CODE (type)) |
| 759 | { |
| 760 | /* Floating-point return values can be found in %st(0). */ |
| 761 | if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT |
| 762 | && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext) |
| 763 | { |
| 764 | /* Copy straight over. */ |
| 765 | regcache_cooked_write (regcache, FP0_REGNUM, valbuf); |
| 766 | } |
| 767 | else |
| 768 | { |
| 769 | char buf[FPU_REG_RAW_SIZE]; |
| 770 | DOUBLEST val; |
| 771 | |
| 772 | /* Convert the value found in VALBUF to the extended |
| 773 | floating point format used by the FPU. This is probably |
| 774 | not exactly how it would happen on the target itself, but |
| 775 | it is the best we can do. */ |
| 776 | val = extract_floating (valbuf, TYPE_LENGTH (type)); |
| 777 | floatformat_from_doublest (&floatformat_i387_ext, &val, buf); |
| 778 | regcache_cooked_write_part (regcache, FP0_REGNUM, |
| 779 | 0, FPU_REG_RAW_SIZE, buf); |
| 780 | } |
| 781 | } |
| 782 | else |
| 783 | { |
| 784 | int low_size = REGISTER_RAW_SIZE (0); |
| 785 | int high_size = REGISTER_RAW_SIZE (1); |
| 786 | |
| 787 | if (len <= low_size) |
| 788 | regcache_cooked_write_part (regcache, 0, 0, len, valbuf); |
| 789 | else if (len <= (low_size + high_size)) |
| 790 | { |
| 791 | regcache_cooked_write_part (regcache, 0, 0, low_size, valbuf); |
| 792 | regcache_cooked_write_part (regcache, 1, 0, |
| 793 | len - low_size, |
| 794 | (const char *) valbuf + low_size); |
| 795 | } |
| 796 | else |
| 797 | internal_error (__FILE__, __LINE__, |
| 798 | "Cannot store return value of %d bytes long.", len); |
| 799 | } |
| 800 | } |
| 801 | \f |
| 802 | |
| 803 | const char * |
| 804 | x86_64_register_name (int reg_nr) |
| 805 | { |
| 806 | if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS) |
| 807 | return NULL; |
| 808 | return x86_64_register_info_table[reg_nr].name; |
| 809 | } |
| 810 | |
| 811 | int |
| 812 | x86_64_register_number (const char *name) |
| 813 | { |
| 814 | int reg_nr; |
| 815 | |
| 816 | for (reg_nr = 0; reg_nr < X86_64_NUM_REGS; reg_nr++) |
| 817 | if (strcmp (name, x86_64_register_info_table[reg_nr].name) == 0) |
| 818 | return reg_nr; |
| 819 | return -1; |
| 820 | } |
| 821 | \f |
| 822 | |
| 823 | |
| 824 | /* We have two flavours of disassembly. The machinery on this page |
| 825 | deals with switching between those. */ |
| 826 | |
| 827 | static int |
| 828 | gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info) |
| 829 | { |
| 830 | if (disassembly_flavour == att_flavour) |
| 831 | return print_insn_i386_att (memaddr, info); |
| 832 | else if (disassembly_flavour == intel_flavour) |
| 833 | return print_insn_i386_intel (memaddr, info); |
| 834 | /* Never reached -- disassembly_flavour is always either att_flavour |
| 835 | or intel_flavour. */ |
| 836 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
| 837 | } |
| 838 | \f |
| 839 | |
| 840 | /* Store the address of the place in which to copy the structure the |
| 841 | subroutine will return. This is called from call_function. */ |
| 842 | void |
| 843 | x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) |
| 844 | { |
| 845 | write_register (RDI_REGNUM, addr); |
| 846 | } |
| 847 | |
| 848 | int |
| 849 | x86_64_frameless_function_invocation (struct frame_info *frame) |
| 850 | { |
| 851 | return 0; |
| 852 | } |
| 853 | |
| 854 | /* We will handle only functions beginning with: |
| 855 | 55 pushq %rbp |
| 856 | 48 89 e5 movq %rsp,%rbp |
| 857 | Any function that doesn't start with this sequence |
| 858 | will be assumed to have no prologue and thus no valid |
| 859 | frame pointer in %rbp. */ |
| 860 | #define PROLOG_BUFSIZE 4 |
| 861 | int |
| 862 | x86_64_function_has_prologue (CORE_ADDR pc) |
| 863 | { |
| 864 | int i; |
| 865 | unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 }, |
| 866 | prolog_buf[PROLOG_BUFSIZE]; |
| 867 | |
| 868 | read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE); |
| 869 | |
| 870 | /* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */ |
| 871 | for (i = 0; i < PROLOG_BUFSIZE; i++) |
| 872 | if (prolog_expect[i] != prolog_buf[i]) |
| 873 | return 0; /* ... no, it doesn't. Nothing to skip. */ |
| 874 | |
| 875 | return 1; |
| 876 | } |
| 877 | |
| 878 | /* If a function with debugging information and known beginning |
| 879 | is detected, we will return pc of the next line in the source |
| 880 | code. With this approach we effectively skip the prolog. */ |
| 881 | |
| 882 | CORE_ADDR |
| 883 | x86_64_skip_prologue (CORE_ADDR pc) |
| 884 | { |
| 885 | int i; |
| 886 | struct symtab_and_line v_sal; |
| 887 | struct symbol *v_function; |
| 888 | CORE_ADDR endaddr; |
| 889 | |
| 890 | if (! x86_64_function_has_prologue (pc)) |
| 891 | return pc; |
| 892 | |
| 893 | /* OK, we have found the prologue and want PC of the first |
| 894 | non-prologue instruction. */ |
| 895 | pc += PROLOG_BUFSIZE; |
| 896 | |
| 897 | v_function = find_pc_function (pc); |
| 898 | v_sal = find_pc_line (pc, 0); |
| 899 | |
| 900 | /* If pc doesn't point to a function with debuginfo, some of the |
| 901 | following may be NULL. */ |
| 902 | if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab) |
| 903 | return pc; |
| 904 | |
| 905 | endaddr = BLOCK_END (SYMBOL_BLOCK_VALUE (v_function)); |
| 906 | |
| 907 | for (i = 0; i < v_sal.symtab->linetable->nitems; i++) |
| 908 | if (v_sal.symtab->linetable->item[i].pc >= pc |
| 909 | && v_sal.symtab->linetable->item[i].pc < endaddr) |
| 910 | { |
| 911 | pc = v_sal.symtab->linetable->item[i].pc; |
| 912 | break; |
| 913 | } |
| 914 | |
| 915 | return pc; |
| 916 | } |
| 917 | |
| 918 | /* Sequence of bytes for breakpoint instruction. */ |
| 919 | static const unsigned char * |
| 920 | x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr) |
| 921 | { |
| 922 | static unsigned char breakpoint[] = { 0xcc }; |
| 923 | *lenptr = 1; |
| 924 | return breakpoint; |
| 925 | } |
| 926 | |
| 927 | void |
| 928 | x86_64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) |
| 929 | { |
| 930 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
| 931 | int i, sum; |
| 932 | |
| 933 | /* The x86-64 has 16 SSE registers. */ |
| 934 | tdep->num_xmm_regs = 16; |
| 935 | |
| 936 | /* This is what all the fuss is about. */ |
| 937 | set_gdbarch_long_bit (gdbarch, 64); |
| 938 | set_gdbarch_long_long_bit (gdbarch, 64); |
| 939 | set_gdbarch_ptr_bit (gdbarch, 64); |
| 940 | |
| 941 | /* In contrast to the i386, on the x86-64 a `long double' actually |
| 942 | takes up 128 bits, even though it's still based on the i387 |
| 943 | extended floating-point format which has only 80 significant bits. */ |
| 944 | set_gdbarch_long_double_bit (gdbarch, 128); |
| 945 | |
| 946 | set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS); |
| 947 | |
| 948 | /* Register numbers of various important registers. */ |
| 949 | set_gdbarch_sp_regnum (gdbarch, 7); /* %rsp */ |
| 950 | set_gdbarch_fp_regnum (gdbarch, 6); /* %rbp */ |
| 951 | set_gdbarch_pc_regnum (gdbarch, 16); /* %rip */ |
| 952 | set_gdbarch_ps_regnum (gdbarch, 17); /* %eflags */ |
| 953 | set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* %st(0) */ |
| 954 | |
| 955 | /* The "default" register numbering scheme for the x86-64 is |
| 956 | referred to as the "DWARF register number mapping" in the psABI. |
| 957 | The preferred debugging format for all known x86-64 targets is |
| 958 | actually DWARF2, and GCC doesn't seem to support DWARF (that is |
| 959 | DWARF-1), but we provide the same mapping just in case. This |
| 960 | mapping is also used for stabs, which GCC does support. */ |
| 961 | set_gdbarch_stab_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum); |
| 962 | set_gdbarch_dwarf_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum); |
| 963 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum); |
| 964 | |
| 965 | /* We don't override SDB_REG_RO_REGNUM, sice COFF doesn't seem to be |
| 966 | in use on any of the supported x86-64 targets. */ |
| 967 | |
| 968 | set_gdbarch_register_name (gdbarch, x86_64_register_name); |
| 969 | set_gdbarch_register_size (gdbarch, 8); |
| 970 | |
| 971 | /* Total amount of space needed to store our copies of the machine's |
| 972 | register (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + |
| 973 | SIZEOF_SSE_REGS) */ |
| 974 | for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++) |
| 975 | sum += x86_64_register_info_table[i].size; |
| 976 | set_gdbarch_register_bytes (gdbarch, sum); |
| 977 | |
| 978 | set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size); |
| 979 | set_gdbarch_register_byte (gdbarch, x86_64_register_byte); |
| 980 | set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type); |
| 981 | |
| 982 | set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible); |
| 983 | set_gdbarch_register_convert_to_virtual (gdbarch, |
| 984 | x86_64_register_convert_to_virtual); |
| 985 | set_gdbarch_register_convert_to_raw (gdbarch, |
| 986 | x86_64_register_convert_to_raw); |
| 987 | |
| 988 | /* Getting saved registers is handled by unwind information. */ |
| 989 | set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register); |
| 990 | |
| 991 | /* FIXME: kettenis/20021026: Should we set parm_boundary to 64 here? */ |
| 992 | set_gdbarch_read_fp (gdbarch, cfi_read_fp); |
| 993 | |
| 994 | set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value); |
| 995 | |
| 996 | set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments); |
| 997 | set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address); |
| 998 | set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame); |
| 999 | set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return); |
| 1000 | set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value); |
| 1001 | /* Override, since this is handled by x86_64_extract_return_value. */ |
| 1002 | set_gdbarch_extract_struct_value_address (gdbarch, NULL); |
| 1003 | set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention); |
| 1004 | |
| 1005 | set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); |
| 1006 | set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue); |
| 1007 | |
| 1008 | set_gdbarch_frame_chain (gdbarch, x86_64_linux_frame_chain); |
| 1009 | set_gdbarch_frameless_function_invocation (gdbarch, |
| 1010 | x86_64_frameless_function_invocation); |
| 1011 | /* FIXME: kettenis/20021026: These two are GNU/Linux-specific and |
| 1012 | should be moved elsewhere. */ |
| 1013 | set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc); |
| 1014 | set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call); |
| 1015 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); |
| 1016 | /* FIXME: kettenis/20021026: This one is GNU/Linux-specific too. */ |
| 1017 | set_gdbarch_pc_in_sigtramp (gdbarch, x86_64_linux_in_sigtramp); |
| 1018 | |
| 1019 | set_gdbarch_num_pseudo_regs (gdbarch, 0); |
| 1020 | |
| 1021 | /* Build call frame information (CFI) from DWARF2 frame debug info. */ |
| 1022 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); |
| 1023 | |
| 1024 | /* Initialization of per-frame CFI. */ |
| 1025 | set_gdbarch_deprecated_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info); |
| 1026 | |
| 1027 | /* Frame PC initialization is handled by using CFI. */ |
| 1028 | set_gdbarch_deprecated_init_frame_pc (gdbarch, x86_64_init_frame_pc); |
| 1029 | |
| 1030 | /* Cons up virtual frame pointer for trace. */ |
| 1031 | set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer); |
| 1032 | |
| 1033 | /* FIXME: kettenis/20021026: This is ELF-specific. Fine for now, |
| 1034 | since all supported x86-64 targets are ELF, but that might change |
| 1035 | in the future. */ |
| 1036 | set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section); |
| 1037 | } |
| 1038 | |
| 1039 | void |
| 1040 | _initialize_x86_64_tdep (void) |
| 1041 | { |
| 1042 | /* Initialize the table saying where each register starts in the |
| 1043 | register file. */ |
| 1044 | { |
| 1045 | int i, offset; |
| 1046 | |
| 1047 | offset = 0; |
| 1048 | for (i = 0; i < X86_64_NUM_REGS; i++) |
| 1049 | { |
| 1050 | x86_64_register_byte_table[i] = offset; |
| 1051 | offset += x86_64_register_info_table[i].size; |
| 1052 | } |
| 1053 | } |
| 1054 | } |