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Move OVERRIDE/FINAL from gcc/coretypes.h to include/ansidecl.h
[deliverable/binutils-gdb.git] / include / ChangeLog
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CommitLineData
12016-10-14 Pedro Alves <palves@redhat.com>
2
3 * ansidecl.h (GCC_FINAL): Delete.
4 (OVERRIDE, FINAL): New, moved from gcc/coretypes.h.
5
62016-10-14 Claudiu Zissulescu <claziss@synopsys.com>
7
8 * opcode/arc.h (ARC_OPCODE_ARCV2): New define.
9
102016-09-29 Alan Modra <amodra@gmail.com>
11
12 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
13
142016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
15
16 * opcode/arc.h (insn_class_t): Add two new classes.
17
182016-09-26 Alan Modra <amodra@gmail.com>
19
20 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
21
222016-09-21 Richard Sandiford <richard.sandiford@arm.com>
23
24 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
25
262016-09-21 Richard Sandiford <richard.sandiford@arm.com>
27
28 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
29 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
30 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
31 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
32
332016-09-21 Richard Sandiford <richard.sandiford@arm.com>
34
35 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
36 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
37 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
38 aarch64_insn_classes.
39
402016-09-21 Richard Sandiford <richard.sandiford@arm.com>
41
42 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
43 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
44 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
45
462016-09-21 Richard Sandiford <richard.sandiford@arm.com>
47
48 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
49 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
50 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
51
522016-09-21 Richard Sandiford <richard.sandiford@arm.com>
53
54 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
55 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
56 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
57 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
58 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
59 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
60 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
61 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
62 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
63 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
64 (aarch64_sve_dupm_mov_immediate_p): Declare.
65
662016-09-21 Richard Sandiford <richard.sandiford@arm.com>
67
68 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
69 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
70 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
71 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
72 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
73
742016-09-21 Richard Sandiford <richard.sandiford@arm.com>
75
76 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
77 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
78 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
79 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
80 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
81 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
82 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
83 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
84 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
85 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
86 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
87 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
88 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
89 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
90 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
91 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
92 Likewise.
93
942016-09-21 Richard Sandiford <richard.sandiford@arm.com>
95
96 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
97 aarch64_opnd.
98 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
99 (aarch64_opnd_info): Make shifter.amount an int64_t and
100 rearrange the fields.
101
1022016-09-21 Richard Sandiford <richard.sandiford@arm.com>
103
104 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
105 (AARCH64_OPND_SVE_PRFOP): Likewise.
106 (aarch64_sve_pattern_array): Declare.
107 (aarch64_sve_prfop_array): Likewise.
108
1092016-09-21 Richard Sandiford <richard.sandiford@arm.com>
110
111 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
112 (AARCH64_OPND_QLF_P_M): Likewise.
113
1142016-09-21 Richard Sandiford <richard.sandiford@arm.com>
115
116 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
117 aarch64_operand_class.
118 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
119 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
120 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
121 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
122 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
123 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
124 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
125 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
126
1272016-09-21 Richard Sandiford <richard.sandiford@arm.com>
128
129 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
130 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
131
1322016-09-21 Richard Sandiford <richard.sandiford@arm.com>
133
134 * opcode/aarch64.h (F_STRICT): New flag.
135
1362016-09-07 Richard Earnshaw <rearnsha@arm.com>
137
138 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
139
1402016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
141 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
142 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
143 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
144 relocation.
145
1462016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
147
148 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
149 (ARM_SET_SYM_CMSE_SPCL): Likewise.
150
1512016-08-01 Andrew Jenner <andrew@codesourcery.com>
152
153 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
154
1552016-07-29 Aldy Hernandez <aldyh@redhat.com>
156
157 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
158
1592016-07-27 Graham Markall <graham.markall@embecosm.com>
160
161 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
162 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
163 ARC_NUM_ADDRTYPES.
164 * opcode/arc.h: Add BMU to insn_class_t enum.
165 * opcode/arc.h: Add PMU to insn_class_t enum.
166
1672016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
168
169 * dis-asm.h: Declare print_arc_disassembler_options.
170
1712016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
172
173 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
174 out_implib_bfd fields.
175
1762016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
177
178 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
179
1802016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
181
182 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
183 (SHF_ARM_PURECODE): ... this.
184
1852016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
186
187 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
188 (AARCH64_CPU_HAS_ANY_FEATURES): New.
189 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
190 (AARCH64_OPCODE_HAS_FEATURE): Remove.
191
1922016-06-30 Matthew Wahab <matthew.wahab@arm.com>
193
194 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
195 of enabled FPU features.
196
1972016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
198
199 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
200 SPARC_OPCODE_ARCH_MAX into the enum.
201
2022016-06-28 Richard Sandiford <richard.sandiford@arm.com>
203
204 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
205
2062016-06-28 Maciej W. Rozycki <macro@imgtec.com>
207
208 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
209
2102016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
211
212 * elf/xtensa.h (xtensa_make_property_section): New prototype.
213
2142016-06-24 John Baldwin <jhb@FreeBSD.org>
215
216 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
217 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
218 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
219 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
220
2212016-06-23 Graham Markall <graham.markall@embecosm.com>
222
223 * opcode/arc.h: Make insn_class_t alphabetical again.
224
2252016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
226
227 * elf/dlx.h: Wrap in extern C.
228 * elf/xtensa.h: Likewise.
229 * opcode/arc.h: Likewise.
230
2312016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
232
233 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
234 tilegx_pipeline.
235
2362016-06-21 Graham Markall <graham.markall@embecosm.com>
237
238 * opcode/arc.h: Add nps400 extension and instruction
239 subclass.
240 Remove ARC_OPCODE_NPS400
241 * elf/arc.h: Remove E_ARC_MACH_NPS400
242
2432016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
244
245 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
246 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
247 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
248 SPARC_OPCODE_ARCH_V9M.
249
2502016-06-14 John Baldwin <jhb@FreeBSD.org>
251
252 * opcode/msp430-decode.h (MSP430_Size): Remove.
253 (Msp430_Opcode_Decoded): Change type of size to int.
254
2552016-06-11 Alan Modra <amodra@gmail.com>
256
257 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
258
2592016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
260
261 * opcode/sparc.h: Add missing documentation for hyperprivileged
262 registers in rd (%) and rs1 ($).
263
2642016-06-07 Alan Modra <amodra@gmail.com>
265
266 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
267 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
268 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
269 PPC_APUINFO_VLE: Define.
270
2712016-06-07 Matthew Wahab <matthew.wahab@arm.com>
272
273 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
274 entries.
275 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
276
2772016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
278
279 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
280 (struct arc_long_opcode): New structure.
281 (arc_long_opcodes): Declare.
282 (arc_num_long_opcodes): Declare.
283
2842016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
285
286 * elf/mips.h: Add extern "C".
287 * elf/sh.h: Likewise.
288 * opcode/d10v.h: Likewise.
289 * opcode/d30v.h: Likewise.
290 * opcode/ia64.h: Likewise.
291 * opcode/mips.h: Likewise.
292 * opcode/ppc.h: Likewise.
293 * opcode/sparc.h: Likewise.
294 * opcode/tic6x.h: Likewise.
295 * opcode/v850.h: Likewise.
296
2972016-05-28 Alan Modra <amodra@gmail.com>
298
299 * bfdlink.h (struct bfd_link_callbacks): Update comments.
300 Return void from multiple_definition, multiple_common,
301 add_to_set, constructor, warning, undefined_symbol,
302 reloc_overflow, reloc_dangerous and unattached_reloc.
303
3042016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
305
306 * opcode/metag.h: wrap declarations in extern "C".
307
3082016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
309
310 * opcode/arc.h (insn_subclass_t): Add COND.
311 (flag_class_t): Add F_CLASS_EXTEND.
312
3132016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
314
315 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
316 insn_class.
317 (struct arc_flag_class): Renamed attribute class to flag_class.
318
3192016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
320
321 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
322 plain symbol.
323
3242016-04-29 Tom Tromey <tom@tromey.com>
325
326 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
327 DW_LANG_Rust_old>: New constants.
328
3292016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
330
331 * elf/mips.h (AFL_ASE_DSPR3): New macro.
332 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
333 * opcode/mips.h (ASE_DSPR3): New macro.
334
3352016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
336 Nick Clifton <nickc@redhat.com>
337
338 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
339 enumerator.
340 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
341 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
342 (ARM_SYM_BRANCH_TYPE): Replace by ...
343 (ARM_GET_SYM_BRANCH_TYPE): This and ...
344 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
345 BFD_ASSERT is defined or not.
346
3472016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
348
349 * elf/arm.h (Tag_DSP_extension): Define.
350
3512016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
352
353 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
354
3552016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
356
357 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
358 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
359 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
360 for the high core bits.
361
3622016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
363
364 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
365 (ARC_SYNTAX_NOP): Likewsie.
366 (ARC_OP1_MUST_BE_IMM): Update defined value.
367 (ARC_OP1_IMM_IMPLIED): Likewise.
368 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
369
3702016-04-28 Nick Clifton <nickc@redhat.com>
371
372 PR target/19722
373 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
374
3752016-04-27 Alan Modra <amodra@gmail.com>
376
377 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
378 undef. Formatting.
379
3802016-04-21 Nick Clifton <nickc@redhat.com>
381
382 * bfdlink.h: Add prototype for bfd_link_check_relocs.
383
3842016-04-20 H.J. Lu <hongjiu.lu@intel.com>
385
386 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
387
3882016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
389
390 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
391
3922016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
393
394 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
395
3962016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
397
398 * opcode/arc.h (insn_class_t): Add NET and ACL class.
399
4002016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
401
402 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
403 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
404
4052016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
406
407 * opcode/arc.h (flag_class_t): Update.
408 (ARC_OPCODE_NONE): Define.
409 (ARC_OPCODE_ARCALL): Likewise.
410 (ARC_OPCODE_ARCFPX): Likewise.
411 (ARC_REGISTER_READONLY): Likewise.
412 (ARC_REGISTER_WRITEONLY): Likewise.
413 (ARC_REGISTER_NOSHORT_CUT): Likewise.
414 (arc_aux_reg): Add cpu.
415
4162016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
417
418 * opcode/arc.h (arc_num_opcodes): Remove.
419 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
420 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
421 (ARC_SUFFIX_FLAG): Define.
422 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
423 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
424 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
425 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
426 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
427 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
428 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
429 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
430 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
431 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
432
4332016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
434
435 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
436 (ARC_FPUDA): Define.
437 (arc_aux_reg): Add new field.
438
4392016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
440
441 * opcode/arc-func.h (replace_bits24): Changed.
442 (replace_bits24_be): Created.
443
4442016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
445
446 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
447 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
448 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
449 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
450 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
451 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
452 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
453 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
454 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
455 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
456 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
457 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
458 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
459 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
460
4612016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
462
463 * opcode/i960.h: Add const qualifiers.
464 * opcode/tic4x.h (struct tic4x_inst): Likewise.
465
4662016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
467
468 * opcodes/arc.h (insn_class_t): Add BITOP type.
469
4702016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
471
472 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
473 new classes instead.
474
4752016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
476
477 * elf/arc.h (E_ARC_MACH_NPS400): Define.
478 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
479
4802016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
481
482 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
483
4842016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
485
486 * elf/arc.h (EF_ARC_MACH): Delete.
487 (EF_ARC_MACH_MSK): Remove out of date comment.
488
4892016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
490
491 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
492
4932016-03-15 H.J. Lu <hongjiu.lu@intel.com>
494
495 PR ld/19807
496 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
497
4982016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
499 Andrew Burgess <andrew.burgess@embecosm.com>
500
501 * elf/arc-reloc.def: Add a call to ME within the formula for each
502 relocation that requires middle-endian correction.
503
5042016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
505
506 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
507 * opcode/h8300.h (struct h8_opcode): Likewise.
508 * opcode/hppa.h (struct pa_opcode): Likewise.
509 * opcode/msp430.h: Likewise.
510 * opcode/spu.h (struct spu_opcode): Likewise.
511 * opcode/tic30.h (struct _register): Likewise.
512 * opcode/tic4x.h (struct tic4x_register): Likewise.
513 (struct tic4x_cond): Likewise.
514 (struct tic4x_indirect): Likewise.
515 (struct tic4x_inst): Likewise.
516 * opcode/visium.h (struct reg_entry): Likewise.
517
5182016-03-04 Matthew Wahab <matthew.wahab@arm.com>
519
520 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
521 (ARM_CPU_HAS_FEATURE): Add comment.
522
5232016-03-03 Than McIntosh <thanm@google.com>
524
525 * plugin-api.h: Add new hooks to the plugin transfer vector to
526 to support querying section alignment and section size.
527 (ld_plugin_get_input_section_alignment): New hook.
528 (ld_plugin_get_input_section_size): New hook.
529 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
530 and LDPT_GET_INPUT_SECTION_SIZE.
531 (ld_plugin_tv): Add tv_get_input_section_alignment and
532 tv_get_input_section_size.
533
5342016-03-03 Evgenii Stepanov <eugenis@google.com>
535
536 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
537
5382016-02-26 H.J. Lu <hongjiu.lu@intel.com>
539
540 PR ld/19645
541 * bfdlink.h (bfd_link_elf_stt_common): New enum.
542 (bfd_link_info): Add elf_stt_common.
543
5442016-02-26 H.J. Lu <hongjiu.lu@intel.com>
545
546 PR ld/19636
547 PR ld/19704
548 PR ld/19719
549 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
550
5512016-02-19 Matthew Wahab <matthew.wahab@arm.com>
552 Jiong Wang <jiong.wang@arm.com>
553
554 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
555
5562016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
557 Janek van Oirschot <jvanoirs@synopsys.com>
558
559 * opcode/arc.h (arc_opcode arc_relax_opcodes)
560 (arc_num_relax_opcodes): Declare.
561
5622016-02-09 Nick Clifton <nickc@redhat.com>
563
564 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
565 * opcode/nds32.h (nds32_r45map): Likewise.
566 (nds32_r54map): Likewise.
567 * opcode/visium.h (gen_reg_table): Likewise.
568 (fp_reg_table, cc_table, opcode_table): Likewise.
569
5702016-02-09 Alan Modra <amodra@gmail.com>
571
572 PR 16583
573 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
574
5752016-02-04 Nick Clifton <nickc@redhat.com>
576
577 PR target/19561
578 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
579 (RRUX): Synthesise using case 2 rather than 7.
580
5812016-01-19 John Baldwin <jhb@FreeBSD.org>
582
583 * elf/common.h (NT_FREEBSD_THRMISC): Define.
584 (NT_FREEBSD_PROCSTAT_PROC): Define.
585 (NT_FREEBSD_PROCSTAT_FILES): Define.
586 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
587 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
588 (NT_FREEBSD_PROCSTAT_UMASK): Define.
589 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
590 (NT_FREEBSD_PROCSTAT_OSREL): Define.
591 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
592 (NT_FREEBSD_PROCSTAT_AUXV): Define.
593
5942016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
595 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
596
597 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
598 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
599 (ARC_TLS_LE_32): Fixed formula.
600 (ARC_TLS_GD_LD): Use new special function.
601 * opcode/arc-func.h: Changed all the replacement
602 functions to clear the patching bits before doing an or it with the value
603 argument.
604
6052016-01-18 Nick Clifton <nickc@redhat.com>
606
607 PR ld/19440
608 * coff/internal.h (internal_syment): Use int to hold section
609 number.
610 (N_UNDEF): Cast to int not short.
611 (N_ABS): Likewise.
612 (N_DEBUG): Likewise.
613 (N_TV): Likewise.
614 (P_TV): Likewise.
615
6162016-01-11 Nick Clifton <nickc@redhat.com>
617
618 Import this change from GCC mainline:
619
620 2016-01-07 Mike Frysinger <vapier@gentoo.org>
621
622 * longlong.h: Change !__SHMEDIA__ to
623 (!defined (__SHMEDIA__) || !__SHMEDIA__).
624 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
625
6262016-01-06 Maciej W. Rozycki <macro@imgtec.com>
627
628 * opcode/mips.h: Add a summary of MIPS16 operand codes.
629
6302016-01-05 Mike Frysinger <vapier@gentoo.org>
631
632 * libiberty.h (dupargv): Change arg to char * const *.
633 (writeargv, countargv): Likewise.
634
6352016-01-01 Alan Modra <amodra@gmail.com>
636
637 Update year range in copyright notice of all files.
638
639For older changes see ChangeLog-0415, aout/ChangeLog-9115,
640cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
641mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
642som/ChangeLog-1015, and vms/ChangeLog-1015
643\f
644Copyright (C) 2016 Free Software Foundation, Inc.
645
646Copying and distribution of this file, with or without modification,
647are permitted in any medium without royalty provided the copyright
648notice and this notice are preserved.
649
650Local Variables:
651mode: change-log
652left-margin: 8
653fill-column: 74
654version-control: never
655End:
GDB Binutils - Deliverables
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