| 1 | #ifndef __LINUX_CACHE_H |
| 2 | #define __LINUX_CACHE_H |
| 3 | |
| 4 | #include <uapi/linux/kernel.h> |
| 5 | #include <asm/cache.h> |
| 6 | |
| 7 | #ifndef L1_CACHE_ALIGN |
| 8 | #define L1_CACHE_ALIGN(x) __ALIGN_KERNEL(x, L1_CACHE_BYTES) |
| 9 | #endif |
| 10 | |
| 11 | #ifndef SMP_CACHE_BYTES |
| 12 | #define SMP_CACHE_BYTES L1_CACHE_BYTES |
| 13 | #endif |
| 14 | |
| 15 | /* |
| 16 | * __read_mostly is used to keep rarely changing variables out of frequently |
| 17 | * updated cachelines. If an architecture doesn't support it, ignore the |
| 18 | * hint. |
| 19 | */ |
| 20 | #ifndef __read_mostly |
| 21 | #define __read_mostly |
| 22 | #endif |
| 23 | |
| 24 | /* |
| 25 | * __ro_after_init is used to mark things that are read-only after init (i.e. |
| 26 | * after mark_rodata_ro() has been called). These are effectively read-only, |
| 27 | * but may get written to during init, so can't live in .rodata (via "const"). |
| 28 | */ |
| 29 | #ifndef __ro_after_init |
| 30 | #define __ro_after_init __attribute__((__section__(".data..ro_after_init"))) |
| 31 | #endif |
| 32 | |
| 33 | #ifndef ____cacheline_aligned |
| 34 | #define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES))) |
| 35 | #endif |
| 36 | |
| 37 | #ifndef ____cacheline_aligned_in_smp |
| 38 | #ifdef CONFIG_SMP |
| 39 | #define ____cacheline_aligned_in_smp ____cacheline_aligned |
| 40 | #else |
| 41 | #define ____cacheline_aligned_in_smp |
| 42 | #endif /* CONFIG_SMP */ |
| 43 | #endif |
| 44 | |
| 45 | #ifndef __cacheline_aligned |
| 46 | #define __cacheline_aligned \ |
| 47 | __attribute__((__aligned__(SMP_CACHE_BYTES), \ |
| 48 | __section__(".data..cacheline_aligned"))) |
| 49 | #endif /* __cacheline_aligned */ |
| 50 | |
| 51 | #ifndef __cacheline_aligned_in_smp |
| 52 | #ifdef CONFIG_SMP |
| 53 | #define __cacheline_aligned_in_smp __cacheline_aligned |
| 54 | #else |
| 55 | #define __cacheline_aligned_in_smp |
| 56 | #endif /* CONFIG_SMP */ |
| 57 | #endif |
| 58 | |
| 59 | /* |
| 60 | * The maximum alignment needed for some critical structures |
| 61 | * These could be inter-node cacheline sizes/L3 cacheline |
| 62 | * size etc. Define this in asm/cache.h for your arch |
| 63 | */ |
| 64 | #ifndef INTERNODE_CACHE_SHIFT |
| 65 | #define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT |
| 66 | #endif |
| 67 | |
| 68 | #if !defined(____cacheline_internodealigned_in_smp) |
| 69 | #if defined(CONFIG_SMP) |
| 70 | #define ____cacheline_internodealigned_in_smp \ |
| 71 | __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) |
| 72 | #else |
| 73 | #define ____cacheline_internodealigned_in_smp |
| 74 | #endif |
| 75 | #endif |
| 76 | |
| 77 | #ifndef CONFIG_ARCH_HAS_CACHE_LINE_SIZE |
| 78 | #define cache_line_size() L1_CACHE_BYTES |
| 79 | #endif |
| 80 | |
| 81 | #endif /* __LINUX_CACHE_H */ |