| 1 | /* v850.h -- Header file for NEC V850 opcode table |
| 2 | Copyright 1996, 1997, 2001, 2003, 2010 Free Software Foundation, Inc. |
| 3 | Written by J.T. Conklin, Cygnus Support |
| 4 | |
| 5 | This file is part of GDB, GAS, and the GNU binutils. |
| 6 | |
| 7 | GDB, GAS, and the GNU binutils are free software; you can redistribute |
| 8 | them and/or modify them under the terms of the GNU General Public |
| 9 | License as published by the Free Software Foundation; either version 3, |
| 10 | or (at your option) any later version. |
| 11 | |
| 12 | GDB, GAS, and the GNU binutils are distributed in the hope that they |
| 13 | will be useful, but WITHOUT ANY WARRANTY; without even the implied |
| 14 | warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See |
| 15 | the GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this file; see the file COPYING3. If not, write to the Free |
| 19 | Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
| 20 | MA 02110-1301, USA. */ |
| 21 | |
| 22 | #ifndef V850_H |
| 23 | #define V850_H |
| 24 | |
| 25 | /* The opcode table is an array of struct v850_opcode. */ |
| 26 | |
| 27 | struct v850_opcode |
| 28 | { |
| 29 | /* The opcode name. */ |
| 30 | const char *name; |
| 31 | |
| 32 | /* The opcode itself. Those bits which will be filled in with |
| 33 | operands are zeroes. */ |
| 34 | unsigned long opcode; |
| 35 | |
| 36 | /* The opcode mask. This is used by the disassembler. This is a |
| 37 | mask containing ones indicating those bits which must match the |
| 38 | opcode field, and zeroes indicating those bits which need not |
| 39 | match (and are presumably filled in by operands). */ |
| 40 | unsigned long mask; |
| 41 | |
| 42 | /* An array of operand codes. Each code is an index into the |
| 43 | operand table. They appear in the order which the operands must |
| 44 | appear in assembly code, and are terminated by a zero. */ |
| 45 | unsigned char operands[8]; |
| 46 | |
| 47 | /* Which (if any) operand is a memory operand. */ |
| 48 | unsigned int memop; |
| 49 | |
| 50 | /* Target processor(s). A bit field of processors which support |
| 51 | this instruction. Note a bit field is used as some instructions |
| 52 | are available on multiple, different processor types, whereas |
| 53 | other instructions are only available on one specific type. */ |
| 54 | unsigned int processors; |
| 55 | }; |
| 56 | |
| 57 | /* Values for the processors field in the v850_opcode structure. */ |
| 58 | #define PROCESSOR_MASK 0x1f |
| 59 | #define PROCESSOR_OPTION_EXTENSION (1 << 5) /* Enable extension opcodes. */ |
| 60 | #define PROCESSOR_OPTION_ALIAS (1 << 6) /* Enable alias opcodes. */ |
| 61 | #define PROCESSOR_V850 (1 << 0) /* Just the V850. */ |
| 62 | #define PROCESSOR_ALL PROCESSOR_MASK /* Any processor. */ |
| 63 | #define PROCESSOR_V850E (1 << 1) /* Just the V850E. */ |
| 64 | #define PROCESSOR_NOT_V850 (PROCESSOR_ALL & (~ PROCESSOR_V850)) /* Any processor except the V850. */ |
| 65 | #define PROCESSOR_V850E1 (1 << 2) /* Just the V850E1. */ |
| 66 | #define PROCESSOR_V850E2 (1 << 3) /* Just the V850E2. */ |
| 67 | #define PROCESSOR_V850E2V3 (1 << 4) /* Just the V850E2V3. */ |
| 68 | #define PROCESSOR_V850E2_ALL (PROCESSOR_V850E2 | PROCESSOR_V850E2V3) /* V850E2 & V850E2V3. */ |
| 69 | #define SET_PROCESSOR_MASK(mask,set) ((mask) = ((mask) & ~PROCESSOR_MASK) | (set)) |
| 70 | |
| 71 | /* The table itself is sorted by major opcode number, and is otherwise |
| 72 | in the order in which the disassembler should consider |
| 73 | instructions. */ |
| 74 | extern const struct v850_opcode v850_opcodes[]; |
| 75 | extern const int v850_num_opcodes; |
| 76 | |
| 77 | \f |
| 78 | /* The operands table is an array of struct v850_operand. */ |
| 79 | |
| 80 | struct v850_operand |
| 81 | { |
| 82 | /* The number of bits in the operand. */ |
| 83 | /* If this value is -1 then the operand's bits are in a discontinous |
| 84 | distribution in the instruction. */ |
| 85 | int bits; |
| 86 | |
| 87 | /* (bits >= 0): How far the operand is left shifted in the instruction. */ |
| 88 | /* (bits == -1): Bit mask of the bits in the operand. */ |
| 89 | int shift; |
| 90 | |
| 91 | /* Insertion function. This is used by the assembler. To insert an |
| 92 | operand value into an instruction, check this field. |
| 93 | |
| 94 | If it is NULL, execute |
| 95 | i |= (op & ((1 << o->bits) - 1)) << o->shift; |
| 96 | (i is the instruction which we are filling in, o is a pointer to |
| 97 | this structure, and op is the opcode value; this assumes twos |
| 98 | complement arithmetic). |
| 99 | |
| 100 | If this field is not NULL, then simply call it with the |
| 101 | instruction and the operand value. It will return the new value |
| 102 | of the instruction. If the ERRMSG argument is not NULL, then if |
| 103 | the operand value is illegal, *ERRMSG will be set to a warning |
| 104 | string (the operand will be inserted in any case). If the |
| 105 | operand value is legal, *ERRMSG will be unchanged (most operands |
| 106 | can accept any value). */ |
| 107 | unsigned long (* insert) |
| 108 | (unsigned long instruction, long op, const char ** errmsg); |
| 109 | |
| 110 | /* Extraction function. This is used by the disassembler. To |
| 111 | extract this operand type from an instruction, check this field. |
| 112 | |
| 113 | If it is NULL, compute |
| 114 | op = o->bits == -1 ? ((i) & o->shift) : ((i) >> o->shift) & ((1 << o->bits) - 1); |
| 115 | if (o->flags & V850_OPERAND_SIGNED) |
| 116 | op = (op << (32 - o->bits)) >> (32 - o->bits); |
| 117 | (i is the instruction, o is a pointer to this structure, and op |
| 118 | is the result; this assumes twos complement arithmetic). |
| 119 | |
| 120 | If this field is not NULL, then simply call it with the |
| 121 | instruction value. It will return the value of the operand. If |
| 122 | the INVALID argument is not NULL, *INVALID will be set to |
| 123 | non-zero if this operand type can not actually be extracted from |
| 124 | this operand (i.e., the instruction does not match). If the |
| 125 | operand is valid, *INVALID will not be changed. */ |
| 126 | unsigned long (* extract) (unsigned long instruction, int * invalid); |
| 127 | |
| 128 | /* One bit syntax flags. */ |
| 129 | int flags; |
| 130 | |
| 131 | int default_reloc; |
| 132 | }; |
| 133 | |
| 134 | /* Elements in the table are retrieved by indexing with values from |
| 135 | the operands field of the v850_opcodes table. */ |
| 136 | |
| 137 | extern const struct v850_operand v850_operands[]; |
| 138 | |
| 139 | /* Values defined for the flags field of a struct v850_operand. */ |
| 140 | |
| 141 | /* This operand names a general purpose register. */ |
| 142 | #define V850_OPERAND_REG 0x01 |
| 143 | |
| 144 | /* This operand is the ep register. */ |
| 145 | #define V850_OPERAND_EP 0x02 |
| 146 | |
| 147 | /* This operand names a system register. */ |
| 148 | #define V850_OPERAND_SRG 0x04 |
| 149 | |
| 150 | /* Prologue eilogue type instruction, V850E specific. */ |
| 151 | #define V850E_OPERAND_REG_LIST 0x08 |
| 152 | |
| 153 | /* This operand names a condition code used in the setf instruction. */ |
| 154 | #define V850_OPERAND_CC 0x10 |
| 155 | |
| 156 | #define V850_OPERAND_FLOAT_CC 0x20 |
| 157 | |
| 158 | /* This operand names a vector purpose register. */ |
| 159 | #define V850_OPERAND_VREG 0x40 |
| 160 | |
| 161 | /* 16 bit immediate follows instruction, V850E specific. */ |
| 162 | #define V850E_IMMEDIATE16 0x80 |
| 163 | |
| 164 | /* hi16 bit immediate follows instruction, V850E specific. */ |
| 165 | #define V850E_IMMEDIATE16HI 0x100 |
| 166 | |
| 167 | /* 23 bit immediate follows instruction, V850E specific. */ |
| 168 | #define V850E_IMMEDIATE23 0x200 |
| 169 | |
| 170 | /* 32 bit immediate follows instruction, V850E specific. */ |
| 171 | #define V850E_IMMEDIATE32 0x400 |
| 172 | |
| 173 | /* This is a relaxable operand. Only used for D9->D22 branch relaxing |
| 174 | right now. We may need others in the future (or maybe handle them like |
| 175 | promoted operands on the mn10300?). */ |
| 176 | #define V850_OPERAND_RELAX 0x800 |
| 177 | |
| 178 | /* This operand takes signed values. */ |
| 179 | #define V850_OPERAND_SIGNED 0x1000 |
| 180 | |
| 181 | /* This operand is a displacement. */ |
| 182 | #define V850_OPERAND_DISP 0x2000 |
| 183 | |
| 184 | /* This operand is a PC displacement. */ |
| 185 | #define V850_PCREL 0x4000 |
| 186 | |
| 187 | /* The register specified must be even number. */ |
| 188 | #define V850_REG_EVEN 0x8000 |
| 189 | |
| 190 | /* The register specified must not be r0. */ |
| 191 | #define V850_NOT_R0 0x20000 |
| 192 | |
| 193 | /* The register specified must not be 0. */ |
| 194 | #define V850_NOT_IMM0 0x40000 |
| 195 | |
| 196 | /* The condition code must not be SA CONDITION. */ |
| 197 | #define V850_NOT_SA 0x80000 |
| 198 | |
| 199 | /* The operand has '!' prefix. */ |
| 200 | #define V850_OPERAND_BANG 0x100000 |
| 201 | |
| 202 | /* The operand has '%' prefix. */ |
| 203 | #define V850_OPERAND_PERCENT 0x200000 |
| 204 | |
| 205 | extern int v850_msg_is_out_of_range (const char * msg); |
| 206 | |
| 207 | #endif /* V850_H */ |