| 1 | /* Interface definition for configurable Xtensa ISA support. |
| 2 | Copyright 2003, 2004, 2005, 2006 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of BFD, the Binary File Descriptor library. |
| 5 | |
| 6 | This program is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 2 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
| 19 | |
| 20 | #ifndef XTENSA_LIBISA_H |
| 21 | #define XTENSA_LIBISA_H |
| 22 | |
| 23 | #ifdef __cplusplus |
| 24 | extern "C" { |
| 25 | #endif |
| 26 | |
| 27 | /* Version number: This is intended to help support code that works with |
| 28 | versions of this library from multiple Xtensa releases. */ |
| 29 | |
| 30 | #define XTENSA_ISA_VERSION 7000 |
| 31 | |
| 32 | #ifndef uint32 |
| 33 | #define uint32 unsigned int |
| 34 | #endif |
| 35 | |
| 36 | /* This file defines the interface to the Xtensa ISA library. This |
| 37 | library contains most of the ISA-specific information for a |
| 38 | particular Xtensa processor. For example, the set of valid |
| 39 | instructions, their opcode encodings and operand fields are all |
| 40 | included here. |
| 41 | |
| 42 | This interface basically defines a number of abstract data types. |
| 43 | |
| 44 | . an instruction buffer - for holding the raw instruction bits |
| 45 | . ISA info - information about the ISA as a whole |
| 46 | . instruction formats - instruction size and slot structure |
| 47 | . opcodes - information about individual instructions |
| 48 | . operands - information about register and immediate instruction operands |
| 49 | . stateOperands - information about processor state instruction operands |
| 50 | . interfaceOperands - information about interface instruction operands |
| 51 | . register files - register file information |
| 52 | . processor states - internal processor state information |
| 53 | . system registers - "special registers" and "user registers" |
| 54 | . interfaces - TIE interfaces that are external to the processor |
| 55 | . functional units - TIE shared functions |
| 56 | |
| 57 | The interface defines a set of functions to access each data type. |
| 58 | With the exception of the instruction buffer, the internal |
| 59 | representations of the data structures are hidden. All accesses must |
| 60 | be made through the functions defined here. */ |
| 61 | |
| 62 | typedef struct xtensa_isa_opaque { int unused; } *xtensa_isa; |
| 63 | |
| 64 | |
| 65 | /* Most of the Xtensa ISA entities (e.g., opcodes, regfiles, etc.) are |
| 66 | represented here using sequential integers beginning with 0. The |
| 67 | specific values are only fixed for a particular instantiation of an |
| 68 | xtensa_isa structure, so these values should only be used |
| 69 | internally. */ |
| 70 | |
| 71 | typedef int xtensa_opcode; |
| 72 | typedef int xtensa_format; |
| 73 | typedef int xtensa_regfile; |
| 74 | typedef int xtensa_state; |
| 75 | typedef int xtensa_sysreg; |
| 76 | typedef int xtensa_interface; |
| 77 | typedef int xtensa_funcUnit; |
| 78 | |
| 79 | |
| 80 | /* Define a unique value for undefined items. */ |
| 81 | |
| 82 | #define XTENSA_UNDEFINED -1 |
| 83 | |
| 84 | |
| 85 | /* Overview of using this interface to decode/encode instructions: |
| 86 | |
| 87 | Each Xtensa instruction is associated with a particular instruction |
| 88 | format, where the format defines a fixed number of slots for |
| 89 | operations. The formats for the core Xtensa ISA have only one slot, |
| 90 | but FLIX instructions may have multiple slots. Within each slot, |
| 91 | there is a single opcode and some number of associated operands. |
| 92 | |
| 93 | The encoding and decoding functions operate on instruction buffers, |
| 94 | not on the raw bytes of the instructions. The same instruction |
| 95 | buffer data structure is used for both entire instructions and |
| 96 | individual slots in those instructions -- the contents of a slot need |
| 97 | to be extracted from or inserted into the buffer for the instruction |
| 98 | as a whole. |
| 99 | |
| 100 | Decoding an instruction involves first finding the format, which |
| 101 | identifies the number of slots, and then decoding each slot |
| 102 | separately. A slot is decoded by finding the opcode and then using |
| 103 | the opcode to determine how many operands there are. For example: |
| 104 | |
| 105 | xtensa_insnbuf_from_chars |
| 106 | xtensa_format_decode |
| 107 | for each slot { |
| 108 | xtensa_format_get_slot |
| 109 | xtensa_opcode_decode |
| 110 | for each operand { |
| 111 | xtensa_operand_get_field |
| 112 | xtensa_operand_decode |
| 113 | } |
| 114 | } |
| 115 | |
| 116 | Encoding an instruction is roughly the same procedure in reverse: |
| 117 | |
| 118 | xtensa_format_encode |
| 119 | for each slot { |
| 120 | xtensa_opcode_encode |
| 121 | for each operand { |
| 122 | xtensa_operand_encode |
| 123 | xtensa_operand_set_field |
| 124 | } |
| 125 | xtensa_format_set_slot |
| 126 | } |
| 127 | xtensa_insnbuf_to_chars |
| 128 | */ |
| 129 | |
| 130 | \f |
| 131 | /* Error handling. */ |
| 132 | |
| 133 | /* Error codes. The code for the most recent error condition can be |
| 134 | retrieved with the "errno" function. For any result other than |
| 135 | xtensa_isa_ok, an error message containing additional information |
| 136 | about the problem can be retrieved using the "error_msg" function. |
| 137 | The error messages are stored in an internal buffer, which should |
| 138 | not be freed and may be overwritten by subsequent operations. */ |
| 139 | |
| 140 | typedef enum xtensa_isa_status_enum |
| 141 | { |
| 142 | xtensa_isa_ok = 0, |
| 143 | xtensa_isa_bad_format, |
| 144 | xtensa_isa_bad_slot, |
| 145 | xtensa_isa_bad_opcode, |
| 146 | xtensa_isa_bad_operand, |
| 147 | xtensa_isa_bad_field, |
| 148 | xtensa_isa_bad_iclass, |
| 149 | xtensa_isa_bad_regfile, |
| 150 | xtensa_isa_bad_sysreg, |
| 151 | xtensa_isa_bad_state, |
| 152 | xtensa_isa_bad_interface, |
| 153 | xtensa_isa_bad_funcUnit, |
| 154 | xtensa_isa_wrong_slot, |
| 155 | xtensa_isa_no_field, |
| 156 | xtensa_isa_out_of_memory, |
| 157 | xtensa_isa_buffer_overflow, |
| 158 | xtensa_isa_internal_error, |
| 159 | xtensa_isa_bad_value |
| 160 | } xtensa_isa_status; |
| 161 | |
| 162 | extern xtensa_isa_status |
| 163 | xtensa_isa_errno (xtensa_isa isa); |
| 164 | |
| 165 | extern char * |
| 166 | xtensa_isa_error_msg (xtensa_isa isa); |
| 167 | |
| 168 | |
| 169 | \f |
| 170 | /* Instruction buffers. */ |
| 171 | |
| 172 | typedef uint32 xtensa_insnbuf_word; |
| 173 | typedef xtensa_insnbuf_word *xtensa_insnbuf; |
| 174 | |
| 175 | |
| 176 | /* Get the size in "insnbuf_words" of the xtensa_insnbuf array. */ |
| 177 | |
| 178 | extern int |
| 179 | xtensa_insnbuf_size (xtensa_isa isa); |
| 180 | |
| 181 | |
| 182 | /* Allocate an xtensa_insnbuf of the right size. */ |
| 183 | |
| 184 | extern xtensa_insnbuf |
| 185 | xtensa_insnbuf_alloc (xtensa_isa isa); |
| 186 | |
| 187 | |
| 188 | /* Release an xtensa_insnbuf. */ |
| 189 | |
| 190 | extern void |
| 191 | xtensa_insnbuf_free (xtensa_isa isa, xtensa_insnbuf buf); |
| 192 | |
| 193 | |
| 194 | /* Conversion between raw memory (char arrays) and our internal |
| 195 | instruction representation. This is complicated by the Xtensa ISA's |
| 196 | variable instruction lengths. When converting to chars, the buffer |
| 197 | must contain a valid instruction so we know how many bytes to copy; |
| 198 | thus, the "to_chars" function returns the number of bytes copied or |
| 199 | XTENSA_UNDEFINED on error. The "from_chars" function first reads the |
| 200 | minimal number of bytes required to decode the instruction length and |
| 201 | then proceeds to copy the entire instruction into the buffer; if the |
| 202 | memory does not contain a valid instruction, it copies the maximum |
| 203 | number of bytes required for the longest Xtensa instruction. The |
| 204 | "num_chars" argument may be used to limit the number of bytes that |
| 205 | can be read or written. Otherwise, if "num_chars" is zero, the |
| 206 | functions may read or write past the end of the code. */ |
| 207 | |
| 208 | extern int |
| 209 | xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn, |
| 210 | unsigned char *cp, int num_chars); |
| 211 | |
| 212 | extern void |
| 213 | xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn, |
| 214 | const unsigned char *cp, int num_chars); |
| 215 | |
| 216 | |
| 217 | \f |
| 218 | /* ISA information. */ |
| 219 | |
| 220 | /* Initialize the ISA information. */ |
| 221 | |
| 222 | extern xtensa_isa |
| 223 | xtensa_isa_init (xtensa_isa_status *errno_p, char **error_msg_p); |
| 224 | |
| 225 | |
| 226 | /* Deallocate an xtensa_isa structure. */ |
| 227 | |
| 228 | extern void |
| 229 | xtensa_isa_free (xtensa_isa isa); |
| 230 | |
| 231 | |
| 232 | /* Get the maximum instruction size in bytes. */ |
| 233 | |
| 234 | extern int |
| 235 | xtensa_isa_maxlength (xtensa_isa isa); |
| 236 | |
| 237 | |
| 238 | /* Decode the length in bytes of an instruction in raw memory (not an |
| 239 | insnbuf). This function reads only the minimal number of bytes |
| 240 | required to decode the instruction length. Returns |
| 241 | XTENSA_UNDEFINED on error. */ |
| 242 | |
| 243 | extern int |
| 244 | xtensa_isa_length_from_chars (xtensa_isa isa, const unsigned char *cp); |
| 245 | |
| 246 | |
| 247 | /* Get the number of stages in the processor's pipeline. The pipeline |
| 248 | stage values returned by other functions in this library will range |
| 249 | from 0 to N-1, where N is the value returned by this function. |
| 250 | Note that the stage numbers used here may not correspond to the |
| 251 | actual processor hardware, e.g., the hardware may have additional |
| 252 | stages before stage 0. Returns XTENSA_UNDEFINED on error. */ |
| 253 | |
| 254 | extern int |
| 255 | xtensa_isa_num_pipe_stages (xtensa_isa isa); |
| 256 | |
| 257 | |
| 258 | /* Get the number of various entities that are defined for this processor. */ |
| 259 | |
| 260 | extern int |
| 261 | xtensa_isa_num_formats (xtensa_isa isa); |
| 262 | |
| 263 | extern int |
| 264 | xtensa_isa_num_opcodes (xtensa_isa isa); |
| 265 | |
| 266 | extern int |
| 267 | xtensa_isa_num_regfiles (xtensa_isa isa); |
| 268 | |
| 269 | extern int |
| 270 | xtensa_isa_num_states (xtensa_isa isa); |
| 271 | |
| 272 | extern int |
| 273 | xtensa_isa_num_sysregs (xtensa_isa isa); |
| 274 | |
| 275 | extern int |
| 276 | xtensa_isa_num_interfaces (xtensa_isa isa); |
| 277 | |
| 278 | extern int |
| 279 | xtensa_isa_num_funcUnits (xtensa_isa isa); |
| 280 | |
| 281 | |
| 282 | \f |
| 283 | /* Instruction formats. */ |
| 284 | |
| 285 | /* Get the name of a format. Returns null on error. */ |
| 286 | |
| 287 | extern const char * |
| 288 | xtensa_format_name (xtensa_isa isa, xtensa_format fmt); |
| 289 | |
| 290 | |
| 291 | /* Given a format name, return the format number. Returns |
| 292 | XTENSA_UNDEFINED if the name is not a valid format. */ |
| 293 | |
| 294 | extern xtensa_format |
| 295 | xtensa_format_lookup (xtensa_isa isa, const char *fmtname); |
| 296 | |
| 297 | |
| 298 | /* Decode the instruction format from a binary instruction buffer. |
| 299 | Returns XTENSA_UNDEFINED if the format is not recognized. */ |
| 300 | |
| 301 | extern xtensa_format |
| 302 | xtensa_format_decode (xtensa_isa isa, const xtensa_insnbuf insn); |
| 303 | |
| 304 | |
| 305 | /* Set the instruction format field(s) in a binary instruction buffer. |
| 306 | All the other fields are set to zero. Returns non-zero on error. */ |
| 307 | |
| 308 | extern int |
| 309 | xtensa_format_encode (xtensa_isa isa, xtensa_format fmt, xtensa_insnbuf insn); |
| 310 | |
| 311 | |
| 312 | /* Find the length (in bytes) of an instruction. Returns |
| 313 | XTENSA_UNDEFINED on error. */ |
| 314 | |
| 315 | extern int |
| 316 | xtensa_format_length (xtensa_isa isa, xtensa_format fmt); |
| 317 | |
| 318 | |
| 319 | /* Get the number of slots in an instruction. Returns XTENSA_UNDEFINED |
| 320 | on error. */ |
| 321 | |
| 322 | extern int |
| 323 | xtensa_format_num_slots (xtensa_isa isa, xtensa_format fmt); |
| 324 | |
| 325 | |
| 326 | /* Get the opcode for a no-op in a particular slot. |
| 327 | Returns XTENSA_UNDEFINED on error. */ |
| 328 | |
| 329 | extern xtensa_opcode |
| 330 | xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot); |
| 331 | |
| 332 | |
| 333 | /* Get the bits for a specified slot out of an insnbuf for the |
| 334 | instruction as a whole and put them into an insnbuf for that one |
| 335 | slot, and do the opposite to set a slot. Return non-zero on error. */ |
| 336 | |
| 337 | extern int |
| 338 | xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot, |
| 339 | const xtensa_insnbuf insn, xtensa_insnbuf slotbuf); |
| 340 | |
| 341 | extern int |
| 342 | xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot, |
| 343 | xtensa_insnbuf insn, const xtensa_insnbuf slotbuf); |
| 344 | |
| 345 | |
| 346 | \f |
| 347 | /* Opcode information. */ |
| 348 | |
| 349 | /* Translate a mnemonic name to an opcode. Returns XTENSA_UNDEFINED if |
| 350 | the name is not a valid opcode mnemonic. */ |
| 351 | |
| 352 | extern xtensa_opcode |
| 353 | xtensa_opcode_lookup (xtensa_isa isa, const char *opname); |
| 354 | |
| 355 | |
| 356 | /* Decode the opcode for one instruction slot from a binary instruction |
| 357 | buffer. Returns the opcode or XTENSA_UNDEFINED if the opcode is |
| 358 | illegal. */ |
| 359 | |
| 360 | extern xtensa_opcode |
| 361 | xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot, |
| 362 | const xtensa_insnbuf slotbuf); |
| 363 | |
| 364 | |
| 365 | /* Set the opcode field(s) for an instruction slot. All other fields |
| 366 | in the slot are set to zero. Returns non-zero if the opcode cannot |
| 367 | be encoded. */ |
| 368 | |
| 369 | extern int |
| 370 | xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot, |
| 371 | xtensa_insnbuf slotbuf, xtensa_opcode opc); |
| 372 | |
| 373 | |
| 374 | /* Get the mnemonic name for an opcode. Returns null on error. */ |
| 375 | |
| 376 | extern const char * |
| 377 | xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc); |
| 378 | |
| 379 | |
| 380 | /* Check various properties of opcodes. These functions return 0 if |
| 381 | the condition is false, 1 if the condition is true, and |
| 382 | XTENSA_UNDEFINED on error. The instructions are classified as |
| 383 | follows: |
| 384 | |
| 385 | branch: conditional branch; may fall through to next instruction (B*) |
| 386 | jump: unconditional branch (J, JX, RET*, RF*) |
| 387 | loop: zero-overhead loop (LOOP*) |
| 388 | call: unconditional call; control returns to next instruction (CALL*) |
| 389 | |
| 390 | For the opcodes that affect control flow in some way, the branch |
| 391 | target may be specified by an immediate operand or it may be an |
| 392 | address stored in a register. You can distinguish these by |
| 393 | checking if the instruction has a PC-relative immediate |
| 394 | operand. */ |
| 395 | |
| 396 | extern int |
| 397 | xtensa_opcode_is_branch (xtensa_isa isa, xtensa_opcode opc); |
| 398 | |
| 399 | extern int |
| 400 | xtensa_opcode_is_jump (xtensa_isa isa, xtensa_opcode opc); |
| 401 | |
| 402 | extern int |
| 403 | xtensa_opcode_is_loop (xtensa_isa isa, xtensa_opcode opc); |
| 404 | |
| 405 | extern int |
| 406 | xtensa_opcode_is_call (xtensa_isa isa, xtensa_opcode opc); |
| 407 | |
| 408 | |
| 409 | /* Find the number of ordinary operands, state operands, and interface |
| 410 | operands for an instruction. These return XTENSA_UNDEFINED on |
| 411 | error. */ |
| 412 | |
| 413 | extern int |
| 414 | xtensa_opcode_num_operands (xtensa_isa isa, xtensa_opcode opc); |
| 415 | |
| 416 | extern int |
| 417 | xtensa_opcode_num_stateOperands (xtensa_isa isa, xtensa_opcode opc); |
| 418 | |
| 419 | extern int |
| 420 | xtensa_opcode_num_interfaceOperands (xtensa_isa isa, xtensa_opcode opc); |
| 421 | |
| 422 | |
| 423 | /* Get functional unit usage requirements for an opcode. Each "use" |
| 424 | is identified by a <functional unit, pipeline stage> pair. The |
| 425 | "num_funcUnit_uses" function returns the number of these "uses" or |
| 426 | XTENSA_UNDEFINED on error. The "funcUnit_use" function returns |
| 427 | a pointer to a "use" pair or null on error. */ |
| 428 | |
| 429 | typedef struct xtensa_funcUnit_use_struct |
| 430 | { |
| 431 | xtensa_funcUnit unit; |
| 432 | int stage; |
| 433 | } xtensa_funcUnit_use; |
| 434 | |
| 435 | extern int |
| 436 | xtensa_opcode_num_funcUnit_uses (xtensa_isa isa, xtensa_opcode opc); |
| 437 | |
| 438 | extern xtensa_funcUnit_use * |
| 439 | xtensa_opcode_funcUnit_use (xtensa_isa isa, xtensa_opcode opc, int u); |
| 440 | |
| 441 | |
| 442 | \f |
| 443 | /* Operand information. */ |
| 444 | |
| 445 | /* Get the name of an operand. Returns null on error. */ |
| 446 | |
| 447 | extern const char * |
| 448 | xtensa_operand_name (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 449 | |
| 450 | |
| 451 | /* Some operands are "invisible", i.e., not explicitly specified in |
| 452 | assembly language. When assembling an instruction, you need not set |
| 453 | the values of invisible operands, since they are either hardwired or |
| 454 | derived from other field values. The values of invisible operands |
| 455 | can be examined in the same way as other operands, but remember that |
| 456 | an invisible operand may get its value from another visible one, so |
| 457 | the entire instruction must be available before examining the |
| 458 | invisible operand values. This function returns 1 if an operand is |
| 459 | visible, 0 if it is invisible, or XTENSA_UNDEFINED on error. Note |
| 460 | that whether an operand is visible is orthogonal to whether it is |
| 461 | "implicit", i.e., whether it is encoded in a field in the |
| 462 | instruction. */ |
| 463 | |
| 464 | extern int |
| 465 | xtensa_operand_is_visible (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 466 | |
| 467 | |
| 468 | /* Check if an operand is an input ('i'), output ('o'), or inout ('m') |
| 469 | operand. Note: The output operand of a conditional assignment |
| 470 | (e.g., movnez) appears here as an inout ('m') even if it is declared |
| 471 | in the TIE code as an output ('o'); this allows the compiler to |
| 472 | properly handle register allocation for conditional assignments. |
| 473 | Returns 0 on error. */ |
| 474 | |
| 475 | extern char |
| 476 | xtensa_operand_inout (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 477 | |
| 478 | |
| 479 | /* Get and set the raw (encoded) value of the field for the specified |
| 480 | operand. The "set" function does not check if the value fits in the |
| 481 | field; that is done by the "encode" function below. Both of these |
| 482 | functions return non-zero on error, e.g., if the field is not defined |
| 483 | for the specified slot. */ |
| 484 | |
| 485 | extern int |
| 486 | xtensa_operand_get_field (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 487 | xtensa_format fmt, int slot, |
| 488 | const xtensa_insnbuf slotbuf, uint32 *valp); |
| 489 | |
| 490 | extern int |
| 491 | xtensa_operand_set_field (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 492 | xtensa_format fmt, int slot, |
| 493 | xtensa_insnbuf slotbuf, uint32 val); |
| 494 | |
| 495 | |
| 496 | /* Encode and decode operands. The raw bits in the operand field may |
| 497 | be encoded in a variety of different ways. These functions hide |
| 498 | the details of that encoding. The result values are returned through |
| 499 | the argument pointer. The return value is non-zero on error. */ |
| 500 | |
| 501 | extern int |
| 502 | xtensa_operand_encode (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 503 | uint32 *valp); |
| 504 | |
| 505 | extern int |
| 506 | xtensa_operand_decode (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 507 | uint32 *valp); |
| 508 | |
| 509 | |
| 510 | /* An operand may be either a register operand or an immediate of some |
| 511 | sort (e.g., PC-relative or not). The "is_register" function returns |
| 512 | 0 if the operand is an immediate, 1 if it is a register, and |
| 513 | XTENSA_UNDEFINED on error. The "regfile" function returns the |
| 514 | regfile for a register operand, or XTENSA_UNDEFINED on error. */ |
| 515 | |
| 516 | extern int |
| 517 | xtensa_operand_is_register (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 518 | |
| 519 | extern xtensa_regfile |
| 520 | xtensa_operand_regfile (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 521 | |
| 522 | |
| 523 | /* Register operands may span multiple consecutive registers, e.g., a |
| 524 | 64-bit data type may occupy two 32-bit registers. Only the first |
| 525 | register is encoded in the operand field. This function specifies |
| 526 | the number of consecutive registers occupied by this operand. For |
| 527 | non-register operands, the return value is undefined. Returns |
| 528 | XTENSA_UNDEFINED on error. */ |
| 529 | |
| 530 | extern int |
| 531 | xtensa_operand_num_regs (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 532 | |
| 533 | |
| 534 | /* Some register operands do not completely identify the register being |
| 535 | accessed. For example, the operand value may be added to an internal |
| 536 | state value. By definition, this implies that the corresponding |
| 537 | regfile is not allocatable. Unknown registers should generally be |
| 538 | treated with worst-case assumptions. The function returns 0 if the |
| 539 | register value is unknown, 1 if known, and XTENSA_UNDEFINED on |
| 540 | error. */ |
| 541 | |
| 542 | extern int |
| 543 | xtensa_operand_is_known_reg (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 544 | |
| 545 | |
| 546 | /* Check if an immediate operand is PC-relative. Returns 0 for register |
| 547 | operands and non-PC-relative immediates, 1 for PC-relative |
| 548 | immediates, and XTENSA_UNDEFINED on error. */ |
| 549 | |
| 550 | extern int |
| 551 | xtensa_operand_is_PCrelative (xtensa_isa isa, xtensa_opcode opc, int opnd); |
| 552 | |
| 553 | |
| 554 | /* For PC-relative offset operands, the interpretation of the offset may |
| 555 | vary between opcodes, e.g., is it relative to the current PC or that |
| 556 | of the next instruction? The following functions are defined to |
| 557 | perform PC-relative relocations and to undo them (as in the |
| 558 | disassembler). The "do_reloc" function takes the desired address |
| 559 | value and the PC of the current instruction and sets the value to the |
| 560 | corresponding PC-relative offset (which can then be encoded and |
| 561 | stored into the operand field). The "undo_reloc" function takes the |
| 562 | unencoded offset value and the current PC and sets the value to the |
| 563 | appropriate address. The return values are non-zero on error. Note |
| 564 | that these functions do not replace the encode/decode functions; the |
| 565 | operands must be encoded/decoded separately and the encode functions |
| 566 | are responsible for detecting invalid operand values. */ |
| 567 | |
| 568 | extern int |
| 569 | xtensa_operand_do_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 570 | uint32 *valp, uint32 pc); |
| 571 | |
| 572 | extern int |
| 573 | xtensa_operand_undo_reloc (xtensa_isa isa, xtensa_opcode opc, int opnd, |
| 574 | uint32 *valp, uint32 pc); |
| 575 | |
| 576 | |
| 577 | \f |
| 578 | /* State Operands. */ |
| 579 | |
| 580 | /* Get the state accessed by a state operand. Returns XTENSA_UNDEFINED |
| 581 | on error. */ |
| 582 | |
| 583 | extern xtensa_state |
| 584 | xtensa_stateOperand_state (xtensa_isa isa, xtensa_opcode opc, int stOp); |
| 585 | |
| 586 | |
| 587 | /* Check if a state operand is an input ('i'), output ('o'), or inout |
| 588 | ('m') operand. Returns 0 on error. */ |
| 589 | |
| 590 | extern char |
| 591 | xtensa_stateOperand_inout (xtensa_isa isa, xtensa_opcode opc, int stOp); |
| 592 | |
| 593 | |
| 594 | \f |
| 595 | /* Interface Operands. */ |
| 596 | |
| 597 | /* Get the external interface accessed by an interface operand. |
| 598 | Returns XTENSA_UNDEFINED on error. */ |
| 599 | |
| 600 | extern xtensa_interface |
| 601 | xtensa_interfaceOperand_interface (xtensa_isa isa, xtensa_opcode opc, |
| 602 | int ifOp); |
| 603 | |
| 604 | |
| 605 | \f |
| 606 | /* Register Files. */ |
| 607 | |
| 608 | /* Regfiles include both "real" regfiles and "views", where a view |
| 609 | allows a group of adjacent registers in a real "parent" regfile to be |
| 610 | viewed as a single register. A regfile view has all the same |
| 611 | properties as its parent except for its (long) name, bit width, number |
| 612 | of entries, and default ctype. You can use the parent function to |
| 613 | distinguish these two classes. */ |
| 614 | |
| 615 | /* Look up a regfile by either its name or its abbreviated "short name". |
| 616 | Returns XTENSA_UNDEFINED on error. The "lookup_shortname" function |
| 617 | ignores "view" regfiles since they always have the same shortname as |
| 618 | their parents. */ |
| 619 | |
| 620 | extern xtensa_regfile |
| 621 | xtensa_regfile_lookup (xtensa_isa isa, const char *name); |
| 622 | |
| 623 | extern xtensa_regfile |
| 624 | xtensa_regfile_lookup_shortname (xtensa_isa isa, const char *shortname); |
| 625 | |
| 626 | |
| 627 | /* Get the name or abbreviated "short name" of a regfile. |
| 628 | Returns null on error. */ |
| 629 | |
| 630 | extern const char * |
| 631 | xtensa_regfile_name (xtensa_isa isa, xtensa_regfile rf); |
| 632 | |
| 633 | extern const char * |
| 634 | xtensa_regfile_shortname (xtensa_isa isa, xtensa_regfile rf); |
| 635 | |
| 636 | |
| 637 | /* Get the parent regfile of a "view" regfile. If the regfile is not a |
| 638 | view, the result is the same as the input parameter. Returns |
| 639 | XTENSA_UNDEFINED on error. */ |
| 640 | |
| 641 | extern xtensa_regfile |
| 642 | xtensa_regfile_view_parent (xtensa_isa isa, xtensa_regfile rf); |
| 643 | |
| 644 | |
| 645 | /* Get the bit width of a regfile or regfile view. |
| 646 | Returns XTENSA_UNDEFINED on error. */ |
| 647 | |
| 648 | extern int |
| 649 | xtensa_regfile_num_bits (xtensa_isa isa, xtensa_regfile rf); |
| 650 | |
| 651 | |
| 652 | /* Get the number of regfile entries. Returns XTENSA_UNDEFINED on |
| 653 | error. */ |
| 654 | |
| 655 | extern int |
| 656 | xtensa_regfile_num_entries (xtensa_isa isa, xtensa_regfile rf); |
| 657 | |
| 658 | |
| 659 | \f |
| 660 | /* Processor States. */ |
| 661 | |
| 662 | /* Look up a state by name. Returns XTENSA_UNDEFINED on error. */ |
| 663 | |
| 664 | extern xtensa_state |
| 665 | xtensa_state_lookup (xtensa_isa isa, const char *name); |
| 666 | |
| 667 | |
| 668 | /* Get the name for a processor state. Returns null on error. */ |
| 669 | |
| 670 | extern const char * |
| 671 | xtensa_state_name (xtensa_isa isa, xtensa_state st); |
| 672 | |
| 673 | |
| 674 | /* Get the bit width for a processor state. |
| 675 | Returns XTENSA_UNDEFINED on error. */ |
| 676 | |
| 677 | extern int |
| 678 | xtensa_state_num_bits (xtensa_isa isa, xtensa_state st); |
| 679 | |
| 680 | |
| 681 | /* Check if a state is exported from the processor core. Returns 0 if |
| 682 | the condition is false, 1 if the condition is true, and |
| 683 | XTENSA_UNDEFINED on error. */ |
| 684 | |
| 685 | extern int |
| 686 | xtensa_state_is_exported (xtensa_isa isa, xtensa_state st); |
| 687 | |
| 688 | |
| 689 | \f |
| 690 | /* Sysregs ("special registers" and "user registers"). */ |
| 691 | |
| 692 | /* Look up a register by its number and whether it is a "user register" |
| 693 | or a "special register". Returns XTENSA_UNDEFINED if the sysreg does |
| 694 | not exist. */ |
| 695 | |
| 696 | extern xtensa_sysreg |
| 697 | xtensa_sysreg_lookup (xtensa_isa isa, int num, int is_user); |
| 698 | |
| 699 | |
| 700 | /* Check if there exists a sysreg with a given name. |
| 701 | If not, this function returns XTENSA_UNDEFINED. */ |
| 702 | |
| 703 | extern xtensa_sysreg |
| 704 | xtensa_sysreg_lookup_name (xtensa_isa isa, const char *name); |
| 705 | |
| 706 | |
| 707 | /* Get the name of a sysreg. Returns null on error. */ |
| 708 | |
| 709 | extern const char * |
| 710 | xtensa_sysreg_name (xtensa_isa isa, xtensa_sysreg sysreg); |
| 711 | |
| 712 | |
| 713 | /* Get the register number. Returns XTENSA_UNDEFINED on error. */ |
| 714 | |
| 715 | extern int |
| 716 | xtensa_sysreg_number (xtensa_isa isa, xtensa_sysreg sysreg); |
| 717 | |
| 718 | |
| 719 | /* Check if a sysreg is a "special register" or a "user register". |
| 720 | Returns 0 for special registers, 1 for user registers and |
| 721 | XTENSA_UNDEFINED on error. */ |
| 722 | |
| 723 | extern int |
| 724 | xtensa_sysreg_is_user (xtensa_isa isa, xtensa_sysreg sysreg); |
| 725 | |
| 726 | |
| 727 | \f |
| 728 | /* Interfaces. */ |
| 729 | |
| 730 | /* Find an interface by name. The return value is XTENSA_UNDEFINED if |
| 731 | the specified interface is not found. */ |
| 732 | |
| 733 | extern xtensa_interface |
| 734 | xtensa_interface_lookup (xtensa_isa isa, const char *ifname); |
| 735 | |
| 736 | |
| 737 | /* Get the name of an interface. Returns null on error. */ |
| 738 | |
| 739 | extern const char * |
| 740 | xtensa_interface_name (xtensa_isa isa, xtensa_interface intf); |
| 741 | |
| 742 | |
| 743 | /* Get the bit width for an interface. |
| 744 | Returns XTENSA_UNDEFINED on error. */ |
| 745 | |
| 746 | extern int |
| 747 | xtensa_interface_num_bits (xtensa_isa isa, xtensa_interface intf); |
| 748 | |
| 749 | |
| 750 | /* Check if an interface is an input ('i') or output ('o') with respect |
| 751 | to the Xtensa processor core. Returns 0 on error. */ |
| 752 | |
| 753 | extern char |
| 754 | xtensa_interface_inout (xtensa_isa isa, xtensa_interface intf); |
| 755 | |
| 756 | |
| 757 | /* Check if accessing an interface has potential side effects. |
| 758 | Currently "data" interfaces have side effects and "control" |
| 759 | interfaces do not. Returns 1 if there are side effects, 0 if not, |
| 760 | and XTENSA_UNDEFINED on error. */ |
| 761 | |
| 762 | extern int |
| 763 | xtensa_interface_has_side_effect (xtensa_isa isa, xtensa_interface intf); |
| 764 | |
| 765 | |
| 766 | /* Some interfaces may be related such that accessing one interface |
| 767 | has side effects on a set of related interfaces. The interfaces |
| 768 | are partitioned into equivalence classes of related interfaces, and |
| 769 | each class is assigned a unique identifier number. This function |
| 770 | returns the class identifier for an interface, or XTENSA_UNDEFINED |
| 771 | on error. These identifiers can be compared to determine if two |
| 772 | interfaces are related; the specific values of the identifiers have |
| 773 | no particular meaning otherwise. */ |
| 774 | |
| 775 | extern int |
| 776 | xtensa_interface_class_id (xtensa_isa isa, xtensa_interface intf); |
| 777 | |
| 778 | |
| 779 | \f |
| 780 | /* Functional Units. */ |
| 781 | |
| 782 | /* Find a functional unit by name. The return value is XTENSA_UNDEFINED if |
| 783 | the specified unit is not found. */ |
| 784 | |
| 785 | extern xtensa_funcUnit |
| 786 | xtensa_funcUnit_lookup (xtensa_isa isa, const char *fname); |
| 787 | |
| 788 | |
| 789 | /* Get the name of a functional unit. Returns null on error. */ |
| 790 | |
| 791 | extern const char * |
| 792 | xtensa_funcUnit_name (xtensa_isa isa, xtensa_funcUnit fun); |
| 793 | |
| 794 | |
| 795 | /* Functional units may be replicated. See how many instances of a |
| 796 | particular function unit exist. Returns XTENSA_UNDEFINED on error. */ |
| 797 | |
| 798 | extern int |
| 799 | xtensa_funcUnit_num_copies (xtensa_isa isa, xtensa_funcUnit fun); |
| 800 | |
| 801 | |
| 802 | #ifdef __cplusplus |
| 803 | } |
| 804 | #endif |
| 805 | #endif /* XTENSA_LIBISA_H */ |