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x86: don't recognize bnd<N> as registers without CpuMPX
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12018-04-26 Jan Beulich <jbeulich@suse.com>
2
3 * i386-gen.c (cpu_flag_init): CPU_I586_FLAGS inherits Cpu387 only.
4 CPU_287_FLAGS is Cpu287 only. CPU_387_FLAGS is Cpu387 only.
5 * i386-init.h: Re-generate.
6
72018-04-26 Jan Beulich <jbeulich@suse.com>
8
9 * i386-gen.c (VexImmExt): Delete.
10 * i386-opc.h (VexImmExt, veximmext): Delete.
11 * i386-opc.tbl: Drop all VexImmExt uses.
12 * i386-tlb.h: Re-generate.
13
142018-04-25 Jan Beulich <jbeulich@suse.com>
15
16 * i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
17 register-only forms.
18 * i386-tlb.h: Re-generate.
19
202018-04-25 Tamar Christina <tamar.christina@arm.com>
21
22 * aarch64-tbl.h (sqrdmlah, sqrdmlsh): Fix masks.
23
242018-04-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
25
26 * i386-dis.c: Add REG_0F1C_MOD_0, MOD_0F1C_PREFIX_0,
27 PREFIX_0F1C.
28 * i386-gen.c (cpu_flag_init): Add CPU_CLDEMOTE_FLAGS,
29 (cpu_flags): Add CpuCLDEMOTE.
30 * i386-init.h: Regenerate.
31 * i386-opc.h (enum): Add CpuCLDEMOTE,
32 (i386_cpu_flags): Add cpucldemote.
33 * i386-opc.tbl: Add cldemote.
34 * i386-tbl.h: Regenerate.
35
362018-04-16 Alan Modra <amodra@gmail.com>
37
38 * Makefile.am: Remove sh5 and sh64 support.
39 * configure.ac: Likewise.
40 * disassemble.c: Likewise.
41 * disassemble.h: Likewise.
42 * sh-dis.c: Likewise.
43 * sh64-dis.c: Delete.
44 * sh64-opc.c: Delete.
45 * sh64-opc.h: Delete.
46 * Makefile.in: Regenerate.
47 * configure: Regenerate.
48 * po/POTFILES.in: Regenerate.
49
502018-04-16 Alan Modra <amodra@gmail.com>
51
52 * Makefile.am: Remove w65 support.
53 * configure.ac: Likewise.
54 * disassemble.c: Likewise.
55 * disassemble.h: Likewise.
56 * w65-dis.c: Delete.
57 * w65-opc.h: Delete.
58 * Makefile.in: Regenerate.
59 * configure: Regenerate.
60 * po/POTFILES.in: Regenerate.
61
622018-04-16 Alan Modra <amodra@gmail.com>
63
64 * configure.ac: Remove we32k support.
65 * configure: Regenerate.
66
672018-04-16 Alan Modra <amodra@gmail.com>
68
69 * Makefile.am: Remove m88k support.
70 * configure.ac: Likewise.
71 * disassemble.c: Likewise.
72 * disassemble.h: Likewise.
73 * m88k-dis.c: Delete.
74 * Makefile.in: Regenerate.
75 * configure: Regenerate.
76 * po/POTFILES.in: Regenerate.
77
782018-04-16 Alan Modra <amodra@gmail.com>
79
80 * Makefile.am: Remove i370 support.
81 * configure.ac: Likewise.
82 * disassemble.c: Likewise.
83 * disassemble.h: Likewise.
84 * i370-dis.c: Delete.
85 * i370-opc.c: Delete.
86 * Makefile.in: Regenerate.
87 * configure: Regenerate.
88 * po/POTFILES.in: Regenerate.
89
902018-04-16 Alan Modra <amodra@gmail.com>
91
92 * Makefile.am: Remove h8500 support.
93 * configure.ac: Likewise.
94 * disassemble.c: Likewise.
95 * disassemble.h: Likewise.
96 * h8500-dis.c: Delete.
97 * h8500-opc.h: Delete.
98 * Makefile.in: Regenerate.
99 * configure: Regenerate.
100 * po/POTFILES.in: Regenerate.
101
1022018-04-16 Alan Modra <amodra@gmail.com>
103
104 * configure.ac: Remove tahoe support.
105 * configure: Regenerate.
106
1072018-04-15 H.J. Lu <hongjiu.lu@intel.com>
108
109 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
110 umwait.
111 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
112 64-bit mode.
113 * i386-tbl.h: Regenerated.
114
1152018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
116
117 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
118 PREFIX_MOD_1_0FAE_REG_6.
119 (va_mode): New.
120 (OP_E_register): Use va_mode.
121 * i386-dis-evex.h (prefix_table):
122 New instructions (see prefixes above).
123 * i386-gen.c (cpu_flag_init): Add WAITPKG.
124 (cpu_flags): Likewise.
125 * i386-opc.h (enum): Likewise.
126 (i386_cpu_flags): Likewise.
127 * i386-opc.tbl: Add umonitor, umwait, tpause.
128 * i386-init.h: Regenerate.
129 * i386-tbl.h: Likewise.
130
1312018-04-11 Alan Modra <amodra@gmail.com>
132
133 * opcodes/i860-dis.c: Delete.
134 * opcodes/i960-dis.c: Delete.
135 * Makefile.am: Remove i860 and i960 support.
136 * configure.ac: Likewise.
137 * disassemble.c: Likewise.
138 * disassemble.h: Likewise.
139 * Makefile.in: Regenerate.
140 * configure: Regenerate.
141 * po/POTFILES.in: Regenerate.
142
1432018-04-04 H.J. Lu <hongjiu.lu@intel.com>
144
145 PR binutils/23025
146 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
147 to 0.
148 (print_insn): Clear vex instead of vex.evex.
149
1502018-04-04 Nick Clifton <nickc@redhat.com>
151
152 * po/es.po: Updated Spanish translation.
153
1542018-03-28 Jan Beulich <jbeulich@suse.com>
155
156 * i386-gen.c (opcode_modifiers): Delete VecESize.
157 * i386-opc.h (VecESize): Delete.
158 (struct i386_opcode_modifier): Delete vecesize.
159 * i386-opc.tbl: Drop VecESize.
160 * i386-tlb.h: Re-generate.
161
1622018-03-28 Jan Beulich <jbeulich@suse.com>
163
164 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
165 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
166 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
167 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
168 * i386-tlb.h: Re-generate.
169
1702018-03-28 Jan Beulich <jbeulich@suse.com>
171
172 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
173 Fold AVX512 forms
174 * i386-tlb.h: Re-generate.
175
1762018-03-28 Jan Beulich <jbeulich@suse.com>
177
178 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
179 (vex_len_table): Drop Y for vcvt*2si.
180 (putop): Replace plain 'Y' handling by abort().
181
1822018-03-28 Nick Clifton <nickc@redhat.com>
183
184 PR 22988
185 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
186 instructions with only a base address register.
187 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
188 handle AARHC64_OPND_SVE_ADDR_R.
189 (aarch64_print_operand): Likewise.
190 * aarch64-asm-2.c: Regenerate.
191 * aarch64_dis-2.c: Regenerate.
192 * aarch64-opc-2.c: Regenerate.
193
1942018-03-22 Jan Beulich <jbeulich@suse.com>
195
196 * i386-opc.tbl: Drop VecESize from register only insn forms and
197 memory forms not allowing broadcast.
198 * i386-tlb.h: Re-generate.
199
2002018-03-22 Jan Beulich <jbeulich@suse.com>
201
202 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
203 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
204 sha256*): Drop Disp<N>.
205
2062018-03-22 Jan Beulich <jbeulich@suse.com>
207
208 * i386-dis.c (EbndS, bnd_swap_mode): New.
209 (prefix_table): Use EbndS.
210 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
211 * i386-opc.tbl (bndmov): Move misplaced Load.
212 * i386-tlb.h: Re-generate.
213
2142018-03-22 Jan Beulich <jbeulich@suse.com>
215
216 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
217 templates allowing memory operands and folded ones for register
218 only flavors.
219 * i386-tlb.h: Re-generate.
220
2212018-03-22 Jan Beulich <jbeulich@suse.com>
222
223 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
224 256-bit templates. Drop redundant leftover Disp<N>.
225 * i386-tlb.h: Re-generate.
226
2272018-03-14 Kito Cheng <kito.cheng@gmail.com>
228
229 * riscv-opc.c (riscv_insn_types): New.
230
2312018-03-13 Nick Clifton <nickc@redhat.com>
232
233 * po/pt_BR.po: Updated Brazilian Portuguese translation.
234
2352018-03-08 H.J. Lu <hongjiu.lu@intel.com>
236
237 * i386-opc.tbl: Add Optimize to clr.
238 * i386-tbl.h: Regenerated.
239
2402018-03-08 H.J. Lu <hongjiu.lu@intel.com>
241
242 * i386-gen.c (opcode_modifiers): Remove OldGcc.
243 * i386-opc.h (OldGcc): Removed.
244 (i386_opcode_modifier): Remove oldgcc.
245 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
246 instructions for old (<= 2.8.1) versions of gcc.
247 * i386-tbl.h: Regenerated.
248
2492018-03-08 Jan Beulich <jbeulich@suse.com>
250
251 * i386-opc.h (EVEXDYN): New.
252 * i386-opc.tbl: Fold various AVX512VL templates.
253 * i386-tlb.h: Re-generate.
254
2552018-03-08 Jan Beulich <jbeulich@suse.com>
256
257 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
258 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
259 vpexpandd, vpexpandq): Fold AFX512VF templates.
260 * i386-tlb.h: Re-generate.
261
2622018-03-08 Jan Beulich <jbeulich@suse.com>
263
264 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
265 Fold 128- and 256-bit VEX-encoded templates.
266 * i386-tlb.h: Re-generate.
267
2682018-03-08 Jan Beulich <jbeulich@suse.com>
269
270 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
271 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
272 vpexpandd, vpexpandq): Fold AVX512F templates.
273 * i386-tlb.h: Re-generate.
274
2752018-03-08 Jan Beulich <jbeulich@suse.com>
276
277 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
278 64-bit templates. Drop Disp<N>.
279 * i386-tlb.h: Re-generate.
280
2812018-03-08 Jan Beulich <jbeulich@suse.com>
282
283 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
284 and 256-bit templates.
285 * i386-tlb.h: Re-generate.
286
2872018-03-08 Jan Beulich <jbeulich@suse.com>
288
289 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
290 * i386-tlb.h: Re-generate.
291
2922018-03-08 Jan Beulich <jbeulich@suse.com>
293
294 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
295 Drop NoAVX.
296 * i386-tlb.h: Re-generate.
297
2982018-03-08 Jan Beulich <jbeulich@suse.com>
299
300 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
301 * i386-tlb.h: Re-generate.
302
3032018-03-08 Jan Beulich <jbeulich@suse.com>
304
305 * i386-gen.c (opcode_modifiers): Delete FloatD.
306 * i386-opc.h (FloatD): Delete.
307 (struct i386_opcode_modifier): Delete floatd.
308 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
309 FloatD by D.
310 * i386-tlb.h: Re-generate.
311
3122018-03-08 Jan Beulich <jbeulich@suse.com>
313
314 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
315
3162018-03-08 Jan Beulich <jbeulich@suse.com>
317
318 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
319 * i386-tlb.h: Re-generate.
320
3212018-03-08 Jan Beulich <jbeulich@suse.com>
322
323 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
324 forms.
325 * i386-tlb.h: Re-generate.
326
3272018-03-07 Alan Modra <amodra@gmail.com>
328
329 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
330 bfd_arch_rs6000.
331 * disassemble.h (print_insn_rs6000): Delete.
332 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
333 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
334 (print_insn_rs6000): Delete.
335
3362018-03-03 Alan Modra <amodra@gmail.com>
337
338 * sysdep.h (opcodes_error_handler): Define.
339 (_bfd_error_handler): Declare.
340 * Makefile.am: Remove stray #.
341 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
342 EDIT" comment.
343 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
344 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
345 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
346 opcodes_error_handler to print errors. Standardize error messages.
347 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
348 and include opintl.h.
349 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
350 * i386-gen.c: Standardize error messages.
351 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
352 * Makefile.in: Regenerate.
353 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
354 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
355 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
356 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
357 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
358 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
359 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
360 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
361 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
362 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
363 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
364 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
365 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
366
3672018-03-01 H.J. Lu <hongjiu.lu@intel.com>
368
369 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
370 vpsub[bwdq] instructions.
371 * i386-tbl.h: Regenerated.
372
3732018-03-01 Alan Modra <amodra@gmail.com>
374
375 * configure.ac (ALL_LINGUAS): Sort.
376 * configure: Regenerate.
377
3782018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
379
380 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
381 macro by assignements.
382
3832018-02-27 H.J. Lu <hongjiu.lu@intel.com>
384
385 PR gas/22871
386 * i386-gen.c (opcode_modifiers): Add Optimize.
387 * i386-opc.h (Optimize): New enum.
388 (i386_opcode_modifier): Add optimize.
389 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
390 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
391 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
392 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
393 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
394 vpxord and vpxorq.
395 * i386-tbl.h: Regenerated.
396
3972018-02-26 Alan Modra <amodra@gmail.com>
398
399 * crx-dis.c (getregliststring): Allocate a large enough buffer
400 to silence false positive gcc8 warning.
401
4022018-02-22 Shea Levy <shea@shealevy.com>
403
404 * disassemble.c (ARCH_riscv): Define if ARCH_all.
405
4062018-02-22 H.J. Lu <hongjiu.lu@intel.com>
407
408 * i386-opc.tbl: Add {rex},
409 * i386-tbl.h: Regenerated.
410
4112018-02-20 Maciej W. Rozycki <macro@mips.com>
412
413 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
414 (mips16_opcodes): Replace `M' with `m' for "restore".
415
4162018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
417
418 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
419
4202018-02-13 Maciej W. Rozycki <macro@mips.com>
421
422 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
423 variable to `function_index'.
424
4252018-02-13 Nick Clifton <nickc@redhat.com>
426
427 PR 22823
428 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
429 about truncation of printing.
430
4312018-02-12 Henry Wong <henry@stuffedcow.net>
432
433 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
434
4352018-02-05 Nick Clifton <nickc@redhat.com>
436
437 * po/pt_BR.po: Updated Brazilian Portuguese translation.
438
4392018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
440
441 * i386-dis.c (enum): Add pconfig.
442 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
443 (cpu_flags): Add CpuPCONFIG.
444 * i386-opc.h (enum): Add CpuPCONFIG.
445 (i386_cpu_flags): Add cpupconfig.
446 * i386-opc.tbl: Add PCONFIG instruction.
447 * i386-init.h: Regenerate.
448 * i386-tbl.h: Likewise.
449
4502018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
451
452 * i386-dis.c (enum): Add PREFIX_0F09.
453 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
454 (cpu_flags): Add CpuWBNOINVD.
455 * i386-opc.h (enum): Add CpuWBNOINVD.
456 (i386_cpu_flags): Add cpuwbnoinvd.
457 * i386-opc.tbl: Add WBNOINVD instruction.
458 * i386-init.h: Regenerate.
459 * i386-tbl.h: Likewise.
460
4612018-01-17 Jim Wilson <jimw@sifive.com>
462
463 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
464
4652018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
466
467 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
468 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
469 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
470 (cpu_flags): Add CpuIBT, CpuSHSTK.
471 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
472 (i386_cpu_flags): Add cpuibt, cpushstk.
473 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
474 * i386-init.h: Regenerate.
475 * i386-tbl.h: Likewise.
476
4772018-01-16 Nick Clifton <nickc@redhat.com>
478
479 * po/pt_BR.po: Updated Brazilian Portugese translation.
480 * po/de.po: Updated German translation.
481
4822018-01-15 Jim Wilson <jimw@sifive.com>
483
484 * riscv-opc.c (match_c_nop): New.
485 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
486
4872018-01-15 Nick Clifton <nickc@redhat.com>
488
489 * po/uk.po: Updated Ukranian translation.
490
4912018-01-13 Nick Clifton <nickc@redhat.com>
492
493 * po/opcodes.pot: Regenerated.
494
4952018-01-13 Nick Clifton <nickc@redhat.com>
496
497 * configure: Regenerate.
498
4992018-01-13 Nick Clifton <nickc@redhat.com>
500
501 2.30 branch created.
502
5032018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
504
505 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
506 * i386-tbl.h: Regenerate.
507
5082018-01-10 Jan Beulich <jbeulich@suse.com>
509
510 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
511 * i386-tbl.h: Re-generate.
512
5132018-01-10 Jan Beulich <jbeulich@suse.com>
514
515 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
516 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
517 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
518 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
519 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
520 Disp8MemShift of AVX512VL forms.
521 * i386-tbl.h: Re-generate.
522
5232018-01-09 Jim Wilson <jimw@sifive.com>
524
525 * riscv-dis.c (maybe_print_address): If base_reg is zero,
526 then the hi_addr value is zero.
527
5282018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
529
530 * arm-dis.c (arm_opcodes): Add csdb.
531 (thumb32_opcodes): Add csdb.
532
5332018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
534
535 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
536 * aarch64-asm-2.c: Regenerate.
537 * aarch64-dis-2.c: Regenerate.
538 * aarch64-opc-2.c: Regenerate.
539
5402018-01-08 H.J. Lu <hongjiu.lu@intel.com>
541
542 PR gas/22681
543 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
544 Remove AVX512 vmovd with 64-bit operands.
545 * i386-tbl.h: Regenerated.
546
5472018-01-05 Jim Wilson <jimw@sifive.com>
548
549 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
550 jalr.
551
5522018-01-03 Alan Modra <amodra@gmail.com>
553
554 Update year range in copyright notice of all files.
555
5562018-01-02 Jan Beulich <jbeulich@suse.com>
557
558 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
559 and OPERAND_TYPE_REGZMM entries.
560
561For older changes see ChangeLog-2017
562\f
563Copyright (C) 2018 Free Software Foundation, Inc.
564
565Copying and distribution of this file, with or without modification,
566are permitted in any medium without royalty provided the copyright
567notice and this notice are preserved.
568
569Local Variables:
570mode: change-log
571left-margin: 8
572fill-column: 74
573version-control: never
574End:
GDB Binutils - Deliverables
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