Remove MAX_REGISTER_SIZE define
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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CommitLineData
12018-03-08 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.h (EVEXDYN): New.
4 * i386-opc.tbl: Fold various AVX512VL templates.
5 * i386-tlb.h: Re-generate.
6
72018-03-08 Jan Beulich <jbeulich@suse.com>
8
9 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
10 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
11 vpexpandd, vpexpandq): Fold AFX512VF templates.
12 * i386-tlb.h: Re-generate.
13
142018-03-08 Jan Beulich <jbeulich@suse.com>
15
16 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
17 Fold 128- and 256-bit VEX-encoded templates.
18 * i386-tlb.h: Re-generate.
19
202018-03-08 Jan Beulich <jbeulich@suse.com>
21
22 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
23 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
24 vpexpandd, vpexpandq): Fold AVX512F templates.
25 * i386-tlb.h: Re-generate.
26
272018-03-08 Jan Beulich <jbeulich@suse.com>
28
29 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
30 64-bit templates. Drop Disp<N>.
31 * i386-tlb.h: Re-generate.
32
332018-03-08 Jan Beulich <jbeulich@suse.com>
34
35 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
36 and 256-bit templates.
37 * i386-tlb.h: Re-generate.
38
392018-03-08 Jan Beulich <jbeulich@suse.com>
40
41 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
42 * i386-tlb.h: Re-generate.
43
442018-03-08 Jan Beulich <jbeulich@suse.com>
45
46 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
47 Drop NoAVX.
48 * i386-tlb.h: Re-generate.
49
502018-03-08 Jan Beulich <jbeulich@suse.com>
51
52 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
53 * i386-tlb.h: Re-generate.
54
552018-03-08 Jan Beulich <jbeulich@suse.com>
56
57 * i386-gen.c (opcode_modifiers): Delete FloatD.
58 * i386-opc.h (FloatD): Delete.
59 (struct i386_opcode_modifier): Delete floatd.
60 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
61 FloatD by D.
62 * i386-tlb.h: Re-generate.
63
642018-03-08 Jan Beulich <jbeulich@suse.com>
65
66 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
67
682018-03-08 Jan Beulich <jbeulich@suse.com>
69
70 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
71 * i386-tlb.h: Re-generate.
72
732018-03-08 Jan Beulich <jbeulich@suse.com>
74
75 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
76 forms.
77 * i386-tlb.h: Re-generate.
78
792018-03-07 Alan Modra <amodra@gmail.com>
80
81 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
82 bfd_arch_rs6000.
83 * disassemble.h (print_insn_rs6000): Delete.
84 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
85 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
86 (print_insn_rs6000): Delete.
87
882018-03-03 Alan Modra <amodra@gmail.com>
89
90 * sysdep.h (opcodes_error_handler): Define.
91 (_bfd_error_handler): Declare.
92 * Makefile.am: Remove stray #.
93 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
94 EDIT" comment.
95 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
96 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
97 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
98 opcodes_error_handler to print errors. Standardize error messages.
99 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
100 and include opintl.h.
101 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
102 * i386-gen.c: Standardize error messages.
103 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
104 * Makefile.in: Regenerate.
105 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
106 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
107 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
108 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
109 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
110 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
111 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
112 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
113 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
114 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
115 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
116 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
117 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
118
1192018-03-01 H.J. Lu <hongjiu.lu@intel.com>
120
121 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
122 vpsub[bwdq] instructions.
123 * i386-tbl.h: Regenerated.
124
1252018-03-01 Alan Modra <amodra@gmail.com>
126
127 * configure.ac (ALL_LINGUAS): Sort.
128 * configure: Regenerate.
129
1302018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
131
132 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
133 macro by assignements.
134
1352018-02-27 H.J. Lu <hongjiu.lu@intel.com>
136
137 PR gas/22871
138 * i386-gen.c (opcode_modifiers): Add Optimize.
139 * i386-opc.h (Optimize): New enum.
140 (i386_opcode_modifier): Add optimize.
141 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
142 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
143 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
144 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
145 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
146 vpxord and vpxorq.
147 * i386-tbl.h: Regenerated.
148
1492018-02-26 Alan Modra <amodra@gmail.com>
150
151 * crx-dis.c (getregliststring): Allocate a large enough buffer
152 to silence false positive gcc8 warning.
153
1542018-02-22 Shea Levy <shea@shealevy.com>
155
156 * disassemble.c (ARCH_riscv): Define if ARCH_all.
157
1582018-02-22 H.J. Lu <hongjiu.lu@intel.com>
159
160 * i386-opc.tbl: Add {rex},
161 * i386-tbl.h: Regenerated.
162
1632018-02-20 Maciej W. Rozycki <macro@mips.com>
164
165 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
166 (mips16_opcodes): Replace `M' with `m' for "restore".
167
1682018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
169
170 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
171
1722018-02-13 Maciej W. Rozycki <macro@mips.com>
173
174 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
175 variable to `function_index'.
176
1772018-02-13 Nick Clifton <nickc@redhat.com>
178
179 PR 22823
180 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
181 about truncation of printing.
182
1832018-02-12 Henry Wong <henry@stuffedcow.net>
184
185 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
186
1872018-02-05 Nick Clifton <nickc@redhat.com>
188
189 * po/pt_BR.po: Updated Brazilian Portuguese translation.
190
1912018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
192
193 * i386-dis.c (enum): Add pconfig.
194 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
195 (cpu_flags): Add CpuPCONFIG.
196 * i386-opc.h (enum): Add CpuPCONFIG.
197 (i386_cpu_flags): Add cpupconfig.
198 * i386-opc.tbl: Add PCONFIG instruction.
199 * i386-init.h: Regenerate.
200 * i386-tbl.h: Likewise.
201
2022018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
203
204 * i386-dis.c (enum): Add PREFIX_0F09.
205 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
206 (cpu_flags): Add CpuWBNOINVD.
207 * i386-opc.h (enum): Add CpuWBNOINVD.
208 (i386_cpu_flags): Add cpuwbnoinvd.
209 * i386-opc.tbl: Add WBNOINVD instruction.
210 * i386-init.h: Regenerate.
211 * i386-tbl.h: Likewise.
212
2132018-01-17 Jim Wilson <jimw@sifive.com>
214
215 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
216
2172018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
218
219 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
220 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
221 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
222 (cpu_flags): Add CpuIBT, CpuSHSTK.
223 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
224 (i386_cpu_flags): Add cpuibt, cpushstk.
225 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
226 * i386-init.h: Regenerate.
227 * i386-tbl.h: Likewise.
228
2292018-01-16 Nick Clifton <nickc@redhat.com>
230
231 * po/pt_BR.po: Updated Brazilian Portugese translation.
232 * po/de.po: Updated German translation.
233
2342018-01-15 Jim Wilson <jimw@sifive.com>
235
236 * riscv-opc.c (match_c_nop): New.
237 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
238
2392018-01-15 Nick Clifton <nickc@redhat.com>
240
241 * po/uk.po: Updated Ukranian translation.
242
2432018-01-13 Nick Clifton <nickc@redhat.com>
244
245 * po/opcodes.pot: Regenerated.
246
2472018-01-13 Nick Clifton <nickc@redhat.com>
248
249 * configure: Regenerate.
250
2512018-01-13 Nick Clifton <nickc@redhat.com>
252
253 2.30 branch created.
254
2552018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
256
257 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
258 * i386-tbl.h: Regenerate.
259
2602018-01-10 Jan Beulich <jbeulich@suse.com>
261
262 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
263 * i386-tbl.h: Re-generate.
264
2652018-01-10 Jan Beulich <jbeulich@suse.com>
266
267 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
268 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
269 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
270 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
271 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
272 Disp8MemShift of AVX512VL forms.
273 * i386-tbl.h: Re-generate.
274
2752018-01-09 Jim Wilson <jimw@sifive.com>
276
277 * riscv-dis.c (maybe_print_address): If base_reg is zero,
278 then the hi_addr value is zero.
279
2802018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
281
282 * arm-dis.c (arm_opcodes): Add csdb.
283 (thumb32_opcodes): Add csdb.
284
2852018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
286
287 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
288 * aarch64-asm-2.c: Regenerate.
289 * aarch64-dis-2.c: Regenerate.
290 * aarch64-opc-2.c: Regenerate.
291
2922018-01-08 H.J. Lu <hongjiu.lu@intel.com>
293
294 PR gas/22681
295 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
296 Remove AVX512 vmovd with 64-bit operands.
297 * i386-tbl.h: Regenerated.
298
2992018-01-05 Jim Wilson <jimw@sifive.com>
300
301 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
302 jalr.
303
3042018-01-03 Alan Modra <amodra@gmail.com>
305
306 Update year range in copyright notice of all files.
307
3082018-01-02 Jan Beulich <jbeulich@suse.com>
309
310 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
311 and OPERAND_TYPE_REGZMM entries.
312
313For older changes see ChangeLog-2017
314\f
315Copyright (C) 2018 Free Software Foundation, Inc.
316
317Copying and distribution of this file, with or without modification,
318are permitted in any medium without royalty provided the copyright
319notice and this notice are preserved.
320
321Local Variables:
322mode: change-log
323left-margin: 8
324fill-column: 74
325version-control: never
326End:
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