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Remove i370 support
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
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12018-04-16 Alan Modra <amodra@gmail.com>
2
3 * Makefile.am: Remove i370 support.
4 * configure.ac: Likewise.
5 * disassemble.c: Likewise.
6 * disassemble.h: Likewise.
7 * i370-dis.c: Delete.
8 * i370-opc.c: Delete.
9 * Makefile.in: Regenerate.
10 * configure: Regenerate.
11 * po/POTFILES.in: Regenerate.
12
132018-04-16 Alan Modra <amodra@gmail.com>
14
15 * Makefile.am: Remove h8500 support.
16 * configure.ac: Likewise.
17 * disassemble.c: Likewise.
18 * disassemble.h: Likewise.
19 * h8500-dis.c: Delete.
20 * h8500-opc.h: Delete.
21 * Makefile.in: Regenerate.
22 * configure: Regenerate.
23 * po/POTFILES.in: Regenerate.
24
252018-04-16 Alan Modra <amodra@gmail.com>
26
27 * configure.ac: Remove tahoe support.
28 * configure: Regenerate.
29
302018-04-15 H.J. Lu <hongjiu.lu@intel.com>
31
32 * i386-dis.c (prefix_table): Replace Em with Edq on tpause and
33 umwait.
34 * i386-opc.tbl: Allow 32-bit registers for tpause and umwait in
35 64-bit mode.
36 * i386-tbl.h: Regenerated.
37
382018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
39
40 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
41 PREFIX_MOD_1_0FAE_REG_6.
42 (va_mode): New.
43 (OP_E_register): Use va_mode.
44 * i386-dis-evex.h (prefix_table):
45 New instructions (see prefixes above).
46 * i386-gen.c (cpu_flag_init): Add WAITPKG.
47 (cpu_flags): Likewise.
48 * i386-opc.h (enum): Likewise.
49 (i386_cpu_flags): Likewise.
50 * i386-opc.tbl: Add umonitor, umwait, tpause.
51 * i386-init.h: Regenerate.
52 * i386-tbl.h: Likewise.
53
542018-04-11 Alan Modra <amodra@gmail.com>
55
56 * opcodes/i860-dis.c: Delete.
57 * opcodes/i960-dis.c: Delete.
58 * Makefile.am: Remove i860 and i960 support.
59 * configure.ac: Likewise.
60 * disassemble.c: Likewise.
61 * disassemble.h: Likewise.
62 * Makefile.in: Regenerate.
63 * configure: Regenerate.
64 * po/POTFILES.in: Regenerate.
65
662018-04-04 H.J. Lu <hongjiu.lu@intel.com>
67
68 PR binutils/23025
69 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
70 to 0.
71 (print_insn): Clear vex instead of vex.evex.
72
732018-04-04 Nick Clifton <nickc@redhat.com>
74
75 * po/es.po: Updated Spanish translation.
76
772018-03-28 Jan Beulich <jbeulich@suse.com>
78
79 * i386-gen.c (opcode_modifiers): Delete VecESize.
80 * i386-opc.h (VecESize): Delete.
81 (struct i386_opcode_modifier): Delete vecesize.
82 * i386-opc.tbl: Drop VecESize.
83 * i386-tlb.h: Re-generate.
84
852018-03-28 Jan Beulich <jbeulich@suse.com>
86
87 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
88 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
89 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
90 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
91 * i386-tlb.h: Re-generate.
92
932018-03-28 Jan Beulich <jbeulich@suse.com>
94
95 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
96 Fold AVX512 forms
97 * i386-tlb.h: Re-generate.
98
992018-03-28 Jan Beulich <jbeulich@suse.com>
100
101 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
102 (vex_len_table): Drop Y for vcvt*2si.
103 (putop): Replace plain 'Y' handling by abort().
104
1052018-03-28 Nick Clifton <nickc@redhat.com>
106
107 PR 22988
108 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
109 instructions with only a base address register.
110 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
111 handle AARHC64_OPND_SVE_ADDR_R.
112 (aarch64_print_operand): Likewise.
113 * aarch64-asm-2.c: Regenerate.
114 * aarch64_dis-2.c: Regenerate.
115 * aarch64-opc-2.c: Regenerate.
116
1172018-03-22 Jan Beulich <jbeulich@suse.com>
118
119 * i386-opc.tbl: Drop VecESize from register only insn forms and
120 memory forms not allowing broadcast.
121 * i386-tlb.h: Re-generate.
122
1232018-03-22 Jan Beulich <jbeulich@suse.com>
124
125 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
126 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
127 sha256*): Drop Disp<N>.
128
1292018-03-22 Jan Beulich <jbeulich@suse.com>
130
131 * i386-dis.c (EbndS, bnd_swap_mode): New.
132 (prefix_table): Use EbndS.
133 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
134 * i386-opc.tbl (bndmov): Move misplaced Load.
135 * i386-tlb.h: Re-generate.
136
1372018-03-22 Jan Beulich <jbeulich@suse.com>
138
139 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
140 templates allowing memory operands and folded ones for register
141 only flavors.
142 * i386-tlb.h: Re-generate.
143
1442018-03-22 Jan Beulich <jbeulich@suse.com>
145
146 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
147 256-bit templates. Drop redundant leftover Disp<N>.
148 * i386-tlb.h: Re-generate.
149
1502018-03-14 Kito Cheng <kito.cheng@gmail.com>
151
152 * riscv-opc.c (riscv_insn_types): New.
153
1542018-03-13 Nick Clifton <nickc@redhat.com>
155
156 * po/pt_BR.po: Updated Brazilian Portuguese translation.
157
1582018-03-08 H.J. Lu <hongjiu.lu@intel.com>
159
160 * i386-opc.tbl: Add Optimize to clr.
161 * i386-tbl.h: Regenerated.
162
1632018-03-08 H.J. Lu <hongjiu.lu@intel.com>
164
165 * i386-gen.c (opcode_modifiers): Remove OldGcc.
166 * i386-opc.h (OldGcc): Removed.
167 (i386_opcode_modifier): Remove oldgcc.
168 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
169 instructions for old (<= 2.8.1) versions of gcc.
170 * i386-tbl.h: Regenerated.
171
1722018-03-08 Jan Beulich <jbeulich@suse.com>
173
174 * i386-opc.h (EVEXDYN): New.
175 * i386-opc.tbl: Fold various AVX512VL templates.
176 * i386-tlb.h: Re-generate.
177
1782018-03-08 Jan Beulich <jbeulich@suse.com>
179
180 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
181 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
182 vpexpandd, vpexpandq): Fold AFX512VF templates.
183 * i386-tlb.h: Re-generate.
184
1852018-03-08 Jan Beulich <jbeulich@suse.com>
186
187 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
188 Fold 128- and 256-bit VEX-encoded templates.
189 * i386-tlb.h: Re-generate.
190
1912018-03-08 Jan Beulich <jbeulich@suse.com>
192
193 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
194 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
195 vpexpandd, vpexpandq): Fold AVX512F templates.
196 * i386-tlb.h: Re-generate.
197
1982018-03-08 Jan Beulich <jbeulich@suse.com>
199
200 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
201 64-bit templates. Drop Disp<N>.
202 * i386-tlb.h: Re-generate.
203
2042018-03-08 Jan Beulich <jbeulich@suse.com>
205
206 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
207 and 256-bit templates.
208 * i386-tlb.h: Re-generate.
209
2102018-03-08 Jan Beulich <jbeulich@suse.com>
211
212 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
213 * i386-tlb.h: Re-generate.
214
2152018-03-08 Jan Beulich <jbeulich@suse.com>
216
217 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
218 Drop NoAVX.
219 * i386-tlb.h: Re-generate.
220
2212018-03-08 Jan Beulich <jbeulich@suse.com>
222
223 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
224 * i386-tlb.h: Re-generate.
225
2262018-03-08 Jan Beulich <jbeulich@suse.com>
227
228 * i386-gen.c (opcode_modifiers): Delete FloatD.
229 * i386-opc.h (FloatD): Delete.
230 (struct i386_opcode_modifier): Delete floatd.
231 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
232 FloatD by D.
233 * i386-tlb.h: Re-generate.
234
2352018-03-08 Jan Beulich <jbeulich@suse.com>
236
237 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
238
2392018-03-08 Jan Beulich <jbeulich@suse.com>
240
241 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
242 * i386-tlb.h: Re-generate.
243
2442018-03-08 Jan Beulich <jbeulich@suse.com>
245
246 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
247 forms.
248 * i386-tlb.h: Re-generate.
249
2502018-03-07 Alan Modra <amodra@gmail.com>
251
252 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
253 bfd_arch_rs6000.
254 * disassemble.h (print_insn_rs6000): Delete.
255 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
256 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
257 (print_insn_rs6000): Delete.
258
2592018-03-03 Alan Modra <amodra@gmail.com>
260
261 * sysdep.h (opcodes_error_handler): Define.
262 (_bfd_error_handler): Declare.
263 * Makefile.am: Remove stray #.
264 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
265 EDIT" comment.
266 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
267 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
268 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
269 opcodes_error_handler to print errors. Standardize error messages.
270 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
271 and include opintl.h.
272 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
273 * i386-gen.c: Standardize error messages.
274 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
275 * Makefile.in: Regenerate.
276 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
277 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
278 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
279 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
280 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
281 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
282 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
283 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
284 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
285 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
286 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
287 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
288 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
289
2902018-03-01 H.J. Lu <hongjiu.lu@intel.com>
291
292 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
293 vpsub[bwdq] instructions.
294 * i386-tbl.h: Regenerated.
295
2962018-03-01 Alan Modra <amodra@gmail.com>
297
298 * configure.ac (ALL_LINGUAS): Sort.
299 * configure: Regenerate.
300
3012018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
302
303 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
304 macro by assignements.
305
3062018-02-27 H.J. Lu <hongjiu.lu@intel.com>
307
308 PR gas/22871
309 * i386-gen.c (opcode_modifiers): Add Optimize.
310 * i386-opc.h (Optimize): New enum.
311 (i386_opcode_modifier): Add optimize.
312 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
313 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
314 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
315 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
316 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
317 vpxord and vpxorq.
318 * i386-tbl.h: Regenerated.
319
3202018-02-26 Alan Modra <amodra@gmail.com>
321
322 * crx-dis.c (getregliststring): Allocate a large enough buffer
323 to silence false positive gcc8 warning.
324
3252018-02-22 Shea Levy <shea@shealevy.com>
326
327 * disassemble.c (ARCH_riscv): Define if ARCH_all.
328
3292018-02-22 H.J. Lu <hongjiu.lu@intel.com>
330
331 * i386-opc.tbl: Add {rex},
332 * i386-tbl.h: Regenerated.
333
3342018-02-20 Maciej W. Rozycki <macro@mips.com>
335
336 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
337 (mips16_opcodes): Replace `M' with `m' for "restore".
338
3392018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
340
341 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
342
3432018-02-13 Maciej W. Rozycki <macro@mips.com>
344
345 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
346 variable to `function_index'.
347
3482018-02-13 Nick Clifton <nickc@redhat.com>
349
350 PR 22823
351 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
352 about truncation of printing.
353
3542018-02-12 Henry Wong <henry@stuffedcow.net>
355
356 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
357
3582018-02-05 Nick Clifton <nickc@redhat.com>
359
360 * po/pt_BR.po: Updated Brazilian Portuguese translation.
361
3622018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
363
364 * i386-dis.c (enum): Add pconfig.
365 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
366 (cpu_flags): Add CpuPCONFIG.
367 * i386-opc.h (enum): Add CpuPCONFIG.
368 (i386_cpu_flags): Add cpupconfig.
369 * i386-opc.tbl: Add PCONFIG instruction.
370 * i386-init.h: Regenerate.
371 * i386-tbl.h: Likewise.
372
3732018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
374
375 * i386-dis.c (enum): Add PREFIX_0F09.
376 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
377 (cpu_flags): Add CpuWBNOINVD.
378 * i386-opc.h (enum): Add CpuWBNOINVD.
379 (i386_cpu_flags): Add cpuwbnoinvd.
380 * i386-opc.tbl: Add WBNOINVD instruction.
381 * i386-init.h: Regenerate.
382 * i386-tbl.h: Likewise.
383
3842018-01-17 Jim Wilson <jimw@sifive.com>
385
386 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
387
3882018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
389
390 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
391 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
392 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
393 (cpu_flags): Add CpuIBT, CpuSHSTK.
394 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
395 (i386_cpu_flags): Add cpuibt, cpushstk.
396 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
397 * i386-init.h: Regenerate.
398 * i386-tbl.h: Likewise.
399
4002018-01-16 Nick Clifton <nickc@redhat.com>
401
402 * po/pt_BR.po: Updated Brazilian Portugese translation.
403 * po/de.po: Updated German translation.
404
4052018-01-15 Jim Wilson <jimw@sifive.com>
406
407 * riscv-opc.c (match_c_nop): New.
408 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
409
4102018-01-15 Nick Clifton <nickc@redhat.com>
411
412 * po/uk.po: Updated Ukranian translation.
413
4142018-01-13 Nick Clifton <nickc@redhat.com>
415
416 * po/opcodes.pot: Regenerated.
417
4182018-01-13 Nick Clifton <nickc@redhat.com>
419
420 * configure: Regenerate.
421
4222018-01-13 Nick Clifton <nickc@redhat.com>
423
424 2.30 branch created.
425
4262018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
427
428 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
429 * i386-tbl.h: Regenerate.
430
4312018-01-10 Jan Beulich <jbeulich@suse.com>
432
433 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
434 * i386-tbl.h: Re-generate.
435
4362018-01-10 Jan Beulich <jbeulich@suse.com>
437
438 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
439 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
440 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
441 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
442 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
443 Disp8MemShift of AVX512VL forms.
444 * i386-tbl.h: Re-generate.
445
4462018-01-09 Jim Wilson <jimw@sifive.com>
447
448 * riscv-dis.c (maybe_print_address): If base_reg is zero,
449 then the hi_addr value is zero.
450
4512018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
452
453 * arm-dis.c (arm_opcodes): Add csdb.
454 (thumb32_opcodes): Add csdb.
455
4562018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
457
458 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
459 * aarch64-asm-2.c: Regenerate.
460 * aarch64-dis-2.c: Regenerate.
461 * aarch64-opc-2.c: Regenerate.
462
4632018-01-08 H.J. Lu <hongjiu.lu@intel.com>
464
465 PR gas/22681
466 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
467 Remove AVX512 vmovd with 64-bit operands.
468 * i386-tbl.h: Regenerated.
469
4702018-01-05 Jim Wilson <jimw@sifive.com>
471
472 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
473 jalr.
474
4752018-01-03 Alan Modra <amodra@gmail.com>
476
477 Update year range in copyright notice of all files.
478
4792018-01-02 Jan Beulich <jbeulich@suse.com>
480
481 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
482 and OPERAND_TYPE_REGZMM entries.
483
484For older changes see ChangeLog-2017
485\f
486Copyright (C) 2018 Free Software Foundation, Inc.
487
488Copying and distribution of this file, with or without modification,
489are permitted in any medium without royalty provided the copyright
490notice and this notice are preserved.
491
492Local Variables:
493mode: change-log
494left-margin: 8
495fill-column: 74
496version-control: never
497End:
GDB Binutils - Deliverables
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