projects / deliverable / binutils-gdb.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
Automatic date update in version.in
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
... / ...
CommitLineData
12018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
2
3 * i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
4 PREFIX_MOD_1_0FAE_REG_6.
5 (va_mode): New.
6 (OP_E_register): Use va_mode.
7 * i386-dis-evex.h (prefix_table):
8 New instructions (see prefixes above).
9 * i386-gen.c (cpu_flag_init): Add WAITPKG.
10 (cpu_flags): Likewise.
11 * i386-opc.h (enum): Likewise.
12 (i386_cpu_flags): Likewise.
13 * i386-opc.tbl: Add umonitor, umwait, tpause.
14 * i386-init.h: Regenerate.
15 * i386-tbl.h: Likewise.
16
172018-04-11 Alan Modra <amodra@gmail.com>
18
19 * opcodes/i860-dis.c: Delete.
20 * opcodes/i960-dis.c: Delete.
21 * Makefile.am: Remove i860 and i960 support.
22 * configure.ac: Likewise.
23 * disassemble.c: Likewise.
24 * disassemble.h: Likewise.
25 * Makefile.in: Regenerate.
26 * configure: Regenerate.
27 * po/POTFILES.in: Regenerate.
28
292018-04-04 H.J. Lu <hongjiu.lu@intel.com>
30
31 PR binutils/23025
32 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
33 to 0.
34 (print_insn): Clear vex instead of vex.evex.
35
362018-04-04 Nick Clifton <nickc@redhat.com>
37
38 * po/es.po: Updated Spanish translation.
39
402018-03-28 Jan Beulich <jbeulich@suse.com>
41
42 * i386-gen.c (opcode_modifiers): Delete VecESize.
43 * i386-opc.h (VecESize): Delete.
44 (struct i386_opcode_modifier): Delete vecesize.
45 * i386-opc.tbl: Drop VecESize.
46 * i386-tlb.h: Re-generate.
47
482018-03-28 Jan Beulich <jbeulich@suse.com>
49
50 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
51 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
52 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
53 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
54 * i386-tlb.h: Re-generate.
55
562018-03-28 Jan Beulich <jbeulich@suse.com>
57
58 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
59 Fold AVX512 forms
60 * i386-tlb.h: Re-generate.
61
622018-03-28 Jan Beulich <jbeulich@suse.com>
63
64 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
65 (vex_len_table): Drop Y for vcvt*2si.
66 (putop): Replace plain 'Y' handling by abort().
67
682018-03-28 Nick Clifton <nickc@redhat.com>
69
70 PR 22988
71 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
72 instructions with only a base address register.
73 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
74 handle AARHC64_OPND_SVE_ADDR_R.
75 (aarch64_print_operand): Likewise.
76 * aarch64-asm-2.c: Regenerate.
77 * aarch64_dis-2.c: Regenerate.
78 * aarch64-opc-2.c: Regenerate.
79
802018-03-22 Jan Beulich <jbeulich@suse.com>
81
82 * i386-opc.tbl: Drop VecESize from register only insn forms and
83 memory forms not allowing broadcast.
84 * i386-tlb.h: Re-generate.
85
862018-03-22 Jan Beulich <jbeulich@suse.com>
87
88 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
89 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
90 sha256*): Drop Disp<N>.
91
922018-03-22 Jan Beulich <jbeulich@suse.com>
93
94 * i386-dis.c (EbndS, bnd_swap_mode): New.
95 (prefix_table): Use EbndS.
96 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
97 * i386-opc.tbl (bndmov): Move misplaced Load.
98 * i386-tlb.h: Re-generate.
99
1002018-03-22 Jan Beulich <jbeulich@suse.com>
101
102 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
103 templates allowing memory operands and folded ones for register
104 only flavors.
105 * i386-tlb.h: Re-generate.
106
1072018-03-22 Jan Beulich <jbeulich@suse.com>
108
109 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
110 256-bit templates. Drop redundant leftover Disp<N>.
111 * i386-tlb.h: Re-generate.
112
1132018-03-14 Kito Cheng <kito.cheng@gmail.com>
114
115 * riscv-opc.c (riscv_insn_types): New.
116
1172018-03-13 Nick Clifton <nickc@redhat.com>
118
119 * po/pt_BR.po: Updated Brazilian Portuguese translation.
120
1212018-03-08 H.J. Lu <hongjiu.lu@intel.com>
122
123 * i386-opc.tbl: Add Optimize to clr.
124 * i386-tbl.h: Regenerated.
125
1262018-03-08 H.J. Lu <hongjiu.lu@intel.com>
127
128 * i386-gen.c (opcode_modifiers): Remove OldGcc.
129 * i386-opc.h (OldGcc): Removed.
130 (i386_opcode_modifier): Remove oldgcc.
131 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
132 instructions for old (<= 2.8.1) versions of gcc.
133 * i386-tbl.h: Regenerated.
134
1352018-03-08 Jan Beulich <jbeulich@suse.com>
136
137 * i386-opc.h (EVEXDYN): New.
138 * i386-opc.tbl: Fold various AVX512VL templates.
139 * i386-tlb.h: Re-generate.
140
1412018-03-08 Jan Beulich <jbeulich@suse.com>
142
143 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
144 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
145 vpexpandd, vpexpandq): Fold AFX512VF templates.
146 * i386-tlb.h: Re-generate.
147
1482018-03-08 Jan Beulich <jbeulich@suse.com>
149
150 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
151 Fold 128- and 256-bit VEX-encoded templates.
152 * i386-tlb.h: Re-generate.
153
1542018-03-08 Jan Beulich <jbeulich@suse.com>
155
156 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
157 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
158 vpexpandd, vpexpandq): Fold AVX512F templates.
159 * i386-tlb.h: Re-generate.
160
1612018-03-08 Jan Beulich <jbeulich@suse.com>
162
163 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
164 64-bit templates. Drop Disp<N>.
165 * i386-tlb.h: Re-generate.
166
1672018-03-08 Jan Beulich <jbeulich@suse.com>
168
169 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
170 and 256-bit templates.
171 * i386-tlb.h: Re-generate.
172
1732018-03-08 Jan Beulich <jbeulich@suse.com>
174
175 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
176 * i386-tlb.h: Re-generate.
177
1782018-03-08 Jan Beulich <jbeulich@suse.com>
179
180 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
181 Drop NoAVX.
182 * i386-tlb.h: Re-generate.
183
1842018-03-08 Jan Beulich <jbeulich@suse.com>
185
186 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
187 * i386-tlb.h: Re-generate.
188
1892018-03-08 Jan Beulich <jbeulich@suse.com>
190
191 * i386-gen.c (opcode_modifiers): Delete FloatD.
192 * i386-opc.h (FloatD): Delete.
193 (struct i386_opcode_modifier): Delete floatd.
194 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
195 FloatD by D.
196 * i386-tlb.h: Re-generate.
197
1982018-03-08 Jan Beulich <jbeulich@suse.com>
199
200 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
201
2022018-03-08 Jan Beulich <jbeulich@suse.com>
203
204 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
205 * i386-tlb.h: Re-generate.
206
2072018-03-08 Jan Beulich <jbeulich@suse.com>
208
209 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
210 forms.
211 * i386-tlb.h: Re-generate.
212
2132018-03-07 Alan Modra <amodra@gmail.com>
214
215 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
216 bfd_arch_rs6000.
217 * disassemble.h (print_insn_rs6000): Delete.
218 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
219 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
220 (print_insn_rs6000): Delete.
221
2222018-03-03 Alan Modra <amodra@gmail.com>
223
224 * sysdep.h (opcodes_error_handler): Define.
225 (_bfd_error_handler): Declare.
226 * Makefile.am: Remove stray #.
227 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
228 EDIT" comment.
229 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
230 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
231 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
232 opcodes_error_handler to print errors. Standardize error messages.
233 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
234 and include opintl.h.
235 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
236 * i386-gen.c: Standardize error messages.
237 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
238 * Makefile.in: Regenerate.
239 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
240 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
241 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
242 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
243 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
244 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
245 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
246 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
247 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
248 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
249 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
250 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
251 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
252
2532018-03-01 H.J. Lu <hongjiu.lu@intel.com>
254
255 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
256 vpsub[bwdq] instructions.
257 * i386-tbl.h: Regenerated.
258
2592018-03-01 Alan Modra <amodra@gmail.com>
260
261 * configure.ac (ALL_LINGUAS): Sort.
262 * configure: Regenerate.
263
2642018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
265
266 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
267 macro by assignements.
268
2692018-02-27 H.J. Lu <hongjiu.lu@intel.com>
270
271 PR gas/22871
272 * i386-gen.c (opcode_modifiers): Add Optimize.
273 * i386-opc.h (Optimize): New enum.
274 (i386_opcode_modifier): Add optimize.
275 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
276 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
277 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
278 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
279 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
280 vpxord and vpxorq.
281 * i386-tbl.h: Regenerated.
282
2832018-02-26 Alan Modra <amodra@gmail.com>
284
285 * crx-dis.c (getregliststring): Allocate a large enough buffer
286 to silence false positive gcc8 warning.
287
2882018-02-22 Shea Levy <shea@shealevy.com>
289
290 * disassemble.c (ARCH_riscv): Define if ARCH_all.
291
2922018-02-22 H.J. Lu <hongjiu.lu@intel.com>
293
294 * i386-opc.tbl: Add {rex},
295 * i386-tbl.h: Regenerated.
296
2972018-02-20 Maciej W. Rozycki <macro@mips.com>
298
299 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
300 (mips16_opcodes): Replace `M' with `m' for "restore".
301
3022018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
303
304 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
305
3062018-02-13 Maciej W. Rozycki <macro@mips.com>
307
308 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
309 variable to `function_index'.
310
3112018-02-13 Nick Clifton <nickc@redhat.com>
312
313 PR 22823
314 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
315 about truncation of printing.
316
3172018-02-12 Henry Wong <henry@stuffedcow.net>
318
319 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
320
3212018-02-05 Nick Clifton <nickc@redhat.com>
322
323 * po/pt_BR.po: Updated Brazilian Portuguese translation.
324
3252018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
326
327 * i386-dis.c (enum): Add pconfig.
328 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
329 (cpu_flags): Add CpuPCONFIG.
330 * i386-opc.h (enum): Add CpuPCONFIG.
331 (i386_cpu_flags): Add cpupconfig.
332 * i386-opc.tbl: Add PCONFIG instruction.
333 * i386-init.h: Regenerate.
334 * i386-tbl.h: Likewise.
335
3362018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
337
338 * i386-dis.c (enum): Add PREFIX_0F09.
339 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
340 (cpu_flags): Add CpuWBNOINVD.
341 * i386-opc.h (enum): Add CpuWBNOINVD.
342 (i386_cpu_flags): Add cpuwbnoinvd.
343 * i386-opc.tbl: Add WBNOINVD instruction.
344 * i386-init.h: Regenerate.
345 * i386-tbl.h: Likewise.
346
3472018-01-17 Jim Wilson <jimw@sifive.com>
348
349 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
350
3512018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
352
353 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
354 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
355 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
356 (cpu_flags): Add CpuIBT, CpuSHSTK.
357 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
358 (i386_cpu_flags): Add cpuibt, cpushstk.
359 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
360 * i386-init.h: Regenerate.
361 * i386-tbl.h: Likewise.
362
3632018-01-16 Nick Clifton <nickc@redhat.com>
364
365 * po/pt_BR.po: Updated Brazilian Portugese translation.
366 * po/de.po: Updated German translation.
367
3682018-01-15 Jim Wilson <jimw@sifive.com>
369
370 * riscv-opc.c (match_c_nop): New.
371 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
372
3732018-01-15 Nick Clifton <nickc@redhat.com>
374
375 * po/uk.po: Updated Ukranian translation.
376
3772018-01-13 Nick Clifton <nickc@redhat.com>
378
379 * po/opcodes.pot: Regenerated.
380
3812018-01-13 Nick Clifton <nickc@redhat.com>
382
383 * configure: Regenerate.
384
3852018-01-13 Nick Clifton <nickc@redhat.com>
386
387 2.30 branch created.
388
3892018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
390
391 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
392 * i386-tbl.h: Regenerate.
393
3942018-01-10 Jan Beulich <jbeulich@suse.com>
395
396 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
397 * i386-tbl.h: Re-generate.
398
3992018-01-10 Jan Beulich <jbeulich@suse.com>
400
401 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
402 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
403 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
404 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
405 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
406 Disp8MemShift of AVX512VL forms.
407 * i386-tbl.h: Re-generate.
408
4092018-01-09 Jim Wilson <jimw@sifive.com>
410
411 * riscv-dis.c (maybe_print_address): If base_reg is zero,
412 then the hi_addr value is zero.
413
4142018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
415
416 * arm-dis.c (arm_opcodes): Add csdb.
417 (thumb32_opcodes): Add csdb.
418
4192018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
420
421 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
422 * aarch64-asm-2.c: Regenerate.
423 * aarch64-dis-2.c: Regenerate.
424 * aarch64-opc-2.c: Regenerate.
425
4262018-01-08 H.J. Lu <hongjiu.lu@intel.com>
427
428 PR gas/22681
429 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
430 Remove AVX512 vmovd with 64-bit operands.
431 * i386-tbl.h: Regenerated.
432
4332018-01-05 Jim Wilson <jimw@sifive.com>
434
435 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
436 jalr.
437
4382018-01-03 Alan Modra <amodra@gmail.com>
439
440 Update year range in copyright notice of all files.
441
4422018-01-02 Jan Beulich <jbeulich@suse.com>
443
444 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
445 and OPERAND_TYPE_REGZMM entries.
446
447For older changes see ChangeLog-2017
448\f
449Copyright (C) 2018 Free Software Foundation, Inc.
450
451Copying and distribution of this file, with or without modification,
452are permitted in any medium without royalty provided the copyright
453notice and this notice are preserved.
454
455Local Variables:
456mode: change-log
457left-margin: 8
458fill-column: 74
459version-control: never
460End:
GDB Binutils - Deliverables
This page took 0.024193 seconds and 4 git commands to generate.