| 1 | 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> |
| 2 | |
| 3 | * avr-dis.c (avr_operand): Add opcode_str parameter. Check for |
| 4 | post-increment to support LPM Z+ instruction. Add support for 'E' |
| 5 | constraint for DES instruction. |
| 6 | (print_insn_avr): Adjust calls to avr_operand. Rename variable. |
| 7 | |
| 8 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
| 9 | |
| 10 | * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. |
| 11 | |
| 12 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
| 13 | |
| 14 | * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. |
| 15 | Use branch types instead. |
| 16 | (print_insn): Likewise. |
| 17 | |
| 18 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 19 | |
| 20 | * mips-opc.c (mips_builtin_opcodes): Correct register use |
| 21 | annotation of "alnv.ps". |
| 22 | |
| 23 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
| 24 | |
| 25 | * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. |
| 26 | |
| 27 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 28 | |
| 29 | * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. |
| 30 | |
| 31 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
| 32 | |
| 33 | * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. |
| 34 | |
| 35 | 2011-02-19 Mike Frysinger <vapier@gentoo.org> |
| 36 | |
| 37 | * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and |
| 38 | a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, |
| 39 | av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, |
| 40 | exception, end_of_registers, msize, memory, bfd_mach. |
| 41 | (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, |
| 42 | LB0REG, LC1REG, LT1REG, LB1REG): Delete |
| 43 | (AXREG, AWREG, LCREG, LTREG, LBREG): Define. |
| 44 | (get_allreg): Change to new defines. Fallback to abort(). |
| 45 | |
| 46 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 47 | |
| 48 | * bfin-dis.c: Add whitespace/parenthesis where needed. |
| 49 | |
| 50 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 51 | |
| 52 | * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater |
| 53 | than 7. |
| 54 | |
| 55 | 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 56 | |
| 57 | * configure: Regenerate. |
| 58 | |
| 59 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 60 | |
| 61 | * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. |
| 62 | |
| 63 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 64 | |
| 65 | * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output |
| 66 | dregs only when P is set, and dregs_lo otherwise. |
| 67 | |
| 68 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
| 69 | |
| 70 | * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. |
| 71 | |
| 72 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 73 | |
| 74 | * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. |
| 75 | |
| 76 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 77 | |
| 78 | * bfin-dis.c (machine_registers): Delete REG_GP. |
| 79 | (reg_names): Delete "GP". |
| 80 | (decode_allregs): Change REG_GP to REG_LASTREG. |
| 81 | |
| 82 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
| 83 | |
| 84 | * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, |
| 85 | M_IH, M_IU): Delete. |
| 86 | |
| 87 | 2011-02-11 Mike Frysinger <vapier@gentoo.org> |
| 88 | |
| 89 | * bfin-dis.c (reg_names): Add const. |
| 90 | (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, |
| 91 | decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, |
| 92 | decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, |
| 93 | decode_counters, decode_allregs): Likewise. |
| 94 | |
| 95 | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
| 96 | |
| 97 | * i386-dis.c (OP_J): Parenthesize expression to prevent |
| 98 | truncated addresses. |
| 99 | (print_insn): Fix indentation off-by-one. |
| 100 | |
| 101 | 2011-02-01 Nick Clifton <nickc@redhat.com> |
| 102 | |
| 103 | * po/da.po: Updated Danish translation. |
| 104 | |
| 105 | 2011-01-21 Dave Murphy <davem@devkitpro.org> |
| 106 | |
| 107 | * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. |
| 108 | |
| 109 | 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> |
| 110 | |
| 111 | * i386-dis.c (sIbT): New. |
| 112 | (b_T_mode): Likewise. |
| 113 | (dis386): Replace sIb with sIbT on "pushT". |
| 114 | (x86_64_table): Replace sIb with Ib on "aam" and "aad". |
| 115 | (OP_sI): Handle b_T_mode. Properly sign-extend byte. |
| 116 | |
| 117 | 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> |
| 118 | |
| 119 | * i386-init.h: Regenerated. |
| 120 | * i386-tbl.h: Regenerated |
| 121 | |
| 122 | 2011-01-17 Quentin Neill <quentin.neill@amd.com> |
| 123 | |
| 124 | * i386-dis.c (REG_XOP_TBM_01): New. |
| 125 | (REG_XOP_TBM_02): New. |
| 126 | (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. |
| 127 | (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 |
| 128 | entries, and add bextr instruction. |
| 129 | |
| 130 | * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. |
| 131 | (cpu_flags): Add CpuTBM. |
| 132 | |
| 133 | * i386-opc.h (CpuTBM) New. |
| 134 | (i386_cpu_flags): Add bit cputbm. |
| 135 | |
| 136 | * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, |
| 137 | blcs, blsfill, blsic, t1mskc, and tzmsk. |
| 138 | |
| 139 | 2011-01-12 DJ Delorie <dj@redhat.com> |
| 140 | |
| 141 | * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. |
| 142 | |
| 143 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
| 144 | |
| 145 | * mips-dis.c (print_insn_args): Adjust the value to print the real |
| 146 | offset for "+c" argument. |
| 147 | |
| 148 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
| 149 | |
| 150 | * po/da.po: Updated Danish translation. |
| 151 | |
| 152 | 2011-01-05 Nathan Sidwell <nathan@codesourcery.com> |
| 153 | |
| 154 | * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. |
| 155 | |
| 156 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 157 | |
| 158 | * i386-dis.c (REG_VEX_38F3): New. |
| 159 | (PREFIX_0FBC): Likewise. |
| 160 | (PREFIX_VEX_38F2): Likewise. |
| 161 | (PREFIX_VEX_38F3_REG_1): Likewise. |
| 162 | (PREFIX_VEX_38F3_REG_2): Likewise. |
| 163 | (PREFIX_VEX_38F3_REG_3): Likewise. |
| 164 | (PREFIX_VEX_38F7): Likewise. |
| 165 | (VEX_LEN_38F2_P_0): Likewise. |
| 166 | (VEX_LEN_38F3_R_1_P_0): Likewise. |
| 167 | (VEX_LEN_38F3_R_2_P_0): Likewise. |
| 168 | (VEX_LEN_38F3_R_3_P_0): Likewise. |
| 169 | (VEX_LEN_38F7_P_0): Likewise. |
| 170 | (dis386_twobyte): Use PREFIX_0FBC. |
| 171 | (reg_table): Add REG_VEX_38F3. |
| 172 | (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, |
| 173 | PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, |
| 174 | PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. |
| 175 | (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and |
| 176 | PREFIX_VEX_38F7. |
| 177 | (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, |
| 178 | VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and |
| 179 | VEX_LEN_38F7_P_0. |
| 180 | |
| 181 | * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. |
| 182 | (cpu_flags): Add CpuBMI. |
| 183 | |
| 184 | * i386-opc.h (CpuBMI): New. |
| 185 | (i386_cpu_flags): Add cpubmi. |
| 186 | |
| 187 | * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. |
| 188 | * i386-init.h: Regenerated. |
| 189 | * i386-tbl.h: Likewise. |
| 190 | |
| 191 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
| 192 | |
| 193 | * i386-dis.c (VexGdq): New. |
| 194 | (OP_VEX): Handle dq_mode. |
| 195 | |
| 196 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
| 197 | |
| 198 | * i386-gen.c (process_copyright): Update copyright to 2011. |
| 199 | |
| 200 | For older changes see ChangeLog-2010 |
| 201 | \f |
| 202 | Local Variables: |
| 203 | mode: change-log |
| 204 | left-margin: 8 |
| 205 | fill-column: 74 |
| 206 | version-control: never |
| 207 | End: |