* avr-dis.c: Replace uses of sprintf without a format string with
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
... / ...
CommitLineData
12008-11-06 Nick Clifton <nickc@redhat.com>
2
3 * avr-dis.c: Replace uses of sprintf without a format string with
4 calls to strcpy.
5
62008-11-03 H.J. Lu <hongjiu.lu@intel.com>
7
8 * i386-opc.tbl: Add cmovpe and cmovpo.
9 * i386-tbl.h: Regenerated.
10
112008-10-22 Nick Clifton <nickc@redhat.com>
12
13 PR 6937
14 * configure.in (SHARED_LIBADD): Revert previous change.
15 Add a comment explaining why.
16 (SHARED_DEPENDENCIES): Revert previous change.
17 * configure: Regenerate.
18
192008-10-10 Nick Clifton <nickc@redhat.com>
20
21 PR 6937
22 * configure.in (SHARED_LIBADD): Add libiberty.a.
23 (SHARED_DEPENDENCIES): Add libiberty.a.
24
252008-09-30 H.J. Lu <hongjiu.lu@intel.com>
26
27 * i386-gen.c: Include "hashtab.h".
28 (next_field): Take a new argument, last. Check last.
29 (process_i386_cpu_flag): Updated.
30 (process_i386_opcode_modifier): Likewise.
31 (process_i386_operand_type): Likewise.
32 (process_i386_registers): Likewise.
33 (output_i386_opcode): New.
34 (opcode_hash_entry): Likewise.
35 (opcode_hash_table): Likewise.
36 (opcode_hash_hash): Likewise.
37 (opcode_hash_eq): Likewise.
38 (process_i386_opcodes): Use opcode hash table and opcode array.
39
402008-09-30 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
41
42 * s390-opc.txt (stdy, stey): Fix description
43
442008-09-30 Alan Modra <amodra@bigpond.net.au>
45
46 * Makefile.am: Run "make dep-am".
47 * Makefile.in: Regenerate.
48
492008-09-29 H.J. Lu <hongjiu.lu@intel.com>
50
51 * aclocal.m4: Regenerated.
52 * configure: Likewise.
53 * Makefile.in: Likewise.
54
552008-09-29 Nick Clifton <nickc@redhat.com>
56
57 * po/vi.po: Updated Vietnamese translation.
58 * po/fr.po: Updated French translation.
59
602008-09-26 Florian Krohm <fkrohm@us.ibm.com>
61
62 * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
63 (cfxr, cfdr, cfer, clclu): Add esa flag.
64 (sqd): Instruction added.
65 (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
66 * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
67
682008-09-14 Arnold Metselaar <arnold.metselaar@planet.nl>
69
70 * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
71 (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
72
732008-09-11 H.J. Lu <hongjiu.lu@intel.com>
74
75 * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
76 * i386-tbl.h: Regenerated.
77
782008-08-28 Jan Beulich <jbeulich@novell.com>
79
80 * i386-dis.c (dis386): Adjust far return mnemonics.
81 * i386-opc.tbl: Add retf.
82 * i386-tbl.h: Re-generate.
83
842008-08-28 Jan Beulich <jbeulich@novell.com>
85
86 * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
87
882008-08-28 H.J. Lu <hongjiu.lu@intel.com>
89
90 * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
91 * ia64-gen.c (lookup_specifier): Likewise.
92
93 * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
94 * ia64-raw.tbl: Likewise.
95 * ia64-waw.tbl: Likewise.
96 * ia64-asmtab.c: Regenerated.
97
982008-08-27 H.J. Lu <hongjiu.lu@intel.com>
99
100 * i386-opc.tbl: Correct fidivr operand size.
101
102 * i386-tbl.h: Regenerated.
103
1042008-08-24 Alan Modra <amodra@bigpond.net.au>
105
106 * configure.in: Update a number of obsolete autoconf macros.
107 * aclocal.m4: Regenerate.
108
1092008-08-20 H.J. Lu <hongjiu.lu@intel.com>
110
111 AVX Programming Reference (August, 2008)
112 * i386-dis.c (PREFIX_VEX_38DB): New.
113 (PREFIX_VEX_38DC): Likewise.
114 (PREFIX_VEX_38DD): Likewise.
115 (PREFIX_VEX_38DE): Likewise.
116 (PREFIX_VEX_38DF): Likewise.
117 (PREFIX_VEX_3ADF): Likewise.
118 (VEX_LEN_38DB_P_2): Likewise.
119 (VEX_LEN_38DC_P_2): Likewise.
120 (VEX_LEN_38DD_P_2): Likewise.
121 (VEX_LEN_38DE_P_2): Likewise.
122 (VEX_LEN_38DF_P_2): Likewise.
123 (VEX_LEN_3ADF_P_2): Likewise.
124 (PREFIX_VEX_3A04): Updated.
125 (VEX_LEN_3A06_P_2): Likewise.
126 (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
127 PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
128 (x86_64_table): Likewise.
129 (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
130 VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
131 VEX_LEN_3ADF_P_2.
132
133 * i386-opc.tbl: Add AES + AVX instructions.
134 * i386-init.h: Regenerated.
135 * i386-tbl.h: Likewise.
136
1372008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
138
139 * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
140 * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
141
1422008-08-15 Alan Modra <amodra@bigpond.net.au>
143
144 PR 6526
145 * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
146 * Makefile.in: Regenerate.
147 * aclocal.m4: Regenerate.
148 * config.in: Regenerate.
149 * configure: Regenerate.
150
1512008-08-14 Sebastian Huber <sebastian.huber@embedded-brains.de>
152
153 PR 6825
154 * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
155
1562008-08-12 H.J. Lu <hongjiu.lu@intel.com>
157
158 * i386-opc.tbl: Add syscall and sysret for Cpu64.
159
160 * i386-tbl.h: Regenerated.
161
1622008-08-04 Alan Modra <amodra@bigpond.net.au>
163
164 * Makefile.am (POTFILES.in): Set LC_ALL=C.
165 * Makefile.in: Regenerate.
166 * po/POTFILES.in: Regenerate.
167
1682008-08-01 Peter Bergner <bergner@vnet.ibm.com>
169
170 * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
171 (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
172 (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
173 * ppc-opc.c (insert_xt6): New static function.
174 (extract_xt6): Likewise.
175 (insert_xa6): Likewise.
176 (extract_xa6: Likewise.
177 (insert_xb6): Likewise.
178 (extract_xb6): Likewise.
179 (insert_xb6s): Likewise.
180 (extract_xb6s): Likewise.
181 (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
182 XX3DM_MASK, PPCVSX): New.
183 (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
184 "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
185
1862008-08-01 Pedro Alves <pedro@codesourcery.com>
187
188 * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
189 * Makefile.in: Regenerate.
190
1912008-08-01 H.J. Lu <hongjiu.lu@intel.com>
192
193 * i386-reg.tbl: Use Dw2Inval on AVX registers.
194 * i386-tbl.h: Regenerated.
195
1962008-07-30 Michael J. Eager <eager@eagercon.com>
197
198 * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
199 * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
200 (insert_sprg, PPC405): Use PPC_OPCODE_405.
201 (powerpc_opcodes): Add Xilinx APU related opcodes.
202
2032008-07-30 Alan Modra <amodra@bigpond.net.au>
204
205 * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
206
2072008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
208
209 * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
210
2112008-07-07 Adam Nemet <anemet@caviumnetworks.com>
212
213 * mips-opc.c (CP): New macro.
214 (mips_builtin_opcodes): Mark c0, c2 and c3 as CP. Add Octeon to the
215 membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0. Add dmfc2 and
216 dmtc2 Octeon instructions.
217
2182008-07-07 Stan Shebs <stan@codesourcery.com>
219
220 * dis-init.c (init_disassemble_info): Init endian_code field.
221 * arm-dis.c (print_insn): Disassemble code according to
222 setting of endian_code.
223 (print_insn_big_arm): Detect when BE8 extension flag has been set.
224
2252008-06-30 Richard Sandiford <rdsandiford@googlemail.com>
226
227 * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
228 for ELF symbols.
229
2302008-06-25 Peter Bergner <bergner@vnet.ibm.com>
231
232 * ppc-dis.c (powerpc_init_dialect): Handle -M464.
233 (print_ppc_disassembler_options): Likewise.
234 * ppc-opc.c (PPC464): Define.
235 (powerpc_opcodes): Add mfdcrux and mtdcrux.
236
2372008-06-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
238
239 * configure: Regenerate.
240
2412008-06-13 Peter Bergner <bergner@vnet.ibm.com>
242
243 * ppc-dis.c (print_insn_powerpc): Update prototye to use new
244 ppc_cpu_t typedef.
245 (struct dis_private): New.
246 (POWERPC_DIALECT): New define.
247 (powerpc_dialect): Renamed to...
248 (powerpc_init_dialect): This. Update to use ppc_cpu_t and
249 struct dis_private.
250 (print_insn_big_powerpc): Update for using structure in
251 info->private_data.
252 (print_insn_little_powerpc): Likewise.
253 (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
254 (skip_optional_operands): Likewise.
255 (print_insn_powerpc): Likewise. Remove initialization of dialect.
256 * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
257 extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
258 extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
259 extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
260 insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
261 insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
262 insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
263 param to be of type ppc_cpu_t. Update prototype.
264
2652008-06-12 Adam Nemet <anemet@caviumnetworks.com>
266
267 * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
268 +s, +S.
269 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
270 baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
271 syncw, syncws, vm3mulu, vm0 and vmulu.
272
273 * mips-dis.c (print_insn_args): Handle field descriptor +Q.
274 * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
275 seqi, sne and snei.
276
2772008-05-30 H.J. Lu <hongjiu.lu@intel.com>
278
279 * i386-opc.tbl: Add vmovd with 64bit operand.
280 * i386-tbl.h: Regenerated.
281
2822008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
283
284 * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
285
2862008-05-22 H.J. Lu <hongjiu.lu@intel.com>
287
288 * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
289 * i386-tbl.h: Regenerated.
290
2912008-05-22 H.J. Lu <hongjiu.lu@intel.com>
292
293 PR gas/6517
294 * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
295 into 32bit and 64bit. Remove Reg64|Qword and add
296 IgnoreSize|No_qSuf on 32bit version.
297 * i386-tbl.h: Regenerated.
298
2992008-05-21 H.J. Lu <hongjiu.lu@intel.com>
300
301 * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
302 * i386-tbl.h: Regenerated.
303
3042008-05-21 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
305
306 * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
307
3082008-05-14 Alan Modra <amodra@bigpond.net.au>
309
310 * Makefile.am: Run "make dep-am".
311 * Makefile.in: Regenerate.
312
3132008-05-02 H.J. Lu <hongjiu.lu@intel.com>
314
315 * i386-dis.c (MOVBE_Fixup): New.
316 (Mo): Likewise.
317 (PREFIX_0F3880): Likewise.
318 (PREFIX_0F3881): Likewise.
319 (PREFIX_0F38F0): Updated.
320 (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
321 PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
322 (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
323
324 * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
325 CPU_EPT_FLAGS.
326 (cpu_flags): Add CpuMovbe and CpuEPT.
327
328 * i386-opc.h (CpuMovbe): New.
329 (CpuEPT): Likewise.
330 (CpuLM): Updated.
331 (i386_cpu_flags): Add cpumovbe and cpuept.
332
333 * i386-opc.tbl: Add entries for movbe and EPT instructions.
334 * i386-init.h: Regenerated.
335 * i386-tbl.h: Likewise.
336
3372008-04-29 Adam Nemet <anemet@caviumnetworks.com>
338
339 * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
340 the two drem and the two dremu macros.
341
3422008-04-28 Adam Nemet <anemet@caviumnetworks.com>
343
344 * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
345 instructions FP_S. Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
346 cop1 macros INSN2_M_FP_S. Mark l.d, li.d, ldc1 and sdc1 macros
347 INSN2_M_FP_D. Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
348
3492008-04-25 David S. Miller <davem@davemloft.net>
350
351 * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
352 instead of %sys_tick_cmpr, as suggested in architecture manuals.
353
3542008-04-23 Paolo Bonzini <bonzini@gnu.org>
355
356 * aclocal.m4: Regenerate.
357 * configure: Regenerate.
358
3592008-04-23 David S. Miller <davem@davemloft.net>
360
361 * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
362 extended values.
363 (prefetch_table): Add missing values.
364
3652008-04-22 H.J. Lu <hongjiu.lu@intel.com>
366
367 * i386-gen.c (opcode_modifiers): Add NoAVX.
368
369 * i386-opc.h (NoAVX): New.
370 (OldGcc): Updated.
371 (i386_opcode_modifier): Add noavx.
372
373 * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
374 instructions which don't have AVX equivalent.
375 * i386-tbl.h: Regenerated.
376
3772008-04-18 H.J. Lu <hongjiu.lu@intel.com>
378
379 * i386-dis.c (OP_VEX_FMA): New.
380 (OP_EX_VexImmW): Likewise.
381 (VexFMA): Likewise.
382 (Vex128FMA): Likewise.
383 (EXVexImmW): Likewise.
384 (get_vex_imm8): Likewise.
385 (OP_EX_VexReg): Likewise.
386 (vex_i4_done): Renamed to ...
387 (vex_w_done): This.
388 (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
389 and vpermil2pd. Replace Vex/Vex128 with VexFMA/Vex128FMA on
390 FMA instructions.
391 (print_insn): Updated.
392 (OP_EX_VexW): Rewrite to swap register in VEX with EX.
393 (OP_REG_VexI4): Check invalid high registers.
394
3952008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
396 Michael Meissner <michael.meissner@amd.com>
397
398 * i386-opc.tbl: Fix protX to allow memory in the middle operand.
399 * i386-tbl.h: Regenerate from i386-opc.tbl.
400
4012008-04-14 Edmar Wienskoski <edmar@freescale.com>
402
403 * ppc-dis.c (powerpc_dialect): Handle "e500mc". Extend "e500" to
404 accept Power E500MC instructions.
405 (print_ppc_disassembler_options): Document -Me500mc.
406 * ppc-opc.c (DUIS, DUI, T): New.
407 (XRT, XRTRA): Likewise.
408 (E500MC): Likewise.
409 (powerpc_opcodes): Add new Power E500MC instructions.
410
4112008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
412
413 * s390-dis.c (init_disasm): Evaluate disassembler_options.
414 (print_s390_disassembler_options): New function.
415 * disassemble.c (disassembler_usage): Invoke
416 print_s390_disassembler_options.
417
4182008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
419
420 * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
421 of local variables used for mnemonic parsing: prefix, suffix and
422 number.
423
4242008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
425
426 * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
427 extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
428 (s390_crb_extensions): New extensions table.
429 (insertExpandedMnemonic): Handle '$' tag.
430 * s390-opc.txt: Remove conditional jump variants which can now
431 be expanded automatically.
432 Replace '*' tag with '$' in the compare and branch instructions.
433
4342008-04-07 H.J. Lu <hongjiu.lu@intel.com>
435
436 * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
437 (PREFIX_VEX_3AXX): Likewis.
438
4392008-04-07 H.J. Lu <hongjiu.lu@intel.com>
440
441 * i386-opc.tbl: Remove 4 extra blank lines.
442
4432008-04-04 H.J. Lu <hongjiu.lu@intel.com>
444
445 * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
446 with CPU_PCLMUL_FLAGS/CpuPCLMUL.
447 (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
448 * i386-opc.tbl: Likewise.
449
450 * i386-opc.h (CpuCLMUL): Renamed to ...
451 (CpuPCLMUL): This.
452 (CpuFMA): Updated.
453 (i386_cpu_flags): Replace cpuclmul with cpupclmul.
454
455 * i386-init.h: Regenerated.
456
4572008-04-03 H.J. Lu <hongjiu.lu@intel.com>
458
459 * i386-dis.c (OP_E_register): New.
460 (OP_E_memory): Likewise.
461 (OP_VEX): Likewise.
462 (OP_EX_Vex): Likewise.
463 (OP_EX_VexW): Likewise.
464 (OP_XMM_Vex): Likewise.
465 (OP_XMM_VexW): Likewise.
466 (OP_REG_VexI4): Likewise.
467 (PCLMUL_Fixup): Likewise.
468 (VEXI4_Fixup): Likewise.
469 (VZERO_Fixup): Likewise.
470 (VCMP_Fixup): Likewise.
471 (VPERMIL2_Fixup): Likewise.
472 (rex_original): Likewise.
473 (rex_ignored): Likewise.
474 (Mxmm): Likewise.
475 (XMM): Likewise.
476 (EXxmm): Likewise.
477 (EXxmmq): Likewise.
478 (EXymmq): Likewise.
479 (Vex): Likewise.
480 (Vex128): Likewise.
481 (Vex256): Likewise.
482 (VexI4): Likewise.
483 (EXdVex): Likewise.
484 (EXqVex): Likewise.
485 (EXVexW): Likewise.
486 (EXdVexW): Likewise.
487 (EXqVexW): Likewise.
488 (XMVex): Likewise.
489 (XMVexW): Likewise.
490 (XMVexI4): Likewise.
491 (PCLMUL): Likewise.
492 (VZERO): Likewise.
493 (VCMP): Likewise.
494 (VPERMIL2): Likewise.
495 (xmm_mode): Likewise.
496 (xmmq_mode): Likewise.
497 (ymmq_mode): Likewise.
498 (vex_mode): Likewise.
499 (vex128_mode): Likewise.
500 (vex256_mode): Likewise.
501 (USE_VEX_C4_TABLE): Likewise.
502 (USE_VEX_C5_TABLE): Likewise.
503 (USE_VEX_LEN_TABLE): Likewise.
504 (VEX_C4_TABLE): Likewise.
505 (VEX_C5_TABLE): Likewise.
506 (VEX_LEN_TABLE): Likewise.
507 (REG_VEX_XX): Likewise.
508 (MOD_VEX_XXX): Likewise.
509 (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
510 (PREFIX_0F3A44): Likewise.
511 (PREFIX_0F3ADF): Likewise.
512 (PREFIX_VEX_XXX): Likewise.
513 (VEX_OF): Likewise.
514 (VEX_OF38): Likewise.
515 (VEX_OF3A): Likewise.
516 (VEX_LEN_XXX): Likewise.
517 (vex): Likewise.
518 (need_vex): Likewise.
519 (need_vex_reg): Likewise.
520 (vex_i4_done): Likewise.
521 (vex_table): Likewise.
522 (vex_len_table): Likewise.
523 (OP_REG_VexI4): Likewise.
524 (vex_cmp_op): Likewise.
525 (pclmul_op): Likewise.
526 (vpermil2_op): Likewise.
527 (m_mode): Updated.
528 (es_reg): Likewise.
529 (PREFIX_0F38F0): Likewise.
530 (PREFIX_0F3A60): Likewise.
531 (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
532 (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
533 and PREFIX_VEX_XXX entries.
534 (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
535 (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
536 PREFIX_0F3ADF.
537 (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
538 Add MOD_VEX_XXX entries.
539 (ckprefix): Initialize rex_original and rex_ignored. Store the
540 REX byte in rex_original.
541 (get_valid_dis386): Handle the implicit prefix in VEX prefix
542 bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
543 (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
544 calling get_valid_dis386. Use rex_original and rex_ignored when
545 printing out REX.
546 (putop): Handle "XY".
547 (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
548 ymmq_mode.
549 (OP_E_extended): Updated to use OP_E_register and
550 OP_E_memory.
551 (OP_XMM): Handle VEX.
552 (OP_EX): Likewise.
553 (XMM_Fixup): Likewise.
554 (CMP_Fixup): Use ARRAY_SIZE.
555
556 * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
557 CPU_FMA_FLAGS and CPU_AVX_FLAGS.
558 (operand_type_init): Add OPERAND_TYPE_REGYMM and
559 OPERAND_TYPE_VEX_IMM4.
560 (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
561 (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
562 VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
563 VexImmExt and SSE2AVX.
564 (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
565
566 * i386-opc.h (CpuAVX): New.
567 (CpuAES): Likewise.
568 (CpuCLMUL): Likewise.
569 (CpuFMA): Likewise.
570 (Vex): Likewise.
571 (Vex256): Likewise.
572 (VexNDS): Likewise.
573 (VexNDD): Likewise.
574 (VexW0): Likewise.
575 (VexW1): Likewise.
576 (Vex0F): Likewise.
577 (Vex0F38): Likewise.
578 (Vex0F3A): Likewise.
579 (Vex3Sources): Likewise.
580 (VexImmExt): Likewise.
581 (SSE2AVX): Likewise.
582 (RegYMM): Likewise.
583 (Ymmword): Likewise.
584 (Vex_Imm4): Likewise.
585 (Implicit1stXmm0): Likewise.
586 (CpuXsave): Updated.
587 (CpuLM): Likewise.
588 (ByteOkIntel): Likewise.
589 (OldGcc): Likewise.
590 (Control): Likewise.
591 (Unspecified): Likewise.
592 (OTMax): Likewise.
593 (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
594 (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
595 vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
596 vex3sources, veximmext and sse2avx.
597 (i386_operand_type): Add regymm, ymmword and vex_imm4.
598
599 * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
600
601 * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
602
603 * i386-init.h: Regenerated.
604 * i386-tbl.h: Likewise.
605
6062008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
607
608 From Robin Getz <robin.getz@analog.com>
609 * bfin-dis.c (bu32): Typedef.
610 (enum const_forms_t): Add c_uimm32 and c_huimm32.
611 (constant_formats[]): Add uimm32 and huimm16.
612 (fmtconst_val): New.
613 (uimm32): Define.
614 (huimm32): Define.
615 (imm16_val): Define.
616 (luimm16_val): Define.
617 (struct saved_state): Define.
618 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
619 A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
620 LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
621 (get_allreg): New.
622 (decode_LDIMMhalf_0): Print out the whole register value.
623
624 From Jie Zhang <jie.zhang@analog.com>
625 * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
626 multiply and multiply-accumulate to data register instruction.
627
628 * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
629 c_imm32, c_huimm32e): Define.
630 (constant_formats): Add flags for printing decimal, leading spaces, and
631 exact symbols.
632 (comment, parallel): Add global flags in all disassembly.
633 (fmtconst): Take advantage of new flags, and print default in hex.
634 (fmtconst_val): Likewise.
635 (decode_macfunc): Be consistant with spaces, tabs, comments,
636 capitalization in disassembly, fix minor coding style issues.
637 (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
638 (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
639 decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
640 decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
641 decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
642 decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
643 decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
644 decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
645 decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
646 decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
647 _print_insn_bfin, print_insn_bfin): Likewise.
648
6492008-03-17 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
650
651 * aclocal.m4: Regenerate.
652 * configure: Likewise.
653 * Makefile.in: Likewise.
654
6552008-03-13 Alan Modra <amodra@bigpond.net.au>
656
657 * Makefile.am: Run "make dep-am".
658 * Makefile.in: Regenerate.
659 * configure: Regenerate.
660
6612008-03-07 Alan Modra <amodra@bigpond.net.au>
662
663 * ppc-opc.c (powerpc_opcodes): Order and format.
664
6652008-03-01 H.J. Lu <hongjiu.lu@intel.com>
666
667 * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
668 * i386-tbl.h: Regenerated.
669
6702008-02-23 H.J. Lu <hongjiu.lu@intel.com>
671
672 * i386-opc.tbl: Disallow 16-bit near indirect branches for
673 x86-64.
674 * i386-tbl.h: Regenerated.
675
6762008-02-21 Jan Beulich <jbeulich@novell.com>
677
678 * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
679 and Fword for far indirect jmp. Allow Reg16 and Word for near
680 indirect jmp on x86-64. Disallow Fword for lcall.
681 * i386-tbl.h: Re-generate.
682
6832008-02-18 M R Swami Reddy <MR.Swami.Reddy@nsc.com>
684
685 * cr16-opc.c (cr16_num_optab): Defined
686
6872008-02-16 H.J. Lu <hongjiu.lu@intel.com>
688
689 * i386-gen.c (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
690 * i386-init.h: Regenerated.
691
6922008-02-14 Nick Clifton <nickc@redhat.com>
693
694 PR binutils/5524
695 * configure.in (SHARED_LIBADD): Select the correct host specific
696 file extension for shared libraries.
697 * configure: Regenerate.
698
6992008-02-13 Jan Beulich <jbeulich@novell.com>
700
701 * i386-opc.h (RegFlat): New.
702 * i386-reg.tbl (flat): Add.
703 * i386-tbl.h: Re-generate.
704
7052008-02-13 Jan Beulich <jbeulich@novell.com>
706
707 * i386-dis.c (a_mode): New.
708 (cond_jump_mode): Adjust.
709 (Ma): Change to a_mode.
710 (intel_operand_size): Handle a_mode.
711 * i386-opc.tbl: Allow Dword and Qword for bound.
712 * i386-tbl.h: Re-generate.
713
7142008-02-13 Jan Beulich <jbeulich@novell.com>
715
716 * i386-gen.c (process_i386_registers): Process new fields.
717 * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
718 unsigned char. Add dw2_regnum and Dw2Inval.
719 * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
720 register names.
721 * i386-tbl.h: Re-generate.
722
7232008-02-11 H.J. Lu <hongjiu.lu@intel.com>
724
725 * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
726 * i386-init.h: Updated.
727
7282008-02-11 H.J. Lu <hongjiu.lu@intel.com>
729
730 * i386-gen.c (cpu_flags): Add CpuXsave.
731
732 * i386-opc.h (CpuXsave): New.
733 (CpuLM): Updated.
734 (i386_cpu_flags): Add cpuxsave.
735
736 * i386-dis.c (MOD_0FAE_REG_4): New.
737 (RM_0F01_REG_2): Likewise.
738 (MOD_0FAE_REG_5): Updated.
739 (RM_0F01_REG_3): Likewise.
740 (reg_table): Use MOD_0FAE_REG_4.
741 (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated
742 for xrstor.
743 (rm_table): Add RM_0F01_REG_2.
744
745 * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
746 * i386-init.h: Regenerated.
747 * i386-tbl.h: Likewise.
748
7492008-02-11 Jan Beulich <jbeulich@novell.com>
750
751 * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
752 Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
753 * i386-tbl.h: Re-generate.
754
7552008-02-04 H.J. Lu <hongjiu.lu@intel.com>
756
757 PR 5715
758 * configure: Regenerated.
759
7602008-02-04 Adam Nemet <anemet@caviumnetworks.com>
761
762 * mips-dis.c: Update copyright.
763 (mips_arch_choices): Add Octeon.
764 * mips-opc.c: Update copyright.
765 (IOCT): New macro.
766 (mips_builtin_opcodes): Add Octeon instruction synciobdma.
767
7682008-01-29 Alan Modra <amodra@bigpond.net.au>
769
770 * ppc-opc.c: Support optional L form mtmsr.
771
7722008-01-24 H.J. Lu <hongjiu.lu@intel.com>
773
774 * i386-dis.c (OP_E_extended): Handle r12 like rsp.
775
7762008-01-23 H.J. Lu <hongjiu.lu@intel.com>
777
778 * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
779 * i386-init.h: Regenerated.
780
7812008-01-23 Tristan Gingold <gingold@adacore.com>
782
783 * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
784 ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
785
7862008-01-22 H.J. Lu <hongjiu.lu@intel.com>
787
788 * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
789 (cpu_flags): Likewise.
790
791 * i386-opc.h (CpuMMX2): Removed.
792 (CpuSSE): Updated.
793
794 * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
795 * i386-init.h: Regenerated.
796 * i386-tbl.h: Likewise.
797
7982008-01-22 H.J. Lu <hongjiu.lu@intel.com>
799
800 * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
801 CPU_SMX_FLAGS.
802 * i386-init.h: Regenerated.
803
8042008-01-15 H.J. Lu <hongjiu.lu@intel.com>
805
806 * i386-opc.tbl: Use Qword on movddup.
807 * i386-tbl.h: Regenerated.
808
8092008-01-15 H.J. Lu <hongjiu.lu@intel.com>
810
811 * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
812 * i386-tbl.h: Regenerated.
813
8142008-01-15 H.J. Lu <hongjiu.lu@intel.com>
815
816 * i386-dis.c (Mx): New.
817 (PREFIX_0FC3): Likewise.
818 (PREFIX_0FC7_REG_6): Updated.
819 (dis386_twobyte): Use PREFIX_0FC3.
820 (prefix_table): Add PREFIX_0FC3. Use Mq on movntq and movntsd.
821 Use Mx on movntps, movntpd, movntdq and movntdqa. Use Md on
822 movntss.
823
8242008-01-14 H.J. Lu <hongjiu.lu@intel.com>
825
826 * i386-gen.c (opcode_modifiers): Add IntelSyntax.
827 (operand_types): Add Mem.
828
829 * i386-opc.h (IntelSyntax): New.
830 * i386-opc.h (Mem): New.
831 (Byte): Updated.
832 (Opcode_Modifier_Max): Updated.
833 (i386_opcode_modifier): Add intelsyntax.
834 (i386_operand_type): Add mem.
835
836 * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more
837 instructions.
838
839 * i386-reg.tbl: Add size for accumulator.
840
841 * i386-init.h: Regenerated.
842 * i386-tbl.h: Likewise.
843
8442008-01-13 H.J. Lu <hongjiu.lu@intel.com>
845
846 * i386-opc.h (Byte): Fix a typo.
847
8482008-01-12 H.J. Lu <hongjiu.lu@intel.com>
849
850 PR gas/5534
851 * i386-gen.c (operand_type_init): Add Dword to
852 OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
853 (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
854 Qword and Xmmword.
855 (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
856 Xmmword, Unspecified and Anysize.
857 (set_bitfield): Make Mmword an alias of Qword. Make Oword
858 an alias of Xmmword.
859
860 * i386-opc.h (CheckSize): Removed.
861 (Byte): Updated.
862 (Word): Likewise.
863 (Dword): Likewise.
864 (Qword): Likewise.
865 (Xmmword): Likewise.
866 (FWait): Updated.
867 (OTMax): Likewise.
868 (i386_opcode_modifier): Remove checksize, byte, word, dword,
869 qword and xmmword.
870 (Fword): New.
871 (TBYTE): Likewise.
872 (Unspecified): Likewise.
873 (Anysize): Likewise.
874 (i386_operand_type): Add byte, word, dword, fword, qword,
875 tbyte xmmword, unspecified and anysize.
876
877 * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
878 Tbyte, Xmmword, Unspecified and Anysize.
879
880 * i386-reg.tbl: Add size for accumulator.
881
882 * i386-init.h: Regenerated.
883 * i386-tbl.h: Likewise.
884
8852008-01-10 H.J. Lu <hongjiu.lu@intel.com>
886
887 * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
888 (REG_0F18): Updated.
889 (reg_table): Updated.
890 (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e.
891 (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
892
8932008-01-08 H.J. Lu <hongjiu.lu@intel.com>
894
895 * i386-gen.c (set_bitfield): Use fail () on error.
896
8972008-01-08 H.J. Lu <hongjiu.lu@intel.com>
898
899 * i386-gen.c (lineno): New.
900 (filename): Likewise.
901 (set_bitfield): Report filename and line numer on error.
902 (process_i386_opcodes): Set filename and update lineno.
903 (process_i386_registers): Likewise.
904
9052008-01-05 H.J. Lu <hongjiu.lu@intel.com>
906
907 * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
908 ATTSyntax.
909
910 * i386-opc.h (IntelMnemonic): Renamed to ..
911 (ATTSyntax): This
912 (Opcode_Modifier_Max): Updated.
913 (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
914 and intelsyntax.
915
916 * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
917 on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
918 * i386-tbl.h: Regenerated.
919
9202008-01-04 H.J. Lu <hongjiu.lu@intel.com>
921
922 * i386-gen.c: Update copyright to 2008.
923 * i386-opc.h: Likewise.
924 * i386-opc.tbl: Likewise.
925
926 * i386-init.h: Regenerated.
927 * i386-tbl.h: Likewise.
928
9292008-01-04 H.J. Lu <hongjiu.lu@intel.com>
930
931 * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
932 pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
933 * i386-tbl.h: Regenerated.
934
9352008-01-03 H.J. Lu <hongjiu.lu@intel.com>
936
937 * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
938 CpuSSE4_2_Or_ABM.
939 (cpu_flags): Likewise.
940
941 * i386-opc.h (CpuSSE4_1_Or_5): Removed.
942 (CpuSSE4_2_Or_ABM): Likewise.
943 (CpuLM): Updated.
944 (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
945
946 * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
947 Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
948 and CpuPadLock, respectively.
949 * i386-init.h: Regenerated.
950 * i386-tbl.h: Likewise.
951
9522008-01-03 H.J. Lu <hongjiu.lu@intel.com>
953
954 * i386-gen.c (opcode_modifiers): Remove No_xSuf.
955
956 * i386-opc.h (No_xSuf): Removed.
957 (CheckSize): Updated.
958
959 * i386-tbl.h: Regenerated.
960
9612008-01-02 H.J. Lu <hongjiu.lu@intel.com>
962
963 * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
964 CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
965 CPU_SSE5_FLAGS.
966 (cpu_flags): Add CpuSSE4_2_Or_ABM.
967
968 * i386-opc.h (CpuSSE4_2_Or_ABM): New.
969 (CpuLM): Updated.
970 (i386_cpu_flags): Add cpusse4_2_or_abm.
971
972 * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
973 CpuABM|CpuSSE4_2 on popcnt.
974 * i386-init.h: Regenerated.
975 * i386-tbl.h: Likewise.
976
9772008-01-02 H.J. Lu <hongjiu.lu@intel.com>
978
979 * i386-opc.h: Update comments.
980
9812008-01-02 H.J. Lu <hongjiu.lu@intel.com>
982
983 * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
984 * i386-opc.h: Likewise.
985 * i386-opc.tbl: Likewise.
986
9872008-01-02 H.J. Lu <hongjiu.lu@intel.com>
988
989 PR gas/5534
990 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
991 Byte, Word, Dword, QWord and Xmmword.
992
993 * i386-opc.h (No_xSuf): New.
994 (CheckSize): Likewise.
995 (Byte): Likewise.
996 (Word): Likewise.
997 (Dword): Likewise.
998 (QWord): Likewise.
999 (Xmmword): Likewise.
1000 (FWait): Updated.
1001 (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1002 Dword, QWord and Xmmword.
1003
1004 * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1005 used.
1006 * i386-tbl.h: Regenerated.
1007
10082008-01-02 Mark Kettenis <kettenis@gnu.org>
1009
1010 * m88k-dis.c (instructions): Fix fcvt.* instructions.
1011 From Miod Vallat.
1012
1013For older changes see ChangeLog-2007
1014\f
1015Local Variables:
1016mode: change-log
1017left-margin: 8
1018fill-column: 74
1019version-control: never
1020End:
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