| | 1 | 2018-01-16 Nick Clifton <nickc@redhat.com> |
| | 2 | |
| | 3 | * po/pt_BR.po: Updated Brazilian Portugese translation. |
| | 4 | * po/de.po: Updated German translation. |
| | 5 | |
| | 6 | 2018-01-15 Jim Wilson <jimw@sifive.com> |
| | 7 | |
| | 8 | * riscv-opc.c (match_c_nop): New. |
| | 9 | (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop. |
| | 10 | |
| | 11 | 2018-01-15 Nick Clifton <nickc@redhat.com> |
| | 12 | |
| | 13 | * po/uk.po: Updated Ukranian translation. |
| | 14 | |
| | 15 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
| | 16 | |
| | 17 | * po/opcodes.pot: Regenerated. |
| | 18 | |
| | 19 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
| | 20 | |
| | 21 | * configure: Regenerate. |
| | 22 | |
| | 23 | 2018-01-13 Nick Clifton <nickc@redhat.com> |
| | 24 | |
| | 25 | 2.30 branch created. |
| | 26 | |
| | 27 | 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com> |
| | 28 | |
| | 29 | * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns. |
| | 30 | * i386-tbl.h: Regenerate. |
| | 31 | |
| | 32 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
| | 33 | |
| | 34 | * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift. |
| | 35 | * i386-tbl.h: Re-generate. |
| | 36 | |
| | 37 | 2018-01-10 Jan Beulich <jbeulich@suse.com> |
| | 38 | |
| | 39 | * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb, |
| | 40 | vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub, |
| | 41 | vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew, |
| | 42 | vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw, |
| | 43 | vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust |
| | 44 | Disp8MemShift of AVX512VL forms. |
| | 45 | * i386-tbl.h: Re-generate. |
| | 46 | |
| | 47 | 2018-01-09 Jim Wilson <jimw@sifive.com> |
| | 48 | |
| | 49 | * riscv-dis.c (maybe_print_address): If base_reg is zero, |
| | 50 | then the hi_addr value is zero. |
| | 51 | |
| | 52 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
| | 53 | |
| | 54 | * arm-dis.c (arm_opcodes): Add csdb. |
| | 55 | (thumb32_opcodes): Add csdb. |
| | 56 | |
| | 57 | 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com> |
| | 58 | |
| | 59 | * aarch64-tbl.h (aarch64_opcode_table): Add "csdb". |
| | 60 | * aarch64-asm-2.c: Regenerate. |
| | 61 | * aarch64-dis-2.c: Regenerate. |
| | 62 | * aarch64-opc-2.c: Regenerate. |
| | 63 | |
| | 64 | 2018-01-08 H.J. Lu <hongjiu.lu@intel.com> |
| | 65 | |
| | 66 | PR gas/22681 |
| | 67 | * i386-opc.tbl: Properly encode vmovd with Qword memeory operand. |
| | 68 | Remove AVX512 vmovd with 64-bit operands. |
| | 69 | * i386-tbl.h: Regenerated. |
| | 70 | |
| | 71 | 2018-01-05 Jim Wilson <jimw@sifive.com> |
| | 72 | |
| | 73 | * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a |
| | 74 | jalr. |
| | 75 | |
| | 76 | 2018-01-03 Alan Modra <amodra@gmail.com> |
| | 77 | |
| | 78 | Update year range in copyright notice of all files. |
| | 79 | |
| | 80 | 2018-01-02 Jan Beulich <jbeulich@suse.com> |
| | 81 | |
| | 82 | * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM |
| | 83 | and OPERAND_TYPE_REGZMM entries. |
| | 84 | |
| | 85 | For older changes see ChangeLog-2017 |
| | 86 | \f |
| | 87 | Copyright (C) 2018 Free Software Foundation, Inc. |
| | 88 | |
| | 89 | Copying and distribution of this file, with or without modification, |
| | 90 | are permitted in any medium without royalty provided the copyright |
| | 91 | notice and this notice are preserved. |
| | 92 | |
| | 93 | Local Variables: |
| | 94 | mode: change-log |
| | 95 | left-margin: 8 |
| | 96 | fill-column: 74 |
| | 97 | version-control: never |
| | 98 | End: |
projects / deliverable / binutils-gdb.git / blame_incremental