| 1 | /* Assembler interface for targets using CGEN. -*- C -*- |
| 2 | CGEN: Cpu tools GENerator |
| 3 | |
| 4 | This file is used to generate @arch@-asm.c. |
| 5 | |
| 6 | Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
| 7 | |
| 8 | This file is part of the GNU Binutils and GDB, the GNU debugger. |
| 9 | |
| 10 | This program is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 2, or (at your option) |
| 13 | any later version. |
| 14 | |
| 15 | This program is distributed in the hope that it will be useful, |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | GNU General Public License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License |
| 21 | along with this program; if not, write to the Free Software |
| 22 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
| 23 | |
| 24 | #include "sysdep.h" |
| 25 | #include <ctype.h> |
| 26 | #include <stdio.h> |
| 27 | #include "ansidecl.h" |
| 28 | #include "bfd.h" |
| 29 | #include "symcat.h" |
| 30 | #include "@arch@-opc.h" |
| 31 | #include "opintl.h" |
| 32 | |
| 33 | /* ??? The layout of this stuff is still work in progress. |
| 34 | For speed in assembly/disassembly, we use inline functions. That of course |
| 35 | will only work for GCC. When this stuff is finished, we can decide whether |
| 36 | to keep the inline functions (and only get the performance increase when |
| 37 | compiled with GCC), or switch to macros, or use something else. |
| 38 | */ |
| 39 | |
| 40 | static const char * insert_normal |
| 41 | PARAMS ((long, unsigned int, int, int, int, char *)); |
| 42 | static const char * parse_insn_normal |
| 43 | PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *)); |
| 44 | static const char * insert_insn_normal |
| 45 | PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *)); |
| 46 | \f |
| 47 | /* -- assembler routines inserted here */ |
| 48 | \f |
| 49 | /* Default insertion routine. |
| 50 | |
| 51 | ATTRS is a mask of the boolean attributes. |
| 52 | LENGTH is the length of VALUE in bits. |
| 53 | TOTAL_LENGTH is the total length of the insn (currently 8,16,32). |
| 54 | |
| 55 | The result is an error message or NULL if success. */ |
| 56 | |
| 57 | /* ??? This duplicates functionality with bfd's howto table and |
| 58 | bfd_install_relocation. */ |
| 59 | /* ??? For architectures where insns can be representable as ints, |
| 60 | store insn in `field' struct and add registers, etc. while parsing? */ |
| 61 | |
| 62 | static const char * |
| 63 | insert_normal (value, attrs, start, length, total_length, buffer) |
| 64 | long value; |
| 65 | unsigned int attrs; |
| 66 | int start; |
| 67 | int length; |
| 68 | int total_length; |
| 69 | char * buffer; |
| 70 | { |
| 71 | bfd_vma x; |
| 72 | static char buf[100]; |
| 73 | |
| 74 | /* Ensure VALUE will fit. */ |
| 75 | if ((attrs & (1 << CGEN_OPERAND_UNSIGNED)) != 0) |
| 76 | { |
| 77 | unsigned long max = (1 << length) - 1; |
| 78 | if ((unsigned long) value > max) |
| 79 | { |
| 80 | sprintf (buf, _("operand out of range (%lu not between 0 and %lu)"), |
| 81 | value, max); |
| 82 | return buf; |
| 83 | } |
| 84 | } |
| 85 | else |
| 86 | { |
| 87 | long min = - (1 << (length - 1)); |
| 88 | long max = (1 << (length - 1)) - 1; |
| 89 | if (value < min || value > max) |
| 90 | return sprintf |
| 91 | (buf, _("operand out of range (%ld not between %ld and %ld)"), |
| 92 | value, min, max); |
| 93 | } |
| 94 | |
| 95 | #if 0 /*def CGEN_INT_INSN*/ |
| 96 | *buffer |= ((value & ((1 << length) - 1)) |
| 97 | << (total_length - (start + length))); |
| 98 | #else |
| 99 | switch (total_length) |
| 100 | { |
| 101 | case 8: |
| 102 | x = * (unsigned char *) buffer; |
| 103 | break; |
| 104 | case 16: |
| 105 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 106 | x = bfd_getb16 (buffer); |
| 107 | else |
| 108 | x = bfd_getl16 (buffer); |
| 109 | break; |
| 110 | case 32: |
| 111 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 112 | x = bfd_getb32 (buffer); |
| 113 | else |
| 114 | x = bfd_getl32 (buffer); |
| 115 | break; |
| 116 | default : |
| 117 | abort (); |
| 118 | } |
| 119 | |
| 120 | x |= ((value & ((1 << length) - 1)) |
| 121 | << (total_length - (start + length))); |
| 122 | |
| 123 | switch (total_length) |
| 124 | { |
| 125 | case 8: |
| 126 | * buffer = value; |
| 127 | break; |
| 128 | case 16: |
| 129 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 130 | bfd_putb16 (x, buffer); |
| 131 | else |
| 132 | bfd_putl16 (x, buffer); |
| 133 | break; |
| 134 | case 32: |
| 135 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 136 | bfd_putb32 (x, buffer); |
| 137 | else |
| 138 | bfd_putl32 (x, buffer); |
| 139 | break; |
| 140 | default : |
| 141 | abort (); |
| 142 | } |
| 143 | #endif |
| 144 | |
| 145 | return NULL; |
| 146 | } |
| 147 | \f |
| 148 | /* Default insn parser. |
| 149 | |
| 150 | The syntax string is scanned and operands are parsed and stored in FIELDS. |
| 151 | Relocs are queued as we go via other callbacks. |
| 152 | |
| 153 | ??? Note that this is currently an all-or-nothing parser. If we fail to |
| 154 | parse the instruction, we return 0 and the caller will start over from |
| 155 | the beginning. Backtracking will be necessary in parsing subexpressions, |
| 156 | but that can be handled there. Not handling backtracking here may get |
| 157 | expensive in the case of the m68k. Deal with later. |
| 158 | |
| 159 | Returns NULL for success, an error message for failure. |
| 160 | */ |
| 161 | |
| 162 | static const char * |
| 163 | parse_insn_normal (insn, strp, fields) |
| 164 | const CGEN_INSN * insn; |
| 165 | const char ** strp; |
| 166 | CGEN_FIELDS * fields; |
| 167 | { |
| 168 | const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn); |
| 169 | const char * str = *strp; |
| 170 | const char * errmsg; |
| 171 | const char * p; |
| 172 | const unsigned char * syn; |
| 173 | #ifdef CGEN_MNEMONIC_OPERANDS |
| 174 | int past_opcode_p; |
| 175 | #endif |
| 176 | |
| 177 | /* For now we assume the mnemonic is first (there are no leading operands). |
| 178 | We can parse it without needing to set up operand parsing. */ |
| 179 | p = CGEN_INSN_MNEMONIC (insn); |
| 180 | while (* p && * p == * str) |
| 181 | ++ p, ++ str; |
| 182 | |
| 183 | if (* p || (* str && !isspace (* str))) |
| 184 | return _("unrecognized instruction"); |
| 185 | |
| 186 | CGEN_INIT_PARSE (); |
| 187 | cgen_init_parse_operand (); |
| 188 | #ifdef CGEN_MNEMONIC_OPERANDS |
| 189 | past_opcode_p = 0; |
| 190 | #endif |
| 191 | |
| 192 | /* We don't check for (*str != '\0') here because we want to parse |
| 193 | any trailing fake arguments in the syntax string. */ |
| 194 | syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn)); |
| 195 | |
| 196 | /* Mnemonics come first for now, ensure valid string. */ |
| 197 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) |
| 198 | abort (); |
| 199 | |
| 200 | ++syn; |
| 201 | |
| 202 | while (* syn != 0) |
| 203 | { |
| 204 | /* Non operand chars must match exactly. */ |
| 205 | /* FIXME: Need to better handle whitespace. */ |
| 206 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
| 207 | { |
| 208 | if (*str == CGEN_SYNTAX_CHAR (* syn)) |
| 209 | { |
| 210 | #ifdef CGEN_MNEMONIC_OPERANDS |
| 211 | if (* syn == ' ') |
| 212 | past_opcode_p = 1; |
| 213 | #endif |
| 214 | ++ syn; |
| 215 | ++ str; |
| 216 | } |
| 217 | else |
| 218 | { |
| 219 | /* Syntax char didn't match. Can't be this insn. */ |
| 220 | /* FIXME: would like to return something like |
| 221 | "expected char `c'" */ |
| 222 | return _("syntax error"); |
| 223 | } |
| 224 | continue; |
| 225 | } |
| 226 | |
| 227 | /* We have an operand of some sort. */ |
| 228 | errmsg = @arch@_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn), |
| 229 | &str, fields); |
| 230 | if (errmsg) |
| 231 | return errmsg; |
| 232 | |
| 233 | /* Done with this operand, continue with next one. */ |
| 234 | ++ syn; |
| 235 | } |
| 236 | |
| 237 | /* If we're at the end of the syntax string, we're done. */ |
| 238 | if (* syn == '\0') |
| 239 | { |
| 240 | /* FIXME: For the moment we assume a valid `str' can only contain |
| 241 | blanks now. IE: We needn't try again with a longer version of |
| 242 | the insn and it is assumed that longer versions of insns appear |
| 243 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ |
| 244 | while (isspace (* str)) |
| 245 | ++ str; |
| 246 | |
| 247 | if (* str != '\0') |
| 248 | return _("junk at end of line"); /* FIXME: would like to include `str' */ |
| 249 | |
| 250 | return NULL; |
| 251 | } |
| 252 | |
| 253 | /* We couldn't parse it. */ |
| 254 | return "unrecognized instruction"; |
| 255 | } |
| 256 | |
| 257 | /* Default insn builder (insert handler). |
| 258 | The instruction is recorded in target byte order. |
| 259 | The result is an error message or NULL if success. */ |
| 260 | /* FIXME: change buffer to char *? */ |
| 261 | |
| 262 | static const char * |
| 263 | insert_insn_normal (insn, fields, buffer) |
| 264 | const CGEN_INSN * insn; |
| 265 | CGEN_FIELDS * fields; |
| 266 | cgen_insn_t * buffer; |
| 267 | { |
| 268 | const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn); |
| 269 | bfd_vma value; |
| 270 | const unsigned char * syn; |
| 271 | |
| 272 | CGEN_INIT_INSERT (); |
| 273 | value = CGEN_INSN_VALUE (insn); |
| 274 | |
| 275 | /* If we're recording insns as numbers (rather than a string of bytes), |
| 276 | target byte order handling is deferred until later. */ |
| 277 | #undef min |
| 278 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
| 279 | #if 0 /*def CGEN_INT_INSN*/ |
| 280 | *buffer = value; |
| 281 | #else |
| 282 | switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields))) |
| 283 | { |
| 284 | case 8: |
| 285 | * buffer = value; |
| 286 | break; |
| 287 | case 16: |
| 288 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 289 | bfd_putb16 (value, (char *) buffer); |
| 290 | else |
| 291 | bfd_putl16 (value, (char *) buffer); |
| 292 | break; |
| 293 | case 32: |
| 294 | if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG) |
| 295 | bfd_putb32 (value, (char *) buffer); |
| 296 | else |
| 297 | bfd_putl32 (value, (char *) buffer); |
| 298 | break; |
| 299 | default: |
| 300 | abort (); |
| 301 | } |
| 302 | #endif |
| 303 | |
| 304 | /* ??? Rather than scanning the syntax string again, we could store |
| 305 | in `fields' a null terminated list of the fields that are present. */ |
| 306 | |
| 307 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn) |
| 308 | { |
| 309 | const char *errmsg; |
| 310 | |
| 311 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
| 312 | continue; |
| 313 | |
| 314 | errmsg = @arch@_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields, |
| 315 | (char *) buffer); |
| 316 | if (errmsg) |
| 317 | return errmsg; |
| 318 | } |
| 319 | |
| 320 | return NULL; |
| 321 | } |
| 322 | \f |
| 323 | /* Main entry point. |
| 324 | This routine is called for each instruction to be assembled. |
| 325 | STR points to the insn to be assembled. |
| 326 | We assume all necessary tables have been initialized. |
| 327 | The assembled instruction, less any fixups, is stored in buf. |
| 328 | [??? What byte order?] |
| 329 | The result is a pointer to the insn's entry in the opcode table, |
| 330 | or NULL if an error occured (an error message will have already been |
| 331 | printed). |
| 332 | |
| 333 | Note that when processing (non-alias) macro-insns, |
| 334 | this function recurses. */ |
| 335 | |
| 336 | const CGEN_INSN * |
| 337 | @arch@_cgen_assemble_insn (str, fields, buf, errmsg) |
| 338 | const char * str; |
| 339 | CGEN_FIELDS * fields; |
| 340 | cgen_insn_t * buf; |
| 341 | char ** errmsg; |
| 342 | { |
| 343 | const char * start; |
| 344 | CGEN_INSN_LIST * ilist; |
| 345 | |
| 346 | /* Skip leading white space. */ |
| 347 | while (isspace (* str)) |
| 348 | ++ str; |
| 349 | |
| 350 | /* The instructions are stored in hashed lists. |
| 351 | Get the first in the list. */ |
| 352 | ilist = CGEN_ASM_LOOKUP_INSN (str); |
| 353 | |
| 354 | /* Keep looking until we find a match. */ |
| 355 | |
| 356 | start = str; |
| 357 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) |
| 358 | { |
| 359 | const CGEN_INSN *insn = ilist->insn; |
| 360 | |
| 361 | #if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */ |
| 362 | /* Is this insn supported by the selected cpu? */ |
| 363 | if (! @arch@_cgen_insn_supported (insn)) |
| 364 | continue; |
| 365 | #endif |
| 366 | |
| 367 | #if 1 /* FIXME: wip */ |
| 368 | /* If the RELAX attribute is set, this is an insn that shouldn't be |
| 369 | chosen immediately. Instead, it is used during assembler/linker |
| 370 | relaxation if possible. */ |
| 371 | if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0) |
| 372 | continue; |
| 373 | #endif |
| 374 | |
| 375 | str = start; |
| 376 | |
| 377 | /* Record a default length for the insn. This will get set to the |
| 378 | correct value while parsing. */ |
| 379 | /* FIXME: wip */ |
| 380 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
| 381 | |
| 382 | if (! CGEN_PARSE_FN (insn) (insn, & str, fields)) |
| 383 | { |
| 384 | if (CGEN_INSERT_FN (insn) (insn, fields, buf) != NULL) |
| 385 | continue; |
| 386 | /* It is up to the caller to actually output the insn and any |
| 387 | queued relocs. */ |
| 388 | return insn; |
| 389 | } |
| 390 | |
| 391 | /* Try the next entry. */ |
| 392 | } |
| 393 | |
| 394 | /* FIXME: We can return a better error message than this. |
| 395 | Need to track why it failed and pick the right one. */ |
| 396 | { |
| 397 | static char errbuf[100]; |
| 398 | /* xgettext:c-format */ |
| 399 | if (strlen (start) > 50) |
| 400 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); |
| 401 | else |
| 402 | sprintf (errbuf, _("bad instruction `%.50s'"), start); |
| 403 | |
| 404 | *errmsg = errbuf; |
| 405 | return NULL; |
| 406 | } |
| 407 | } |
| 408 | \f |
| 409 | #if 0 /* This calls back to GAS which we can't do without care. */ |
| 410 | |
| 411 | /* Record each member of OPVALS in the assembler's symbol table. |
| 412 | This lets GAS parse registers for us. |
| 413 | ??? Interesting idea but not currently used. */ |
| 414 | |
| 415 | /* Record each member of OPVALS in the assembler's symbol table. |
| 416 | FIXME: Not currently used. */ |
| 417 | |
| 418 | void |
| 419 | @arch@_cgen_asm_hash_keywords (opvals) |
| 420 | CGEN_KEYWORD * opvals; |
| 421 | { |
| 422 | CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); |
| 423 | const CGEN_KEYWORD_ENTRY * ke; |
| 424 | |
| 425 | while ((ke = cgen_keyword_search_next (& search)) != NULL) |
| 426 | { |
| 427 | #if 0 /* Unnecessary, should be done in the search routine. */ |
| 428 | if (! @arch@_cgen_opval_supported (ke)) |
| 429 | continue; |
| 430 | #endif |
| 431 | cgen_asm_record_register (ke->name, ke->value); |
| 432 | } |
| 433 | } |
| 434 | |
| 435 | #endif /* 0 */ |