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[deliverable/binutils-gdb.git] / opcodes / disassemble.c
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1/* Select disassembly routine for specified architecture.
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
5
6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
22
23#include "sysdep.h"
24#include "dis-asm.h"
25
26#ifdef ARCH_all
27#define ARCH_aarch64
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
31#define ARCH_avr
32#define ARCH_bfin
33#define ARCH_cr16
34#define ARCH_cris
35#define ARCH_crx
36#define ARCH_d10v
37#define ARCH_d30v
38#define ARCH_dlx
39#define ARCH_epiphany
40#define ARCH_fr30
41#define ARCH_frv
42#define ARCH_h8300
43#define ARCH_h8500
44#define ARCH_hppa
45#define ARCH_i370
46#define ARCH_i386
47#define ARCH_i860
48#define ARCH_i960
49#define ARCH_ia64
50#define ARCH_ip2k
51#define ARCH_iq2000
52#define ARCH_lm32
53#define ARCH_m32c
54#define ARCH_m32r
55#define ARCH_m68hc11
56#define ARCH_m68hc12
57#define ARCH_m68k
58#define ARCH_m88k
59#define ARCH_mcore
60#define ARCH_mep
61#define ARCH_microblaze
62#define ARCH_mips
63#define ARCH_mmix
64#define ARCH_mn10200
65#define ARCH_mn10300
66#define ARCH_moxie
67#define ARCH_mt
68#define ARCH_msp430
69#define ARCH_ns32k
70#define ARCH_openrisc
71#define ARCH_or32
72#define ARCH_pdp11
73#define ARCH_pj
74#define ARCH_powerpc
75#define ARCH_rs6000
76#define ARCH_rl78
77#define ARCH_rx
78#define ARCH_s390
79#define ARCH_score
80#define ARCH_sh
81#define ARCH_sparc
82#define ARCH_spu
83#define ARCH_tic30
84#define ARCH_tic4x
85#define ARCH_tic54x
86#define ARCH_tic6x
87#define ARCH_tic80
88#define ARCH_tilegx
89#define ARCH_tilepro
90#define ARCH_v850
91#define ARCH_vax
92#define ARCH_w65
93#define ARCH_xstormy16
94#define ARCH_xc16x
95#define ARCH_xgate
96#define ARCH_xtensa
97#define ARCH_z80
98#define ARCH_z8k
99#define INCLUDE_SHMEDIA
100#endif
101
102#ifdef ARCH_m32c
103#include "m32c-desc.h"
104#endif
105
106disassembler_ftype
107disassembler (abfd)
108 bfd *abfd;
109{
110 enum bfd_architecture a = bfd_get_arch (abfd);
111 disassembler_ftype disassemble;
112
113 switch (a)
114 {
115 /* If you add a case to this table, also add it to the
116 ARCH_all definition right above this function. */
117#ifdef ARCH_aarch64
118 case bfd_arch_aarch64:
119 disassemble = print_insn_aarch64;
120 break;
121#endif
122#ifdef ARCH_alpha
123 case bfd_arch_alpha:
124 disassemble = print_insn_alpha;
125 break;
126#endif
127#ifdef ARCH_arc
128 case bfd_arch_arc:
129 disassemble = arc_get_disassembler (abfd);
130 break;
131#endif
132#ifdef ARCH_arm
133 case bfd_arch_arm:
134 if (bfd_big_endian (abfd))
135 disassemble = print_insn_big_arm;
136 else
137 disassemble = print_insn_little_arm;
138 break;
139#endif
140#ifdef ARCH_avr
141 case bfd_arch_avr:
142 disassemble = print_insn_avr;
143 break;
144#endif
145#ifdef ARCH_bfin
146 case bfd_arch_bfin:
147 disassemble = print_insn_bfin;
148 break;
149#endif
150#ifdef ARCH_cr16
151 case bfd_arch_cr16:
152 disassemble = print_insn_cr16;
153 break;
154#endif
155#ifdef ARCH_cris
156 case bfd_arch_cris:
157 disassemble = cris_get_disassembler (abfd);
158 break;
159#endif
160#ifdef ARCH_crx
161 case bfd_arch_crx:
162 disassemble = print_insn_crx;
163 break;
164#endif
165#ifdef ARCH_d10v
166 case bfd_arch_d10v:
167 disassemble = print_insn_d10v;
168 break;
169#endif
170#ifdef ARCH_d30v
171 case bfd_arch_d30v:
172 disassemble = print_insn_d30v;
173 break;
174#endif
175#ifdef ARCH_dlx
176 case bfd_arch_dlx:
177 /* As far as I know we only handle big-endian DLX objects. */
178 disassemble = print_insn_dlx;
179 break;
180#endif
181#ifdef ARCH_h8300
182 case bfd_arch_h8300:
183 if (bfd_get_mach (abfd) == bfd_mach_h8300h
184 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
185 disassemble = print_insn_h8300h;
186 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
187 || bfd_get_mach (abfd) == bfd_mach_h8300sn
188 || bfd_get_mach (abfd) == bfd_mach_h8300sx
189 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
190 disassemble = print_insn_h8300s;
191 else
192 disassemble = print_insn_h8300;
193 break;
194#endif
195#ifdef ARCH_h8500
196 case bfd_arch_h8500:
197 disassemble = print_insn_h8500;
198 break;
199#endif
200#ifdef ARCH_hppa
201 case bfd_arch_hppa:
202 disassemble = print_insn_hppa;
203 break;
204#endif
205#ifdef ARCH_i370
206 case bfd_arch_i370:
207 disassemble = print_insn_i370;
208 break;
209#endif
210#ifdef ARCH_i386
211 case bfd_arch_i386:
212 case bfd_arch_l1om:
213 case bfd_arch_k1om:
214 disassemble = print_insn_i386;
215 break;
216#endif
217#ifdef ARCH_i860
218 case bfd_arch_i860:
219 disassemble = print_insn_i860;
220 break;
221#endif
222#ifdef ARCH_i960
223 case bfd_arch_i960:
224 disassemble = print_insn_i960;
225 break;
226#endif
227#ifdef ARCH_ia64
228 case bfd_arch_ia64:
229 disassemble = print_insn_ia64;
230 break;
231#endif
232#ifdef ARCH_ip2k
233 case bfd_arch_ip2k:
234 disassemble = print_insn_ip2k;
235 break;
236#endif
237#ifdef ARCH_epiphany
238 case bfd_arch_epiphany:
239 disassemble = print_insn_epiphany;
240 break;
241#endif
242#ifdef ARCH_fr30
243 case bfd_arch_fr30:
244 disassemble = print_insn_fr30;
245 break;
246#endif
247#ifdef ARCH_lm32
248 case bfd_arch_lm32:
249 disassemble = print_insn_lm32;
250 break;
251#endif
252#ifdef ARCH_m32r
253 case bfd_arch_m32r:
254 disassemble = print_insn_m32r;
255 break;
256#endif
257#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
258 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
259 case bfd_arch_m68hc11:
260 disassemble = print_insn_m68hc11;
261 break;
262 case bfd_arch_m68hc12:
263 disassemble = print_insn_m68hc12;
264 break;
265 case bfd_arch_m9s12x:
266 disassemble = print_insn_m9s12x;
267 break;
268 case bfd_arch_m9s12xg:
269 disassemble = print_insn_m9s12xg;
270 break;
271#endif
272#ifdef ARCH_m68k
273 case bfd_arch_m68k:
274 disassemble = print_insn_m68k;
275 break;
276#endif
277#ifdef ARCH_m88k
278 case bfd_arch_m88k:
279 disassemble = print_insn_m88k;
280 break;
281#endif
282#ifdef ARCH_mt
283 case bfd_arch_mt:
284 disassemble = print_insn_mt;
285 break;
286#endif
287#ifdef ARCH_microblaze
288 case bfd_arch_microblaze:
289 disassemble = print_insn_microblaze;
290 break;
291#endif
292#ifdef ARCH_msp430
293 case bfd_arch_msp430:
294 disassemble = print_insn_msp430;
295 break;
296#endif
297#ifdef ARCH_ns32k
298 case bfd_arch_ns32k:
299 disassemble = print_insn_ns32k;
300 break;
301#endif
302#ifdef ARCH_mcore
303 case bfd_arch_mcore:
304 disassemble = print_insn_mcore;
305 break;
306#endif
307#ifdef ARCH_mep
308 case bfd_arch_mep:
309 disassemble = print_insn_mep;
310 break;
311#endif
312#ifdef ARCH_mips
313 case bfd_arch_mips:
314 if (bfd_big_endian (abfd))
315 disassemble = print_insn_big_mips;
316 else
317 disassemble = print_insn_little_mips;
318 break;
319#endif
320#ifdef ARCH_mmix
321 case bfd_arch_mmix:
322 disassemble = print_insn_mmix;
323 break;
324#endif
325#ifdef ARCH_mn10200
326 case bfd_arch_mn10200:
327 disassemble = print_insn_mn10200;
328 break;
329#endif
330#ifdef ARCH_mn10300
331 case bfd_arch_mn10300:
332 disassemble = print_insn_mn10300;
333 break;
334#endif
335#ifdef ARCH_openrisc
336 case bfd_arch_openrisc:
337 disassemble = print_insn_openrisc;
338 break;
339#endif
340#ifdef ARCH_or32
341 case bfd_arch_or32:
342 if (bfd_big_endian (abfd))
343 disassemble = print_insn_big_or32;
344 else
345 disassemble = print_insn_little_or32;
346 break;
347#endif
348#ifdef ARCH_pdp11
349 case bfd_arch_pdp11:
350 disassemble = print_insn_pdp11;
351 break;
352#endif
353#ifdef ARCH_pj
354 case bfd_arch_pj:
355 disassemble = print_insn_pj;
356 break;
357#endif
358#ifdef ARCH_powerpc
359 case bfd_arch_powerpc:
360 if (bfd_big_endian (abfd))
361 disassemble = print_insn_big_powerpc;
362 else
363 disassemble = print_insn_little_powerpc;
364 break;
365#endif
366#ifdef ARCH_rs6000
367 case bfd_arch_rs6000:
368 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
369 disassemble = print_insn_big_powerpc;
370 else
371 disassemble = print_insn_rs6000;
372 break;
373#endif
374#ifdef ARCH_rl78
375 case bfd_arch_rl78:
376 disassemble = print_insn_rl78;
377 break;
378#endif
379#ifdef ARCH_rx
380 case bfd_arch_rx:
381 disassemble = print_insn_rx;
382 break;
383#endif
384#ifdef ARCH_s390
385 case bfd_arch_s390:
386 disassemble = print_insn_s390;
387 break;
388#endif
389#ifdef ARCH_score
390 case bfd_arch_score:
391 if (bfd_big_endian (abfd))
392 disassemble = print_insn_big_score;
393 else
394 disassemble = print_insn_little_score;
395 break;
396#endif
397#ifdef ARCH_sh
398 case bfd_arch_sh:
399 disassemble = print_insn_sh;
400 break;
401#endif
402#ifdef ARCH_sparc
403 case bfd_arch_sparc:
404 disassemble = print_insn_sparc;
405 break;
406#endif
407#ifdef ARCH_spu
408 case bfd_arch_spu:
409 disassemble = print_insn_spu;
410 break;
411#endif
412#ifdef ARCH_tic30
413 case bfd_arch_tic30:
414 disassemble = print_insn_tic30;
415 break;
416#endif
417#ifdef ARCH_tic4x
418 case bfd_arch_tic4x:
419 disassemble = print_insn_tic4x;
420 break;
421#endif
422#ifdef ARCH_tic54x
423 case bfd_arch_tic54x:
424 disassemble = print_insn_tic54x;
425 break;
426#endif
427#ifdef ARCH_tic6x
428 case bfd_arch_tic6x:
429 disassemble = print_insn_tic6x;
430 break;
431#endif
432#ifdef ARCH_tic80
433 case bfd_arch_tic80:
434 disassemble = print_insn_tic80;
435 break;
436#endif
437#ifdef ARCH_v850
438 case bfd_arch_v850:
439 case bfd_arch_v850_rh850:
440 disassemble = print_insn_v850;
441 break;
442#endif
443#ifdef ARCH_w65
444 case bfd_arch_w65:
445 disassemble = print_insn_w65;
446 break;
447#endif
448#ifdef ARCH_xgate
449 case bfd_arch_xgate:
450 disassemble = print_insn_xgate;
451 break;
452#endif
453#ifdef ARCH_xstormy16
454 case bfd_arch_xstormy16:
455 disassemble = print_insn_xstormy16;
456 break;
457#endif
458#ifdef ARCH_xc16x
459 case bfd_arch_xc16x:
460 disassemble = print_insn_xc16x;
461 break;
462#endif
463#ifdef ARCH_xtensa
464 case bfd_arch_xtensa:
465 disassemble = print_insn_xtensa;
466 break;
467#endif
468#ifdef ARCH_z80
469 case bfd_arch_z80:
470 disassemble = print_insn_z80;
471 break;
472#endif
473#ifdef ARCH_z8k
474 case bfd_arch_z8k:
475 if (bfd_get_mach(abfd) == bfd_mach_z8001)
476 disassemble = print_insn_z8001;
477 else
478 disassemble = print_insn_z8002;
479 break;
480#endif
481#ifdef ARCH_vax
482 case bfd_arch_vax:
483 disassemble = print_insn_vax;
484 break;
485#endif
486#ifdef ARCH_frv
487 case bfd_arch_frv:
488 disassemble = print_insn_frv;
489 break;
490#endif
491#ifdef ARCH_moxie
492 case bfd_arch_moxie:
493 disassemble = print_insn_moxie;
494 break;
495#endif
496#ifdef ARCH_iq2000
497 case bfd_arch_iq2000:
498 disassemble = print_insn_iq2000;
499 break;
500#endif
501#ifdef ARCH_m32c
502 case bfd_arch_m32c:
503 disassemble = print_insn_m32c;
504 break;
505#endif
506#ifdef ARCH_tilegx
507 case bfd_arch_tilegx:
508 disassemble = print_insn_tilegx;
509 break;
510#endif
511#ifdef ARCH_tilepro
512 case bfd_arch_tilepro:
513 disassemble = print_insn_tilepro;
514 break;
515#endif
516 default:
517 return 0;
518 }
519 return disassemble;
520}
521
522void
523disassembler_usage (stream)
524 FILE * stream ATTRIBUTE_UNUSED;
525{
526#ifdef ARCH_aarch64
527 print_aarch64_disassembler_options (stream);
528#endif
529#ifdef ARCH_arm
530 print_arm_disassembler_options (stream);
531#endif
532#ifdef ARCH_mips
533 print_mips_disassembler_options (stream);
534#endif
535#ifdef ARCH_powerpc
536 print_ppc_disassembler_options (stream);
537#endif
538#ifdef ARCH_i386
539 print_i386_disassembler_options (stream);
540#endif
541#ifdef ARCH_s390
542 print_s390_disassembler_options (stream);
543#endif
544
545 return;
546}
547
548void
549disassemble_init_for_target (struct disassemble_info * info)
550{
551 if (info == NULL)
552 return;
553
554 switch (info->arch)
555 {
556#ifdef ARCH_aarch64
557 case bfd_arch_aarch64:
558 info->symbol_is_valid = aarch64_symbol_is_valid;
559 info->disassembler_needs_relocs = TRUE;
560 break;
561#endif
562#ifdef ARCH_arm
563 case bfd_arch_arm:
564 info->symbol_is_valid = arm_symbol_is_valid;
565 info->disassembler_needs_relocs = TRUE;
566 break;
567#endif
568#ifdef ARCH_ia64
569 case bfd_arch_ia64:
570 info->skip_zeroes = 16;
571 break;
572#endif
573#ifdef ARCH_tic4x
574 case bfd_arch_tic4x:
575 info->skip_zeroes = 32;
576 break;
577#endif
578#ifdef ARCH_mep
579 case bfd_arch_mep:
580 info->skip_zeroes = 256;
581 info->skip_zeroes_at_end = 0;
582 break;
583#endif
584#ifdef ARCH_m32c
585 case bfd_arch_m32c:
586 /* This processor in fact is little endian. The value set here
587 reflects the way opcodes are written in the cgen description. */
588 info->endian = BFD_ENDIAN_BIG;
589 if (! info->insn_sets)
590 {
591 info->insn_sets = cgen_bitset_create (ISA_MAX);
592 if (info->mach == bfd_mach_m16c)
593 cgen_bitset_set (info->insn_sets, ISA_M16C);
594 else
595 cgen_bitset_set (info->insn_sets, ISA_M32C);
596 }
597 break;
598#endif
599#ifdef ARCH_powerpc
600 case bfd_arch_powerpc:
601#endif
602#ifdef ARCH_rs6000
603 case bfd_arch_rs6000:
604#endif
605#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
606 disassemble_init_powerpc (info);
607 break;
608#endif
609 default:
610 break;
611 }
612}
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