| 1 | /* Select disassembly routine for specified architecture. |
| 2 | Copyright (C) 1994-2020 Free Software Foundation, Inc. |
| 3 | |
| 4 | This file is part of the GNU opcodes library. |
| 5 | |
| 6 | This library is free software; you can redistribute it and/or modify |
| 7 | it under the terms of the GNU General Public License as published by |
| 8 | the Free Software Foundation; either version 3 of the License, or |
| 9 | (at your option) any later version. |
| 10 | |
| 11 | This program is distributed in the hope that it will be useful, |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | GNU General Public License for more details. |
| 15 | |
| 16 | You should have received a copy of the GNU General Public License |
| 17 | along with this program; if not, write to the Free Software |
| 18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 19 | MA 02110-1301, USA. */ |
| 20 | |
| 21 | #include "sysdep.h" |
| 22 | #include "disassemble.h" |
| 23 | #include "safe-ctype.h" |
| 24 | #include <assert.h> |
| 25 | |
| 26 | #ifdef ARCH_all |
| 27 | #define ARCH_aarch64 |
| 28 | #define ARCH_alpha |
| 29 | #define ARCH_arc |
| 30 | #define ARCH_arm |
| 31 | #define ARCH_avr |
| 32 | #define ARCH_bfin |
| 33 | #define ARCH_cr16 |
| 34 | #define ARCH_cris |
| 35 | #define ARCH_crx |
| 36 | #define ARCH_csky |
| 37 | #define ARCH_d10v |
| 38 | #define ARCH_d30v |
| 39 | #define ARCH_dlx |
| 40 | #define ARCH_bpf |
| 41 | #define ARCH_epiphany |
| 42 | #define ARCH_fr30 |
| 43 | #define ARCH_frv |
| 44 | #define ARCH_ft32 |
| 45 | #define ARCH_h8300 |
| 46 | #define ARCH_hppa |
| 47 | #define ARCH_i386 |
| 48 | #define ARCH_ia64 |
| 49 | #define ARCH_ip2k |
| 50 | #define ARCH_iq2000 |
| 51 | #define ARCH_lm32 |
| 52 | #define ARCH_m32c |
| 53 | #define ARCH_m32r |
| 54 | #define ARCH_m68hc11 |
| 55 | #define ARCH_m68hc12 |
| 56 | #define ARCH_m68k |
| 57 | #define ARCH_mcore |
| 58 | #define ARCH_mep |
| 59 | #define ARCH_metag |
| 60 | #define ARCH_microblaze |
| 61 | #define ARCH_mips |
| 62 | #define ARCH_mmix |
| 63 | #define ARCH_mn10200 |
| 64 | #define ARCH_mn10300 |
| 65 | #define ARCH_moxie |
| 66 | #define ARCH_mt |
| 67 | #define ARCH_msp430 |
| 68 | #define ARCH_nds32 |
| 69 | #define ARCH_nfp |
| 70 | #define ARCH_nios2 |
| 71 | #define ARCH_ns32k |
| 72 | #define ARCH_or1k |
| 73 | #define ARCH_pdp11 |
| 74 | #define ARCH_pj |
| 75 | #define ARCH_powerpc |
| 76 | #define ARCH_pru |
| 77 | #define ARCH_riscv |
| 78 | #define ARCH_rs6000 |
| 79 | #define ARCH_rl78 |
| 80 | #define ARCH_rx |
| 81 | #define ARCH_s12z |
| 82 | #define ARCH_s390 |
| 83 | #define ARCH_score |
| 84 | #define ARCH_sh |
| 85 | #define ARCH_sparc |
| 86 | #define ARCH_spu |
| 87 | #define ARCH_tic30 |
| 88 | #define ARCH_tic4x |
| 89 | #define ARCH_tic54x |
| 90 | #define ARCH_tic6x |
| 91 | #define ARCH_tilegx |
| 92 | #define ARCH_tilepro |
| 93 | #define ARCH_v850 |
| 94 | #define ARCH_vax |
| 95 | #define ARCH_visium |
| 96 | #define ARCH_wasm32 |
| 97 | #define ARCH_xstormy16 |
| 98 | #define ARCH_xc16x |
| 99 | #define ARCH_xgate |
| 100 | #define ARCH_xtensa |
| 101 | #define ARCH_z80 |
| 102 | #define ARCH_z8k |
| 103 | #endif |
| 104 | |
| 105 | #ifdef ARCH_m32c |
| 106 | #include "m32c-desc.h" |
| 107 | #endif |
| 108 | |
| 109 | #ifdef ARCH_bpf |
| 110 | /* XXX this should be including bpf-desc.h instead of this hackery, |
| 111 | but at the moment it is not possible to include several CGEN |
| 112 | generated *-desc.h files simultaneously. To be fixed in |
| 113 | CGEN... */ |
| 114 | |
| 115 | # ifdef ARCH_m32c |
| 116 | enum epbf_isa_attr |
| 117 | { |
| 118 | ISA_EBPFLE, ISA_EBPFBE, ISA_EBPFMAX |
| 119 | }; |
| 120 | # else |
| 121 | # include "bpf-desc.h" |
| 122 | # define ISA_EBPFMAX ISA_MAX |
| 123 | # endif |
| 124 | #endif /* ARCH_bpf */ |
| 125 | |
| 126 | disassembler_ftype |
| 127 | disassembler (enum bfd_architecture a, |
| 128 | bfd_boolean big ATTRIBUTE_UNUSED, |
| 129 | unsigned long mach ATTRIBUTE_UNUSED, |
| 130 | bfd *abfd ATTRIBUTE_UNUSED) |
| 131 | { |
| 132 | disassembler_ftype disassemble; |
| 133 | |
| 134 | switch (a) |
| 135 | { |
| 136 | /* If you add a case to this table, also add it to the |
| 137 | ARCH_all definition right above this function. */ |
| 138 | #ifdef ARCH_aarch64 |
| 139 | case bfd_arch_aarch64: |
| 140 | disassemble = print_insn_aarch64; |
| 141 | break; |
| 142 | #endif |
| 143 | #ifdef ARCH_alpha |
| 144 | case bfd_arch_alpha: |
| 145 | disassemble = print_insn_alpha; |
| 146 | break; |
| 147 | #endif |
| 148 | #ifdef ARCH_arc |
| 149 | case bfd_arch_arc: |
| 150 | disassemble = arc_get_disassembler (abfd); |
| 151 | break; |
| 152 | #endif |
| 153 | #ifdef ARCH_arm |
| 154 | case bfd_arch_arm: |
| 155 | if (big) |
| 156 | disassemble = print_insn_big_arm; |
| 157 | else |
| 158 | disassemble = print_insn_little_arm; |
| 159 | break; |
| 160 | #endif |
| 161 | #ifdef ARCH_avr |
| 162 | case bfd_arch_avr: |
| 163 | disassemble = print_insn_avr; |
| 164 | break; |
| 165 | #endif |
| 166 | #ifdef ARCH_bfin |
| 167 | case bfd_arch_bfin: |
| 168 | disassemble = print_insn_bfin; |
| 169 | break; |
| 170 | #endif |
| 171 | #ifdef ARCH_cr16 |
| 172 | case bfd_arch_cr16: |
| 173 | disassemble = print_insn_cr16; |
| 174 | break; |
| 175 | #endif |
| 176 | #ifdef ARCH_cris |
| 177 | case bfd_arch_cris: |
| 178 | disassemble = cris_get_disassembler (abfd); |
| 179 | break; |
| 180 | #endif |
| 181 | #ifdef ARCH_crx |
| 182 | case bfd_arch_crx: |
| 183 | disassemble = print_insn_crx; |
| 184 | break; |
| 185 | #endif |
| 186 | #ifdef ARCH_csky |
| 187 | case bfd_arch_csky: |
| 188 | disassemble = csky_get_disassembler (abfd); |
| 189 | break; |
| 190 | #endif |
| 191 | |
| 192 | #ifdef ARCH_d10v |
| 193 | case bfd_arch_d10v: |
| 194 | disassemble = print_insn_d10v; |
| 195 | break; |
| 196 | #endif |
| 197 | #ifdef ARCH_d30v |
| 198 | case bfd_arch_d30v: |
| 199 | disassemble = print_insn_d30v; |
| 200 | break; |
| 201 | #endif |
| 202 | #ifdef ARCH_dlx |
| 203 | case bfd_arch_dlx: |
| 204 | /* As far as I know we only handle big-endian DLX objects. */ |
| 205 | disassemble = print_insn_dlx; |
| 206 | break; |
| 207 | #endif |
| 208 | #ifdef ARCH_h8300 |
| 209 | case bfd_arch_h8300: |
| 210 | if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn) |
| 211 | disassemble = print_insn_h8300h; |
| 212 | else if (mach == bfd_mach_h8300s |
| 213 | || mach == bfd_mach_h8300sn |
| 214 | || mach == bfd_mach_h8300sx |
| 215 | || mach == bfd_mach_h8300sxn) |
| 216 | disassemble = print_insn_h8300s; |
| 217 | else |
| 218 | disassemble = print_insn_h8300; |
| 219 | break; |
| 220 | #endif |
| 221 | #ifdef ARCH_hppa |
| 222 | case bfd_arch_hppa: |
| 223 | disassemble = print_insn_hppa; |
| 224 | break; |
| 225 | #endif |
| 226 | #ifdef ARCH_i386 |
| 227 | case bfd_arch_i386: |
| 228 | case bfd_arch_iamcu: |
| 229 | case bfd_arch_l1om: |
| 230 | case bfd_arch_k1om: |
| 231 | disassemble = print_insn_i386; |
| 232 | break; |
| 233 | #endif |
| 234 | #ifdef ARCH_ia64 |
| 235 | case bfd_arch_ia64: |
| 236 | disassemble = print_insn_ia64; |
| 237 | break; |
| 238 | #endif |
| 239 | #ifdef ARCH_ip2k |
| 240 | case bfd_arch_ip2k: |
| 241 | disassemble = print_insn_ip2k; |
| 242 | break; |
| 243 | #endif |
| 244 | #ifdef ARCH_bpf |
| 245 | case bfd_arch_bpf: |
| 246 | disassemble = print_insn_bpf; |
| 247 | break; |
| 248 | #endif |
| 249 | #ifdef ARCH_epiphany |
| 250 | case bfd_arch_epiphany: |
| 251 | disassemble = print_insn_epiphany; |
| 252 | break; |
| 253 | #endif |
| 254 | #ifdef ARCH_fr30 |
| 255 | case bfd_arch_fr30: |
| 256 | disassemble = print_insn_fr30; |
| 257 | break; |
| 258 | #endif |
| 259 | #ifdef ARCH_lm32 |
| 260 | case bfd_arch_lm32: |
| 261 | disassemble = print_insn_lm32; |
| 262 | break; |
| 263 | #endif |
| 264 | #ifdef ARCH_m32r |
| 265 | case bfd_arch_m32r: |
| 266 | disassemble = print_insn_m32r; |
| 267 | break; |
| 268 | #endif |
| 269 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ |
| 270 | || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) |
| 271 | case bfd_arch_m68hc11: |
| 272 | disassemble = print_insn_m68hc11; |
| 273 | break; |
| 274 | case bfd_arch_m68hc12: |
| 275 | disassemble = print_insn_m68hc12; |
| 276 | break; |
| 277 | case bfd_arch_m9s12x: |
| 278 | disassemble = print_insn_m9s12x; |
| 279 | break; |
| 280 | case bfd_arch_m9s12xg: |
| 281 | disassemble = print_insn_m9s12xg; |
| 282 | break; |
| 283 | #endif |
| 284 | #if defined(ARCH_s12z) |
| 285 | case bfd_arch_s12z: |
| 286 | disassemble = print_insn_s12z; |
| 287 | break; |
| 288 | #endif |
| 289 | #ifdef ARCH_m68k |
| 290 | case bfd_arch_m68k: |
| 291 | disassemble = print_insn_m68k; |
| 292 | break; |
| 293 | #endif |
| 294 | #ifdef ARCH_mt |
| 295 | case bfd_arch_mt: |
| 296 | disassemble = print_insn_mt; |
| 297 | break; |
| 298 | #endif |
| 299 | #ifdef ARCH_microblaze |
| 300 | case bfd_arch_microblaze: |
| 301 | disassemble = print_insn_microblaze; |
| 302 | break; |
| 303 | #endif |
| 304 | #ifdef ARCH_msp430 |
| 305 | case bfd_arch_msp430: |
| 306 | disassemble = print_insn_msp430; |
| 307 | break; |
| 308 | #endif |
| 309 | #ifdef ARCH_nds32 |
| 310 | case bfd_arch_nds32: |
| 311 | disassemble = print_insn_nds32; |
| 312 | break; |
| 313 | #endif |
| 314 | #ifdef ARCH_nfp |
| 315 | case bfd_arch_nfp: |
| 316 | disassemble = print_insn_nfp; |
| 317 | break; |
| 318 | #endif |
| 319 | #ifdef ARCH_ns32k |
| 320 | case bfd_arch_ns32k: |
| 321 | disassemble = print_insn_ns32k; |
| 322 | break; |
| 323 | #endif |
| 324 | #ifdef ARCH_mcore |
| 325 | case bfd_arch_mcore: |
| 326 | disassemble = print_insn_mcore; |
| 327 | break; |
| 328 | #endif |
| 329 | #ifdef ARCH_mep |
| 330 | case bfd_arch_mep: |
| 331 | disassemble = print_insn_mep; |
| 332 | break; |
| 333 | #endif |
| 334 | #ifdef ARCH_metag |
| 335 | case bfd_arch_metag: |
| 336 | disassemble = print_insn_metag; |
| 337 | break; |
| 338 | #endif |
| 339 | #ifdef ARCH_mips |
| 340 | case bfd_arch_mips: |
| 341 | if (big) |
| 342 | disassemble = print_insn_big_mips; |
| 343 | else |
| 344 | disassemble = print_insn_little_mips; |
| 345 | break; |
| 346 | #endif |
| 347 | #ifdef ARCH_mmix |
| 348 | case bfd_arch_mmix: |
| 349 | disassemble = print_insn_mmix; |
| 350 | break; |
| 351 | #endif |
| 352 | #ifdef ARCH_mn10200 |
| 353 | case bfd_arch_mn10200: |
| 354 | disassemble = print_insn_mn10200; |
| 355 | break; |
| 356 | #endif |
| 357 | #ifdef ARCH_mn10300 |
| 358 | case bfd_arch_mn10300: |
| 359 | disassemble = print_insn_mn10300; |
| 360 | break; |
| 361 | #endif |
| 362 | #ifdef ARCH_nios2 |
| 363 | case bfd_arch_nios2: |
| 364 | if (big) |
| 365 | disassemble = print_insn_big_nios2; |
| 366 | else |
| 367 | disassemble = print_insn_little_nios2; |
| 368 | break; |
| 369 | #endif |
| 370 | #ifdef ARCH_or1k |
| 371 | case bfd_arch_or1k: |
| 372 | disassemble = print_insn_or1k; |
| 373 | break; |
| 374 | #endif |
| 375 | #ifdef ARCH_pdp11 |
| 376 | case bfd_arch_pdp11: |
| 377 | disassemble = print_insn_pdp11; |
| 378 | break; |
| 379 | #endif |
| 380 | #ifdef ARCH_pj |
| 381 | case bfd_arch_pj: |
| 382 | disassemble = print_insn_pj; |
| 383 | break; |
| 384 | #endif |
| 385 | #ifdef ARCH_powerpc |
| 386 | case bfd_arch_powerpc: |
| 387 | #endif |
| 388 | #ifdef ARCH_rs6000 |
| 389 | case bfd_arch_rs6000: |
| 390 | #endif |
| 391 | #if defined ARCH_powerpc || defined ARCH_rs6000 |
| 392 | if (big) |
| 393 | disassemble = print_insn_big_powerpc; |
| 394 | else |
| 395 | disassemble = print_insn_little_powerpc; |
| 396 | break; |
| 397 | #endif |
| 398 | #ifdef ARCH_pru |
| 399 | case bfd_arch_pru: |
| 400 | disassemble = print_insn_pru; |
| 401 | break; |
| 402 | #endif |
| 403 | #ifdef ARCH_riscv |
| 404 | case bfd_arch_riscv: |
| 405 | disassemble = print_insn_riscv; |
| 406 | break; |
| 407 | #endif |
| 408 | #ifdef ARCH_rl78 |
| 409 | case bfd_arch_rl78: |
| 410 | disassemble = rl78_get_disassembler (abfd); |
| 411 | break; |
| 412 | #endif |
| 413 | #ifdef ARCH_rx |
| 414 | case bfd_arch_rx: |
| 415 | disassemble = print_insn_rx; |
| 416 | break; |
| 417 | #endif |
| 418 | #ifdef ARCH_s390 |
| 419 | case bfd_arch_s390: |
| 420 | disassemble = print_insn_s390; |
| 421 | break; |
| 422 | #endif |
| 423 | #ifdef ARCH_score |
| 424 | case bfd_arch_score: |
| 425 | if (big) |
| 426 | disassemble = print_insn_big_score; |
| 427 | else |
| 428 | disassemble = print_insn_little_score; |
| 429 | break; |
| 430 | #endif |
| 431 | #ifdef ARCH_sh |
| 432 | case bfd_arch_sh: |
| 433 | disassemble = print_insn_sh; |
| 434 | break; |
| 435 | #endif |
| 436 | #ifdef ARCH_sparc |
| 437 | case bfd_arch_sparc: |
| 438 | disassemble = print_insn_sparc; |
| 439 | break; |
| 440 | #endif |
| 441 | #ifdef ARCH_spu |
| 442 | case bfd_arch_spu: |
| 443 | disassemble = print_insn_spu; |
| 444 | break; |
| 445 | #endif |
| 446 | #ifdef ARCH_tic30 |
| 447 | case bfd_arch_tic30: |
| 448 | disassemble = print_insn_tic30; |
| 449 | break; |
| 450 | #endif |
| 451 | #ifdef ARCH_tic4x |
| 452 | case bfd_arch_tic4x: |
| 453 | disassemble = print_insn_tic4x; |
| 454 | break; |
| 455 | #endif |
| 456 | #ifdef ARCH_tic54x |
| 457 | case bfd_arch_tic54x: |
| 458 | disassemble = print_insn_tic54x; |
| 459 | break; |
| 460 | #endif |
| 461 | #ifdef ARCH_tic6x |
| 462 | case bfd_arch_tic6x: |
| 463 | disassemble = print_insn_tic6x; |
| 464 | break; |
| 465 | #endif |
| 466 | #ifdef ARCH_ft32 |
| 467 | case bfd_arch_ft32: |
| 468 | disassemble = print_insn_ft32; |
| 469 | break; |
| 470 | #endif |
| 471 | #ifdef ARCH_v850 |
| 472 | case bfd_arch_v850: |
| 473 | case bfd_arch_v850_rh850: |
| 474 | disassemble = print_insn_v850; |
| 475 | break; |
| 476 | #endif |
| 477 | #ifdef ARCH_wasm32 |
| 478 | case bfd_arch_wasm32: |
| 479 | disassemble = print_insn_wasm32; |
| 480 | break; |
| 481 | #endif |
| 482 | #ifdef ARCH_xgate |
| 483 | case bfd_arch_xgate: |
| 484 | disassemble = print_insn_xgate; |
| 485 | break; |
| 486 | #endif |
| 487 | #ifdef ARCH_xstormy16 |
| 488 | case bfd_arch_xstormy16: |
| 489 | disassemble = print_insn_xstormy16; |
| 490 | break; |
| 491 | #endif |
| 492 | #ifdef ARCH_xc16x |
| 493 | case bfd_arch_xc16x: |
| 494 | disassemble = print_insn_xc16x; |
| 495 | break; |
| 496 | #endif |
| 497 | #ifdef ARCH_xtensa |
| 498 | case bfd_arch_xtensa: |
| 499 | disassemble = print_insn_xtensa; |
| 500 | break; |
| 501 | #endif |
| 502 | #ifdef ARCH_z80 |
| 503 | case bfd_arch_z80: |
| 504 | disassemble = print_insn_z80; |
| 505 | break; |
| 506 | #endif |
| 507 | #ifdef ARCH_z8k |
| 508 | case bfd_arch_z8k: |
| 509 | if (mach == bfd_mach_z8001) |
| 510 | disassemble = print_insn_z8001; |
| 511 | else |
| 512 | disassemble = print_insn_z8002; |
| 513 | break; |
| 514 | #endif |
| 515 | #ifdef ARCH_vax |
| 516 | case bfd_arch_vax: |
| 517 | disassemble = print_insn_vax; |
| 518 | break; |
| 519 | #endif |
| 520 | #ifdef ARCH_visium |
| 521 | case bfd_arch_visium: |
| 522 | disassemble = print_insn_visium; |
| 523 | break; |
| 524 | #endif |
| 525 | #ifdef ARCH_frv |
| 526 | case bfd_arch_frv: |
| 527 | disassemble = print_insn_frv; |
| 528 | break; |
| 529 | #endif |
| 530 | #ifdef ARCH_moxie |
| 531 | case bfd_arch_moxie: |
| 532 | disassemble = print_insn_moxie; |
| 533 | break; |
| 534 | #endif |
| 535 | #ifdef ARCH_iq2000 |
| 536 | case bfd_arch_iq2000: |
| 537 | disassemble = print_insn_iq2000; |
| 538 | break; |
| 539 | #endif |
| 540 | #ifdef ARCH_m32c |
| 541 | case bfd_arch_m32c: |
| 542 | disassemble = print_insn_m32c; |
| 543 | break; |
| 544 | #endif |
| 545 | #ifdef ARCH_tilegx |
| 546 | case bfd_arch_tilegx: |
| 547 | disassemble = print_insn_tilegx; |
| 548 | break; |
| 549 | #endif |
| 550 | #ifdef ARCH_tilepro |
| 551 | case bfd_arch_tilepro: |
| 552 | disassemble = print_insn_tilepro; |
| 553 | break; |
| 554 | #endif |
| 555 | default: |
| 556 | return 0; |
| 557 | } |
| 558 | return disassemble; |
| 559 | } |
| 560 | |
| 561 | void |
| 562 | disassembler_usage (FILE *stream ATTRIBUTE_UNUSED) |
| 563 | { |
| 564 | #ifdef ARCH_aarch64 |
| 565 | print_aarch64_disassembler_options (stream); |
| 566 | #endif |
| 567 | #ifdef ARCH_arc |
| 568 | print_arc_disassembler_options (stream); |
| 569 | #endif |
| 570 | #ifdef ARCH_arm |
| 571 | print_arm_disassembler_options (stream); |
| 572 | #endif |
| 573 | #ifdef ARCH_mips |
| 574 | print_mips_disassembler_options (stream); |
| 575 | #endif |
| 576 | #ifdef ARCH_nfp |
| 577 | print_nfp_disassembler_options (stream); |
| 578 | #endif |
| 579 | #ifdef ARCH_powerpc |
| 580 | print_ppc_disassembler_options (stream); |
| 581 | #endif |
| 582 | #ifdef ARCH_riscv |
| 583 | print_riscv_disassembler_options (stream); |
| 584 | #endif |
| 585 | #ifdef ARCH_i386 |
| 586 | print_i386_disassembler_options (stream); |
| 587 | #endif |
| 588 | #ifdef ARCH_s390 |
| 589 | print_s390_disassembler_options (stream); |
| 590 | #endif |
| 591 | #ifdef ARCH_wasm32 |
| 592 | print_wasm32_disassembler_options (stream); |
| 593 | #endif |
| 594 | |
| 595 | return; |
| 596 | } |
| 597 | |
| 598 | void |
| 599 | disassemble_init_for_target (struct disassemble_info * info) |
| 600 | { |
| 601 | if (info == NULL) |
| 602 | return; |
| 603 | |
| 604 | switch (info->arch) |
| 605 | { |
| 606 | #ifdef ARCH_aarch64 |
| 607 | case bfd_arch_aarch64: |
| 608 | info->symbol_is_valid = aarch64_symbol_is_valid; |
| 609 | info->disassembler_needs_relocs = TRUE; |
| 610 | break; |
| 611 | #endif |
| 612 | #ifdef ARCH_arm |
| 613 | case bfd_arch_arm: |
| 614 | info->symbol_is_valid = arm_symbol_is_valid; |
| 615 | info->disassembler_needs_relocs = TRUE; |
| 616 | break; |
| 617 | #endif |
| 618 | #ifdef ARCH_csky |
| 619 | case bfd_arch_csky: |
| 620 | info->symbol_is_valid = csky_symbol_is_valid; |
| 621 | info->disassembler_needs_relocs = TRUE; |
| 622 | break; |
| 623 | #endif |
| 624 | |
| 625 | #ifdef ARCH_ia64 |
| 626 | case bfd_arch_ia64: |
| 627 | info->skip_zeroes = 16; |
| 628 | break; |
| 629 | #endif |
| 630 | #ifdef ARCH_tic4x |
| 631 | case bfd_arch_tic4x: |
| 632 | info->skip_zeroes = 32; |
| 633 | break; |
| 634 | #endif |
| 635 | #ifdef ARCH_mep |
| 636 | case bfd_arch_mep: |
| 637 | info->skip_zeroes = 256; |
| 638 | info->skip_zeroes_at_end = 0; |
| 639 | break; |
| 640 | #endif |
| 641 | #ifdef ARCH_metag |
| 642 | case bfd_arch_metag: |
| 643 | info->disassembler_needs_relocs = TRUE; |
| 644 | break; |
| 645 | #endif |
| 646 | #ifdef ARCH_m32c |
| 647 | case bfd_arch_m32c: |
| 648 | /* This processor in fact is little endian. The value set here |
| 649 | reflects the way opcodes are written in the cgen description. */ |
| 650 | info->endian = BFD_ENDIAN_BIG; |
| 651 | if (!info->private_data) |
| 652 | { |
| 653 | info->private_data = cgen_bitset_create (ISA_MAX); |
| 654 | if (info->mach == bfd_mach_m16c) |
| 655 | cgen_bitset_set (info->private_data, ISA_M16C); |
| 656 | else |
| 657 | cgen_bitset_set (info->private_data, ISA_M32C); |
| 658 | } |
| 659 | break; |
| 660 | #endif |
| 661 | #ifdef ARCH_bpf |
| 662 | case bfd_arch_bpf: |
| 663 | if (!info->private_data) |
| 664 | { |
| 665 | info->private_data = cgen_bitset_create (ISA_EBPFMAX); |
| 666 | if (info->endian == BFD_ENDIAN_BIG) |
| 667 | cgen_bitset_set (info->private_data, ISA_EBPFBE); |
| 668 | else |
| 669 | cgen_bitset_set (info->private_data, ISA_EBPFLE); |
| 670 | } |
| 671 | break; |
| 672 | #endif |
| 673 | #ifdef ARCH_pru |
| 674 | case bfd_arch_pru: |
| 675 | info->disassembler_needs_relocs = TRUE; |
| 676 | break; |
| 677 | #endif |
| 678 | #ifdef ARCH_powerpc |
| 679 | case bfd_arch_powerpc: |
| 680 | #endif |
| 681 | #ifdef ARCH_rs6000 |
| 682 | case bfd_arch_rs6000: |
| 683 | #endif |
| 684 | #if defined (ARCH_powerpc) || defined (ARCH_rs6000) |
| 685 | disassemble_init_powerpc (info); |
| 686 | break; |
| 687 | #endif |
| 688 | #ifdef ARCH_riscv |
| 689 | case bfd_arch_riscv: |
| 690 | info->symbol_is_valid = riscv_symbol_is_valid; |
| 691 | break; |
| 692 | #endif |
| 693 | #ifdef ARCH_wasm32 |
| 694 | case bfd_arch_wasm32: |
| 695 | disassemble_init_wasm32 (info); |
| 696 | break; |
| 697 | #endif |
| 698 | #ifdef ARCH_s390 |
| 699 | case bfd_arch_s390: |
| 700 | disassemble_init_s390 (info); |
| 701 | break; |
| 702 | #endif |
| 703 | #ifdef ARCH_nds32 |
| 704 | case bfd_arch_nds32: |
| 705 | disassemble_init_nds32 (info); |
| 706 | break; |
| 707 | #endif |
| 708 | default: |
| 709 | break; |
| 710 | } |
| 711 | } |
| 712 | |
| 713 | void |
| 714 | disassemble_free_target (struct disassemble_info *info) |
| 715 | { |
| 716 | if (info == NULL) |
| 717 | return; |
| 718 | |
| 719 | switch (info->arch) |
| 720 | { |
| 721 | default: |
| 722 | return; |
| 723 | |
| 724 | #ifdef ARCH_bpf |
| 725 | case bfd_arch_bpf: |
| 726 | #endif |
| 727 | #ifdef ARCH_m32c |
| 728 | case bfd_arch_m32c: |
| 729 | #endif |
| 730 | #if defined ARCH_bpf || defined ARCH_m32c |
| 731 | if (info->private_data) |
| 732 | { |
| 733 | CGEN_BITSET *mask = info->private_data; |
| 734 | free (mask->bits); |
| 735 | } |
| 736 | break; |
| 737 | #endif |
| 738 | |
| 739 | #ifdef ARCH_arc |
| 740 | case bfd_arch_arc: |
| 741 | break; |
| 742 | #endif |
| 743 | #ifdef ARCH_cris |
| 744 | case bfd_arch_cris: |
| 745 | break; |
| 746 | #endif |
| 747 | #ifdef ARCH_mmix |
| 748 | case bfd_arch_mmix: |
| 749 | break; |
| 750 | #endif |
| 751 | #ifdef ARCH_nfp |
| 752 | case bfd_arch_nfp: |
| 753 | break; |
| 754 | #endif |
| 755 | #ifdef ARCH_powerpc |
| 756 | case bfd_arch_powerpc: |
| 757 | break; |
| 758 | #endif |
| 759 | #ifdef ARCH_riscv |
| 760 | case bfd_arch_riscv: |
| 761 | break; |
| 762 | #endif |
| 763 | #ifdef ARCH_rs6000 |
| 764 | case bfd_arch_rs6000: |
| 765 | break; |
| 766 | #endif |
| 767 | } |
| 768 | |
| 769 | free (info->private_data); |
| 770 | } |
| 771 | |
| 772 | /* Remove whitespace and consecutive commas from OPTIONS. */ |
| 773 | |
| 774 | char * |
| 775 | remove_whitespace_and_extra_commas (char *options) |
| 776 | { |
| 777 | char *str; |
| 778 | size_t i, len; |
| 779 | |
| 780 | if (options == NULL) |
| 781 | return NULL; |
| 782 | |
| 783 | /* Strip off all trailing whitespace and commas. */ |
| 784 | for (len = strlen (options); len > 0; len--) |
| 785 | { |
| 786 | if (!ISSPACE (options[len - 1]) && options[len - 1] != ',') |
| 787 | break; |
| 788 | options[len - 1] = '\0'; |
| 789 | } |
| 790 | |
| 791 | /* Convert all remaining whitespace to commas. */ |
| 792 | for (i = 0; options[i] != '\0'; i++) |
| 793 | if (ISSPACE (options[i])) |
| 794 | options[i] = ','; |
| 795 | |
| 796 | /* Remove consecutive commas. */ |
| 797 | for (str = options; *str != '\0'; str++) |
| 798 | if (*str == ',' && (*(str + 1) == ',' || str == options)) |
| 799 | { |
| 800 | char *next = str + 1; |
| 801 | while (*next == ',') |
| 802 | next++; |
| 803 | len = strlen (next); |
| 804 | if (str != options) |
| 805 | str++; |
| 806 | memmove (str, next, len); |
| 807 | next[len - (size_t)(next - str)] = '\0'; |
| 808 | } |
| 809 | return (strlen (options) != 0) ? options : NULL; |
| 810 | } |
| 811 | |
| 812 | /* Like STRCMP, but treat ',' the same as '\0' so that we match |
| 813 | strings like "foobar" against "foobar,xxyyzz,...". */ |
| 814 | |
| 815 | int |
| 816 | disassembler_options_cmp (const char *s1, const char *s2) |
| 817 | { |
| 818 | unsigned char c1, c2; |
| 819 | |
| 820 | do |
| 821 | { |
| 822 | c1 = (unsigned char) *s1++; |
| 823 | if (c1 == ',') |
| 824 | c1 = '\0'; |
| 825 | c2 = (unsigned char) *s2++; |
| 826 | if (c2 == ',') |
| 827 | c2 = '\0'; |
| 828 | if (c1 == '\0') |
| 829 | return c1 - c2; |
| 830 | } |
| 831 | while (c1 == c2); |
| 832 | |
| 833 | return c1 - c2; |
| 834 | } |