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Fix AMDFAM10 POPCNT instruction
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
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1/* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
26
27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
33
34#include "dis-asm.h"
35#include "sysdep.h"
36#include "opintl.h"
37
38#define MAXLEN 15
39
40#include <setjmp.h>
41
42#ifndef UNIXWARE_COMPAT
43/* Set non-zero for broken, compatible instructions. Set to zero for
44 non-broken opcodes. */
45#define UNIXWARE_COMPAT 1
46#endif
47
48static int fetch_data (struct disassemble_info *, bfd_byte *);
49static void ckprefix (void);
50static const char *prefix_name (int, int);
51static int print_insn (bfd_vma, disassemble_info *);
52static void dofloat (int);
53static void OP_ST (int, int);
54static void OP_STi (int, int);
55static int putop (const char *, int);
56static void oappend (const char *);
57static void append_seg (void);
58static void OP_indirE (int, int);
59static void print_operand_value (char *, int, bfd_vma);
60static void OP_E (int, int);
61static void OP_G (int, int);
62static bfd_vma get64 (void);
63static bfd_signed_vma get32 (void);
64static bfd_signed_vma get32s (void);
65static int get16 (void);
66static void set_op (bfd_vma, int);
67static void OP_REG (int, int);
68static void OP_IMREG (int, int);
69static void OP_I (int, int);
70static void OP_I64 (int, int);
71static void OP_sI (int, int);
72static void OP_J (int, int);
73static void OP_SEG (int, int);
74static void OP_DIR (int, int);
75static void OP_OFF (int, int);
76static void OP_OFF64 (int, int);
77static void ptr_reg (int, int);
78static void OP_ESreg (int, int);
79static void OP_DSreg (int, int);
80static void OP_C (int, int);
81static void OP_D (int, int);
82static void OP_T (int, int);
83static void OP_Rd (int, int);
84static void OP_MMX (int, int);
85static void OP_XMM (int, int);
86static void OP_EM (int, int);
87static void OP_EX (int, int);
88static void OP_EMC (int,int);
89static void OP_MXC (int,int);
90static void OP_MS (int, int);
91static void OP_XS (int, int);
92static void OP_M (int, int);
93static void OP_VMX (int, int);
94static void OP_0fae (int, int);
95static void OP_0f07 (int, int);
96static void NOP_Fixup1 (int, int);
97static void NOP_Fixup2 (int, int);
98static void OP_3DNowSuffix (int, int);
99static void OP_SIMD_Suffix (int, int);
100static void SIMD_Fixup (int, int);
101static void PNI_Fixup (int, int);
102static void SVME_Fixup (int, int);
103static void INVLPG_Fixup (int, int);
104static void BadOp (void);
105static void SEG_Fixup (int, int);
106static void VMX_Fixup (int, int);
107static void REP_Fixup (int, int);
108
109struct dis_private {
110 /* Points to first byte not fetched. */
111 bfd_byte *max_fetched;
112 bfd_byte the_buffer[MAXLEN];
113 bfd_vma insn_start;
114 int orig_sizeflag;
115 jmp_buf bailout;
116};
117
118/* The opcode for the fwait instruction, which we treat as a prefix
119 when we can. */
120#define FWAIT_OPCODE (0x9b)
121
122enum address_mode
123{
124 mode_16bit,
125 mode_32bit,
126 mode_64bit
127};
128
129enum address_mode address_mode;
130
131/* Flags for the prefixes for the current instruction. See below. */
132static int prefixes;
133
134/* REX prefix the current instruction. See below. */
135static int rex;
136/* Bits of REX we've already used. */
137static int rex_used;
138#define REX_MODE64 8
139#define REX_EXTX 4
140#define REX_EXTY 2
141#define REX_EXTZ 1
142/* Mark parts used in the REX prefix. When we are testing for
143 empty prefix (for 8bit register REX extension), just mask it
144 out. Otherwise test for REX bit is excuse for existence of REX
145 only in case value is nonzero. */
146#define USED_REX(value) \
147 { \
148 if (value) \
149 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
150 else \
151 rex_used |= 0x40; \
152 }
153
154/* Flags for prefixes which we somehow handled when printing the
155 current instruction. */
156static int used_prefixes;
157
158/* Flags stored in PREFIXES. */
159#define PREFIX_REPZ 1
160#define PREFIX_REPNZ 2
161#define PREFIX_LOCK 4
162#define PREFIX_CS 8
163#define PREFIX_SS 0x10
164#define PREFIX_DS 0x20
165#define PREFIX_ES 0x40
166#define PREFIX_FS 0x80
167#define PREFIX_GS 0x100
168#define PREFIX_DATA 0x200
169#define PREFIX_ADDR 0x400
170#define PREFIX_FWAIT 0x800
171
172/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
173 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
174 on error. */
175#define FETCH_DATA(info, addr) \
176 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
177 ? 1 : fetch_data ((info), (addr)))
178
179static int
180fetch_data (struct disassemble_info *info, bfd_byte *addr)
181{
182 int status;
183 struct dis_private *priv = (struct dis_private *) info->private_data;
184 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
185
186 if (addr <= priv->the_buffer + MAXLEN)
187 status = (*info->read_memory_func) (start,
188 priv->max_fetched,
189 addr - priv->max_fetched,
190 info);
191 else
192 status = -1;
193 if (status != 0)
194 {
195 /* If we did manage to read at least one byte, then
196 print_insn_i386 will do something sensible. Otherwise, print
197 an error. We do that here because this is where we know
198 STATUS. */
199 if (priv->max_fetched == priv->the_buffer)
200 (*info->memory_error_func) (status, start, info);
201 longjmp (priv->bailout, 1);
202 }
203 else
204 priv->max_fetched = addr;
205 return 1;
206}
207
208#define XX NULL, 0
209
210#define Eb OP_E, b_mode
211#define Ev OP_E, v_mode
212#define Ed OP_E, d_mode
213#define Eq OP_E, q_mode
214#define Edq OP_E, dq_mode
215#define Edqw OP_E, dqw_mode
216#define indirEv OP_indirE, stack_v_mode
217#define indirEp OP_indirE, f_mode
218#define stackEv OP_E, stack_v_mode
219#define Em OP_E, m_mode
220#define Ew OP_E, w_mode
221#define Ma OP_E, v_mode
222#define M OP_M, 0 /* lea, lgdt, etc. */
223#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
224#define Gb OP_G, b_mode
225#define Gv OP_G, v_mode
226#define Gd OP_G, d_mode
227#define Gdq OP_G, dq_mode
228#define Gm OP_G, m_mode
229#define Gw OP_G, w_mode
230#define Rd OP_Rd, d_mode
231#define Rm OP_Rd, m_mode
232#define Ib OP_I, b_mode
233#define sIb OP_sI, b_mode /* sign extened byte */
234#define Iv OP_I, v_mode
235#define Iq OP_I, q_mode
236#define Iv64 OP_I64, v_mode
237#define Iw OP_I, w_mode
238#define I1 OP_I, const_1_mode
239#define Jb OP_J, b_mode
240#define Jv OP_J, v_mode
241#define Cm OP_C, m_mode
242#define Dm OP_D, m_mode
243#define Td OP_T, d_mode
244#define Sv SEG_Fixup, v_mode
245
246#define RMeAX OP_REG, eAX_reg
247#define RMeBX OP_REG, eBX_reg
248#define RMeCX OP_REG, eCX_reg
249#define RMeDX OP_REG, eDX_reg
250#define RMeSP OP_REG, eSP_reg
251#define RMeBP OP_REG, eBP_reg
252#define RMeSI OP_REG, eSI_reg
253#define RMeDI OP_REG, eDI_reg
254#define RMrAX OP_REG, rAX_reg
255#define RMrBX OP_REG, rBX_reg
256#define RMrCX OP_REG, rCX_reg
257#define RMrDX OP_REG, rDX_reg
258#define RMrSP OP_REG, rSP_reg
259#define RMrBP OP_REG, rBP_reg
260#define RMrSI OP_REG, rSI_reg
261#define RMrDI OP_REG, rDI_reg
262#define RMAL OP_REG, al_reg
263#define RMAL OP_REG, al_reg
264#define RMCL OP_REG, cl_reg
265#define RMDL OP_REG, dl_reg
266#define RMBL OP_REG, bl_reg
267#define RMAH OP_REG, ah_reg
268#define RMCH OP_REG, ch_reg
269#define RMDH OP_REG, dh_reg
270#define RMBH OP_REG, bh_reg
271#define RMAX OP_REG, ax_reg
272#define RMDX OP_REG, dx_reg
273
274#define eAX OP_IMREG, eAX_reg
275#define eBX OP_IMREG, eBX_reg
276#define eCX OP_IMREG, eCX_reg
277#define eDX OP_IMREG, eDX_reg
278#define eSP OP_IMREG, eSP_reg
279#define eBP OP_IMREG, eBP_reg
280#define eSI OP_IMREG, eSI_reg
281#define eDI OP_IMREG, eDI_reg
282#define AL OP_IMREG, al_reg
283#define CL OP_IMREG, cl_reg
284#define DL OP_IMREG, dl_reg
285#define BL OP_IMREG, bl_reg
286#define AH OP_IMREG, ah_reg
287#define CH OP_IMREG, ch_reg
288#define DH OP_IMREG, dh_reg
289#define BH OP_IMREG, bh_reg
290#define AX OP_IMREG, ax_reg
291#define DX OP_IMREG, dx_reg
292#define indirDX OP_IMREG, indir_dx_reg
293
294#define Sw OP_SEG, w_mode
295#define Ap OP_DIR, 0
296#define Ob OP_OFF64, b_mode
297#define Ov OP_OFF64, v_mode
298#define Xb OP_DSreg, eSI_reg
299#define Xv OP_DSreg, eSI_reg
300#define Yb OP_ESreg, eDI_reg
301#define Yv OP_ESreg, eDI_reg
302#define DSBX OP_DSreg, eBX_reg
303
304#define es OP_REG, es_reg
305#define ss OP_REG, ss_reg
306#define cs OP_REG, cs_reg
307#define ds OP_REG, ds_reg
308#define fs OP_REG, fs_reg
309#define gs OP_REG, gs_reg
310
311#define MX OP_MMX, 0
312#define XM OP_XMM, 0
313#define EM OP_EM, v_mode
314#define EX OP_EX, v_mode
315#define MS OP_MS, v_mode
316#define XS OP_XS, v_mode
317#define EMC OP_EMC, v_mode
318#define MXC OP_MXC, 0
319#define VM OP_VMX, q_mode
320#define OPSUF OP_3DNowSuffix, 0
321#define OPSIMD OP_SIMD_Suffix, 0
322
323/* Used handle "rep" prefix for string instructions. */
324#define Xbr REP_Fixup, eSI_reg
325#define Xvr REP_Fixup, eSI_reg
326#define Ybr REP_Fixup, eDI_reg
327#define Yvr REP_Fixup, eDI_reg
328#define indirDXr REP_Fixup, indir_dx_reg
329#define ALr REP_Fixup, al_reg
330#define eAXr REP_Fixup, eAX_reg
331
332#define cond_jump_flag NULL, cond_jump_mode
333#define loop_jcxz_flag NULL, loop_jcxz_mode
334
335/* bits in sizeflag */
336#define SUFFIX_ALWAYS 4
337#define AFLAG 2
338#define DFLAG 1
339
340#define b_mode 1 /* byte operand */
341#define v_mode 2 /* operand size depends on prefixes */
342#define w_mode 3 /* word operand */
343#define d_mode 4 /* double word operand */
344#define q_mode 5 /* quad word operand */
345#define t_mode 6 /* ten-byte operand */
346#define x_mode 7 /* 16-byte XMM operand */
347#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
348#define cond_jump_mode 9
349#define loop_jcxz_mode 10
350#define dq_mode 11 /* operand size depends on REX prefixes. */
351#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
352#define f_mode 13 /* 4- or 6-byte pointer operand */
353#define const_1_mode 14
354#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
355
356#define es_reg 100
357#define cs_reg 101
358#define ss_reg 102
359#define ds_reg 103
360#define fs_reg 104
361#define gs_reg 105
362
363#define eAX_reg 108
364#define eCX_reg 109
365#define eDX_reg 110
366#define eBX_reg 111
367#define eSP_reg 112
368#define eBP_reg 113
369#define eSI_reg 114
370#define eDI_reg 115
371
372#define al_reg 116
373#define cl_reg 117
374#define dl_reg 118
375#define bl_reg 119
376#define ah_reg 120
377#define ch_reg 121
378#define dh_reg 122
379#define bh_reg 123
380
381#define ax_reg 124
382#define cx_reg 125
383#define dx_reg 126
384#define bx_reg 127
385#define sp_reg 128
386#define bp_reg 129
387#define si_reg 130
388#define di_reg 131
389
390#define rAX_reg 132
391#define rCX_reg 133
392#define rDX_reg 134
393#define rBX_reg 135
394#define rSP_reg 136
395#define rBP_reg 137
396#define rSI_reg 138
397#define rDI_reg 139
398
399#define indir_dx_reg 150
400
401#define FLOATCODE 1
402#define USE_GROUPS 2
403#define USE_PREFIX_USER_TABLE 3
404#define X86_64_SPECIAL 4
405#define IS_3BYTE_OPCODE 5
406
407#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0, NULL, 0
408
409#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0, NULL, 0
410#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0, NULL, 0
411#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0, NULL, 0
412#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0, NULL, 0
413#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0, NULL, 0
414#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0, NULL, 0
415#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0, NULL, 0
416#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0, NULL, 0
417#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0, NULL, 0
418#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0, NULL, 0
419#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0, NULL, 0
420#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0, NULL, 0
421#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0, NULL, 0
422#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0, NULL, 0
423#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0, NULL, 0
424#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0, NULL, 0
425#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0, NULL, 0
426#define GRP11_C6 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0, NULL, 0
427#define GRP11_C7 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0, NULL, 0
428#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0, NULL, 0
429#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0, NULL, 0
430#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0, NULL, 0
431#define GRP15 NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0, NULL, 0
432#define GRP16 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0, NULL, 0
433#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0, NULL, 0
434#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 25, NULL, 0, NULL, 0
435#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 26, NULL, 0, NULL, 0
436
437#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0, NULL, 0
438#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0, NULL, 0
439#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0, NULL, 0
440#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0, NULL, 0
441#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0, NULL, 0
442#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0, NULL, 0
443#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0, NULL, 0
444#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0, NULL, 0
445#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0, NULL, 0
446#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0, NULL, 0
447#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0, NULL, 0
448#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0, NULL, 0
449#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0, NULL, 0
450#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0, NULL, 0
451#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0, NULL, 0
452#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0, NULL, 0
453#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0, NULL, 0
454#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0, NULL, 0
455#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0, NULL, 0
456#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0, NULL, 0
457#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0, NULL, 0
458#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0, NULL, 0
459#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0, NULL, 0
460#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0, NULL, 0
461#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0, NULL, 0
462#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0, NULL, 0
463#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0, NULL, 0
464#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0, NULL, 0
465#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0, NULL, 0
466#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0, NULL, 0
467#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0, NULL, 0
468#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0, NULL, 0
469#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0, NULL, 0
470#define PREGRP33 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 33, NULL, 0, NULL, 0
471#define PREGRP34 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 34, NULL, 0, NULL, 0
472#define PREGRP35 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 35, NULL, 0, NULL, 0
473#define PREGRP36 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 36, NULL, 0, NULL, 0
474#define PREGRP37 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 37, NULL, 0, NULL, 0
475
476
477#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0, NULL, 0
478
479#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0, NULL, 0
480#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0, NULL, 0
481
482typedef void (*op_rtn) (int bytemode, int sizeflag);
483
484struct dis386 {
485 const char *name;
486 op_rtn op1;
487 int bytemode1;
488 op_rtn op2;
489 int bytemode2;
490 op_rtn op3;
491 int bytemode3;
492 op_rtn op4;
493 int bytemode4;
494};
495
496/* Upper case letters in the instruction names here are macros.
497 'A' => print 'b' if no register operands or suffix_always is true
498 'B' => print 'b' if suffix_always is true
499 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
500 . size prefix
501 'E' => print 'e' if 32-bit form of jcxz
502 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
503 'H' => print ",pt" or ",pn" branch hint
504 'I' => honor following macro letter even in Intel mode (implemented only
505 . for some of the macro letters)
506 'J' => print 'l'
507 'L' => print 'l' if suffix_always is true
508 'N' => print 'n' if instruction has no wait "prefix"
509 'O' => print 'd', or 'o'
510 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
511 . or suffix_always is true. print 'q' if rex prefix is present.
512 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
513 . is true
514 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
515 'S' => print 'w', 'l' or 'q' if suffix_always is true
516 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
517 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
518 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
519 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
520 'X' => print 's', 'd' depending on data16 prefix (for XMM)
521 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
522 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
523
524 Many of the above letters print nothing in Intel mode. See "putop"
525 for the details.
526
527 Braces '{' and '}', and vertical bars '|', indicate alternative
528 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
529 modes. In cases where there are only two alternatives, the X86_64
530 instruction is reserved, and "(bad)" is printed.
531*/
532
533static const struct dis386 dis386[] = {
534 /* 00 */
535 { "addB", Eb, Gb, XX, XX },
536 { "addS", Ev, Gv, XX, XX },
537 { "addB", Gb, Eb, XX, XX },
538 { "addS", Gv, Ev, XX, XX },
539 { "addB", AL, Ib, XX, XX },
540 { "addS", eAX, Iv, XX, XX },
541 { "push{T|}", es, XX, XX, XX },
542 { "pop{T|}", es, XX, XX, XX },
543 /* 08 */
544 { "orB", Eb, Gb, XX, XX },
545 { "orS", Ev, Gv, XX, XX },
546 { "orB", Gb, Eb, XX, XX },
547 { "orS", Gv, Ev, XX , XX},
548 { "orB", AL, Ib, XX, XX },
549 { "orS", eAX, Iv, XX, XX },
550 { "push{T|}", cs, XX, XX, XX },
551 { "(bad)", XX, XX, XX, XX }, /* 0x0f extended opcode escape */
552 /* 10 */
553 { "adcB", Eb, Gb, XX, XX },
554 { "adcS", Ev, Gv, XX, XX },
555 { "adcB", Gb, Eb, XX, XX },
556 { "adcS", Gv, Ev, XX, XX },
557 { "adcB", AL, Ib, XX, XX },
558 { "adcS", eAX, Iv, XX, XX },
559 { "push{T|}", ss, XX, XX, XX },
560 { "pop{T|}", ss, XX, XX, XX },
561 /* 18 */
562 { "sbbB", Eb, Gb, XX, XX },
563 { "sbbS", Ev, Gv, XX, XX },
564 { "sbbB", Gb, Eb, XX, XX },
565 { "sbbS", Gv, Ev, XX, XX },
566 { "sbbB", AL, Ib, XX, XX },
567 { "sbbS", eAX, Iv, XX, XX },
568 { "push{T|}", ds, XX, XX, XX },
569 { "pop{T|}", ds, XX, XX, XX },
570 /* 20 */
571 { "andB", Eb, Gb, XX, XX },
572 { "andS", Ev, Gv, XX, XX },
573 { "andB", Gb, Eb, XX, XX },
574 { "andS", Gv, Ev, XX, XX },
575 { "andB", AL, Ib, XX, XX },
576 { "andS", eAX, Iv, XX, XX },
577 { "(bad)", XX, XX, XX, XX }, /* SEG ES prefix */
578 { "daa{|}", XX, XX, XX, XX },
579 /* 28 */
580 { "subB", Eb, Gb, XX, XX },
581 { "subS", Ev, Gv, XX, XX},
582 { "subB", Gb, Eb, XX, XX },
583 { "subS", Gv, Ev, XX, XX },
584 { "subB", AL, Ib, XX, XX },
585 { "subS", eAX, Iv, XX, XX },
586 { "(bad)", XX, XX, XX, XX }, /* SEG CS prefix */
587 { "das{|}", XX, XX, XX, XX },
588 /* 30 */
589 { "xorB", Eb, Gb, XX, XX },
590 { "xorS", Ev, Gv, XX, XX },
591 { "xorB", Gb, Eb, XX, XX },
592 { "xorS", Gv, Ev, XX, XX },
593 { "xorB", AL, Ib, XX, XX },
594 { "xorS", eAX, Iv, XX, XX },
595 { "(bad)", XX, XX, XX, XX }, /* SEG SS prefix */
596 { "aaa{|}", XX, XX, XX, XX },
597 /* 38 */
598 { "cmpB", Eb, Gb, XX, XX },
599 { "cmpS", Ev, Gv, XX, XX },
600 { "cmpB", Gb, Eb, XX, XX },
601 { "cmpS", Gv, Ev, XX, XX },
602 { "cmpB", AL, Ib, XX, XX },
603 { "cmpS", eAX, Iv, XX, XX },
604 { "(bad)", XX, XX, XX, XX }, /* SEG DS prefix */
605 { "aas{|}", XX, XX, XX, XX },
606 /* 40 */
607 { "inc{S|}", RMeAX, XX, XX, XX },
608 { "inc{S|}", RMeCX, XX, XX, XX },
609 { "inc{S|}", RMeDX, XX, XX, XX },
610 { "inc{S|}", RMeBX, XX, XX, XX },
611 { "inc{S|}", RMeSP, XX, XX, XX },
612 { "inc{S|}", RMeBP, XX, XX, XX },
613 { "inc{S|}", RMeSI, XX, XX, XX },
614 { "inc{S|}", RMeDI, XX, XX, XX },
615 /* 48 */
616 { "dec{S|}", RMeAX, XX, XX, XX },
617 { "dec{S|}", RMeCX, XX, XX, XX },
618 { "dec{S|}", RMeDX, XX, XX, XX },
619 { "dec{S|}", RMeBX, XX, XX, XX },
620 { "dec{S|}", RMeSP, XX, XX, XX },
621 { "dec{S|}", RMeBP, XX, XX, XX },
622 { "dec{S|}", RMeSI, XX, XX, XX },
623 { "dec{S|}", RMeDI, XX, XX, XX },
624 /* 50 */
625 { "pushV", RMrAX, XX, XX, XX },
626 { "pushV", RMrCX, XX, XX, XX },
627 { "pushV", RMrDX, XX, XX, XX },
628 { "pushV", RMrBX, XX, XX, XX },
629 { "pushV", RMrSP, XX, XX, XX },
630 { "pushV", RMrBP, XX, XX, XX },
631 { "pushV", RMrSI, XX, XX, XX },
632 { "pushV", RMrDI, XX, XX, XX },
633 /* 58 */
634 { "popV", RMrAX, XX, XX, XX },
635 { "popV", RMrCX, XX, XX, XX },
636 { "popV", RMrDX, XX, XX, XX },
637 { "popV", RMrBX, XX, XX, XX },
638 { "popV", RMrSP, XX, XX, XX },
639 { "popV", RMrBP, XX, XX, XX },
640 { "popV", RMrSI, XX, XX, XX },
641 { "popV", RMrDI, XX, XX, XX },
642 /* 60 */
643 { "pusha{P|}", XX, XX, XX, XX},
644 { "popa{P|}", XX, XX, XX, XX },
645 { "bound{S|}", Gv, Ma, XX, XX },
646 { X86_64_0 },
647 { "(bad)", XX, XX, XX, XX }, /* seg fs */
648 { "(bad)", XX, XX, XX, XX }, /* seg gs */
649 { "(bad)", XX, XX, XX, XX }, /* op size prefix */
650 { "(bad)", XX, XX, XX, XX }, /* adr size prefix */
651 /* 68 */
652 { "pushT", Iq, XX, XX, XX },
653 { "imulS", Gv, Ev, Iv, XX },
654 { "pushT", sIb, XX, XX, XX },
655 { "imulS", Gv, Ev, sIb, XX },
656 { "ins{b||b|}", Ybr, indirDX, XX, XX },
657 { "ins{R||R|}", Yvr, indirDX, XX, XX },
658 { "outs{b||b|}", indirDXr, Xb, XX, XX },
659 { "outs{R||R|}", indirDXr, Xv, XX, XX },
660 /* 70 */
661 { "joH", Jb, XX, cond_jump_flag, XX },
662 { "jnoH", Jb, XX, cond_jump_flag, XX },
663 { "jbH", Jb, XX, cond_jump_flag, XX },
664 { "jaeH", Jb, XX, cond_jump_flag, XX },
665 { "jeH", Jb, XX, cond_jump_flag, XX },
666 { "jneH", Jb, XX, cond_jump_flag, XX },
667 { "jbeH", Jb, XX, cond_jump_flag, XX },
668 { "jaH", Jb, XX, cond_jump_flag, XX },
669 /* 78 */
670 { "jsH", Jb, XX, cond_jump_flag, XX },
671 { "jnsH", Jb, XX, cond_jump_flag, XX },
672 { "jpH", Jb, XX, cond_jump_flag, XX },
673 { "jnpH", Jb, XX, cond_jump_flag, XX },
674 { "jlH", Jb, XX, cond_jump_flag, XX },
675 { "jgeH", Jb, XX, cond_jump_flag, XX },
676 { "jleH", Jb, XX, cond_jump_flag, XX },
677 { "jgH", Jb, XX, cond_jump_flag, XX },
678 /* 80 */
679 { GRP1b },
680 { GRP1S },
681 { "(bad)", XX, XX, XX, XX },
682 { GRP1Ss },
683 { "testB", Eb, Gb, XX, XX },
684 { "testS", Ev, Gv, XX, XX },
685 { "xchgB", Eb, Gb, XX, XX },
686 { "xchgS", Ev, Gv, XX, XX },
687 /* 88 */
688 { "movB", Eb, Gb, XX, XX },
689 { "movS", Ev, Gv, XX, XX },
690 { "movB", Gb, Eb, XX, XX },
691 { "movS", Gv, Ev, XX, XX },
692 { "movQ", Sv, Sw, XX, XX },
693 { "leaS", Gv, M, XX, XX },
694 { "movQ", Sw, Sv, XX, XX },
695 { "popU", stackEv, XX, XX, XX },
696 /* 90 */
697 { "xchgS", NOP_Fixup1, eAX_reg, NOP_Fixup2, eAX_reg, XX, XX },
698 { "xchgS", RMeCX, eAX, XX, XX },
699 { "xchgS", RMeDX, eAX, XX, XX },
700 { "xchgS", RMeBX, eAX, XX, XX },
701 { "xchgS", RMeSP, eAX, XX, XX },
702 { "xchgS", RMeBP, eAX, XX, XX },
703 { "xchgS", RMeSI, eAX, XX, XX },
704 { "xchgS", RMeDI, eAX, XX, XX },
705 /* 98 */
706 { "cW{tR||tR|}", XX, XX, XX, XX },
707 { "cR{tO||tO|}", XX, XX, XX, XX },
708 { "Jcall{T|}", Ap, XX, XX, XX },
709 { "(bad)", XX, XX, XX, XX }, /* fwait */
710 { "pushfT", XX, XX, XX, XX },
711 { "popfT", XX, XX, XX, XX },
712 { "sahf{|}", XX, XX, XX, XX },
713 { "lahf{|}", XX, XX, XX, XX },
714 /* a0 */
715 { "movB", AL, Ob, XX, XX },
716 { "movS", eAX, Ov, XX, XX },
717 { "movB", Ob, AL, XX, XX },
718 { "movS", Ov, eAX, XX, XX },
719 { "movs{b||b|}", Ybr, Xb, XX, XX },
720 { "movs{R||R|}", Yvr, Xv, XX, XX },
721 { "cmps{b||b|}", Xb, Yb, XX, XX },
722 { "cmps{R||R|}", Xv, Yv, XX, XX },
723 /* a8 */
724 { "testB", AL, Ib, XX, XX },
725 { "testS", eAX, Iv, XX, XX },
726 { "stosB", Ybr, AL, XX, XX },
727 { "stosS", Yvr, eAX, XX, XX },
728 { "lodsB", ALr, Xb, XX, XX },
729 { "lodsS", eAXr, Xv, XX, XX },
730 { "scasB", AL, Yb, XX, XX },
731 { "scasS", eAX, Yv, XX, XX },
732 /* b0 */
733 { "movB", RMAL, Ib, XX, XX },
734 { "movB", RMCL, Ib, XX, XX },
735 { "movB", RMDL, Ib, XX, XX },
736 { "movB", RMBL, Ib, XX, XX },
737 { "movB", RMAH, Ib, XX, XX },
738 { "movB", RMCH, Ib, XX, XX },
739 { "movB", RMDH, Ib, XX, XX },
740 { "movB", RMBH, Ib, XX, XX },
741 /* b8 */
742 { "movS", RMeAX, Iv64, XX, XX },
743 { "movS", RMeCX, Iv64, XX, XX },
744 { "movS", RMeDX, Iv64, XX, XX },
745 { "movS", RMeBX, Iv64, XX, XX },
746 { "movS", RMeSP, Iv64, XX, XX },
747 { "movS", RMeBP, Iv64, XX, XX },
748 { "movS", RMeSI, Iv64, XX, XX },
749 { "movS", RMeDI, Iv64, XX, XX },
750 /* c0 */
751 { GRP2b },
752 { GRP2S },
753 { "retT", Iw, XX, XX, XX },
754 { "retT", XX, XX, XX, XX },
755 { "les{S|}", Gv, Mp, XX, XX },
756 { "ldsS", Gv, Mp, XX, XX },
757 { GRP11_C6 },
758 { GRP11_C7 },
759 /* c8 */
760 { "enterT", Iw, Ib, XX, XX },
761 { "leaveT", XX, XX, XX, XX },
762 { "lretP", Iw, XX, XX, XX },
763 { "lretP", XX, XX, XX, XX },
764 { "int3", XX, XX, XX, XX },
765 { "int", Ib, XX, XX, XX },
766 { "into{|}", XX, XX, XX, XX },
767 { "iretP", XX, XX, XX, XX },
768 /* d0 */
769 { GRP2b_one },
770 { GRP2S_one },
771 { GRP2b_cl },
772 { GRP2S_cl },
773 { "aam{|}", sIb, XX, XX, XX },
774 { "aad{|}", sIb, XX, XX, XX },
775 { "(bad)", XX, XX, XX, XX },
776 { "xlat", DSBX, XX, XX, XX },
777 /* d8 */
778 { FLOAT },
779 { FLOAT },
780 { FLOAT },
781 { FLOAT },
782 { FLOAT },
783 { FLOAT },
784 { FLOAT },
785 { FLOAT },
786 /* e0 */
787 { "loopneFH", Jb, XX, loop_jcxz_flag, XX },
788 { "loopeFH", Jb, XX, loop_jcxz_flag, XX },
789 { "loopFH", Jb, XX, loop_jcxz_flag, XX },
790 { "jEcxzH", Jb, XX, loop_jcxz_flag, XX },
791 { "inB", AL, Ib, XX, XX },
792 { "inS", eAX, Ib, XX, XX },
793 { "outB", Ib, AL, XX, XX },
794 { "outS", Ib, eAX, XX, XX },
795 /* e8 */
796 { "callT", Jv, XX, XX, XX },
797 { "jmpT", Jv, XX, XX, XX },
798 { "Jjmp{T|}", Ap, XX, XX, XX },
799 { "jmp", Jb, XX, XX, XX },
800 { "inB", AL, indirDX, XX, XX },
801 { "inS", eAX, indirDX, XX, XX },
802 { "outB", indirDX, AL, XX, XX },
803 { "outS", indirDX, eAX, XX, XX },
804 /* f0 */
805 { "(bad)", XX, XX, XX, XX }, /* lock prefix */
806 { "icebp", XX, XX, XX, XX },
807 { "(bad)", XX, XX, XX, XX }, /* repne */
808 { "(bad)", XX, XX, XX, XX }, /* repz */
809 { "hlt", XX, XX, XX, XX },
810 { "cmc", XX, XX, XX, XX },
811 { GRP3b },
812 { GRP3S },
813 /* f8 */
814 { "clc", XX, XX, XX, XX },
815 { "stc", XX, XX, XX, XX },
816 { "cli", XX, XX, XX, XX },
817 { "sti", XX, XX, XX, XX },
818 { "cld", XX, XX, XX, XX },
819 { "std", XX, XX, XX, XX },
820 { GRP4 },
821 { GRP5 },
822};
823
824static const struct dis386 dis386_twobyte[] = {
825 /* 00 */
826 { GRP6 },
827 { GRP7 },
828 { "larS", Gv, Ew, XX, XX },
829 { "lslS", Gv, Ew, XX, XX },
830 { "(bad)", XX, XX, XX, XX },
831 { "syscall", XX, XX, XX, XX },
832 { "clts", XX, XX, XX, XX },
833 { "sysretP", XX, XX, XX, XX },
834 /* 08 */
835 { "invd", XX, XX, XX, XX},
836 { "wbinvd", XX, XX, XX, XX },
837 { "(bad)", XX, XX, XX, XX },
838 { "ud2a", XX, XX, XX, XX },
839 { "(bad)", XX, XX, XX, XX },
840 { GRPAMD },
841 { "femms", XX, XX, XX, XX },
842 { "", MX, EM, OPSUF, XX }, /* See OP_3DNowSuffix. */
843 /* 10 */
844 { PREGRP8 },
845 { PREGRP9 },
846 { PREGRP30 },
847 { "movlpX", EX, XM, SIMD_Fixup, 'h', XX },
848 { "unpcklpX", XM, EX, XX, XX },
849 { "unpckhpX", XM, EX, XX, XX },
850 { PREGRP31 },
851 { "movhpX", EX, XM, SIMD_Fixup, 'l', XX },
852 /* 18 */
853 { GRP16 },
854 { "(bad)", XX, XX, XX, XX },
855 { "(bad)", XX, XX, XX, XX },
856 { "(bad)", XX, XX, XX, XX },
857 { "(bad)", XX, XX, XX, XX },
858 { "(bad)", XX, XX, XX, XX },
859 { "(bad)", XX, XX, XX, XX },
860 { "nopQ", Ev, XX, XX, XX },
861 /* 20 */
862 { "movZ", Rm, Cm, XX, XX },
863 { "movZ", Rm, Dm, XX, XX },
864 { "movZ", Cm, Rm, XX, XX },
865 { "movZ", Dm, Rm, XX, XX },
866 { "movL", Rd, Td, XX, XX },
867 { "(bad)", XX, XX, XX, XX },
868 { "movL", Td, Rd, XX, XX },
869 { "(bad)", XX, XX, XX, XX },
870 /* 28 */
871 { "movapX", XM, EX, XX, XX },
872 { "movapX", EX, XM, XX, XX },
873 { PREGRP2 },
874 { PREGRP33 },
875 { PREGRP4 },
876 { PREGRP3 },
877 { "ucomisX", XM,EX, XX, XX },
878 { "comisX", XM,EX, XX, XX },
879 /* 30 */
880 { "wrmsr", XX, XX, XX, XX },
881 { "rdtsc", XX, XX, XX, XX },
882 { "rdmsr", XX, XX, XX, XX },
883 { "rdpmc", XX, XX, XX, XX },
884 { "sysenter", XX, XX, XX, XX },
885 { "sysexit", XX, XX, XX, XX },
886 { "(bad)", XX, XX, XX, XX },
887 { "(bad)", XX, XX, XX, XX },
888 /* 38 */
889 { THREE_BYTE_0 },
890 { "(bad)", XX, XX, XX, XX },
891 { THREE_BYTE_1 },
892 { "(bad)", XX, XX, XX, XX },
893 { "(bad)", XX, XX, XX, XX },
894 { "(bad)", XX, XX, XX, XX },
895 { "(bad)", XX, XX, XX, XX },
896 { "(bad)", XX, XX, XX, XX },
897 /* 40 */
898 { "cmovo", Gv, Ev, XX, XX },
899 { "cmovno", Gv, Ev, XX, XX },
900 { "cmovb", Gv, Ev, XX, XX },
901 { "cmovae", Gv, Ev, XX, XX },
902 { "cmove", Gv, Ev, XX, XX },
903 { "cmovne", Gv, Ev, XX, XX },
904 { "cmovbe", Gv, Ev, XX, XX },
905 { "cmova", Gv, Ev, XX, XX },
906 /* 48 */
907 { "cmovs", Gv, Ev, XX, XX },
908 { "cmovns", Gv, Ev, XX, XX },
909 { "cmovp", Gv, Ev, XX, XX },
910 { "cmovnp", Gv, Ev, XX, XX },
911 { "cmovl", Gv, Ev, XX, XX },
912 { "cmovge", Gv, Ev, XX, XX },
913 { "cmovle", Gv, Ev, XX, XX },
914 { "cmovg", Gv, Ev, XX, XX },
915 /* 50 */
916 { "movmskpX", Gdq, XS, XX, XX },
917 { PREGRP13 },
918 { PREGRP12 },
919 { PREGRP11 },
920 { "andpX", XM, EX, XX, XX },
921 { "andnpX", XM, EX, XX, XX },
922 { "orpX", XM, EX, XX, XX },
923 { "xorpX", XM, EX, XX, XX },
924 /* 58 */
925 { PREGRP0 },
926 { PREGRP10 },
927 { PREGRP17 },
928 { PREGRP16 },
929 { PREGRP14 },
930 { PREGRP7 },
931 { PREGRP5 },
932 { PREGRP6 },
933 /* 60 */
934 { "punpcklbw", MX, EM, XX, XX },
935 { "punpcklwd", MX, EM, XX, XX },
936 { "punpckldq", MX, EM, XX, XX },
937 { "packsswb", MX, EM, XX, XX },
938 { "pcmpgtb", MX, EM, XX, XX },
939 { "pcmpgtw", MX, EM, XX, XX },
940 { "pcmpgtd", MX, EM, XX, XX },
941 { "packuswb", MX, EM, XX, XX },
942 /* 68 */
943 { "punpckhbw", MX, EM, XX, XX },
944 { "punpckhwd", MX, EM, XX, XX },
945 { "punpckhdq", MX, EM, XX, XX },
946 { "packssdw", MX, EM, XX, XX },
947 { PREGRP26 },
948 { PREGRP24 },
949 { "movd", MX, Edq, XX, XX },
950 { PREGRP19 },
951 /* 70 */
952 { PREGRP22 },
953 { GRP12 },
954 { GRP13 },
955 { GRP14 },
956 { "pcmpeqb", MX, EM, XX, XX },
957 { "pcmpeqw", MX, EM, XX, XX },
958 { "pcmpeqd", MX, EM, XX, XX },
959 { "emms", XX, XX, XX, XX },
960 /* 78 */
961 { PREGRP34 },
962 { PREGRP35 },
963 { "(bad)", XX, XX, XX, XX },
964 { "(bad)", XX, XX, XX, XX },
965 { PREGRP28 },
966 { PREGRP29 },
967 { PREGRP23 },
968 { PREGRP20 },
969 /* 80 */
970 { "joH", Jv, XX, cond_jump_flag, XX },
971 { "jnoH", Jv, XX, cond_jump_flag, XX },
972 { "jbH", Jv, XX, cond_jump_flag, XX },
973 { "jaeH", Jv, XX, cond_jump_flag, XX },
974 { "jeH", Jv, XX, cond_jump_flag, XX },
975 { "jneH", Jv, XX, cond_jump_flag, XX },
976 { "jbeH", Jv, XX, cond_jump_flag, XX },
977 { "jaH", Jv, XX, cond_jump_flag, XX },
978 /* 88 */
979 { "jsH", Jv, XX, cond_jump_flag, XX },
980 { "jnsH", Jv, XX, cond_jump_flag, XX },
981 { "jpH", Jv, XX, cond_jump_flag, XX },
982 { "jnpH", Jv, XX, cond_jump_flag, XX },
983 { "jlH", Jv, XX, cond_jump_flag, XX },
984 { "jgeH", Jv, XX, cond_jump_flag, XX },
985 { "jleH", Jv, XX, cond_jump_flag, XX },
986 { "jgH", Jv, XX, cond_jump_flag, XX },
987 /* 90 */
988 { "seto", Eb, XX, XX, XX },
989 { "setno", Eb, XX, XX, XX },
990 { "setb", Eb, XX, XX, XX },
991 { "setae", Eb, XX, XX, XX },
992 { "sete", Eb, XX, XX, XX },
993 { "setne", Eb, XX, XX, XX },
994 { "setbe", Eb, XX, XX, XX },
995 { "seta", Eb, XX, XX, XX },
996 /* 98 */
997 { "sets", Eb, XX, XX, XX },
998 { "setns", Eb, XX, XX, XX },
999 { "setp", Eb, XX, XX, XX },
1000 { "setnp", Eb, XX, XX, XX },
1001 { "setl", Eb, XX, XX, XX },
1002 { "setge", Eb, XX, XX, XX },
1003 { "setle", Eb, XX, XX, XX },
1004 { "setg", Eb, XX, XX, XX },
1005 /* a0 */
1006 { "pushT", fs, XX, XX, XX },
1007 { "popT", fs, XX, XX, XX },
1008 { "cpuid", XX, XX, XX, XX },
1009 { "btS", Ev, Gv, XX, XX },
1010 { "shldS", Ev, Gv, Ib, XX },
1011 { "shldS", Ev, Gv, CL, XX },
1012 { GRPPADLCK2 },
1013 { GRPPADLCK1 },
1014 /* a8 */
1015 { "pushT", gs, XX, XX, XX },
1016 { "popT", gs, XX, XX, XX },
1017 { "rsm", XX, XX, XX, XX },
1018 { "btsS", Ev, Gv, XX, XX },
1019 { "shrdS", Ev, Gv, Ib, XX },
1020 { "shrdS", Ev, Gv, CL, XX },
1021 { GRP15 },
1022 { "imulS", Gv, Ev, XX, XX },
1023 /* b0 */
1024 { "cmpxchgB", Eb, Gb, XX, XX },
1025 { "cmpxchgS", Ev, Gv, XX, XX },
1026 { "lssS", Gv, Mp, XX, XX },
1027 { "btrS", Ev, Gv, XX, XX },
1028 { "lfsS", Gv, Mp, XX, XX },
1029 { "lgsS", Gv, Mp, XX, XX },
1030 { "movz{bR|x|bR|x}", Gv, Eb, XX, XX },
1031 { "movz{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movzww ! */
1032 /* b8 */
1033 { PREGRP37 },
1034 { "ud2b", XX, XX, XX, XX },
1035 { GRP8 },
1036 { "btcS", Ev, Gv, XX, XX },
1037 { "bsfS", Gv, Ev, XX, XX },
1038 { PREGRP36 },
1039 { "movs{bR|x|bR|x}", Gv, Eb, XX, XX },
1040 { "movs{wR|x|wR|x}", Gv, Ew, XX, XX }, /* yes, there really is movsww ! */
1041 /* c0 */
1042 { "xaddB", Eb, Gb, XX, XX },
1043 { "xaddS", Ev, Gv, XX, XX },
1044 { PREGRP1 },
1045 { "movntiS", Ev, Gv, XX, XX },
1046 { "pinsrw", MX, Edqw, Ib, XX },
1047 { "pextrw", Gdq, MS, Ib, XX },
1048 { "shufpX", XM, EX, Ib, XX },
1049 { GRP9 },
1050 /* c8 */
1051 { "bswap", RMeAX, XX, XX, XX },
1052 { "bswap", RMeCX, XX, XX, XX },
1053 { "bswap", RMeDX, XX, XX, XX },
1054 { "bswap", RMeBX, XX, XX, XX },
1055 { "bswap", RMeSP, XX, XX, XX },
1056 { "bswap", RMeBP, XX, XX, XX },
1057 { "bswap", RMeSI, XX, XX, XX },
1058 { "bswap", RMeDI, XX, XX, XX },
1059 /* d0 */
1060 { PREGRP27 },
1061 { "psrlw", MX, EM, XX, XX },
1062 { "psrld", MX, EM, XX, XX },
1063 { "psrlq", MX, EM, XX, XX },
1064 { "paddq", MX, EM, XX, XX },
1065 { "pmullw", MX, EM, XX, XX },
1066 { PREGRP21 },
1067 { "pmovmskb", Gdq, MS, XX, XX },
1068 /* d8 */
1069 { "psubusb", MX, EM, XX, XX },
1070 { "psubusw", MX, EM, XX, XX },
1071 { "pminub", MX, EM, XX, XX },
1072 { "pand", MX, EM, XX, XX },
1073 { "paddusb", MX, EM, XX, XX },
1074 { "paddusw", MX, EM, XX, XX },
1075 { "pmaxub", MX, EM, XX, XX },
1076 { "pandn", MX, EM, XX, XX },
1077 /* e0 */
1078 { "pavgb", MX, EM, XX, XX },
1079 { "psraw", MX, EM, XX, XX },
1080 { "psrad", MX, EM, XX, XX },
1081 { "pavgw", MX, EM, XX, XX },
1082 { "pmulhuw", MX, EM, XX, XX },
1083 { "pmulhw", MX, EM, XX, XX },
1084 { PREGRP15 },
1085 { PREGRP25 },
1086 /* e8 */
1087 { "psubsb", MX, EM, XX, XX },
1088 { "psubsw", MX, EM, XX, XX },
1089 { "pminsw", MX, EM, XX, XX },
1090 { "por", MX, EM, XX, XX },
1091 { "paddsb", MX, EM, XX, XX },
1092 { "paddsw", MX, EM, XX, XX },
1093 { "pmaxsw", MX, EM, XX, XX },
1094 { "pxor", MX, EM, XX, XX },
1095 /* f0 */
1096 { PREGRP32 },
1097 { "psllw", MX, EM, XX, XX },
1098 { "pslld", MX, EM, XX, XX },
1099 { "psllq", MX, EM, XX, XX },
1100 { "pmuludq", MX, EM, XX, XX },
1101 { "pmaddwd", MX, EM, XX, XX },
1102 { "psadbw", MX, EM, XX, XX },
1103 { PREGRP18 },
1104 /* f8 */
1105 { "psubb", MX, EM, XX, XX },
1106 { "psubw", MX, EM, XX, XX },
1107 { "psubd", MX, EM, XX, XX },
1108 { "psubq", MX, EM, XX, XX },
1109 { "paddb", MX, EM, XX, XX },
1110 { "paddw", MX, EM, XX, XX },
1111 { "paddd", MX, EM, XX, XX },
1112 { "(bad)", XX, XX, XX, XX }
1113};
1114
1115static const unsigned char onebyte_has_modrm[256] = {
1116 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1117 /* ------------------------------- */
1118 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1119 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1120 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1121 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1122 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1123 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1124 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1125 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1126 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1127 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1128 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1129 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1130 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1131 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1132 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1133 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1134 /* ------------------------------- */
1135 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1136};
1137
1138static const unsigned char twobyte_has_modrm[256] = {
1139 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1140 /* ------------------------------- */
1141 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1142 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1143 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1144 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1145 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1146 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1147 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1148 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1149 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1150 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1151 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1152 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1153 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1154 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1155 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1156 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1157 /* ------------------------------- */
1158 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1159};
1160
1161static const unsigned char twobyte_uses_SSE_prefix[256] = {
1162 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1163 /* ------------------------------- */
1164 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1165 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1166 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1167 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1168 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1169 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1170 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1171 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1172 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1173 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1174 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1175 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1176 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1177 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1178 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1179 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1180 /* ------------------------------- */
1181 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1182};
1183
1184static char obuf[100];
1185static char *obufp;
1186static char scratchbuf[100];
1187static unsigned char *start_codep;
1188static unsigned char *insn_codep;
1189static unsigned char *codep;
1190static disassemble_info *the_info;
1191static int mod;
1192static int rm;
1193static int reg;
1194static unsigned char need_modrm;
1195
1196/* If we are accessing mod/rm/reg without need_modrm set, then the
1197 values are stale. Hitting this abort likely indicates that you
1198 need to update onebyte_has_modrm or twobyte_has_modrm. */
1199#define MODRM_CHECK if (!need_modrm) abort ()
1200
1201static const char **names64;
1202static const char **names32;
1203static const char **names16;
1204static const char **names8;
1205static const char **names8rex;
1206static const char **names_seg;
1207static const char **index16;
1208
1209static const char *intel_names64[] = {
1210 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1211 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1212};
1213static const char *intel_names32[] = {
1214 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1215 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1216};
1217static const char *intel_names16[] = {
1218 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1219 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1220};
1221static const char *intel_names8[] = {
1222 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1223};
1224static const char *intel_names8rex[] = {
1225 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1226 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1227};
1228static const char *intel_names_seg[] = {
1229 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1230};
1231static const char *intel_index16[] = {
1232 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1233};
1234
1235static const char *att_names64[] = {
1236 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1237 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1238};
1239static const char *att_names32[] = {
1240 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1241 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1242};
1243static const char *att_names16[] = {
1244 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1245 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1246};
1247static const char *att_names8[] = {
1248 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1249};
1250static const char *att_names8rex[] = {
1251 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1252 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1253};
1254static const char *att_names_seg[] = {
1255 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1256};
1257static const char *att_index16[] = {
1258 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1259};
1260
1261static const struct dis386 grps[][8] = {
1262 /* GRP1b */
1263 {
1264 { "addA", Eb, Ib, XX, XX },
1265 { "orA", Eb, Ib, XX, XX },
1266 { "adcA", Eb, Ib, XX, XX },
1267 { "sbbA", Eb, Ib, XX, XX },
1268 { "andA", Eb, Ib, XX, XX },
1269 { "subA", Eb, Ib, XX, XX },
1270 { "xorA", Eb, Ib, XX, XX },
1271 { "cmpA", Eb, Ib, XX, XX }
1272 },
1273 /* GRP1S */
1274 {
1275 { "addQ", Ev, Iv, XX, XX },
1276 { "orQ", Ev, Iv, XX, XX },
1277 { "adcQ", Ev, Iv, XX, XX },
1278 { "sbbQ", Ev, Iv, XX, XX },
1279 { "andQ", Ev, Iv, XX, XX },
1280 { "subQ", Ev, Iv, XX, XX },
1281 { "xorQ", Ev, Iv, XX, XX },
1282 { "cmpQ", Ev, Iv, XX, XX }
1283 },
1284 /* GRP1Ss */
1285 {
1286 { "addQ", Ev, sIb, XX, XX },
1287 { "orQ", Ev, sIb, XX, XX },
1288 { "adcQ", Ev, sIb, XX, XX },
1289 { "sbbQ", Ev, sIb, XX, XX },
1290 { "andQ", Ev, sIb, XX, XX },
1291 { "subQ", Ev, sIb, XX, XX },
1292 { "xorQ", Ev, sIb, XX, XX },
1293 { "cmpQ", Ev, sIb, XX, XX }
1294 },
1295 /* GRP2b */
1296 {
1297 { "rolA", Eb, Ib, XX, XX },
1298 { "rorA", Eb, Ib, XX, XX },
1299 { "rclA", Eb, Ib, XX, XX },
1300 { "rcrA", Eb, Ib, XX, XX },
1301 { "shlA", Eb, Ib, XX, XX },
1302 { "shrA", Eb, Ib, XX, XX },
1303 { "(bad)", XX, XX, XX, XX },
1304 { "sarA", Eb, Ib, XX, XX },
1305 },
1306 /* GRP2S */
1307 {
1308 { "rolQ", Ev, Ib, XX, XX },
1309 { "rorQ", Ev, Ib, XX, XX },
1310 { "rclQ", Ev, Ib, XX, XX },
1311 { "rcrQ", Ev, Ib, XX, XX },
1312 { "shlQ", Ev, Ib, XX, XX },
1313 { "shrQ", Ev, Ib, XX, XX },
1314 { "(bad)", XX, XX, XX, XX },
1315 { "sarQ", Ev, Ib, XX, XX },
1316 },
1317 /* GRP2b_one */
1318 {
1319 { "rolA", Eb, I1, XX, XX },
1320 { "rorA", Eb, I1, XX, XX },
1321 { "rclA", Eb, I1, XX, XX },
1322 { "rcrA", Eb, I1, XX, XX },
1323 { "shlA", Eb, I1, XX, XX },
1324 { "shrA", Eb, I1, XX, XX },
1325 { "(bad)", XX, XX, XX, XX },
1326 { "sarA", Eb, I1, XX, XX },
1327 },
1328 /* GRP2S_one */
1329 {
1330 { "rolQ", Ev, I1, XX, XX },
1331 { "rorQ", Ev, I1, XX, XX },
1332 { "rclQ", Ev, I1, XX, XX },
1333 { "rcrQ", Ev, I1, XX, XX },
1334 { "shlQ", Ev, I1, XX, XX },
1335 { "shrQ", Ev, I1, XX, XX },
1336 { "(bad)", XX, XX, XX, XX },
1337 { "sarQ", Ev, I1, XX, XX },
1338 },
1339 /* GRP2b_cl */
1340 {
1341 { "rolA", Eb, CL, XX, XX },
1342 { "rorA", Eb, CL, XX, XX },
1343 { "rclA", Eb, CL, XX, XX },
1344 { "rcrA", Eb, CL, XX, XX },
1345 { "shlA", Eb, CL, XX, XX },
1346 { "shrA", Eb, CL, XX, XX },
1347 { "(bad)", XX, XX, XX, XX },
1348 { "sarA", Eb, CL, XX, XX },
1349 },
1350 /* GRP2S_cl */
1351 {
1352 { "rolQ", Ev, CL, XX, XX },
1353 { "rorQ", Ev, CL, XX, XX },
1354 { "rclQ", Ev, CL, XX, XX },
1355 { "rcrQ", Ev, CL, XX, XX },
1356 { "shlQ", Ev, CL, XX, XX },
1357 { "shrQ", Ev, CL, XX, XX },
1358 { "(bad)", XX, XX, XX, XX },
1359 { "sarQ", Ev, CL, XX, XX }
1360 },
1361 /* GRP3b */
1362 {
1363 { "testA", Eb, Ib, XX, XX },
1364 { "(bad)", Eb, XX, XX, XX },
1365 { "notA", Eb, XX, XX, XX },
1366 { "negA", Eb, XX, XX, XX },
1367 { "mulA", Eb, XX, XX, XX }, /* Don't print the implicit %al register, */
1368 { "imulA", Eb, XX, XX, XX }, /* to distinguish these opcodes from other */
1369 { "divA", Eb, XX, XX, XX }, /* mul/imul opcodes. Do the same for div */
1370 { "idivA", Eb, XX, XX, XX } /* and idiv for consistency. */
1371 },
1372 /* GRP3S */
1373 {
1374 { "testQ", Ev, Iv, XX, XX },
1375 { "(bad)", XX, XX, XX, XX },
1376 { "notQ", Ev, XX, XX, XX },
1377 { "negQ", Ev, XX, XX, XX },
1378 { "mulQ", Ev, XX, XX, XX }, /* Don't print the implicit register. */
1379 { "imulQ", Ev, XX, XX, XX },
1380 { "divQ", Ev, XX, XX, XX },
1381 { "idivQ", Ev, XX, XX, XX },
1382 },
1383 /* GRP4 */
1384 {
1385 { "incA", Eb, XX, XX, XX },
1386 { "decA", Eb, XX, XX, XX },
1387 { "(bad)", XX, XX, XX, XX },
1388 { "(bad)", XX, XX, XX, XX },
1389 { "(bad)", XX, XX, XX, XX },
1390 { "(bad)", XX, XX, XX, XX },
1391 { "(bad)", XX, XX, XX, XX },
1392 { "(bad)", XX, XX, XX, XX },
1393 },
1394 /* GRP5 */
1395 {
1396 { "incQ", Ev, XX, XX, XX },
1397 { "decQ", Ev, XX, XX, XX },
1398 { "callT", indirEv, XX, XX, XX },
1399 { "JcallT", indirEp, XX, XX, XX },
1400 { "jmpT", indirEv, XX, XX, XX },
1401 { "JjmpT", indirEp, XX, XX, XX },
1402 { "pushU", stackEv, XX, XX, XX },
1403 { "(bad)", XX, XX, XX, XX },
1404 },
1405 /* GRP6 */
1406 {
1407 { "sldt", Ev, XX, XX, XX },
1408 { "str", Ev, XX, XX, XX },
1409 { "lldt", Ew, XX, XX, XX },
1410 { "ltr", Ew, XX, XX, XX },
1411 { "verr", Ew, XX, XX, XX },
1412 { "verw", Ew, XX, XX, XX },
1413 { "(bad)", XX, XX, XX, XX },
1414 { "(bad)", XX, XX, XX, XX }
1415 },
1416 /* GRP7 */
1417 {
1418 { "sgdt{Q|IQ||}", VMX_Fixup, 0, XX, XX, XX },
1419 { "sidt{Q|IQ||}", PNI_Fixup, 0, XX, XX, XX },
1420 { "lgdt{Q|Q||}", M, XX, XX, XX },
1421 { "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX, XX },
1422 { "smsw", Ev, XX, XX, XX },
1423 { "(bad)", XX, XX, XX, XX },
1424 { "lmsw", Ew, XX, XX, XX },
1425 { "invlpg", INVLPG_Fixup, w_mode, XX, XX, XX },
1426 },
1427 /* GRP8 */
1428 {
1429 { "(bad)", XX, XX, XX, XX },
1430 { "(bad)", XX, XX, XX, XX },
1431 { "(bad)", XX, XX, XX, XX },
1432 { "(bad)", XX, XX, XX, XX },
1433 { "btQ", Ev, Ib, XX, XX },
1434 { "btsQ", Ev, Ib, XX, XX },
1435 { "btrQ", Ev, Ib, XX, XX },
1436 { "btcQ", Ev, Ib, XX, XX },
1437 },
1438 /* GRP9 */
1439 {
1440 { "(bad)", XX, XX, XX, XX },
1441 { "cmpxchg8b", Eq, XX, XX, XX },
1442 { "(bad)", XX, XX, XX, XX },
1443 { "(bad)", XX, XX, XX, XX },
1444 { "(bad)", XX, XX, XX, XX },
1445 { "(bad)", XX, XX, XX, XX },
1446 { "", VM, XX, XX, XX }, /* See OP_VMX. */
1447 { "vmptrst", Eq, XX, XX, XX },
1448 },
1449 /* GRP11_C6 */
1450 {
1451 { "movA", Eb, Ib, XX, XX },
1452 { "(bad)", XX, XX, XX, XX },
1453 { "(bad)", XX, XX, XX, XX },
1454 { "(bad)", XX, XX, XX, XX },
1455 { "(bad)", XX, XX, XX, XX },
1456 { "(bad)", XX, XX, XX, XX },
1457 { "(bad)", XX, XX, XX, XX },
1458 { "(bad)", XX, XX, XX, XX },
1459 },
1460 /* GRP11_C7 */
1461 {
1462 { "movQ", Ev, Iv, XX, XX },
1463 { "(bad)", XX, XX, XX, XX },
1464 { "(bad)", XX, XX, XX, XX },
1465 { "(bad)", XX, XX, XX, XX },
1466 { "(bad)", XX, XX, XX, XX },
1467 { "(bad)", XX, XX, XX, XX },
1468 { "(bad)", XX, XX, XX, XX },
1469 { "(bad)", XX, XX, XX, XX },
1470 },
1471 /* GRP12 */
1472 {
1473 { "(bad)", XX, XX, XX, XX },
1474 { "(bad)", XX, XX, XX, XX },
1475 { "psrlw", MS, Ib, XX, XX },
1476 { "(bad)", XX, XX, XX, XX },
1477 { "psraw", MS, Ib, XX, XX },
1478 { "(bad)", XX, XX, XX, XX },
1479 { "psllw", MS, Ib, XX, XX },
1480 { "(bad)", XX, XX, XX, XX },
1481 },
1482 /* GRP13 */
1483 {
1484 { "(bad)", XX, XX, XX, XX },
1485 { "(bad)", XX, XX, XX, XX },
1486 { "psrld", MS, Ib, XX, XX },
1487 { "(bad)", XX, XX, XX, XX },
1488 { "psrad", MS, Ib, XX, XX },
1489 { "(bad)", XX, XX, XX, XX },
1490 { "pslld", MS, Ib, XX, XX },
1491 { "(bad)", XX, XX, XX, XX },
1492 },
1493 /* GRP14 */
1494 {
1495 { "(bad)", XX, XX, XX, XX },
1496 { "(bad)", XX, XX, XX, XX },
1497 { "psrlq", MS, Ib, XX, XX },
1498 { "psrldq", MS, Ib, XX, XX },
1499 { "(bad)", XX, XX, XX, XX },
1500 { "(bad)", XX, XX, XX, XX },
1501 { "psllq", MS, Ib, XX, XX },
1502 { "pslldq", MS, Ib, XX, XX },
1503 },
1504 /* GRP15 */
1505 {
1506 { "fxsave", Ev, XX, XX, XX },
1507 { "fxrstor", Ev, XX, XX, XX },
1508 { "ldmxcsr", Ev, XX, XX, XX },
1509 { "stmxcsr", Ev, XX, XX, XX },
1510 { "(bad)", XX, XX, XX, XX },
1511 { "lfence", OP_0fae, 0, XX, XX, XX },
1512 { "mfence", OP_0fae, 0, XX, XX, XX },
1513 { "clflush", OP_0fae, 0, XX, XX, XX },
1514 },
1515 /* GRP16 */
1516 {
1517 { "prefetchnta", Ev, XX, XX, XX },
1518 { "prefetcht0", Ev, XX, XX, XX },
1519 { "prefetcht1", Ev, XX, XX, XX },
1520 { "prefetcht2", Ev, XX, XX, XX },
1521 { "(bad)", XX, XX, XX, XX },
1522 { "(bad)", XX, XX, XX, XX },
1523 { "(bad)", XX, XX, XX, XX },
1524 { "(bad)", XX, XX, XX, XX },
1525 },
1526 /* GRPAMD */
1527 {
1528 { "prefetch", Eb, XX, XX, XX },
1529 { "prefetchw", Eb, XX, XX, XX },
1530 { "(bad)", XX, XX, XX, XX },
1531 { "(bad)", XX, XX, XX, XX },
1532 { "(bad)", XX, XX, XX, XX },
1533 { "(bad)", XX, XX, XX, XX },
1534 { "(bad)", XX, XX, XX, XX },
1535 { "(bad)", XX, XX, XX, XX },
1536 },
1537 /* GRPPADLCK1 */
1538 {
1539 { "xstore-rng", OP_0f07, 0, XX, XX, XX },
1540 { "xcrypt-ecb", OP_0f07, 0, XX, XX, XX },
1541 { "xcrypt-cbc", OP_0f07, 0, XX, XX, XX },
1542 { "xcrypt-ctr", OP_0f07, 0, XX, XX, XX },
1543 { "xcrypt-cfb", OP_0f07, 0, XX, XX, XX },
1544 { "xcrypt-ofb", OP_0f07, 0, XX, XX, XX },
1545 { "(bad)", OP_0f07, 0, XX, XX, XX },
1546 { "(bad)", OP_0f07, 0, XX, XX, XX },
1547 },
1548 /* GRPPADLCK2 */
1549 {
1550 { "montmul", OP_0f07, 0, XX, XX, XX },
1551 { "xsha1", OP_0f07, 0, XX, XX, XX },
1552 { "xsha256", OP_0f07, 0, XX, XX, XX },
1553 { "(bad)", OP_0f07, 0, XX, XX, XX },
1554 { "(bad)", OP_0f07, 0, XX, XX, XX },
1555 { "(bad)", OP_0f07, 0, XX, XX, XX },
1556 { "(bad)", OP_0f07, 0, XX, XX, XX },
1557 { "(bad)", OP_0f07, 0, XX, XX, XX },
1558 }
1559};
1560
1561static const struct dis386 prefix_user_table[][4] = {
1562 /* PREGRP0 */
1563 {
1564 { "addps", XM, EX, XX, XX },
1565 { "addss", XM, EX, XX, XX },
1566 { "addpd", XM, EX, XX, XX },
1567 { "addsd", XM, EX, XX, XX },
1568 },
1569 /* PREGRP1 */
1570 {
1571 { "", XM, EX, OPSIMD, XX }, /* See OP_SIMD_SUFFIX. */
1572 { "", XM, EX, OPSIMD, XX },
1573 { "", XM, EX, OPSIMD, XX },
1574 { "", XM, EX, OPSIMD, XX },
1575 },
1576 /* PREGRP2 */
1577 {
1578 { "cvtpi2ps", XM, EMC, XX, XX },
1579 { "cvtsi2ssY", XM, Ev, XX, XX },
1580 { "cvtpi2pd", XM, EMC, XX, XX },
1581 { "cvtsi2sdY", XM, Ev, XX, XX },
1582 },
1583 /* PREGRP3 */
1584 {
1585 { "cvtps2pi", MXC, EX, XX, XX },
1586 { "cvtss2siY", Gv, EX, XX, XX },
1587 { "cvtpd2pi", MXC, EX, XX, XX },
1588 { "cvtsd2siY", Gv, EX, XX, XX },
1589 },
1590 /* PREGRP4 */
1591 {
1592 { "cvttps2pi", MXC, EX, XX, XX },
1593 { "cvttss2siY", Gv, EX, XX, XX },
1594 { "cvttpd2pi", MXC, EX, XX, XX },
1595 { "cvttsd2siY", Gv, EX, XX, XX },
1596 },
1597 /* PREGRP5 */
1598 {
1599 { "divps", XM, EX, XX, XX },
1600 { "divss", XM, EX, XX, XX },
1601 { "divpd", XM, EX, XX, XX },
1602 { "divsd", XM, EX, XX, XX },
1603 },
1604 /* PREGRP6 */
1605 {
1606 { "maxps", XM, EX, XX, XX },
1607 { "maxss", XM, EX, XX, XX },
1608 { "maxpd", XM, EX, XX, XX },
1609 { "maxsd", XM, EX, XX, XX },
1610 },
1611 /* PREGRP7 */
1612 {
1613 { "minps", XM, EX, XX, XX },
1614 { "minss", XM, EX, XX, XX },
1615 { "minpd", XM, EX, XX, XX },
1616 { "minsd", XM, EX, XX, XX },
1617 },
1618 /* PREGRP8 */
1619 {
1620 { "movups", XM, EX, XX, XX },
1621 { "movss", XM, EX, XX, XX },
1622 { "movupd", XM, EX, XX, XX },
1623 { "movsd", XM, EX, XX, XX },
1624 },
1625 /* PREGRP9 */
1626 {
1627 { "movups", EX, XM, XX, XX },
1628 { "movss", EX, XM, XX, XX },
1629 { "movupd", EX, XM, XX, XX },
1630 { "movsd", EX, XM, XX, XX },
1631 },
1632 /* PREGRP10 */
1633 {
1634 { "mulps", XM, EX, XX, XX },
1635 { "mulss", XM, EX, XX, XX },
1636 { "mulpd", XM, EX, XX, XX },
1637 { "mulsd", XM, EX, XX, XX },
1638 },
1639 /* PREGRP11 */
1640 {
1641 { "rcpps", XM, EX, XX, XX },
1642 { "rcpss", XM, EX, XX, XX },
1643 { "(bad)", XM, EX, XX, XX },
1644 { "(bad)", XM, EX, XX, XX },
1645 },
1646 /* PREGRP12 */
1647 {
1648 { "rsqrtps", XM, EX, XX, XX },
1649 { "rsqrtss", XM, EX, XX, XX },
1650 { "(bad)", XM, EX, XX, XX },
1651 { "(bad)", XM, EX, XX, XX },
1652 },
1653 /* PREGRP13 */
1654 {
1655 { "sqrtps", XM, EX, XX, XX },
1656 { "sqrtss", XM, EX, XX, XX },
1657 { "sqrtpd", XM, EX, XX, XX },
1658 { "sqrtsd", XM, EX, XX, XX },
1659 },
1660 /* PREGRP14 */
1661 {
1662 { "subps", XM, EX, XX, XX },
1663 { "subss", XM, EX, XX, XX },
1664 { "subpd", XM, EX, XX, XX },
1665 { "subsd", XM, EX, XX, XX },
1666 },
1667 /* PREGRP15 */
1668 {
1669 { "(bad)", XM, EX, XX, XX},
1670 { "cvtdq2pd", XM, EX, XX, XX },
1671 { "cvttpd2dq", XM, EX, XX, XX },
1672 { "cvtpd2dq", XM, EX, XX, XX },
1673 },
1674 /* PREGRP16 */
1675 {
1676 { "cvtdq2ps", XM, EX, XX, XX },
1677 { "cvttps2dq",XM, EX, XX, XX },
1678 { "cvtps2dq",XM, EX, XX, XX },
1679 { "(bad)", XM, EX, XX, XX },
1680 },
1681 /* PREGRP17 */
1682 {
1683 { "cvtps2pd", XM, EX, XX, XX },
1684 { "cvtss2sd", XM, EX, XX, XX },
1685 { "cvtpd2ps", XM, EX, XX, XX },
1686 { "cvtsd2ss", XM, EX, XX, XX },
1687 },
1688 /* PREGRP18 */
1689 {
1690 { "maskmovq", MX, MS, XX, XX },
1691 { "(bad)", XM, EX, XX, XX },
1692 { "maskmovdqu", XM, XS, XX, XX },
1693 { "(bad)", XM, EX, XX, XX },
1694 },
1695 /* PREGRP19 */
1696 {
1697 { "movq", MX, EM, XX, XX },
1698 { "movdqu", XM, EX, XX, XX },
1699 { "movdqa", XM, EX, XX, XX },
1700 { "(bad)", XM, EX, XX, XX },
1701 },
1702 /* PREGRP20 */
1703 {
1704 { "movq", EM, MX, XX, XX },
1705 { "movdqu", EX, XM, XX, XX },
1706 { "movdqa", EX, XM, XX, XX },
1707 { "(bad)", EX, XM, XX, XX },
1708 },
1709 /* PREGRP21 */
1710 {
1711 { "(bad)", EX, XM, XX, XX },
1712 { "movq2dq", XM, MS, XX, XX },
1713 { "movq", EX, XM, XX, XX },
1714 { "movdq2q", MX, XS, XX, XX },
1715 },
1716 /* PREGRP22 */
1717 {
1718 { "pshufw", MX, EM, Ib, XX },
1719 { "pshufhw", XM, EX, Ib, XX },
1720 { "pshufd", XM, EX, Ib, XX },
1721 { "pshuflw", XM, EX, Ib, XX},
1722 },
1723 /* PREGRP23 */
1724 {
1725 { "movd", Edq, MX, XX, XX },
1726 { "movq", XM, EX, XX, XX },
1727 { "movd", Edq, XM, XX, XX },
1728 { "(bad)", Ed, XM, XX, XX },
1729 },
1730 /* PREGRP24 */
1731 {
1732 { "(bad)", MX, EX, XX, XX },
1733 { "(bad)", XM, EX, XX, XX },
1734 { "punpckhqdq", XM, EX, XX, XX },
1735 { "(bad)", XM, EX, XX, XX },
1736 },
1737 /* PREGRP25 */
1738 {
1739 { "movntq", EM, MX, XX, XX },
1740 { "(bad)", EM, XM, XX, XX },
1741 { "movntdq", EM, XM, XX, XX },
1742 { "(bad)", EM, XM, XX, XX },
1743 },
1744 /* PREGRP26 */
1745 {
1746 { "(bad)", MX, EX, XX, XX },
1747 { "(bad)", XM, EX, XX, XX },
1748 { "punpcklqdq", XM, EX, XX, XX },
1749 { "(bad)", XM, EX, XX, XX },
1750 },
1751 /* PREGRP27 */
1752 {
1753 { "(bad)", MX, EX, XX, XX },
1754 { "(bad)", XM, EX, XX, XX },
1755 { "addsubpd", XM, EX, XX, XX },
1756 { "addsubps", XM, EX, XX, XX },
1757 },
1758 /* PREGRP28 */
1759 {
1760 { "(bad)", MX, EX, XX, XX },
1761 { "(bad)", XM, EX, XX, XX },
1762 { "haddpd", XM, EX, XX, XX },
1763 { "haddps", XM, EX, XX, XX },
1764 },
1765 /* PREGRP29 */
1766 {
1767 { "(bad)", MX, EX, XX, XX },
1768 { "(bad)", XM, EX, XX, XX },
1769 { "hsubpd", XM, EX, XX, XX },
1770 { "hsubps", XM, EX, XX, XX },
1771 },
1772 /* PREGRP30 */
1773 {
1774 { "movlpX", XM, EX, SIMD_Fixup, 'h', XX }, /* really only 2 operands */
1775 { "movsldup", XM, EX, XX, XX },
1776 { "movlpd", XM, EX, XX, XX },
1777 { "movddup", XM, EX, XX, XX },
1778 },
1779 /* PREGRP31 */
1780 {
1781 { "movhpX", XM, EX, SIMD_Fixup, 'l', XX },
1782 { "movshdup", XM, EX, XX, XX },
1783 { "movhpd", XM, EX, XX, XX },
1784 { "(bad)", XM, EX, XX, XX },
1785 },
1786 /* PREGRP32 */
1787 {
1788 { "(bad)", XM, EX, XX, XX },
1789 { "(bad)", XM, EX, XX, XX },
1790 { "(bad)", XM, EX, XX, XX },
1791 { "lddqu", XM, M, XX, XX },
1792 },
1793 /* PREGRP33 */
1794 {
1795 {"movntps",Ev, XM, XX, XX},
1796 {"movntss",Ev, XM, XX, XX},
1797 {"movntpd",Ev, XM, XX, XX},
1798 {"movntsd",Ev, XM, XX, XX},
1799 },
1800
1801 /* PREGRP34 */
1802 {
1803 {"vmread", Em, Gm, XX, XX},
1804 {"(bad)", XX, XX, XX, XX},
1805 {"extrq", XS, Ib, Ib, XX},
1806 {"insertq",XM, XS, Ib, Ib},
1807 },
1808
1809 /* PREGRP35 */
1810 {
1811 {"vmwrite", Gm, Em, XX, XX},
1812 {"(bad)", XX, XX, XX, XX},
1813 {"extrq", XM, XS, XX, XX},
1814 {"insertq", XM, XS, XX, XX},
1815 },
1816
1817 /* PREGRP36 */
1818 {
1819 { "bsrS", Gv, Ev, XX, XX },
1820 { "lzcntS", Gv, Ev, XX, XX },
1821 { "bsrS", Gv, Ev, XX, XX },
1822 { "(bad)", XX, XX, XX, XX },
1823 },
1824
1825 /* PREGRP37 */
1826 {
1827 { "(bad)", XX, XX, XX, XX },
1828 { "popcntS",Gv, Ev, XX, XX },
1829 { "(bad)", XX, XX, XX, XX },
1830 { "(bad)", XX, XX, XX, XX },
1831 },
1832};
1833
1834static const struct dis386 x86_64_table[][2] = {
1835 {
1836 { "arpl", Ew, Gw, XX, XX },
1837 { "movs{||lq|xd}", Gv, Ed, XX, XX },
1838 },
1839};
1840
1841static const struct dis386 three_byte_table[][256] = {
1842 /* THREE_BYTE_0 */
1843 {
1844 /* 00 */
1845 { "pshufb", MX, EM, XX, XX },
1846 { "phaddw", MX, EM, XX, XX },
1847 { "phaddd", MX, EM, XX, XX },
1848 { "phaddsw", MX, EM, XX, XX },
1849 { "pmaddubsw", MX, EM, XX, XX },
1850 { "phsubw", MX, EM, XX, XX },
1851 { "phsubd", MX, EM, XX, XX },
1852 { "phsubsw", MX, EM, XX, XX },
1853 /* 08 */
1854 { "psignb", MX, EM, XX, XX },
1855 { "psignw", MX, EM, XX, XX },
1856 { "psignd", MX, EM, XX, XX },
1857 { "pmulhrsw", MX, EM, XX, XX },
1858 { "(bad)", XX, XX, XX, XX },
1859 { "(bad)", XX, XX, XX, XX },
1860 { "(bad)", XX, XX, XX, XX },
1861 { "(bad)", XX, XX, XX, XX },
1862 /* 10 */
1863 { "(bad)", XX, XX, XX, XX },
1864 { "(bad)", XX, XX, XX, XX },
1865 { "(bad)", XX, XX, XX, XX },
1866 { "(bad)", XX, XX, XX, XX },
1867 { "(bad)", XX, XX, XX, XX },
1868 { "(bad)", XX, XX, XX, XX },
1869 { "(bad)", XX, XX, XX, XX },
1870 { "(bad)", XX, XX, XX, XX },
1871 /* 18 */
1872 { "(bad)", XX, XX, XX, XX },
1873 { "(bad)", XX, XX, XX, XX },
1874 { "(bad)", XX, XX, XX, XX },
1875 { "(bad)", XX, XX, XX, XX },
1876 { "pabsb", MX, EM, XX, XX },
1877 { "pabsw", MX, EM, XX, XX },
1878 { "pabsd", MX, EM, XX, XX },
1879 { "(bad)", XX, XX, XX, XX },
1880 /* 20 */
1881 { "(bad)", XX, XX, XX, XX },
1882 { "(bad)", XX, XX, XX, XX },
1883 { "(bad)", XX, XX, XX, XX },
1884 { "(bad)", XX, XX, XX, XX },
1885 { "(bad)", XX, XX, XX, XX },
1886 { "(bad)", XX, XX, XX, XX },
1887 { "(bad)", XX, XX, XX, XX },
1888 { "(bad)", XX, XX, XX, XX },
1889 /* 28 */
1890 { "(bad)", XX, XX, XX, XX },
1891 { "(bad)", XX, XX, XX, XX },
1892 { "(bad)", XX, XX, XX, XX },
1893 { "(bad)", XX, XX, XX, XX },
1894 { "(bad)", XX, XX, XX, XX },
1895 { "(bad)", XX, XX, XX, XX },
1896 { "(bad)", XX, XX, XX, XX },
1897 { "(bad)", XX, XX, XX, XX },
1898 /* 30 */
1899 { "(bad)", XX, XX, XX, XX },
1900 { "(bad)", XX, XX, XX, XX },
1901 { "(bad)", XX, XX, XX, XX },
1902 { "(bad)", XX, XX, XX, XX },
1903 { "(bad)", XX, XX, XX, XX },
1904 { "(bad)", XX, XX, XX, XX },
1905 { "(bad)", XX, XX, XX, XX },
1906 { "(bad)", XX, XX, XX, XX },
1907 /* 38 */
1908 { "(bad)", XX, XX, XX, XX },
1909 { "(bad)", XX, XX, XX, XX },
1910 { "(bad)", XX, XX, XX, XX },
1911 { "(bad)", XX, XX, XX, XX },
1912 { "(bad)", XX, XX, XX, XX },
1913 { "(bad)", XX, XX, XX, XX },
1914 { "(bad)", XX, XX, XX, XX },
1915 { "(bad)", XX, XX, XX, XX },
1916 /* 40 */
1917 { "(bad)", XX, XX, XX, XX },
1918 { "(bad)", XX, XX, XX, XX },
1919 { "(bad)", XX, XX, XX, XX },
1920 { "(bad)", XX, XX, XX, XX },
1921 { "(bad)", XX, XX, XX, XX },
1922 { "(bad)", XX, XX, XX, XX },
1923 { "(bad)", XX, XX, XX, XX },
1924 { "(bad)", XX, XX, XX, XX },
1925 /* 48 */
1926 { "(bad)", XX, XX, XX, XX },
1927 { "(bad)", XX, XX, XX, XX },
1928 { "(bad)", XX, XX, XX, XX },
1929 { "(bad)", XX, XX, XX, XX },
1930 { "(bad)", XX, XX, XX, XX },
1931 { "(bad)", XX, XX, XX, XX },
1932 { "(bad)", XX, XX, XX, XX },
1933 { "(bad)", XX, XX, XX, XX },
1934 /* 50 */
1935 { "(bad)", XX, XX, XX, XX },
1936 { "(bad)", XX, XX, XX, XX },
1937 { "(bad)", XX, XX, XX, XX },
1938 { "(bad)", XX, XX, XX, XX },
1939 { "(bad)", XX, XX, XX, XX },
1940 { "(bad)", XX, XX, XX, XX },
1941 { "(bad)", XX, XX, XX, XX },
1942 { "(bad)", XX, XX, XX, XX },
1943 /* 58 */
1944 { "(bad)", XX, XX, XX, XX },
1945 { "(bad)", XX, XX, XX, XX },
1946 { "(bad)", XX, XX, XX, XX },
1947 { "(bad)", XX, XX, XX, XX },
1948 { "(bad)", XX, XX, XX, XX },
1949 { "(bad)", XX, XX, XX, XX },
1950 { "(bad)", XX, XX, XX, XX },
1951 { "(bad)", XX, XX, XX, XX },
1952 /* 60 */
1953 { "(bad)", XX, XX, XX, XX },
1954 { "(bad)", XX, XX, XX, XX },
1955 { "(bad)", XX, XX, XX, XX },
1956 { "(bad)", XX, XX, XX, XX },
1957 { "(bad)", XX, XX, XX, XX },
1958 { "(bad)", XX, XX, XX, XX },
1959 { "(bad)", XX, XX, XX, XX },
1960 { "(bad)", XX, XX, XX, XX },
1961 /* 68 */
1962 { "(bad)", XX, XX, XX, XX },
1963 { "(bad)", XX, XX, XX, XX },
1964 { "(bad)", XX, XX, XX, XX },
1965 { "(bad)", XX, XX, XX, XX },
1966 { "(bad)", XX, XX, XX, XX },
1967 { "(bad)", XX, XX, XX, XX },
1968 { "(bad)", XX, XX, XX, XX },
1969 { "(bad)", XX, XX, XX, XX },
1970 /* 70 */
1971 { "(bad)", XX, XX, XX, XX },
1972 { "(bad)", XX, XX, XX, XX },
1973 { "(bad)", XX, XX, XX, XX },
1974 { "(bad)", XX, XX, XX, XX },
1975 { "(bad)", XX, XX, XX, XX },
1976 { "(bad)", XX, XX, XX, XX },
1977 { "(bad)", XX, XX, XX, XX },
1978 { "(bad)", XX, XX, XX, XX },
1979 /* 78 */
1980 { "(bad)", XX, XX, XX, XX },
1981 { "(bad)", XX, XX, XX, XX },
1982 { "(bad)", XX, XX, XX, XX },
1983 { "(bad)", XX, XX, XX, XX },
1984 { "(bad)", XX, XX, XX, XX },
1985 { "(bad)", XX, XX, XX, XX },
1986 { "(bad)", XX, XX, XX, XX },
1987 { "(bad)", XX, XX, XX, XX },
1988 /* 80 */
1989 { "(bad)", XX, XX, XX, XX },
1990 { "(bad)", XX, XX, XX, XX },
1991 { "(bad)", XX, XX, XX, XX },
1992 { "(bad)", XX, XX, XX, XX },
1993 { "(bad)", XX, XX, XX, XX },
1994 { "(bad)", XX, XX, XX, XX },
1995 { "(bad)", XX, XX, XX, XX },
1996 { "(bad)", XX, XX, XX, XX },
1997 /* 88 */
1998 { "(bad)", XX, XX, XX, XX },
1999 { "(bad)", XX, XX, XX, XX },
2000 { "(bad)", XX, XX, XX, XX },
2001 { "(bad)", XX, XX, XX, XX },
2002 { "(bad)", XX, XX, XX, XX },
2003 { "(bad)", XX, XX, XX, XX },
2004 { "(bad)", XX, XX, XX, XX },
2005 { "(bad)", XX, XX, XX, XX },
2006 /* 90 */
2007 { "(bad)", XX, XX, XX, XX },
2008 { "(bad)", XX, XX, XX, XX },
2009 { "(bad)", XX, XX, XX, XX },
2010 { "(bad)", XX, XX, XX, XX },
2011 { "(bad)", XX, XX, XX, XX },
2012 { "(bad)", XX, XX, XX, XX },
2013 { "(bad)", XX, XX, XX, XX },
2014 { "(bad)", XX, XX, XX, XX },
2015 /* 98 */
2016 { "(bad)", XX, XX, XX, XX },
2017 { "(bad)", XX, XX, XX, XX },
2018 { "(bad)", XX, XX, XX, XX },
2019 { "(bad)", XX, XX, XX, XX },
2020 { "(bad)", XX, XX, XX, XX },
2021 { "(bad)", XX, XX, XX, XX },
2022 { "(bad)", XX, XX, XX, XX },
2023 { "(bad)", XX, XX, XX, XX },
2024 /* a0 */
2025 { "(bad)", XX, XX, XX, XX },
2026 { "(bad)", XX, XX, XX, XX },
2027 { "(bad)", XX, XX, XX, XX },
2028 { "(bad)", XX, XX, XX, XX },
2029 { "(bad)", XX, XX, XX, XX },
2030 { "(bad)", XX, XX, XX, XX },
2031 { "(bad)", XX, XX, XX, XX },
2032 { "(bad)", XX, XX, XX, XX },
2033 /* a8 */
2034 { "(bad)", XX, XX, XX, XX },
2035 { "(bad)", XX, XX, XX, XX },
2036 { "(bad)", XX, XX, XX, XX },
2037 { "(bad)", XX, XX, XX, XX },
2038 { "(bad)", XX, XX, XX, XX },
2039 { "(bad)", XX, XX, XX, XX },
2040 { "(bad)", XX, XX, XX, XX },
2041 { "(bad)", XX, XX, XX, XX },
2042 /* b0 */
2043 { "(bad)", XX, XX, XX, XX },
2044 { "(bad)", XX, XX, XX, XX },
2045 { "(bad)", XX, XX, XX, XX },
2046 { "(bad)", XX, XX, XX, XX },
2047 { "(bad)", XX, XX, XX, XX },
2048 { "(bad)", XX, XX, XX, XX },
2049 { "(bad)", XX, XX, XX, XX },
2050 { "(bad)", XX, XX, XX, XX },
2051 /* b8 */
2052 { "(bad)", XX, XX, XX, XX },
2053 { "(bad)", XX, XX, XX, XX },
2054 { "(bad)", XX, XX, XX, XX },
2055 { "(bad)", XX, XX, XX, XX },
2056 { "(bad)", XX, XX, XX, XX },
2057 { "(bad)", XX, XX, XX, XX },
2058 { "(bad)", XX, XX, XX, XX },
2059 { "(bad)", XX, XX, XX, XX },
2060 /* c0 */
2061 { "(bad)", XX, XX, XX, XX },
2062 { "(bad)", XX, XX, XX, XX },
2063 { "(bad)", XX, XX, XX, XX },
2064 { "(bad)", XX, XX, XX, XX },
2065 { "(bad)", XX, XX, XX, XX },
2066 { "(bad)", XX, XX, XX, XX },
2067 { "(bad)", XX, XX, XX, XX },
2068 { "(bad)", XX, XX, XX, XX },
2069 /* c8 */
2070 { "(bad)", XX, XX, XX, XX },
2071 { "(bad)", XX, XX, XX, XX },
2072 { "(bad)", XX, XX, XX, XX },
2073 { "(bad)", XX, XX, XX, XX },
2074 { "(bad)", XX, XX, XX, XX },
2075 { "(bad)", XX, XX, XX, XX },
2076 { "(bad)", XX, XX, XX, XX },
2077 { "(bad)", XX, XX, XX, XX },
2078 /* d0 */
2079 { "(bad)", XX, XX, XX, XX },
2080 { "(bad)", XX, XX, XX, XX },
2081 { "(bad)", XX, XX, XX, XX },
2082 { "(bad)", XX, XX, XX, XX },
2083 { "(bad)", XX, XX, XX, XX },
2084 { "(bad)", XX, XX, XX, XX },
2085 { "(bad)", XX, XX, XX, XX },
2086 { "(bad)", XX, XX, XX, XX },
2087 /* d8 */
2088 { "(bad)", XX, XX, XX, XX },
2089 { "(bad)", XX, XX, XX, XX },
2090 { "(bad)", XX, XX, XX, XX },
2091 { "(bad)", XX, XX, XX, XX },
2092 { "(bad)", XX, XX, XX, XX },
2093 { "(bad)", XX, XX, XX, XX },
2094 { "(bad)", XX, XX, XX, XX },
2095 { "(bad)", XX, XX, XX, XX },
2096 /* e0 */
2097 { "(bad)", XX, XX, XX, XX },
2098 { "(bad)", XX, XX, XX, XX },
2099 { "(bad)", XX, XX, XX, XX },
2100 { "(bad)", XX, XX, XX, XX },
2101 { "(bad)", XX, XX, XX, XX },
2102 { "(bad)", XX, XX, XX, XX },
2103 { "(bad)", XX, XX, XX, XX },
2104 { "(bad)", XX, XX, XX, XX },
2105 /* e8 */
2106 { "(bad)", XX, XX, XX, XX },
2107 { "(bad)", XX, XX, XX, XX },
2108 { "(bad)", XX, XX, XX, XX },
2109 { "(bad)", XX, XX, XX, XX },
2110 { "(bad)", XX, XX, XX, XX },
2111 { "(bad)", XX, XX, XX, XX },
2112 { "(bad)", XX, XX, XX, XX },
2113 { "(bad)", XX, XX, XX, XX },
2114 /* f0 */
2115 { "(bad)", XX, XX, XX, XX },
2116 { "(bad)", XX, XX, XX, XX },
2117 { "(bad)", XX, XX, XX, XX },
2118 { "(bad)", XX, XX, XX, XX },
2119 { "(bad)", XX, XX, XX, XX },
2120 { "(bad)", XX, XX, XX, XX },
2121 { "(bad)", XX, XX, XX, XX },
2122 { "(bad)", XX, XX, XX, XX },
2123 /* f8 */
2124 { "(bad)", XX, XX, XX, XX },
2125 { "(bad)", XX, XX, XX, XX },
2126 { "(bad)", XX, XX, XX, XX },
2127 { "(bad)", XX, XX, XX, XX },
2128 { "(bad)", XX, XX, XX, XX },
2129 { "(bad)", XX, XX, XX, XX },
2130 { "(bad)", XX, XX, XX, XX },
2131 { "(bad)", XX, XX, XX, XX }
2132 },
2133 /* THREE_BYTE_1 */
2134 {
2135 /* 00 */
2136 { "(bad)", XX, XX, XX, XX },
2137 { "(bad)", XX, XX, XX, XX },
2138 { "(bad)", XX, XX, XX, XX },
2139 { "(bad)", XX, XX, XX, XX },
2140 { "(bad)", XX, XX, XX, XX },
2141 { "(bad)", XX, XX, XX, XX },
2142 { "(bad)", XX, XX, XX, XX },
2143 { "(bad)", XX, XX, XX, XX },
2144 /* 08 */
2145 { "(bad)", XX, XX, XX, XX },
2146 { "(bad)", XX, XX, XX, XX },
2147 { "(bad)", XX, XX, XX, XX },
2148 { "(bad)", XX, XX, XX, XX },
2149 { "(bad)", XX, XX, XX, XX },
2150 { "(bad)", XX, XX, XX, XX },
2151 { "(bad)", XX, XX, XX, XX },
2152 { "palignr", MX, EM, Ib, XX },
2153 /* 10 */
2154 { "(bad)", XX, XX, XX, XX },
2155 { "(bad)", XX, XX, XX, XX },
2156 { "(bad)", XX, XX, XX, XX },
2157 { "(bad)", XX, XX, XX, XX },
2158 { "(bad)", XX, XX, XX, XX },
2159 { "(bad)", XX, XX, XX, XX },
2160 { "(bad)", XX, XX, XX, XX },
2161 { "(bad)", XX, XX, XX, XX },
2162 /* 18 */
2163 { "(bad)", XX, XX, XX, XX },
2164 { "(bad)", XX, XX, XX, XX },
2165 { "(bad)", XX, XX, XX, XX },
2166 { "(bad)", XX, XX, XX, XX },
2167 { "(bad)", XX, XX, XX, XX },
2168 { "(bad)", XX, XX, XX, XX },
2169 { "(bad)", XX, XX, XX, XX },
2170 { "(bad)", XX, XX, XX, XX },
2171 /* 20 */
2172 { "(bad)", XX, XX, XX, XX },
2173 { "(bad)", XX, XX, XX, XX },
2174 { "(bad)", XX, XX, XX, XX },
2175 { "(bad)", XX, XX, XX, XX },
2176 { "(bad)", XX, XX, XX, XX },
2177 { "(bad)", XX, XX, XX, XX },
2178 { "(bad)", XX, XX, XX, XX },
2179 { "(bad)", XX, XX, XX, XX },
2180 /* 28 */
2181 { "(bad)", XX, XX, XX, XX },
2182 { "(bad)", XX, XX, XX, XX },
2183 { "(bad)", XX, XX, XX, XX },
2184 { "(bad)", XX, XX, XX, XX },
2185 { "(bad)", XX, XX, XX, XX },
2186 { "(bad)", XX, XX, XX, XX },
2187 { "(bad)", XX, XX, XX, XX },
2188 { "(bad)", XX, XX, XX, XX },
2189 /* 30 */
2190 { "(bad)", XX, XX, XX, XX },
2191 { "(bad)", XX, XX, XX, XX },
2192 { "(bad)", XX, XX, XX, XX },
2193 { "(bad)", XX, XX, XX, XX },
2194 { "(bad)", XX, XX, XX, XX },
2195 { "(bad)", XX, XX, XX, XX },
2196 { "(bad)", XX, XX, XX, XX },
2197 { "(bad)", XX, XX, XX, XX },
2198 /* 38 */
2199 { "(bad)", XX, XX, XX, XX },
2200 { "(bad)", XX, XX, XX, XX },
2201 { "(bad)", XX, XX, XX, XX },
2202 { "(bad)", XX, XX, XX, XX },
2203 { "(bad)", XX, XX, XX, XX },
2204 { "(bad)", XX, XX, XX, XX },
2205 { "(bad)", XX, XX, XX, XX },
2206 { "(bad)", XX, XX, XX, XX },
2207 /* 40 */
2208 { "(bad)", XX, XX, XX, XX },
2209 { "(bad)", XX, XX, XX, XX },
2210 { "(bad)", XX, XX, XX, XX },
2211 { "(bad)", XX, XX, XX, XX },
2212 { "(bad)", XX, XX, XX, XX },
2213 { "(bad)", XX, XX, XX, XX },
2214 { "(bad)", XX, XX, XX, XX },
2215 { "(bad)", XX, XX, XX, XX },
2216 /* 48 */
2217 { "(bad)", XX, XX, XX, XX },
2218 { "(bad)", XX, XX, XX, XX },
2219 { "(bad)", XX, XX, XX, XX },
2220 { "(bad)", XX, XX, XX, XX },
2221 { "(bad)", XX, XX, XX, XX },
2222 { "(bad)", XX, XX, XX, XX },
2223 { "(bad)", XX, XX, XX, XX },
2224 { "(bad)", XX, XX, XX, XX },
2225 /* 50 */
2226 { "(bad)", XX, XX, XX, XX },
2227 { "(bad)", XX, XX, XX, XX },
2228 { "(bad)", XX, XX, XX, XX },
2229 { "(bad)", XX, XX, XX, XX },
2230 { "(bad)", XX, XX, XX, XX },
2231 { "(bad)", XX, XX, XX, XX },
2232 { "(bad)", XX, XX, XX, XX },
2233 { "(bad)", XX, XX, XX, XX },
2234 /* 58 */
2235 { "(bad)", XX, XX, XX, XX },
2236 { "(bad)", XX, XX, XX, XX },
2237 { "(bad)", XX, XX, XX, XX },
2238 { "(bad)", XX, XX, XX, XX },
2239 { "(bad)", XX, XX, XX, XX },
2240 { "(bad)", XX, XX, XX, XX },
2241 { "(bad)", XX, XX, XX, XX },
2242 { "(bad)", XX, XX, XX, XX },
2243 /* 60 */
2244 { "(bad)", XX, XX, XX, XX },
2245 { "(bad)", XX, XX, XX, XX },
2246 { "(bad)", XX, XX, XX, XX },
2247 { "(bad)", XX, XX, XX, XX },
2248 { "(bad)", XX, XX, XX, XX },
2249 { "(bad)", XX, XX, XX, XX },
2250 { "(bad)", XX, XX, XX, XX },
2251 { "(bad)", XX, XX, XX, XX },
2252 /* 68 */
2253 { "(bad)", XX, XX, XX, XX },
2254 { "(bad)", XX, XX, XX, XX },
2255 { "(bad)", XX, XX, XX, XX },
2256 { "(bad)", XX, XX, XX, XX },
2257 { "(bad)", XX, XX, XX, XX },
2258 { "(bad)", XX, XX, XX, XX },
2259 { "(bad)", XX, XX, XX, XX },
2260 { "(bad)", XX, XX, XX, XX },
2261 /* 70 */
2262 { "(bad)", XX, XX, XX, XX },
2263 { "(bad)", XX, XX, XX, XX },
2264 { "(bad)", XX, XX, XX, XX },
2265 { "(bad)", XX, XX, XX, XX },
2266 { "(bad)", XX, XX, XX, XX },
2267 { "(bad)", XX, XX, XX, XX },
2268 { "(bad)", XX, XX, XX, XX },
2269 { "(bad)", XX, XX, XX, XX },
2270 /* 78 */
2271 { "(bad)", XX, XX, XX, XX },
2272 { "(bad)", XX, XX, XX, XX },
2273 { "(bad)", XX, XX, XX, XX },
2274 { "(bad)", XX, XX, XX, XX },
2275 { "(bad)", XX, XX, XX, XX },
2276 { "(bad)", XX, XX, XX, XX },
2277 { "(bad)", XX, XX, XX, XX },
2278 { "(bad)", XX, XX, XX, XX },
2279 /* 80 */
2280 { "(bad)", XX, XX, XX, XX },
2281 { "(bad)", XX, XX, XX, XX },
2282 { "(bad)", XX, XX, XX, XX },
2283 { "(bad)", XX, XX, XX, XX },
2284 { "(bad)", XX, XX, XX, XX },
2285 { "(bad)", XX, XX, XX, XX },
2286 { "(bad)", XX, XX, XX, XX },
2287 { "(bad)", XX, XX, XX, XX },
2288 /* 88 */
2289 { "(bad)", XX, XX, XX, XX },
2290 { "(bad)", XX, XX, XX, XX },
2291 { "(bad)", XX, XX, XX, XX },
2292 { "(bad)", XX, XX, XX, XX },
2293 { "(bad)", XX, XX, XX, XX },
2294 { "(bad)", XX, XX, XX, XX },
2295 { "(bad)", XX, XX, XX, XX },
2296 { "(bad)", XX, XX, XX, XX },
2297 /* 90 */
2298 { "(bad)", XX, XX, XX, XX },
2299 { "(bad)", XX, XX, XX, XX },
2300 { "(bad)", XX, XX, XX, XX },
2301 { "(bad)", XX, XX, XX, XX },
2302 { "(bad)", XX, XX, XX, XX },
2303 { "(bad)", XX, XX, XX, XX },
2304 { "(bad)", XX, XX, XX, XX },
2305 { "(bad)", XX, XX, XX, XX },
2306 /* 98 */
2307 { "(bad)", XX, XX, XX, XX },
2308 { "(bad)", XX, XX, XX, XX },
2309 { "(bad)", XX, XX, XX, XX },
2310 { "(bad)", XX, XX, XX, XX },
2311 { "(bad)", XX, XX, XX, XX },
2312 { "(bad)", XX, XX, XX, XX },
2313 { "(bad)", XX, XX, XX, XX },
2314 { "(bad)", XX, XX, XX, XX },
2315 /* a0 */
2316 { "(bad)", XX, XX, XX, XX },
2317 { "(bad)", XX, XX, XX, XX },
2318 { "(bad)", XX, XX, XX, XX },
2319 { "(bad)", XX, XX, XX, XX },
2320 { "(bad)", XX, XX, XX, XX },
2321 { "(bad)", XX, XX, XX, XX },
2322 { "(bad)", XX, XX, XX, XX },
2323 { "(bad)", XX, XX, XX, XX },
2324 /* a8 */
2325 { "(bad)", XX, XX, XX, XX },
2326 { "(bad)", XX, XX, XX, XX },
2327 { "(bad)", XX, XX, XX, XX },
2328 { "(bad)", XX, XX, XX, XX },
2329 { "(bad)", XX, XX, XX, XX },
2330 { "(bad)", XX, XX, XX, XX },
2331 { "(bad)", XX, XX, XX, XX },
2332 { "(bad)", XX, XX, XX, XX },
2333 /* b0 */
2334 { "(bad)", XX, XX, XX, XX },
2335 { "(bad)", XX, XX, XX, XX },
2336 { "(bad)", XX, XX, XX, XX },
2337 { "(bad)", XX, XX, XX, XX },
2338 { "(bad)", XX, XX, XX, XX },
2339 { "(bad)", XX, XX, XX, XX },
2340 { "(bad)", XX, XX, XX, XX },
2341 { "(bad)", XX, XX, XX, XX },
2342 /* b8 */
2343 { "(bad)", XX, XX, XX, XX },
2344 { "(bad)", XX, XX, XX, XX },
2345 { "(bad)", XX, XX, XX, XX },
2346 { "(bad)", XX, XX, XX, XX },
2347 { "(bad)", XX, XX, XX, XX },
2348 { "(bad)", XX, XX, XX, XX },
2349 { "(bad)", XX, XX, XX, XX },
2350 { "(bad)", XX, XX, XX, XX },
2351 /* c0 */
2352 { "(bad)", XX, XX, XX, XX },
2353 { "(bad)", XX, XX, XX, XX },
2354 { "(bad)", XX, XX, XX, XX },
2355 { "(bad)", XX, XX, XX, XX },
2356 { "(bad)", XX, XX, XX, XX },
2357 { "(bad)", XX, XX, XX, XX },
2358 { "(bad)", XX, XX, XX, XX },
2359 { "(bad)", XX, XX, XX, XX },
2360 /* c8 */
2361 { "(bad)", XX, XX, XX, XX },
2362 { "(bad)", XX, XX, XX, XX },
2363 { "(bad)", XX, XX, XX, XX },
2364 { "(bad)", XX, XX, XX, XX },
2365 { "(bad)", XX, XX, XX, XX },
2366 { "(bad)", XX, XX, XX, XX },
2367 { "(bad)", XX, XX, XX, XX },
2368 { "(bad)", XX, XX, XX, XX },
2369 /* d0 */
2370 { "(bad)", XX, XX, XX, XX },
2371 { "(bad)", XX, XX, XX, XX },
2372 { "(bad)", XX, XX, XX, XX },
2373 { "(bad)", XX, XX, XX, XX },
2374 { "(bad)", XX, XX, XX, XX },
2375 { "(bad)", XX, XX, XX, XX },
2376 { "(bad)", XX, XX, XX, XX },
2377 { "(bad)", XX, XX, XX, XX },
2378 /* d8 */
2379 { "(bad)", XX, XX, XX, XX },
2380 { "(bad)", XX, XX, XX, XX },
2381 { "(bad)", XX, XX, XX, XX },
2382 { "(bad)", XX, XX, XX, XX },
2383 { "(bad)", XX, XX, XX, XX },
2384 { "(bad)", XX, XX, XX, XX },
2385 { "(bad)", XX, XX, XX, XX },
2386 { "(bad)", XX, XX, XX, XX },
2387 /* e0 */
2388 { "(bad)", XX, XX, XX, XX },
2389 { "(bad)", XX, XX, XX, XX },
2390 { "(bad)", XX, XX, XX, XX },
2391 { "(bad)", XX, XX, XX, XX },
2392 { "(bad)", XX, XX, XX, XX },
2393 { "(bad)", XX, XX, XX, XX },
2394 { "(bad)", XX, XX, XX, XX },
2395 { "(bad)", XX, XX, XX, XX },
2396 /* e8 */
2397 { "(bad)", XX, XX, XX, XX },
2398 { "(bad)", XX, XX, XX, XX },
2399 { "(bad)", XX, XX, XX, XX },
2400 { "(bad)", XX, XX, XX, XX },
2401 { "(bad)", XX, XX, XX, XX },
2402 { "(bad)", XX, XX, XX, XX },
2403 { "(bad)", XX, XX, XX, XX },
2404 { "(bad)", XX, XX, XX, XX },
2405 /* f0 */
2406 { "(bad)", XX, XX, XX, XX },
2407 { "(bad)", XX, XX, XX, XX },
2408 { "(bad)", XX, XX, XX, XX },
2409 { "(bad)", XX, XX, XX, XX },
2410 { "(bad)", XX, XX, XX, XX },
2411 { "(bad)", XX, XX, XX, XX },
2412 { "(bad)", XX, XX, XX, XX },
2413 { "(bad)", XX, XX, XX, XX },
2414 /* f8 */
2415 { "(bad)", XX, XX, XX, XX },
2416 { "(bad)", XX, XX, XX, XX },
2417 { "(bad)", XX, XX, XX, XX },
2418 { "(bad)", XX, XX, XX, XX },
2419 { "(bad)", XX, XX, XX, XX },
2420 { "(bad)", XX, XX, XX, XX },
2421 { "(bad)", XX, XX, XX, XX },
2422 { "(bad)", XX, XX, XX, XX }
2423 },
2424};
2425
2426#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2427
2428static void
2429ckprefix (void)
2430{
2431 int newrex;
2432 rex = 0;
2433 prefixes = 0;
2434 used_prefixes = 0;
2435 rex_used = 0;
2436 while (1)
2437 {
2438 FETCH_DATA (the_info, codep + 1);
2439 newrex = 0;
2440 switch (*codep)
2441 {
2442 /* REX prefixes family. */
2443 case 0x40:
2444 case 0x41:
2445 case 0x42:
2446 case 0x43:
2447 case 0x44:
2448 case 0x45:
2449 case 0x46:
2450 case 0x47:
2451 case 0x48:
2452 case 0x49:
2453 case 0x4a:
2454 case 0x4b:
2455 case 0x4c:
2456 case 0x4d:
2457 case 0x4e:
2458 case 0x4f:
2459 if (address_mode == mode_64bit)
2460 newrex = *codep;
2461 else
2462 return;
2463 break;
2464 case 0xf3:
2465 prefixes |= PREFIX_REPZ;
2466 break;
2467 case 0xf2:
2468 prefixes |= PREFIX_REPNZ;
2469 break;
2470 case 0xf0:
2471 prefixes |= PREFIX_LOCK;
2472 break;
2473 case 0x2e:
2474 prefixes |= PREFIX_CS;
2475 break;
2476 case 0x36:
2477 prefixes |= PREFIX_SS;
2478 break;
2479 case 0x3e:
2480 prefixes |= PREFIX_DS;
2481 break;
2482 case 0x26:
2483 prefixes |= PREFIX_ES;
2484 break;
2485 case 0x64:
2486 prefixes |= PREFIX_FS;
2487 break;
2488 case 0x65:
2489 prefixes |= PREFIX_GS;
2490 break;
2491 case 0x66:
2492 prefixes |= PREFIX_DATA;
2493 break;
2494 case 0x67:
2495 prefixes |= PREFIX_ADDR;
2496 break;
2497 case FWAIT_OPCODE:
2498 /* fwait is really an instruction. If there are prefixes
2499 before the fwait, they belong to the fwait, *not* to the
2500 following instruction. */
2501 if (prefixes || rex)
2502 {
2503 prefixes |= PREFIX_FWAIT;
2504 codep++;
2505 return;
2506 }
2507 prefixes = PREFIX_FWAIT;
2508 break;
2509 default:
2510 return;
2511 }
2512 /* Rex is ignored when followed by another prefix. */
2513 if (rex)
2514 {
2515 rex_used = rex;
2516 return;
2517 }
2518 rex = newrex;
2519 codep++;
2520 }
2521}
2522
2523/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2524 prefix byte. */
2525
2526static const char *
2527prefix_name (int pref, int sizeflag)
2528{
2529 switch (pref)
2530 {
2531 /* REX prefixes family. */
2532 case 0x40:
2533 return "rex";
2534 case 0x41:
2535 return "rexZ";
2536 case 0x42:
2537 return "rexY";
2538 case 0x43:
2539 return "rexYZ";
2540 case 0x44:
2541 return "rexX";
2542 case 0x45:
2543 return "rexXZ";
2544 case 0x46:
2545 return "rexXY";
2546 case 0x47:
2547 return "rexXYZ";
2548 case 0x48:
2549 return "rex64";
2550 case 0x49:
2551 return "rex64Z";
2552 case 0x4a:
2553 return "rex64Y";
2554 case 0x4b:
2555 return "rex64YZ";
2556 case 0x4c:
2557 return "rex64X";
2558 case 0x4d:
2559 return "rex64XZ";
2560 case 0x4e:
2561 return "rex64XY";
2562 case 0x4f:
2563 return "rex64XYZ";
2564 case 0xf3:
2565 return "repz";
2566 case 0xf2:
2567 return "repnz";
2568 case 0xf0:
2569 return "lock";
2570 case 0x2e:
2571 return "cs";
2572 case 0x36:
2573 return "ss";
2574 case 0x3e:
2575 return "ds";
2576 case 0x26:
2577 return "es";
2578 case 0x64:
2579 return "fs";
2580 case 0x65:
2581 return "gs";
2582 case 0x66:
2583 return (sizeflag & DFLAG) ? "data16" : "data32";
2584 case 0x67:
2585 if (address_mode == mode_64bit)
2586 return (sizeflag & AFLAG) ? "addr32" : "addr64";
2587 else
2588 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2589 case FWAIT_OPCODE:
2590 return "fwait";
2591 default:
2592 return NULL;
2593 }
2594}
2595
2596static char op1out[100], op2out[100], op3out[100], op4out[100];
2597static int op_ad, op_index[4];
2598static int two_source_ops;
2599static bfd_vma op_address[4];
2600static bfd_vma op_riprel[4];
2601static bfd_vma start_pc;
2602\f
2603/*
2604 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2605 * (see topic "Redundant prefixes" in the "Differences from 8086"
2606 * section of the "Virtual 8086 Mode" chapter.)
2607 * 'pc' should be the address of this instruction, it will
2608 * be used to print the target address if this is a relative jump or call
2609 * The function returns the length of this instruction in bytes.
2610 */
2611
2612static char intel_syntax;
2613static char open_char;
2614static char close_char;
2615static char separator_char;
2616static char scale_char;
2617
2618/* Here for backwards compatibility. When gdb stops using
2619 print_insn_i386_att and print_insn_i386_intel these functions can
2620 disappear, and print_insn_i386 be merged into print_insn. */
2621int
2622print_insn_i386_att (bfd_vma pc, disassemble_info *info)
2623{
2624 intel_syntax = 0;
2625
2626 return print_insn (pc, info);
2627}
2628
2629int
2630print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
2631{
2632 intel_syntax = 1;
2633
2634 return print_insn (pc, info);
2635}
2636
2637int
2638print_insn_i386 (bfd_vma pc, disassemble_info *info)
2639{
2640 intel_syntax = -1;
2641
2642 return print_insn (pc, info);
2643}
2644
2645static int
2646print_insn (bfd_vma pc, disassemble_info *info)
2647{
2648 const struct dis386 *dp;
2649 int i;
2650 char *first, *second, *third, *fourth;
2651 int needcomma;
2652 unsigned char uses_SSE_prefix, uses_LOCK_prefix;
2653 int sizeflag;
2654 const char *p;
2655 struct dis_private priv;
2656
2657 if (info->mach == bfd_mach_x86_64_intel_syntax
2658 || info->mach == bfd_mach_x86_64)
2659 address_mode = mode_64bit;
2660 else
2661 address_mode = mode_32bit;
2662
2663 if (intel_syntax == (char) -1)
2664 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2665 || info->mach == bfd_mach_x86_64_intel_syntax);
2666
2667 if (info->mach == bfd_mach_i386_i386
2668 || info->mach == bfd_mach_x86_64
2669 || info->mach == bfd_mach_i386_i386_intel_syntax
2670 || info->mach == bfd_mach_x86_64_intel_syntax)
2671 priv.orig_sizeflag = AFLAG | DFLAG;
2672 else if (info->mach == bfd_mach_i386_i8086)
2673 priv.orig_sizeflag = 0;
2674 else
2675 abort ();
2676
2677 for (p = info->disassembler_options; p != NULL; )
2678 {
2679 if (CONST_STRNEQ (p, "x86-64"))
2680 {
2681 address_mode = mode_64bit;
2682 priv.orig_sizeflag = AFLAG | DFLAG;
2683 }
2684 else if (CONST_STRNEQ (p, "i386"))
2685 {
2686 address_mode = mode_32bit;
2687 priv.orig_sizeflag = AFLAG | DFLAG;
2688 }
2689 else if (CONST_STRNEQ (p, "i8086"))
2690 {
2691 address_mode = mode_16bit;
2692 priv.orig_sizeflag = 0;
2693 }
2694 else if (CONST_STRNEQ (p, "intel"))
2695 {
2696 intel_syntax = 1;
2697 }
2698 else if (CONST_STRNEQ (p, "att"))
2699 {
2700 intel_syntax = 0;
2701 }
2702 else if (CONST_STRNEQ (p, "addr"))
2703 {
2704 if (p[4] == '1' && p[5] == '6')
2705 priv.orig_sizeflag &= ~AFLAG;
2706 else if (p[4] == '3' && p[5] == '2')
2707 priv.orig_sizeflag |= AFLAG;
2708 }
2709 else if (CONST_STRNEQ (p, "data"))
2710 {
2711 if (p[4] == '1' && p[5] == '6')
2712 priv.orig_sizeflag &= ~DFLAG;
2713 else if (p[4] == '3' && p[5] == '2')
2714 priv.orig_sizeflag |= DFLAG;
2715 }
2716 else if (CONST_STRNEQ (p, "suffix"))
2717 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2718
2719 p = strchr (p, ',');
2720 if (p != NULL)
2721 p++;
2722 }
2723
2724 if (intel_syntax)
2725 {
2726 names64 = intel_names64;
2727 names32 = intel_names32;
2728 names16 = intel_names16;
2729 names8 = intel_names8;
2730 names8rex = intel_names8rex;
2731 names_seg = intel_names_seg;
2732 index16 = intel_index16;
2733 open_char = '[';
2734 close_char = ']';
2735 separator_char = '+';
2736 scale_char = '*';
2737 }
2738 else
2739 {
2740 names64 = att_names64;
2741 names32 = att_names32;
2742 names16 = att_names16;
2743 names8 = att_names8;
2744 names8rex = att_names8rex;
2745 names_seg = att_names_seg;
2746 index16 = att_index16;
2747 open_char = '(';
2748 close_char = ')';
2749 separator_char = ',';
2750 scale_char = ',';
2751 }
2752
2753 /* The output looks better if we put 7 bytes on a line, since that
2754 puts most long word instructions on a single line. */
2755 info->bytes_per_line = 7;
2756
2757 info->private_data = &priv;
2758 priv.max_fetched = priv.the_buffer;
2759 priv.insn_start = pc;
2760
2761 obuf[0] = 0;
2762 op1out[0] = 0;
2763 op2out[0] = 0;
2764 op3out[0] = 0;
2765 op4out[0] = 0;
2766
2767 op_index[0] = op_index[1] = op_index[2] = op_index[3] = -1;
2768
2769 the_info = info;
2770 start_pc = pc;
2771 start_codep = priv.the_buffer;
2772 codep = priv.the_buffer;
2773
2774 if (setjmp (priv.bailout) != 0)
2775 {
2776 const char *name;
2777
2778 /* Getting here means we tried for data but didn't get it. That
2779 means we have an incomplete instruction of some sort. Just
2780 print the first byte as a prefix or a .byte pseudo-op. */
2781 if (codep > priv.the_buffer)
2782 {
2783 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2784 if (name != NULL)
2785 (*info->fprintf_func) (info->stream, "%s", name);
2786 else
2787 {
2788 /* Just print the first byte as a .byte instruction. */
2789 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2790 (unsigned int) priv.the_buffer[0]);
2791 }
2792
2793 return 1;
2794 }
2795
2796 return -1;
2797 }
2798
2799 obufp = obuf;
2800 ckprefix ();
2801
2802 insn_codep = codep;
2803 sizeflag = priv.orig_sizeflag;
2804
2805 FETCH_DATA (info, codep + 1);
2806 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2807
2808 if (((prefixes & PREFIX_FWAIT)
2809 && ((*codep < 0xd8) || (*codep > 0xdf)))
2810 || (rex && rex_used))
2811 {
2812 const char *name;
2813
2814 /* fwait not followed by floating point instruction, or rex followed
2815 by other prefixes. Print the first prefix. */
2816 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2817 if (name == NULL)
2818 name = INTERNAL_DISASSEMBLER_ERROR;
2819 (*info->fprintf_func) (info->stream, "%s", name);
2820 return 1;
2821 }
2822
2823 if (*codep == 0x0f)
2824 {
2825 FETCH_DATA (info, codep + 2);
2826 dp = &dis386_twobyte[*++codep];
2827 need_modrm = twobyte_has_modrm[*codep];
2828 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2829 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
2830 }
2831 else
2832 {
2833 dp = &dis386[*codep];
2834 need_modrm = onebyte_has_modrm[*codep];
2835 uses_SSE_prefix = 0;
2836 uses_LOCK_prefix = 0;
2837 }
2838
2839 /*"lzcnt"=0xBD and "popcnt"=0xB8 are the only two non-sse
2840 instruction which uses F3 in the opcode without any "rep(z|nz)"*/
2841 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ) && *codep != 0xBD && *codep != 0xB8)
2842 {
2843 oappend ("repz ");
2844 used_prefixes |= PREFIX_REPZ;
2845 }
2846 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ) && *codep != 0xBD && *codep != 0xB8)
2847 {
2848 oappend ("repnz ");
2849 used_prefixes |= PREFIX_REPNZ;
2850 }
2851
2852 codep++;
2853
2854 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
2855 {
2856 oappend ("lock ");
2857 used_prefixes |= PREFIX_LOCK;
2858 }
2859
2860 if (prefixes & PREFIX_ADDR)
2861 {
2862 sizeflag ^= AFLAG;
2863 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2864 {
2865 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
2866 oappend ("addr32 ");
2867 else
2868 oappend ("addr16 ");
2869 used_prefixes |= PREFIX_ADDR;
2870 }
2871 }
2872
2873 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2874 {
2875 sizeflag ^= DFLAG;
2876 if (dp->bytemode3 == cond_jump_mode
2877 && dp->bytemode1 == v_mode
2878 && !intel_syntax)
2879 {
2880 if (sizeflag & DFLAG)
2881 oappend ("data32 ");
2882 else
2883 oappend ("data16 ");
2884 used_prefixes |= PREFIX_DATA;
2885 }
2886 }
2887
2888 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
2889 {
2890 FETCH_DATA (info, codep + 2);
2891 dp = &three_byte_table[dp->bytemode2][*codep++];
2892 mod = (*codep >> 6) & 3;
2893 reg = (*codep >> 3) & 7;
2894 rm = *codep & 7;
2895 }
2896 else if (need_modrm)
2897 {
2898 FETCH_DATA (info, codep + 1);
2899 mod = (*codep >> 6) & 3;
2900 reg = (*codep >> 3) & 7;
2901 rm = *codep & 7;
2902 }
2903
2904 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2905 {
2906 dofloat (sizeflag);
2907 }
2908 else
2909 {
2910 int index;
2911 if (dp->name == NULL)
2912 {
2913 switch (dp->bytemode1)
2914 {
2915 case USE_GROUPS:
2916 dp = &grps[dp->bytemode2][reg];
2917 break;
2918
2919 case USE_PREFIX_USER_TABLE:
2920 index = 0;
2921 used_prefixes |= (prefixes & PREFIX_REPZ);
2922 if (prefixes & PREFIX_REPZ)
2923 index = 1;
2924 else
2925 {
2926 used_prefixes |= (prefixes & PREFIX_DATA);
2927 if (prefixes & PREFIX_DATA)
2928 index = 2;
2929 else
2930 {
2931 used_prefixes |= (prefixes & PREFIX_REPNZ);
2932 if (prefixes & PREFIX_REPNZ)
2933 index = 3;
2934 }
2935 }
2936 dp = &prefix_user_table[dp->bytemode2][index];
2937 break;
2938
2939 case X86_64_SPECIAL:
2940 index = address_mode == mode_64bit ? 1 : 0;
2941 dp = &x86_64_table[dp->bytemode2][index];
2942 break;
2943
2944 default:
2945 oappend (INTERNAL_DISASSEMBLER_ERROR);
2946 break;
2947 }
2948 }
2949
2950 if (putop (dp->name, sizeflag) == 0)
2951 {
2952 obufp = op1out;
2953 op_ad = 3;
2954 if (dp->op1)
2955 (*dp->op1) (dp->bytemode1, sizeflag);
2956
2957 obufp = op2out;
2958 op_ad = 2;
2959 if (dp->op2)
2960 (*dp->op2) (dp->bytemode2, sizeflag);
2961
2962 obufp = op3out;
2963 op_ad = 1;
2964 if (dp->op3)
2965 (*dp->op3) (dp->bytemode3, sizeflag);
2966
2967 obufp = op4out;
2968 op_ad = 0;
2969 if (dp->op4)
2970 (*dp->op4) (dp->bytemode4, sizeflag);
2971 }
2972 }
2973
2974 /* See if any prefixes were not used. If so, print the first one
2975 separately. If we don't do this, we'll wind up printing an
2976 instruction stream which does not precisely correspond to the
2977 bytes we are disassembling. */
2978 if ((prefixes & ~used_prefixes) != 0)
2979 {
2980 const char *name;
2981
2982 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2983 if (name == NULL)
2984 name = INTERNAL_DISASSEMBLER_ERROR;
2985 (*info->fprintf_func) (info->stream, "%s", name);
2986 return 1;
2987 }
2988 if (rex & ~rex_used)
2989 {
2990 const char *name;
2991 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2992 if (name == NULL)
2993 name = INTERNAL_DISASSEMBLER_ERROR;
2994 (*info->fprintf_func) (info->stream, "%s ", name);
2995 }
2996
2997 obufp = obuf + strlen (obuf);
2998 for (i = strlen (obuf); i < 6; i++)
2999 oappend (" ");
3000 oappend (" ");
3001 (*info->fprintf_func) (info->stream, "%s", obuf);
3002
3003 /* The enter and bound instructions are printed with operands in the same
3004 order as the intel book; everything else is printed in reverse order. */
3005 if (intel_syntax || two_source_ops)
3006 {
3007 first = op1out;
3008 second = op2out;
3009 third = op3out;
3010 fourth = op4out;
3011 op_ad = op_index[0];
3012 op_index[0] = op_index[3];
3013 op_index[3] = op_ad;
3014 op_ad = op_index[1];
3015 op_index[1] = op_index[2];
3016 op_index[2] = op_ad;
3017
3018 }
3019 else
3020 {
3021 first = op4out;
3022 second = op3out;
3023 third = op2out;
3024 fourth = op1out;
3025 }
3026 needcomma = 0;
3027 if (*first)
3028 {
3029 if (op_index[0] != -1 && !op_riprel[0])
3030 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3031 else
3032 (*info->fprintf_func) (info->stream, "%s", first);
3033 needcomma = 1;
3034 }
3035
3036 if (*second)
3037 {
3038 if (needcomma)
3039 (*info->fprintf_func) (info->stream, ",");
3040 if (op_index[1] != -1 && !op_riprel[1])
3041 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3042 else
3043 (*info->fprintf_func) (info->stream, "%s", second);
3044 needcomma = 1;
3045 }
3046
3047 if (*third)
3048 {
3049 if (needcomma)
3050 (*info->fprintf_func) (info->stream, ",");
3051 if (op_index[2] != -1 && !op_riprel[2])
3052 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3053 else
3054 (*info->fprintf_func) (info->stream, "%s", third);
3055 needcomma = 1;
3056 }
3057
3058 if (*fourth)
3059 {
3060 if (needcomma)
3061 (*info->fprintf_func) (info->stream, ",");
3062 if (op_index[3] != -1 && !op_riprel[3])
3063 (*info->print_address_func) ((bfd_vma) op_address[op_index[3]], info);
3064 else
3065 (*info->fprintf_func) (info->stream, "%s", fourth);
3066 }
3067
3068 for (i = 0; i < 4; i++)
3069 if (op_index[i] != -1 && op_riprel[i])
3070 {
3071 (*info->fprintf_func) (info->stream, " # ");
3072 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3073 + op_address[op_index[i]]), info);
3074 }
3075 return codep - priv.the_buffer;
3076}
3077
3078static const char *float_mem[] = {
3079 /* d8 */
3080 "fadd{s||s|}",
3081 "fmul{s||s|}",
3082 "fcom{s||s|}",
3083 "fcomp{s||s|}",
3084 "fsub{s||s|}",
3085 "fsubr{s||s|}",
3086 "fdiv{s||s|}",
3087 "fdivr{s||s|}",
3088 /* d9 */
3089 "fld{s||s|}",
3090 "(bad)",
3091 "fst{s||s|}",
3092 "fstp{s||s|}",
3093 "fldenvIC",
3094 "fldcw",
3095 "fNstenvIC",
3096 "fNstcw",
3097 /* da */
3098 "fiadd{l||l|}",
3099 "fimul{l||l|}",
3100 "ficom{l||l|}",
3101 "ficomp{l||l|}",
3102 "fisub{l||l|}",
3103 "fisubr{l||l|}",
3104 "fidiv{l||l|}",
3105 "fidivr{l||l|}",
3106 /* db */
3107 "fild{l||l|}",
3108 "fisttp{l||l|}",
3109 "fist{l||l|}",
3110 "fistp{l||l|}",
3111 "(bad)",
3112 "fld{t||t|}",
3113 "(bad)",
3114 "fstp{t||t|}",
3115 /* dc */
3116 "fadd{l||l|}",
3117 "fmul{l||l|}",
3118 "fcom{l||l|}",
3119 "fcomp{l||l|}",
3120 "fsub{l||l|}",
3121 "fsubr{l||l|}",
3122 "fdiv{l||l|}",
3123 "fdivr{l||l|}",
3124 /* dd */
3125 "fld{l||l|}",
3126 "fisttp{ll||ll|}",
3127 "fst{l||l|}",
3128 "fstp{l||l|}",
3129 "frstorIC",
3130 "(bad)",
3131 "fNsaveIC",
3132 "fNstsw",
3133 /* de */
3134 "fiadd",
3135 "fimul",
3136 "ficom",
3137 "ficomp",
3138 "fisub",
3139 "fisubr",
3140 "fidiv",
3141 "fidivr",
3142 /* df */
3143 "fild",
3144 "fisttp",
3145 "fist",
3146 "fistp",
3147 "fbld",
3148 "fild{ll||ll|}",
3149 "fbstp",
3150 "fistp{ll||ll|}",
3151};
3152
3153static const unsigned char float_mem_mode[] = {
3154 /* d8 */
3155 d_mode,
3156 d_mode,
3157 d_mode,
3158 d_mode,
3159 d_mode,
3160 d_mode,
3161 d_mode,
3162 d_mode,
3163 /* d9 */
3164 d_mode,
3165 0,
3166 d_mode,
3167 d_mode,
3168 0,
3169 w_mode,
3170 0,
3171 w_mode,
3172 /* da */
3173 d_mode,
3174 d_mode,
3175 d_mode,
3176 d_mode,
3177 d_mode,
3178 d_mode,
3179 d_mode,
3180 d_mode,
3181 /* db */
3182 d_mode,
3183 d_mode,
3184 d_mode,
3185 d_mode,
3186 0,
3187 t_mode,
3188 0,
3189 t_mode,
3190 /* dc */
3191 q_mode,
3192 q_mode,
3193 q_mode,
3194 q_mode,
3195 q_mode,
3196 q_mode,
3197 q_mode,
3198 q_mode,
3199 /* dd */
3200 q_mode,
3201 q_mode,
3202 q_mode,
3203 q_mode,
3204 0,
3205 0,
3206 0,
3207 w_mode,
3208 /* de */
3209 w_mode,
3210 w_mode,
3211 w_mode,
3212 w_mode,
3213 w_mode,
3214 w_mode,
3215 w_mode,
3216 w_mode,
3217 /* df */
3218 w_mode,
3219 w_mode,
3220 w_mode,
3221 w_mode,
3222 t_mode,
3223 q_mode,
3224 t_mode,
3225 q_mode
3226};
3227
3228#define ST OP_ST, 0
3229#define STi OP_STi, 0
3230
3231#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0, NULL, 0
3232#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0, NULL, 0
3233#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0, NULL, 0
3234#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0, NULL, 0
3235#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0, NULL, 0
3236#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0, NULL, 0
3237#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0, NULL, 0
3238#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0, NULL, 0
3239#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0, NULL, 0
3240
3241static const struct dis386 float_reg[][8] = {
3242 /* d8 */
3243 {
3244 { "fadd", ST, STi, XX, XX },
3245 { "fmul", ST, STi, XX, XX },
3246 { "fcom", STi, XX, XX, XX },
3247 { "fcomp", STi, XX, XX, XX },
3248 { "fsub", ST, STi, XX, XX },
3249 { "fsubr", ST, STi, XX, XX },
3250 { "fdiv", ST, STi, XX, XX },
3251 { "fdivr", ST, STi, XX, XX },
3252 },
3253 /* d9 */
3254 {
3255 { "fld", STi, XX, XX, XX },
3256 { "fxch", STi, XX, XX, XX },
3257 { FGRPd9_2 },
3258 { "(bad)", XX, XX, XX, XX },
3259 { FGRPd9_4 },
3260 { FGRPd9_5 },
3261 { FGRPd9_6 },
3262 { FGRPd9_7 },
3263 },
3264 /* da */
3265 {
3266 { "fcmovb", ST, STi, XX, XX },
3267 { "fcmove", ST, STi, XX, XX },
3268 { "fcmovbe",ST, STi, XX, XX },
3269 { "fcmovu", ST, STi, XX, XX },
3270 { "(bad)", XX, XX, XX, XX },
3271 { FGRPda_5 },
3272 { "(bad)", XX, XX, XX, XX },
3273 { "(bad)", XX, XX, XX, XX },
3274 },
3275 /* db */
3276 {
3277 { "fcmovnb",ST, STi, XX, XX },
3278 { "fcmovne",ST, STi, XX, XX },
3279 { "fcmovnbe",ST, STi, XX, XX },
3280 { "fcmovnu",ST, STi, XX, XX },
3281 { FGRPdb_4 },
3282 { "fucomi", ST, STi, XX, XX },
3283 { "fcomi", ST, STi, XX, XX },
3284 { "(bad)", XX, XX, XX, XX },
3285 },
3286 /* dc */
3287 {
3288 { "fadd", STi, ST, XX, XX },
3289 { "fmul", STi, ST, XX, XX },
3290 { "(bad)", XX, XX, XX, XX },
3291 { "(bad)", XX, XX, XX, XX },
3292#if UNIXWARE_COMPAT
3293 { "fsub", STi, ST, XX, XX },
3294 { "fsubr", STi, ST, XX, XX },
3295 { "fdiv", STi, ST, XX, XX },
3296 { "fdivr", STi, ST, XX, XX },
3297#else
3298 { "fsubr", STi, ST, XX, XX },
3299 { "fsub", STi, ST, XX, XX },
3300 { "fdivr", STi, ST, XX, XX },
3301 { "fdiv", STi, ST, XX, XX },
3302#endif
3303 },
3304 /* dd */
3305 {
3306 { "ffree", STi, XX, XX, XX },
3307 { "(bad)", XX, XX, XX, XX },
3308 { "fst", STi, XX, XX, XX },
3309 { "fstp", STi, XX, XX, XX },
3310 { "fucom", STi, XX, XX, XX },
3311 { "fucomp", STi, XX, XX, XX },
3312 { "(bad)", XX, XX, XX, XX },
3313 { "(bad)", XX, XX, XX, XX },
3314 },
3315 /* de */
3316 {
3317 { "faddp", STi, ST, XX, XX },
3318 { "fmulp", STi, ST, XX, XX },
3319 { "(bad)", XX, XX, XX, XX },
3320 { FGRPde_3 },
3321#if UNIXWARE_COMPAT
3322 { "fsubp", STi, ST, XX, XX },
3323 { "fsubrp", STi, ST, XX, XX },
3324 { "fdivp", STi, ST, XX, XX },
3325 { "fdivrp", STi, ST, XX, XX },
3326#else
3327 { "fsubrp", STi, ST, XX, XX },
3328 { "fsubp", STi, ST, XX, XX },
3329 { "fdivrp", STi, ST, XX, XX },
3330 { "fdivp", STi, ST, XX, XX },
3331#endif
3332 },
3333 /* df */
3334 {
3335 { "ffreep", STi, XX, XX, XX },
3336 { "(bad)", XX, XX, XX, XX },
3337 { "(bad)", XX, XX, XX, XX },
3338 { "(bad)", XX, XX, XX, XX },
3339 { FGRPdf_4 },
3340 { "fucomip",ST, STi, XX, XX },
3341 { "fcomip", ST, STi, XX, XX },
3342 { "(bad)", XX, XX, XX, XX },
3343 },
3344};
3345
3346static char *fgrps[][8] = {
3347 /* d9_2 0 */
3348 {
3349 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3350 },
3351
3352 /* d9_4 1 */
3353 {
3354 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3355 },
3356
3357 /* d9_5 2 */
3358 {
3359 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3360 },
3361
3362 /* d9_6 3 */
3363 {
3364 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3365 },
3366
3367 /* d9_7 4 */
3368 {
3369 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3370 },
3371
3372 /* da_5 5 */
3373 {
3374 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3375 },
3376
3377 /* db_4 6 */
3378 {
3379 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3380 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3381 },
3382
3383 /* de_3 7 */
3384 {
3385 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3386 },
3387
3388 /* df_4 8 */
3389 {
3390 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3391 },
3392};
3393
3394static void
3395dofloat (int sizeflag)
3396{
3397 const struct dis386 *dp;
3398 unsigned char floatop;
3399
3400 floatop = codep[-1];
3401
3402 if (mod != 3)
3403 {
3404 int fp_indx = (floatop - 0xd8) * 8 + reg;
3405
3406 putop (float_mem[fp_indx], sizeflag);
3407 obufp = op1out;
3408 op_ad = 2;
3409 OP_E (float_mem_mode[fp_indx], sizeflag);
3410 return;
3411 }
3412 /* Skip mod/rm byte. */
3413 MODRM_CHECK;
3414 codep++;
3415
3416 dp = &float_reg[floatop - 0xd8][reg];
3417 if (dp->name == NULL)
3418 {
3419 putop (fgrps[dp->bytemode1][rm], sizeflag);
3420
3421 /* Instruction fnstsw is only one with strange arg. */
3422 if (floatop == 0xdf && codep[-1] == 0xe0)
3423 strcpy (op1out, names16[0]);
3424 }
3425 else
3426 {
3427 putop (dp->name, sizeflag);
3428
3429 obufp = op1out;
3430 op_ad = 2;
3431 if (dp->op1)
3432 (*dp->op1) (dp->bytemode1, sizeflag);
3433
3434 obufp = op2out;
3435 op_ad = 1;
3436 if (dp->op2)
3437 (*dp->op2) (dp->bytemode2, sizeflag);
3438 }
3439}
3440
3441static void
3442OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3443{
3444 oappend ("%st" + intel_syntax);
3445}
3446
3447static void
3448OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3449{
3450 sprintf (scratchbuf, "%%st(%d)", rm);
3451 oappend (scratchbuf + intel_syntax);
3452}
3453
3454/* Capital letters in template are macros. */
3455static int
3456putop (const char *template, int sizeflag)
3457{
3458 const char *p;
3459 int alt = 0;
3460
3461 for (p = template; *p; p++)
3462 {
3463 switch (*p)
3464 {
3465 default:
3466 *obufp++ = *p;
3467 break;
3468 case '{':
3469 alt = 0;
3470 if (intel_syntax)
3471 alt += 1;
3472 if (address_mode == mode_64bit)
3473 alt += 2;
3474 while (alt != 0)
3475 {
3476 while (*++p != '|')
3477 {
3478 if (*p == '}')
3479 {
3480 /* Alternative not valid. */
3481 strcpy (obuf, "(bad)");
3482 obufp = obuf + 5;
3483 return 1;
3484 }
3485 else if (*p == '\0')
3486 abort ();
3487 }
3488 alt--;
3489 }
3490 /* Fall through. */
3491 case 'I':
3492 alt = 1;
3493 continue;
3494 case '|':
3495 while (*++p != '}')
3496 {
3497 if (*p == '\0')
3498 abort ();
3499 }
3500 break;
3501 case '}':
3502 break;
3503 case 'A':
3504 if (intel_syntax)
3505 break;
3506 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3507 *obufp++ = 'b';
3508 break;
3509 case 'B':
3510 if (intel_syntax)
3511 break;
3512 if (sizeflag & SUFFIX_ALWAYS)
3513 *obufp++ = 'b';
3514 break;
3515 case 'C':
3516 if (intel_syntax && !alt)
3517 break;
3518 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
3519 {
3520 if (sizeflag & DFLAG)
3521 *obufp++ = intel_syntax ? 'd' : 'l';
3522 else
3523 *obufp++ = intel_syntax ? 'w' : 's';
3524 used_prefixes |= (prefixes & PREFIX_DATA);
3525 }
3526 break;
3527 case 'E': /* For jcxz/jecxz */
3528 if (address_mode == mode_64bit)
3529 {
3530 if (sizeflag & AFLAG)
3531 *obufp++ = 'r';
3532 else
3533 *obufp++ = 'e';
3534 }
3535 else
3536 if (sizeflag & AFLAG)
3537 *obufp++ = 'e';
3538 used_prefixes |= (prefixes & PREFIX_ADDR);
3539 break;
3540 case 'F':
3541 if (intel_syntax)
3542 break;
3543 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3544 {
3545 if (sizeflag & AFLAG)
3546 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
3547 else
3548 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
3549 used_prefixes |= (prefixes & PREFIX_ADDR);
3550 }
3551 break;
3552 case 'H':
3553 if (intel_syntax)
3554 break;
3555 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
3556 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
3557 {
3558 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
3559 *obufp++ = ',';
3560 *obufp++ = 'p';
3561 if (prefixes & PREFIX_DS)
3562 *obufp++ = 't';
3563 else
3564 *obufp++ = 'n';
3565 }
3566 break;
3567 case 'J':
3568 if (intel_syntax)
3569 break;
3570 *obufp++ = 'l';
3571 break;
3572 case 'Z':
3573 if (intel_syntax)
3574 break;
3575 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
3576 {
3577 *obufp++ = 'q';
3578 break;
3579 }
3580 /* Fall through. */
3581 case 'L':
3582 if (intel_syntax)
3583 break;
3584 if (sizeflag & SUFFIX_ALWAYS)
3585 *obufp++ = 'l';
3586 break;
3587 case 'N':
3588 if ((prefixes & PREFIX_FWAIT) == 0)
3589 *obufp++ = 'n';
3590 else
3591 used_prefixes |= PREFIX_FWAIT;
3592 break;
3593 case 'O':
3594 USED_REX (REX_MODE64);
3595 if (rex & REX_MODE64)
3596 *obufp++ = 'o';
3597 else
3598 *obufp++ = 'd';
3599 break;
3600 case 'T':
3601 if (intel_syntax)
3602 break;
3603 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3604 {
3605 *obufp++ = 'q';
3606 break;
3607 }
3608 /* Fall through. */
3609 case 'P':
3610 if (intel_syntax)
3611 break;
3612 if ((prefixes & PREFIX_DATA)
3613 || (rex & REX_MODE64)
3614 || (sizeflag & SUFFIX_ALWAYS))
3615 {
3616 USED_REX (REX_MODE64);
3617 if (rex & REX_MODE64)
3618 *obufp++ = 'q';
3619 else
3620 {
3621 if (sizeflag & DFLAG)
3622 *obufp++ = 'l';
3623 else
3624 *obufp++ = 'w';
3625 }
3626 used_prefixes |= (prefixes & PREFIX_DATA);
3627 }
3628 break;
3629 case 'U':
3630 if (intel_syntax)
3631 break;
3632 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3633 {
3634 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3635 *obufp++ = 'q';
3636 break;
3637 }
3638 /* Fall through. */
3639 case 'Q':
3640 if (intel_syntax && !alt)
3641 break;
3642 USED_REX (REX_MODE64);
3643 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
3644 {
3645 if (rex & REX_MODE64)
3646 *obufp++ = 'q';
3647 else
3648 {
3649 if (sizeflag & DFLAG)
3650 *obufp++ = intel_syntax ? 'd' : 'l';
3651 else
3652 *obufp++ = 'w';
3653 }
3654 used_prefixes |= (prefixes & PREFIX_DATA);
3655 }
3656 break;
3657 case 'R':
3658 USED_REX (REX_MODE64);
3659 if (intel_syntax)
3660 {
3661 if (rex & REX_MODE64)
3662 {
3663 *obufp++ = 'q';
3664 *obufp++ = 't';
3665 }
3666 else if (sizeflag & DFLAG)
3667 {
3668 *obufp++ = 'd';
3669 *obufp++ = 'q';
3670 }
3671 else
3672 {
3673 *obufp++ = 'w';
3674 *obufp++ = 'd';
3675 }
3676 }
3677 else
3678 {
3679 if (rex & REX_MODE64)
3680 *obufp++ = 'q';
3681 else if (sizeflag & DFLAG)
3682 *obufp++ = 'l';
3683 else
3684 *obufp++ = 'w';
3685 }
3686 if (!(rex & REX_MODE64))
3687 used_prefixes |= (prefixes & PREFIX_DATA);
3688 break;
3689 case 'V':
3690 if (intel_syntax)
3691 break;
3692 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3693 {
3694 if (sizeflag & SUFFIX_ALWAYS)
3695 *obufp++ = 'q';
3696 break;
3697 }
3698 /* Fall through. */
3699 case 'S':
3700 if (intel_syntax)
3701 break;
3702 if (sizeflag & SUFFIX_ALWAYS)
3703 {
3704 if (rex & REX_MODE64)
3705 *obufp++ = 'q';
3706 else
3707 {
3708 if (sizeflag & DFLAG)
3709 *obufp++ = 'l';
3710 else
3711 *obufp++ = 'w';
3712 used_prefixes |= (prefixes & PREFIX_DATA);
3713 }
3714 }
3715 break;
3716 case 'X':
3717 if (prefixes & PREFIX_DATA)
3718 *obufp++ = 'd';
3719 else
3720 *obufp++ = 's';
3721 used_prefixes |= (prefixes & PREFIX_DATA);
3722 break;
3723 case 'Y':
3724 if (intel_syntax)
3725 break;
3726 if (rex & REX_MODE64)
3727 {
3728 USED_REX (REX_MODE64);
3729 *obufp++ = 'q';
3730 }
3731 break;
3732 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
3733 case 'W':
3734 /* operand size flag for cwtl, cbtw */
3735 USED_REX (0);
3736 if (rex)
3737 *obufp++ = 'l';
3738 else if (sizeflag & DFLAG)
3739 *obufp++ = 'w';
3740 else
3741 *obufp++ = 'b';
3742 if (intel_syntax)
3743 {
3744 if (rex)
3745 {
3746 *obufp++ = 'q';
3747 *obufp++ = 'e';
3748 }
3749 if (sizeflag & DFLAG)
3750 {
3751 *obufp++ = 'd';
3752 *obufp++ = 'e';
3753 }
3754 else
3755 {
3756 *obufp++ = 'w';
3757 }
3758 }
3759 if (!rex)
3760 used_prefixes |= (prefixes & PREFIX_DATA);
3761 break;
3762 }
3763 alt = 0;
3764 }
3765 *obufp = 0;
3766 return 0;
3767}
3768
3769static void
3770oappend (const char *s)
3771{
3772 strcpy (obufp, s);
3773 obufp += strlen (s);
3774}
3775
3776static void
3777append_seg (void)
3778{
3779 if (prefixes & PREFIX_CS)
3780 {
3781 used_prefixes |= PREFIX_CS;
3782 oappend ("%cs:" + intel_syntax);
3783 }
3784 if (prefixes & PREFIX_DS)
3785 {
3786 used_prefixes |= PREFIX_DS;
3787 oappend ("%ds:" + intel_syntax);
3788 }
3789 if (prefixes & PREFIX_SS)
3790 {
3791 used_prefixes |= PREFIX_SS;
3792 oappend ("%ss:" + intel_syntax);
3793 }
3794 if (prefixes & PREFIX_ES)
3795 {
3796 used_prefixes |= PREFIX_ES;
3797 oappend ("%es:" + intel_syntax);
3798 }
3799 if (prefixes & PREFIX_FS)
3800 {
3801 used_prefixes |= PREFIX_FS;
3802 oappend ("%fs:" + intel_syntax);
3803 }
3804 if (prefixes & PREFIX_GS)
3805 {
3806 used_prefixes |= PREFIX_GS;
3807 oappend ("%gs:" + intel_syntax);
3808 }
3809}
3810
3811static void
3812OP_indirE (int bytemode, int sizeflag)
3813{
3814 if (!intel_syntax)
3815 oappend ("*");
3816 OP_E (bytemode, sizeflag);
3817}
3818
3819static void
3820print_operand_value (char *buf, int hex, bfd_vma disp)
3821{
3822 if (address_mode == mode_64bit)
3823 {
3824 if (hex)
3825 {
3826 char tmp[30];
3827 int i;
3828 buf[0] = '0';
3829 buf[1] = 'x';
3830 sprintf_vma (tmp, disp);
3831 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3832 strcpy (buf + 2, tmp + i);
3833 }
3834 else
3835 {
3836 bfd_signed_vma v = disp;
3837 char tmp[30];
3838 int i;
3839 if (v < 0)
3840 {
3841 *(buf++) = '-';
3842 v = -disp;
3843 /* Check for possible overflow on 0x8000000000000000. */
3844 if (v < 0)
3845 {
3846 strcpy (buf, "9223372036854775808");
3847 return;
3848 }
3849 }
3850 if (!v)
3851 {
3852 strcpy (buf, "0");
3853 return;
3854 }
3855
3856 i = 0;
3857 tmp[29] = 0;
3858 while (v)
3859 {
3860 tmp[28 - i] = (v % 10) + '0';
3861 v /= 10;
3862 i++;
3863 }
3864 strcpy (buf, tmp + 29 - i);
3865 }
3866 }
3867 else
3868 {
3869 if (hex)
3870 sprintf (buf, "0x%x", (unsigned int) disp);
3871 else
3872 sprintf (buf, "%d", (int) disp);
3873 }
3874}
3875
3876static void
3877intel_operand_size (int bytemode, int sizeflag)
3878{
3879 switch (bytemode)
3880 {
3881 case b_mode:
3882 oappend ("BYTE PTR ");
3883 break;
3884 case w_mode:
3885 case dqw_mode:
3886 oappend ("WORD PTR ");
3887 break;
3888 case stack_v_mode:
3889 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3890 {
3891 oappend ("QWORD PTR ");
3892 used_prefixes |= (prefixes & PREFIX_DATA);
3893 break;
3894 }
3895 /* FALLTHRU */
3896 case v_mode:
3897 case dq_mode:
3898 USED_REX (REX_MODE64);
3899 if (rex & REX_MODE64)
3900 oappend ("QWORD PTR ");
3901 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3902 oappend ("DWORD PTR ");
3903 else
3904 oappend ("WORD PTR ");
3905 used_prefixes |= (prefixes & PREFIX_DATA);
3906 break;
3907 case d_mode:
3908 oappend ("DWORD PTR ");
3909 break;
3910 case q_mode:
3911 oappend ("QWORD PTR ");
3912 break;
3913 case m_mode:
3914 if (address_mode == mode_64bit)
3915 oappend ("QWORD PTR ");
3916 else
3917 oappend ("DWORD PTR ");
3918 break;
3919 case f_mode:
3920 if (sizeflag & DFLAG)
3921 oappend ("FWORD PTR ");
3922 else
3923 oappend ("DWORD PTR ");
3924 used_prefixes |= (prefixes & PREFIX_DATA);
3925 break;
3926 case t_mode:
3927 oappend ("TBYTE PTR ");
3928 break;
3929 case x_mode:
3930 oappend ("XMMWORD PTR ");
3931 break;
3932 default:
3933 break;
3934 }
3935}
3936
3937static void
3938OP_E (int bytemode, int sizeflag)
3939{
3940 bfd_vma disp;
3941 int add = 0;
3942 int riprel = 0;
3943 USED_REX (REX_EXTZ);
3944 if (rex & REX_EXTZ)
3945 add += 8;
3946
3947 /* Skip mod/rm byte. */
3948 MODRM_CHECK;
3949 codep++;
3950
3951 if (mod == 3)
3952 {
3953 switch (bytemode)
3954 {
3955 case b_mode:
3956 USED_REX (0);
3957 if (rex)
3958 oappend (names8rex[rm + add]);
3959 else
3960 oappend (names8[rm + add]);
3961 break;
3962 case w_mode:
3963 oappend (names16[rm + add]);
3964 break;
3965 case d_mode:
3966 oappend (names32[rm + add]);
3967 break;
3968 case q_mode:
3969 oappend (names64[rm + add]);
3970 break;
3971 case m_mode:
3972 if (address_mode == mode_64bit)
3973 oappend (names64[rm + add]);
3974 else
3975 oappend (names32[rm + add]);
3976 break;
3977 case stack_v_mode:
3978 if (address_mode == mode_64bit && (sizeflag & DFLAG))
3979 {
3980 oappend (names64[rm + add]);
3981 used_prefixes |= (prefixes & PREFIX_DATA);
3982 break;
3983 }
3984 bytemode = v_mode;
3985 /* FALLTHRU */
3986 case v_mode:
3987 case dq_mode:
3988 case dqw_mode:
3989 USED_REX (REX_MODE64);
3990 if (rex & REX_MODE64)
3991 oappend (names64[rm + add]);
3992 else if ((sizeflag & DFLAG) || bytemode != v_mode)
3993 oappend (names32[rm + add]);
3994 else
3995 oappend (names16[rm + add]);
3996 used_prefixes |= (prefixes & PREFIX_DATA);
3997 break;
3998 case 0:
3999 break;
4000 default:
4001 oappend (INTERNAL_DISASSEMBLER_ERROR);
4002 break;
4003 }
4004 return;
4005 }
4006
4007 disp = 0;
4008 if (intel_syntax)
4009 intel_operand_size (bytemode, sizeflag);
4010 append_seg ();
4011
4012 if ((sizeflag & AFLAG) || address_mode == mode_64bit) /* 32 bit address mode */
4013 {
4014 int havesib;
4015 int havebase;
4016 int base;
4017 int index = 0;
4018 int scale = 0;
4019
4020 havesib = 0;
4021 havebase = 1;
4022 base = rm;
4023
4024 if (base == 4)
4025 {
4026 havesib = 1;
4027 FETCH_DATA (the_info, codep + 1);
4028 index = (*codep >> 3) & 7;
4029 if (address_mode == mode_64bit || index != 0x4)
4030 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4031 scale = (*codep >> 6) & 3;
4032 base = *codep & 7;
4033 USED_REX (REX_EXTY);
4034 if (rex & REX_EXTY)
4035 index += 8;
4036 codep++;
4037 }
4038 base += add;
4039
4040 switch (mod)
4041 {
4042 case 0:
4043 if ((base & 7) == 5)
4044 {
4045 havebase = 0;
4046 if (address_mode == mode_64bit && !havesib)
4047 riprel = 1;
4048 disp = get32s ();
4049 }
4050 break;
4051 case 1:
4052 FETCH_DATA (the_info, codep + 1);
4053 disp = *codep++;
4054 if ((disp & 0x80) != 0)
4055 disp -= 0x100;
4056 break;
4057 case 2:
4058 disp = get32s ();
4059 break;
4060 }
4061
4062 if (!intel_syntax)
4063 if (mod != 0 || (base & 7) == 5)
4064 {
4065 print_operand_value (scratchbuf, !riprel, disp);
4066 oappend (scratchbuf);
4067 if (riprel)
4068 {
4069 set_op (disp, 1);
4070 oappend ("(%rip)");
4071 }
4072 }
4073
4074 if (havebase || (havesib && (index != 4 || scale != 0)))
4075 {
4076 *obufp++ = open_char;
4077 if (intel_syntax && riprel)
4078 oappend ("rip + ");
4079 *obufp = '\0';
4080 if (havebase)
4081 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
4082 ? names64[base] : names32[base]);
4083 if (havesib)
4084 {
4085 if (index != 4)
4086 {
4087 if (!intel_syntax || havebase)
4088 {
4089 *obufp++ = separator_char;
4090 *obufp = '\0';
4091 }
4092 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
4093 ? names64[index] : names32[index]);
4094 }
4095 if (scale != 0 || (!intel_syntax && index != 4))
4096 {
4097 *obufp++ = scale_char;
4098 *obufp = '\0';
4099 sprintf (scratchbuf, "%d", 1 << scale);
4100 oappend (scratchbuf);
4101 }
4102 }
4103 if (intel_syntax && disp)
4104 {
4105 if ((bfd_signed_vma) disp > 0)
4106 {
4107 *obufp++ = '+';
4108 *obufp = '\0';
4109 }
4110 else if (mod != 1)
4111 {
4112 *obufp++ = '-';
4113 *obufp = '\0';
4114 disp = - (bfd_signed_vma) disp;
4115 }
4116
4117 print_operand_value (scratchbuf, mod != 1, disp);
4118 oappend (scratchbuf);
4119 }
4120
4121 *obufp++ = close_char;
4122 *obufp = '\0';
4123 }
4124 else if (intel_syntax)
4125 {
4126 if (mod != 0 || (base & 7) == 5)
4127 {
4128 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4129 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4130 ;
4131 else
4132 {
4133 oappend (names_seg[ds_reg - es_reg]);
4134 oappend (":");
4135 }
4136 print_operand_value (scratchbuf, 1, disp);
4137 oappend (scratchbuf);
4138 }
4139 }
4140 }
4141 else
4142 { /* 16 bit address mode */
4143 switch (mod)
4144 {
4145 case 0:
4146 if (rm == 6)
4147 {
4148 disp = get16 ();
4149 if ((disp & 0x8000) != 0)
4150 disp -= 0x10000;
4151 }
4152 break;
4153 case 1:
4154 FETCH_DATA (the_info, codep + 1);
4155 disp = *codep++;
4156 if ((disp & 0x80) != 0)
4157 disp -= 0x100;
4158 break;
4159 case 2:
4160 disp = get16 ();
4161 if ((disp & 0x8000) != 0)
4162 disp -= 0x10000;
4163 break;
4164 }
4165
4166 if (!intel_syntax)
4167 if (mod != 0 || rm == 6)
4168 {
4169 print_operand_value (scratchbuf, 0, disp);
4170 oappend (scratchbuf);
4171 }
4172
4173 if (mod != 0 || rm != 6)
4174 {
4175 *obufp++ = open_char;
4176 *obufp = '\0';
4177 oappend (index16[rm]);
4178 if (intel_syntax && disp)
4179 {
4180 if ((bfd_signed_vma) disp > 0)
4181 {
4182 *obufp++ = '+';
4183 *obufp = '\0';
4184 }
4185 else if (mod != 1)
4186 {
4187 *obufp++ = '-';
4188 *obufp = '\0';
4189 disp = - (bfd_signed_vma) disp;
4190 }
4191
4192 print_operand_value (scratchbuf, mod != 1, disp);
4193 oappend (scratchbuf);
4194 }
4195
4196 *obufp++ = close_char;
4197 *obufp = '\0';
4198 }
4199 else if (intel_syntax)
4200 {
4201 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4202 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4203 ;
4204 else
4205 {
4206 oappend (names_seg[ds_reg - es_reg]);
4207 oappend (":");
4208 }
4209 print_operand_value (scratchbuf, 1, disp & 0xffff);
4210 oappend (scratchbuf);
4211 }
4212 }
4213}
4214
4215static void
4216OP_G (int bytemode, int sizeflag)
4217{
4218 int add = 0;
4219 USED_REX (REX_EXTX);
4220 if (rex & REX_EXTX)
4221 add += 8;
4222 switch (bytemode)
4223 {
4224 case b_mode:
4225 USED_REX (0);
4226 if (rex)
4227 oappend (names8rex[reg + add]);
4228 else
4229 oappend (names8[reg + add]);
4230 break;
4231 case w_mode:
4232 oappend (names16[reg + add]);
4233 break;
4234 case d_mode:
4235 oappend (names32[reg + add]);
4236 break;
4237 case q_mode:
4238 oappend (names64[reg + add]);
4239 break;
4240 case v_mode:
4241 case dq_mode:
4242 case dqw_mode:
4243 USED_REX (REX_MODE64);
4244 if (rex & REX_MODE64)
4245 oappend (names64[reg + add]);
4246 else if ((sizeflag & DFLAG) || bytemode != v_mode)
4247 oappend (names32[reg + add]);
4248 else
4249 oappend (names16[reg + add]);
4250 used_prefixes |= (prefixes & PREFIX_DATA);
4251 break;
4252 case m_mode:
4253 if (address_mode == mode_64bit)
4254 oappend (names64[reg + add]);
4255 else
4256 oappend (names32[reg + add]);
4257 break;
4258 default:
4259 oappend (INTERNAL_DISASSEMBLER_ERROR);
4260 break;
4261 }
4262}
4263
4264static bfd_vma
4265get64 (void)
4266{
4267 bfd_vma x;
4268#ifdef BFD64
4269 unsigned int a;
4270 unsigned int b;
4271
4272 FETCH_DATA (the_info, codep + 8);
4273 a = *codep++ & 0xff;
4274 a |= (*codep++ & 0xff) << 8;
4275 a |= (*codep++ & 0xff) << 16;
4276 a |= (*codep++ & 0xff) << 24;
4277 b = *codep++ & 0xff;
4278 b |= (*codep++ & 0xff) << 8;
4279 b |= (*codep++ & 0xff) << 16;
4280 b |= (*codep++ & 0xff) << 24;
4281 x = a + ((bfd_vma) b << 32);
4282#else
4283 abort ();
4284 x = 0;
4285#endif
4286 return x;
4287}
4288
4289static bfd_signed_vma
4290get32 (void)
4291{
4292 bfd_signed_vma x = 0;
4293
4294 FETCH_DATA (the_info, codep + 4);
4295 x = *codep++ & (bfd_signed_vma) 0xff;
4296 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4297 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4298 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4299 return x;
4300}
4301
4302static bfd_signed_vma
4303get32s (void)
4304{
4305 bfd_signed_vma x = 0;
4306
4307 FETCH_DATA (the_info, codep + 4);
4308 x = *codep++ & (bfd_signed_vma) 0xff;
4309 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4310 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4311 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4312
4313 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4314
4315 return x;
4316}
4317
4318static int
4319get16 (void)
4320{
4321 int x = 0;
4322
4323 FETCH_DATA (the_info, codep + 2);
4324 x = *codep++ & 0xff;
4325 x |= (*codep++ & 0xff) << 8;
4326 return x;
4327}
4328
4329static void
4330set_op (bfd_vma op, int riprel)
4331{
4332 op_index[op_ad] = op_ad;
4333 if (address_mode == mode_64bit)
4334 {
4335 op_address[op_ad] = op;
4336 op_riprel[op_ad] = riprel;
4337 }
4338 else
4339 {
4340 /* Mask to get a 32-bit address. */
4341 op_address[op_ad] = op & 0xffffffff;
4342 op_riprel[op_ad] = riprel & 0xffffffff;
4343 }
4344}
4345
4346static void
4347OP_REG (int code, int sizeflag)
4348{
4349 const char *s;
4350 int add = 0;
4351 USED_REX (REX_EXTZ);
4352 if (rex & REX_EXTZ)
4353 add = 8;
4354
4355 switch (code)
4356 {
4357 case indir_dx_reg:
4358 if (intel_syntax)
4359 s = "[dx]";
4360 else
4361 s = "(%dx)";
4362 break;
4363 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4364 case sp_reg: case bp_reg: case si_reg: case di_reg:
4365 s = names16[code - ax_reg + add];
4366 break;
4367 case es_reg: case ss_reg: case cs_reg:
4368 case ds_reg: case fs_reg: case gs_reg:
4369 s = names_seg[code - es_reg + add];
4370 break;
4371 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4372 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4373 USED_REX (0);
4374 if (rex)
4375 s = names8rex[code - al_reg + add];
4376 else
4377 s = names8[code - al_reg];
4378 break;
4379 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4380 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
4381 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4382 {
4383 s = names64[code - rAX_reg + add];
4384 break;
4385 }
4386 code += eAX_reg - rAX_reg;
4387 /* Fall through. */
4388 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4389 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4390 USED_REX (REX_MODE64);
4391 if (rex & REX_MODE64)
4392 s = names64[code - eAX_reg + add];
4393 else if (sizeflag & DFLAG)
4394 s = names32[code - eAX_reg + add];
4395 else
4396 s = names16[code - eAX_reg + add];
4397 used_prefixes |= (prefixes & PREFIX_DATA);
4398 break;
4399 default:
4400 s = INTERNAL_DISASSEMBLER_ERROR;
4401 break;
4402 }
4403 oappend (s);
4404}
4405
4406static void
4407OP_IMREG (int code, int sizeflag)
4408{
4409 const char *s;
4410
4411 switch (code)
4412 {
4413 case indir_dx_reg:
4414 if (intel_syntax)
4415 s = "[dx]";
4416 else
4417 s = "(%dx)";
4418 break;
4419 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4420 case sp_reg: case bp_reg: case si_reg: case di_reg:
4421 s = names16[code - ax_reg];
4422 break;
4423 case es_reg: case ss_reg: case cs_reg:
4424 case ds_reg: case fs_reg: case gs_reg:
4425 s = names_seg[code - es_reg];
4426 break;
4427 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4428 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4429 USED_REX (0);
4430 if (rex)
4431 s = names8rex[code - al_reg];
4432 else
4433 s = names8[code - al_reg];
4434 break;
4435 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4436 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4437 USED_REX (REX_MODE64);
4438 if (rex & REX_MODE64)
4439 s = names64[code - eAX_reg];
4440 else if (sizeflag & DFLAG)
4441 s = names32[code - eAX_reg];
4442 else
4443 s = names16[code - eAX_reg];
4444 used_prefixes |= (prefixes & PREFIX_DATA);
4445 break;
4446 default:
4447 s = INTERNAL_DISASSEMBLER_ERROR;
4448 break;
4449 }
4450 oappend (s);
4451}
4452
4453static void
4454OP_I (int bytemode, int sizeflag)
4455{
4456 bfd_signed_vma op;
4457 bfd_signed_vma mask = -1;
4458
4459 switch (bytemode)
4460 {
4461 case b_mode:
4462 FETCH_DATA (the_info, codep + 1);
4463 op = *codep++;
4464 mask = 0xff;
4465 break;
4466 case q_mode:
4467 if (address_mode == mode_64bit)
4468 {
4469 op = get32s ();
4470 break;
4471 }
4472 /* Fall through. */
4473 case v_mode:
4474 USED_REX (REX_MODE64);
4475 if (rex & REX_MODE64)
4476 op = get32s ();
4477 else if (sizeflag & DFLAG)
4478 {
4479 op = get32 ();
4480 mask = 0xffffffff;
4481 }
4482 else
4483 {
4484 op = get16 ();
4485 mask = 0xfffff;
4486 }
4487 used_prefixes |= (prefixes & PREFIX_DATA);
4488 break;
4489 case w_mode:
4490 mask = 0xfffff;
4491 op = get16 ();
4492 break;
4493 case const_1_mode:
4494 if (intel_syntax)
4495 oappend ("1");
4496 return;
4497 default:
4498 oappend (INTERNAL_DISASSEMBLER_ERROR);
4499 return;
4500 }
4501
4502 op &= mask;
4503 scratchbuf[0] = '$';
4504 print_operand_value (scratchbuf + 1, 1, op);
4505 oappend (scratchbuf + intel_syntax);
4506 scratchbuf[0] = '\0';
4507}
4508
4509static void
4510OP_I64 (int bytemode, int sizeflag)
4511{
4512 bfd_signed_vma op;
4513 bfd_signed_vma mask = -1;
4514
4515 if (address_mode != mode_64bit)
4516 {
4517 OP_I (bytemode, sizeflag);
4518 return;
4519 }
4520
4521 switch (bytemode)
4522 {
4523 case b_mode:
4524 FETCH_DATA (the_info, codep + 1);
4525 op = *codep++;
4526 mask = 0xff;
4527 break;
4528 case v_mode:
4529 USED_REX (REX_MODE64);
4530 if (rex & REX_MODE64)
4531 op = get64 ();
4532 else if (sizeflag & DFLAG)
4533 {
4534 op = get32 ();
4535 mask = 0xffffffff;
4536 }
4537 else
4538 {
4539 op = get16 ();
4540 mask = 0xfffff;
4541 }
4542 used_prefixes |= (prefixes & PREFIX_DATA);
4543 break;
4544 case w_mode:
4545 mask = 0xfffff;
4546 op = get16 ();
4547 break;
4548 default:
4549 oappend (INTERNAL_DISASSEMBLER_ERROR);
4550 return;
4551 }
4552
4553 op &= mask;
4554 scratchbuf[0] = '$';
4555 print_operand_value (scratchbuf + 1, 1, op);
4556 oappend (scratchbuf + intel_syntax);
4557 scratchbuf[0] = '\0';
4558}
4559
4560static void
4561OP_sI (int bytemode, int sizeflag)
4562{
4563 bfd_signed_vma op;
4564 bfd_signed_vma mask = -1;
4565
4566 switch (bytemode)
4567 {
4568 case b_mode:
4569 FETCH_DATA (the_info, codep + 1);
4570 op = *codep++;
4571 if ((op & 0x80) != 0)
4572 op -= 0x100;
4573 mask = 0xffffffff;
4574 break;
4575 case v_mode:
4576 USED_REX (REX_MODE64);
4577 if (rex & REX_MODE64)
4578 op = get32s ();
4579 else if (sizeflag & DFLAG)
4580 {
4581 op = get32s ();
4582 mask = 0xffffffff;
4583 }
4584 else
4585 {
4586 mask = 0xffffffff;
4587 op = get16 ();
4588 if ((op & 0x8000) != 0)
4589 op -= 0x10000;
4590 }
4591 used_prefixes |= (prefixes & PREFIX_DATA);
4592 break;
4593 case w_mode:
4594 op = get16 ();
4595 mask = 0xffffffff;
4596 if ((op & 0x8000) != 0)
4597 op -= 0x10000;
4598 break;
4599 default:
4600 oappend (INTERNAL_DISASSEMBLER_ERROR);
4601 return;
4602 }
4603
4604 scratchbuf[0] = '$';
4605 print_operand_value (scratchbuf + 1, 1, op);
4606 oappend (scratchbuf + intel_syntax);
4607}
4608
4609static void
4610OP_J (int bytemode, int sizeflag)
4611{
4612 bfd_vma disp;
4613 bfd_vma mask = -1;
4614
4615 switch (bytemode)
4616 {
4617 case b_mode:
4618 FETCH_DATA (the_info, codep + 1);
4619 disp = *codep++;
4620 if ((disp & 0x80) != 0)
4621 disp -= 0x100;
4622 break;
4623 case v_mode:
4624 if ((sizeflag & DFLAG) || (rex & REX_MODE64))
4625 disp = get32s ();
4626 else
4627 {
4628 disp = get16 ();
4629 /* For some reason, a data16 prefix on a jump instruction
4630 means that the pc is masked to 16 bits after the
4631 displacement is added! */
4632 mask = 0xffff;
4633 }
4634 break;
4635 default:
4636 oappend (INTERNAL_DISASSEMBLER_ERROR);
4637 return;
4638 }
4639 disp = (start_pc + codep - start_codep + disp) & mask;
4640 set_op (disp, 0);
4641 print_operand_value (scratchbuf, 1, disp);
4642 oappend (scratchbuf);
4643}
4644
4645static void
4646OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4647{
4648 oappend (names_seg[reg]);
4649}
4650
4651static void
4652OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
4653{
4654 int seg, offset;
4655
4656 if (sizeflag & DFLAG)
4657 {
4658 offset = get32 ();
4659 seg = get16 ();
4660 }
4661 else
4662 {
4663 offset = get16 ();
4664 seg = get16 ();
4665 }
4666 used_prefixes |= (prefixes & PREFIX_DATA);
4667 if (intel_syntax)
4668 sprintf (scratchbuf, "0x%x:0x%x", seg, offset);
4669 else
4670 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4671 oappend (scratchbuf);
4672}
4673
4674static void
4675OP_OFF (int bytemode, int sizeflag)
4676{
4677 bfd_vma off;
4678
4679 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4680 intel_operand_size (bytemode, sizeflag);
4681 append_seg ();
4682
4683 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
4684 off = get32 ();
4685 else
4686 off = get16 ();
4687
4688 if (intel_syntax)
4689 {
4690 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4691 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4692 {
4693 oappend (names_seg[ds_reg - es_reg]);
4694 oappend (":");
4695 }
4696 }
4697 print_operand_value (scratchbuf, 1, off);
4698 oappend (scratchbuf);
4699}
4700
4701static void
4702OP_OFF64 (int bytemode, int sizeflag)
4703{
4704 bfd_vma off;
4705
4706 if (address_mode != mode_64bit
4707 || (prefixes & PREFIX_ADDR))
4708 {
4709 OP_OFF (bytemode, sizeflag);
4710 return;
4711 }
4712
4713 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
4714 intel_operand_size (bytemode, sizeflag);
4715 append_seg ();
4716
4717 off = get64 ();
4718
4719 if (intel_syntax)
4720 {
4721 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4722 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4723 {
4724 oappend (names_seg[ds_reg - es_reg]);
4725 oappend (":");
4726 }
4727 }
4728 print_operand_value (scratchbuf, 1, off);
4729 oappend (scratchbuf);
4730}
4731
4732static void
4733ptr_reg (int code, int sizeflag)
4734{
4735 const char *s;
4736
4737 *obufp++ = open_char;
4738 used_prefixes |= (prefixes & PREFIX_ADDR);
4739 if (address_mode == mode_64bit)
4740 {
4741 if (!(sizeflag & AFLAG))
4742 s = names32[code - eAX_reg];
4743 else
4744 s = names64[code - eAX_reg];
4745 }
4746 else if (sizeflag & AFLAG)
4747 s = names32[code - eAX_reg];
4748 else
4749 s = names16[code - eAX_reg];
4750 oappend (s);
4751 *obufp++ = close_char;
4752 *obufp = 0;
4753}
4754
4755static void
4756OP_ESreg (int code, int sizeflag)
4757{
4758 if (intel_syntax)
4759 intel_operand_size (codep[-1] & 1 ? v_mode : b_mode, sizeflag);
4760 oappend ("%es:" + intel_syntax);
4761 ptr_reg (code, sizeflag);
4762}
4763
4764static void
4765OP_DSreg (int code, int sizeflag)
4766{
4767 if (intel_syntax)
4768 intel_operand_size (codep[-1] != 0xd7 && (codep[-1] & 1)
4769 ? v_mode
4770 : b_mode,
4771 sizeflag);
4772 if ((prefixes
4773 & (PREFIX_CS
4774 | PREFIX_DS
4775 | PREFIX_SS
4776 | PREFIX_ES
4777 | PREFIX_FS
4778 | PREFIX_GS)) == 0)
4779 prefixes |= PREFIX_DS;
4780 append_seg ();
4781 ptr_reg (code, sizeflag);
4782}
4783
4784static void
4785OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4786{
4787 int add = 0;
4788 if (rex & REX_EXTX)
4789 {
4790 USED_REX (REX_EXTX);
4791 add = 8;
4792 }
4793 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
4794 {
4795 used_prefixes |= PREFIX_LOCK;
4796 add = 8;
4797 }
4798 sprintf (scratchbuf, "%%cr%d", reg + add);
4799 oappend (scratchbuf + intel_syntax);
4800}
4801
4802static void
4803OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4804{
4805 int add = 0;
4806 USED_REX (REX_EXTX);
4807 if (rex & REX_EXTX)
4808 add = 8;
4809 if (intel_syntax)
4810 sprintf (scratchbuf, "db%d", reg + add);
4811 else
4812 sprintf (scratchbuf, "%%db%d", reg + add);
4813 oappend (scratchbuf);
4814}
4815
4816static void
4817OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4818{
4819 sprintf (scratchbuf, "%%tr%d", reg);
4820 oappend (scratchbuf + intel_syntax);
4821}
4822
4823static void
4824OP_Rd (int bytemode, int sizeflag)
4825{
4826 if (mod == 3)
4827 OP_E (bytemode, sizeflag);
4828 else
4829 BadOp ();
4830}
4831
4832static void
4833OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4834{
4835 used_prefixes |= (prefixes & PREFIX_DATA);
4836 if (prefixes & PREFIX_DATA)
4837 {
4838 int add = 0;
4839 USED_REX (REX_EXTX);
4840 if (rex & REX_EXTX)
4841 add = 8;
4842 sprintf (scratchbuf, "%%xmm%d", reg + add);
4843 }
4844 else
4845 sprintf (scratchbuf, "%%mm%d", reg);
4846 oappend (scratchbuf + intel_syntax);
4847}
4848
4849static void
4850OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4851{
4852 int add = 0;
4853 USED_REX (REX_EXTX);
4854 if (rex & REX_EXTX)
4855 add = 8;
4856 sprintf (scratchbuf, "%%xmm%d", reg + add);
4857 oappend (scratchbuf + intel_syntax);
4858}
4859
4860static void
4861OP_EM (int bytemode, int sizeflag)
4862{
4863 if (mod != 3)
4864 {
4865 if (intel_syntax && bytemode == v_mode)
4866 {
4867 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4868 used_prefixes |= (prefixes & PREFIX_DATA);
4869 }
4870 OP_E (bytemode, sizeflag);
4871 return;
4872 }
4873
4874 /* Skip mod/rm byte. */
4875 MODRM_CHECK;
4876 codep++;
4877 used_prefixes |= (prefixes & PREFIX_DATA);
4878 if (prefixes & PREFIX_DATA)
4879 {
4880 int add = 0;
4881
4882 USED_REX (REX_EXTZ);
4883 if (rex & REX_EXTZ)
4884 add = 8;
4885 sprintf (scratchbuf, "%%xmm%d", rm + add);
4886 }
4887 else
4888 sprintf (scratchbuf, "%%mm%d", rm);
4889 oappend (scratchbuf + intel_syntax);
4890}
4891
4892/* cvt* are the only instructions in sse2 which have
4893 both SSE and MMX operands and also have 0x66 prefix
4894 in their opcode. 0x66 was originally used to differentiate
4895 between SSE and MMX instruction(operands). So we have to handle the
4896 cvt* separately using OP_EMC and OP_MXC */
4897static void
4898OP_EMC (int bytemode, int sizeflag)
4899{
4900 if (mod != 3)
4901 {
4902 if (intel_syntax && bytemode == v_mode)
4903 {
4904 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
4905 used_prefixes |= (prefixes & PREFIX_DATA);
4906 }
4907 OP_E (bytemode, sizeflag);
4908 return;
4909 }
4910
4911 /* Skip mod/rm byte. */
4912 MODRM_CHECK;
4913 codep++;
4914 used_prefixes |= (prefixes & PREFIX_DATA);
4915 sprintf (scratchbuf, "%%mm%d", rm);
4916 oappend (scratchbuf + intel_syntax);
4917}
4918
4919static void
4920OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4921{
4922 used_prefixes |= (prefixes & PREFIX_DATA);
4923 sprintf (scratchbuf, "%%mm%d", reg);
4924 oappend (scratchbuf + intel_syntax);
4925}
4926
4927static void
4928OP_EX (int bytemode, int sizeflag)
4929{
4930 int add = 0;
4931 if (mod != 3)
4932 {
4933 if (intel_syntax && bytemode == v_mode)
4934 {
4935 switch (prefixes & (PREFIX_DATA|PREFIX_REPZ|PREFIX_REPNZ))
4936 {
4937 case 0: bytemode = x_mode; break;
4938 case PREFIX_REPZ: bytemode = d_mode; used_prefixes |= PREFIX_REPZ; break;
4939 case PREFIX_DATA: bytemode = x_mode; used_prefixes |= PREFIX_DATA; break;
4940 case PREFIX_REPNZ: bytemode = q_mode; used_prefixes |= PREFIX_REPNZ; break;
4941 default: bytemode = 0; break;
4942 }
4943 }
4944 OP_E (bytemode, sizeflag);
4945 return;
4946 }
4947 USED_REX (REX_EXTZ);
4948 if (rex & REX_EXTZ)
4949 add = 8;
4950
4951 /* Skip mod/rm byte. */
4952 MODRM_CHECK;
4953 codep++;
4954 sprintf (scratchbuf, "%%xmm%d", rm + add);
4955 oappend (scratchbuf + intel_syntax);
4956}
4957
4958static void
4959OP_MS (int bytemode, int sizeflag)
4960{
4961 if (mod == 3)
4962 OP_EM (bytemode, sizeflag);
4963 else
4964 BadOp ();
4965}
4966
4967static void
4968OP_XS (int bytemode, int sizeflag)
4969{
4970 if (mod == 3)
4971 OP_EX (bytemode, sizeflag);
4972 else
4973 BadOp ();
4974}
4975
4976static void
4977OP_M (int bytemode, int sizeflag)
4978{
4979 if (mod == 3)
4980 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4981 else
4982 OP_E (bytemode, sizeflag);
4983}
4984
4985static void
4986OP_0f07 (int bytemode, int sizeflag)
4987{
4988 if (mod != 3 || rm != 0)
4989 BadOp ();
4990 else
4991 OP_E (bytemode, sizeflag);
4992}
4993
4994static void
4995OP_0fae (int bytemode, int sizeflag)
4996{
4997 if (mod == 3)
4998 {
4999 if (reg == 7)
5000 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5001
5002 if (reg < 5 || rm != 0)
5003 {
5004 BadOp (); /* bad sfence, mfence, or lfence */
5005 return;
5006 }
5007 }
5008 else if (reg != 7)
5009 {
5010 BadOp (); /* bad clflush */
5011 return;
5012 }
5013
5014 OP_E (bytemode, sizeflag);
5015}
5016
5017/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
5018 32bit mode and "xchg %rax,%rax" in 64bit mode. NOP with REPZ prefix
5019 is called PAUSE. We display "xchg %ax,%ax" instead of "data16 nop".
5020 */
5021
5022static void
5023NOP_Fixup1 (int bytemode, int sizeflag)
5024{
5025 if (prefixes == PREFIX_REPZ)
5026 strcpy (obuf, "pause");
5027 else if (prefixes == PREFIX_DATA
5028 || ((rex & REX_MODE64) && rex != 0x48))
5029 OP_REG (bytemode, sizeflag);
5030 else
5031 strcpy (obuf, "nop");
5032}
5033
5034static void
5035NOP_Fixup2 (int bytemode, int sizeflag)
5036{
5037 if (prefixes == PREFIX_DATA
5038 || ((rex & REX_MODE64) && rex != 0x48))
5039 OP_IMREG (bytemode, sizeflag);
5040}
5041
5042static const char *const Suffix3DNow[] = {
5043/* 00 */ NULL, NULL, NULL, NULL,
5044/* 04 */ NULL, NULL, NULL, NULL,
5045/* 08 */ NULL, NULL, NULL, NULL,
5046/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
5047/* 10 */ NULL, NULL, NULL, NULL,
5048/* 14 */ NULL, NULL, NULL, NULL,
5049/* 18 */ NULL, NULL, NULL, NULL,
5050/* 1C */ "pf2iw", "pf2id", NULL, NULL,
5051/* 20 */ NULL, NULL, NULL, NULL,
5052/* 24 */ NULL, NULL, NULL, NULL,
5053/* 28 */ NULL, NULL, NULL, NULL,
5054/* 2C */ NULL, NULL, NULL, NULL,
5055/* 30 */ NULL, NULL, NULL, NULL,
5056/* 34 */ NULL, NULL, NULL, NULL,
5057/* 38 */ NULL, NULL, NULL, NULL,
5058/* 3C */ NULL, NULL, NULL, NULL,
5059/* 40 */ NULL, NULL, NULL, NULL,
5060/* 44 */ NULL, NULL, NULL, NULL,
5061/* 48 */ NULL, NULL, NULL, NULL,
5062/* 4C */ NULL, NULL, NULL, NULL,
5063/* 50 */ NULL, NULL, NULL, NULL,
5064/* 54 */ NULL, NULL, NULL, NULL,
5065/* 58 */ NULL, NULL, NULL, NULL,
5066/* 5C */ NULL, NULL, NULL, NULL,
5067/* 60 */ NULL, NULL, NULL, NULL,
5068/* 64 */ NULL, NULL, NULL, NULL,
5069/* 68 */ NULL, NULL, NULL, NULL,
5070/* 6C */ NULL, NULL, NULL, NULL,
5071/* 70 */ NULL, NULL, NULL, NULL,
5072/* 74 */ NULL, NULL, NULL, NULL,
5073/* 78 */ NULL, NULL, NULL, NULL,
5074/* 7C */ NULL, NULL, NULL, NULL,
5075/* 80 */ NULL, NULL, NULL, NULL,
5076/* 84 */ NULL, NULL, NULL, NULL,
5077/* 88 */ NULL, NULL, "pfnacc", NULL,
5078/* 8C */ NULL, NULL, "pfpnacc", NULL,
5079/* 90 */ "pfcmpge", NULL, NULL, NULL,
5080/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5081/* 98 */ NULL, NULL, "pfsub", NULL,
5082/* 9C */ NULL, NULL, "pfadd", NULL,
5083/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5084/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5085/* A8 */ NULL, NULL, "pfsubr", NULL,
5086/* AC */ NULL, NULL, "pfacc", NULL,
5087/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5088/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
5089/* B8 */ NULL, NULL, NULL, "pswapd",
5090/* BC */ NULL, NULL, NULL, "pavgusb",
5091/* C0 */ NULL, NULL, NULL, NULL,
5092/* C4 */ NULL, NULL, NULL, NULL,
5093/* C8 */ NULL, NULL, NULL, NULL,
5094/* CC */ NULL, NULL, NULL, NULL,
5095/* D0 */ NULL, NULL, NULL, NULL,
5096/* D4 */ NULL, NULL, NULL, NULL,
5097/* D8 */ NULL, NULL, NULL, NULL,
5098/* DC */ NULL, NULL, NULL, NULL,
5099/* E0 */ NULL, NULL, NULL, NULL,
5100/* E4 */ NULL, NULL, NULL, NULL,
5101/* E8 */ NULL, NULL, NULL, NULL,
5102/* EC */ NULL, NULL, NULL, NULL,
5103/* F0 */ NULL, NULL, NULL, NULL,
5104/* F4 */ NULL, NULL, NULL, NULL,
5105/* F8 */ NULL, NULL, NULL, NULL,
5106/* FC */ NULL, NULL, NULL, NULL,
5107};
5108
5109static void
5110OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5111{
5112 const char *mnemonic;
5113
5114 FETCH_DATA (the_info, codep + 1);
5115 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5116 place where an 8-bit immediate would normally go. ie. the last
5117 byte of the instruction. */
5118 obufp = obuf + strlen (obuf);
5119 mnemonic = Suffix3DNow[*codep++ & 0xff];
5120 if (mnemonic)
5121 oappend (mnemonic);
5122 else
5123 {
5124 /* Since a variable sized modrm/sib chunk is between the start
5125 of the opcode (0x0f0f) and the opcode suffix, we need to do
5126 all the modrm processing first, and don't know until now that
5127 we have a bad opcode. This necessitates some cleaning up. */
5128 op1out[0] = '\0';
5129 op2out[0] = '\0';
5130 BadOp ();
5131 }
5132}
5133
5134static const char *simd_cmp_op[] = {
5135 "eq",
5136 "lt",
5137 "le",
5138 "unord",
5139 "neq",
5140 "nlt",
5141 "nle",
5142 "ord"
5143};
5144
5145static void
5146OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5147{
5148 unsigned int cmp_type;
5149
5150 FETCH_DATA (the_info, codep + 1);
5151 obufp = obuf + strlen (obuf);
5152 cmp_type = *codep++ & 0xff;
5153 if (cmp_type < 8)
5154 {
5155 char suffix1 = 'p', suffix2 = 's';
5156 used_prefixes |= (prefixes & PREFIX_REPZ);
5157 if (prefixes & PREFIX_REPZ)
5158 suffix1 = 's';
5159 else
5160 {
5161 used_prefixes |= (prefixes & PREFIX_DATA);
5162 if (prefixes & PREFIX_DATA)
5163 suffix2 = 'd';
5164 else
5165 {
5166 used_prefixes |= (prefixes & PREFIX_REPNZ);
5167 if (prefixes & PREFIX_REPNZ)
5168 suffix1 = 's', suffix2 = 'd';
5169 }
5170 }
5171 sprintf (scratchbuf, "cmp%s%c%c",
5172 simd_cmp_op[cmp_type], suffix1, suffix2);
5173 used_prefixes |= (prefixes & PREFIX_REPZ);
5174 oappend (scratchbuf);
5175 }
5176 else
5177 {
5178 /* We have a bad extension byte. Clean up. */
5179 op1out[0] = '\0';
5180 op2out[0] = '\0';
5181 BadOp ();
5182 }
5183}
5184
5185static void
5186SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
5187{
5188 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5189 forms of these instructions. */
5190 if (mod == 3)
5191 {
5192 char *p = obuf + strlen (obuf);
5193 *(p + 1) = '\0';
5194 *p = *(p - 1);
5195 *(p - 1) = *(p - 2);
5196 *(p - 2) = *(p - 3);
5197 *(p - 3) = extrachar;
5198 }
5199}
5200
5201static void
5202PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5203{
5204 if (mod == 3 && reg == 1 && rm <= 1)
5205 {
5206 /* Override "sidt". */
5207 size_t olen = strlen (obuf);
5208 char *p = obuf + olen - 4;
5209 const char **names = (address_mode == mode_64bit
5210 ? names64 : names32);
5211
5212 /* We might have a suffix when disassembling with -Msuffix. */
5213 if (*p == 'i')
5214 --p;
5215
5216 /* Remove "addr16/addr32" if we aren't in Intel mode. */
5217 if (!intel_syntax
5218 && (prefixes & PREFIX_ADDR)
5219 && olen >= (4 + 7)
5220 && *(p - 1) == ' '
5221 && CONST_STRNEQ (p - 7, "addr")
5222 && (CONST_STRNEQ (p - 3, "16")
5223 || CONST_STRNEQ (p - 3, "32")))
5224 p -= 7;
5225
5226 if (rm)
5227 {
5228 /* mwait %eax,%ecx */
5229 strcpy (p, "mwait");
5230 if (!intel_syntax)
5231 strcpy (op1out, names[0]);
5232 }
5233 else
5234 {
5235 /* monitor %eax,%ecx,%edx" */
5236 strcpy (p, "monitor");
5237 if (!intel_syntax)
5238 {
5239 const char **op1_names;
5240 if (!(prefixes & PREFIX_ADDR))
5241 op1_names = (address_mode == mode_16bit
5242 ? names16 : names);
5243 else
5244 {
5245 op1_names = (address_mode != mode_32bit
5246 ? names32 : names16);
5247 used_prefixes |= PREFIX_ADDR;
5248 }
5249 strcpy (op1out, op1_names[0]);
5250 strcpy (op3out, names[2]);
5251 }
5252 }
5253 if (!intel_syntax)
5254 {
5255 strcpy (op2out, names[1]);
5256 two_source_ops = 1;
5257 }
5258
5259 codep++;
5260 }
5261 else
5262 OP_M (0, sizeflag);
5263}
5264
5265static void
5266SVME_Fixup (int bytemode, int sizeflag)
5267{
5268 const char *alt;
5269 char *p;
5270
5271 switch (*codep)
5272 {
5273 case 0xd8:
5274 alt = "vmrun";
5275 break;
5276 case 0xd9:
5277 alt = "vmmcall";
5278 break;
5279 case 0xda:
5280 alt = "vmload";
5281 break;
5282 case 0xdb:
5283 alt = "vmsave";
5284 break;
5285 case 0xdc:
5286 alt = "stgi";
5287 break;
5288 case 0xdd:
5289 alt = "clgi";
5290 break;
5291 case 0xde:
5292 alt = "skinit";
5293 break;
5294 case 0xdf:
5295 alt = "invlpga";
5296 break;
5297 default:
5298 OP_M (bytemode, sizeflag);
5299 return;
5300 }
5301 /* Override "lidt". */
5302 p = obuf + strlen (obuf) - 4;
5303 /* We might have a suffix. */
5304 if (*p == 'i')
5305 --p;
5306 strcpy (p, alt);
5307 if (!(prefixes & PREFIX_ADDR))
5308 {
5309 ++codep;
5310 return;
5311 }
5312 used_prefixes |= PREFIX_ADDR;
5313 switch (*codep++)
5314 {
5315 case 0xdf:
5316 strcpy (op2out, names32[1]);
5317 two_source_ops = 1;
5318 /* Fall through. */
5319 case 0xd8:
5320 case 0xda:
5321 case 0xdb:
5322 *obufp++ = open_char;
5323 if (address_mode == mode_64bit || (sizeflag & AFLAG))
5324 alt = names32[0];
5325 else
5326 alt = names16[0];
5327 strcpy (obufp, alt);
5328 obufp += strlen (alt);
5329 *obufp++ = close_char;
5330 *obufp = '\0';
5331 break;
5332 }
5333}
5334
5335static void
5336INVLPG_Fixup (int bytemode, int sizeflag)
5337{
5338 const char *alt;
5339
5340 switch (*codep)
5341 {
5342 case 0xf8:
5343 alt = "swapgs";
5344 break;
5345 case 0xf9:
5346 alt = "rdtscp";
5347 break;
5348 default:
5349 OP_M (bytemode, sizeflag);
5350 return;
5351 }
5352 /* Override "invlpg". */
5353 strcpy (obuf + strlen (obuf) - 6, alt);
5354 codep++;
5355}
5356
5357static void
5358BadOp (void)
5359{
5360 /* Throw away prefixes and 1st. opcode byte. */
5361 codep = insn_codep + 1;
5362 oappend ("(bad)");
5363}
5364
5365static void
5366SEG_Fixup (int extrachar, int sizeflag)
5367{
5368 if (mod == 3)
5369 {
5370 /* We need to add a proper suffix with
5371
5372 movw %ds,%ax
5373 movl %ds,%eax
5374 movq %ds,%rax
5375 movw %ax,%ds
5376 movl %eax,%ds
5377 movq %rax,%ds
5378 */
5379 const char *suffix;
5380
5381 if (prefixes & PREFIX_DATA)
5382 suffix = "w";
5383 else
5384 {
5385 USED_REX (REX_MODE64);
5386 if (rex & REX_MODE64)
5387 suffix = "q";
5388 else
5389 suffix = "l";
5390 }
5391 strcat (obuf, suffix);
5392 }
5393 else
5394 {
5395 /* We need to fix the suffix for
5396
5397 movw %ds,(%eax)
5398 movw %ds,(%rax)
5399 movw (%eax),%ds
5400 movw (%rax),%ds
5401
5402 Override "mov[l|q]". */
5403 char *p = obuf + strlen (obuf) - 1;
5404
5405 /* We might not have a suffix. */
5406 if (*p == 'v')
5407 ++p;
5408 *p = 'w';
5409 }
5410
5411 OP_E (extrachar, sizeflag);
5412}
5413
5414static void
5415VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
5416{
5417 if (mod == 3 && reg == 0 && rm >=1 && rm <= 4)
5418 {
5419 /* Override "sgdt". */
5420 char *p = obuf + strlen (obuf) - 4;
5421
5422 /* We might have a suffix when disassembling with -Msuffix. */
5423 if (*p == 'g')
5424 --p;
5425
5426 switch (rm)
5427 {
5428 case 1:
5429 strcpy (p, "vmcall");
5430 break;
5431 case 2:
5432 strcpy (p, "vmlaunch");
5433 break;
5434 case 3:
5435 strcpy (p, "vmresume");
5436 break;
5437 case 4:
5438 strcpy (p, "vmxoff");
5439 break;
5440 }
5441
5442 codep++;
5443 }
5444 else
5445 OP_E (0, sizeflag);
5446}
5447
5448static void
5449OP_VMX (int bytemode, int sizeflag)
5450{
5451 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
5452 if (prefixes & PREFIX_DATA)
5453 strcpy (obuf, "vmclear");
5454 else if (prefixes & PREFIX_REPZ)
5455 strcpy (obuf, "vmxon");
5456 else
5457 strcpy (obuf, "vmptrld");
5458 OP_E (bytemode, sizeflag);
5459}
5460
5461static void
5462REP_Fixup (int bytemode, int sizeflag)
5463{
5464 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
5465 lods and stos. */
5466 size_t ilen = 0;
5467
5468 if (prefixes & PREFIX_REPZ)
5469 switch (*insn_codep)
5470 {
5471 case 0x6e: /* outsb */
5472 case 0x6f: /* outsw/outsl */
5473 case 0xa4: /* movsb */
5474 case 0xa5: /* movsw/movsl/movsq */
5475 if (!intel_syntax)
5476 ilen = 5;
5477 else
5478 ilen = 4;
5479 break;
5480 case 0xaa: /* stosb */
5481 case 0xab: /* stosw/stosl/stosq */
5482 case 0xac: /* lodsb */
5483 case 0xad: /* lodsw/lodsl/lodsq */
5484 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5485 ilen = 5;
5486 else
5487 ilen = 4;
5488 break;
5489 case 0x6c: /* insb */
5490 case 0x6d: /* insl/insw */
5491 if (!intel_syntax)
5492 ilen = 4;
5493 else
5494 ilen = 3;
5495 break;
5496 default:
5497 abort ();
5498 break;
5499 }
5500
5501 if (ilen != 0)
5502 {
5503 size_t olen;
5504 char *p;
5505
5506 olen = strlen (obuf);
5507 p = obuf + olen - ilen - 1 - 4;
5508 /* Handle "repz [addr16|addr32]". */
5509 if ((prefixes & PREFIX_ADDR))
5510 p -= 1 + 6;
5511
5512 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
5513 }
5514
5515 switch (bytemode)
5516 {
5517 case al_reg:
5518 case eAX_reg:
5519 case indir_dx_reg:
5520 OP_IMREG (bytemode, sizeflag);
5521 break;
5522 case eDI_reg:
5523 OP_ESreg (bytemode, sizeflag);
5524 break;
5525 case eSI_reg:
5526 OP_DSreg (bytemode, sizeflag);
5527 break;
5528 default:
5529 abort ();
5530 break;
5531 }
5532}
GDB Binutils - Deliverables
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