| 1 | /* This file is automatically generated by i386-gen. Do not edit! */ |
| 2 | /* Copyright 2007, 2008, 2009 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of the GNU opcodes library. |
| 6 | |
| 7 | This library is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3, or (at your option) |
| 10 | any later version. |
| 11 | |
| 12 | It is distributed in the hope that it will be useful, but WITHOUT |
| 13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 15 | License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 20 | MA 02110-1301, USA. */ |
| 21 | |
| 22 | #define CPU_UNKNOWN_FLAGS \ |
| 23 | { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |
| 24 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } } |
| 25 | |
| 26 | #define CPU_GENERIC32_FLAGS \ |
| 27 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 28 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 29 | |
| 30 | #define CPU_GENERIC64_FLAGS \ |
| 31 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 32 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 33 | |
| 34 | #define CPU_NONE_FLAGS \ |
| 35 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 36 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 37 | |
| 38 | #define CPU_I186_FLAGS \ |
| 39 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 40 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 41 | |
| 42 | #define CPU_I286_FLAGS \ |
| 43 | { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 44 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 45 | |
| 46 | #define CPU_I386_FLAGS \ |
| 47 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 48 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 49 | |
| 50 | #define CPU_I486_FLAGS \ |
| 51 | { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 52 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 53 | |
| 54 | #define CPU_I586_FLAGS \ |
| 55 | { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 56 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 57 | |
| 58 | #define CPU_I686_FLAGS \ |
| 59 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 60 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 61 | |
| 62 | #define CPU_P2_FLAGS \ |
| 63 | { { 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 64 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 65 | |
| 66 | #define CPU_P3_FLAGS \ |
| 67 | { { 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 68 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 69 | |
| 70 | #define CPU_P4_FLAGS \ |
| 71 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 72 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 73 | |
| 74 | #define CPU_NOCONA_FLAGS \ |
| 75 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 76 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 77 | |
| 78 | #define CPU_CORE_FLAGS \ |
| 79 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 80 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 81 | |
| 82 | #define CPU_CORE2_FLAGS \ |
| 83 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 84 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } } |
| 85 | |
| 86 | #define CPU_COREI7_FLAGS \ |
| 87 | { { 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 88 | 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } } |
| 89 | |
| 90 | #define CPU_K6_FLAGS \ |
| 91 | { { 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 92 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 93 | |
| 94 | #define CPU_K6_2_FLAGS \ |
| 95 | { { 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 96 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 97 | |
| 98 | #define CPU_ATHLON_FLAGS \ |
| 99 | { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 100 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 101 | |
| 102 | #define CPU_K8_FLAGS \ |
| 103 | { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 104 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } } |
| 105 | |
| 106 | #define CPU_AMDFAM10_FLAGS \ |
| 107 | { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, \ |
| 108 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0 } } |
| 109 | |
| 110 | #define CPU_CLFLUSH_FLAGS \ |
| 111 | { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 112 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 113 | |
| 114 | #define CPU_SYSCALL_FLAGS \ |
| 115 | { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 116 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 117 | |
| 118 | #define CPU_MMX_FLAGS \ |
| 119 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 120 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 121 | |
| 122 | #define CPU_SSE_FLAGS \ |
| 123 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 124 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 125 | |
| 126 | #define CPU_SSE2_FLAGS \ |
| 127 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 128 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 129 | |
| 130 | #define CPU_SSE3_FLAGS \ |
| 131 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 132 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 133 | |
| 134 | #define CPU_SSSE3_FLAGS \ |
| 135 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 136 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 137 | |
| 138 | #define CPU_SSE4_1_FLAGS \ |
| 139 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 140 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 141 | |
| 142 | #define CPU_SSE4_2_FLAGS \ |
| 143 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 144 | 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 145 | |
| 146 | #define CPU_VMX_FLAGS \ |
| 147 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 148 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 149 | |
| 150 | #define CPU_SMX_FLAGS \ |
| 151 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 152 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 153 | |
| 154 | #define CPU_XSAVE_FLAGS \ |
| 155 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 156 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 157 | |
| 158 | #define CPU_AES_FLAGS \ |
| 159 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 160 | 0, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 161 | |
| 162 | #define CPU_PCLMUL_FLAGS \ |
| 163 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 164 | 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 165 | |
| 166 | #define CPU_FMA_FLAGS \ |
| 167 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 168 | 0, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } } |
| 169 | |
| 170 | #define CPU_MOVBE_FLAGS \ |
| 171 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 172 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } } |
| 173 | |
| 174 | #define CPU_RDTSCP_FLAGS \ |
| 175 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 176 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } } |
| 177 | |
| 178 | #define CPU_EPT_FLAGS \ |
| 179 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 180 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } } |
| 181 | |
| 182 | #define CPU_3DNOW_FLAGS \ |
| 183 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 184 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 185 | |
| 186 | #define CPU_3DNOWA_FLAGS \ |
| 187 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 188 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 189 | |
| 190 | #define CPU_PADLOCK_FLAGS \ |
| 191 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 192 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 193 | |
| 194 | #define CPU_SVME_FLAGS \ |
| 195 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 196 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 197 | |
| 198 | #define CPU_SSE4A_FLAGS \ |
| 199 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, 1, \ |
| 200 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 201 | |
| 202 | #define CPU_ABM_FLAGS \ |
| 203 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 204 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 205 | |
| 206 | #define CPU_AVX_FLAGS \ |
| 207 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 1, 0, \ |
| 208 | 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } |
| 209 | |
| 210 | |
| 211 | #define OPERAND_TYPE_NONE \ |
| 212 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 213 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 214 | 0, 0, 0, 0, 0 } } |
| 215 | |
| 216 | #define OPERAND_TYPE_REG8 \ |
| 217 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 218 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 219 | 0, 0, 0, 0, 0 } } |
| 220 | |
| 221 | #define OPERAND_TYPE_REG16 \ |
| 222 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 223 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 224 | 0, 0, 0, 0, 0 } } |
| 225 | |
| 226 | #define OPERAND_TYPE_REG32 \ |
| 227 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 228 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 229 | 0, 0, 0, 0, 0 } } |
| 230 | |
| 231 | #define OPERAND_TYPE_REG64 \ |
| 232 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 233 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 234 | 0, 0, 0, 0, 0 } } |
| 235 | |
| 236 | #define OPERAND_TYPE_IMM1 \ |
| 237 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 238 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 239 | 0, 0, 0, 0, 0 } } |
| 240 | |
| 241 | #define OPERAND_TYPE_IMM8 \ |
| 242 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 243 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 244 | 0, 0, 0, 0, 0 } } |
| 245 | |
| 246 | #define OPERAND_TYPE_IMM8S \ |
| 247 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 248 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 249 | 0, 0, 0, 0, 0 } } |
| 250 | |
| 251 | #define OPERAND_TYPE_IMM16 \ |
| 252 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 253 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 254 | 0, 0, 0, 0, 0 } } |
| 255 | |
| 256 | #define OPERAND_TYPE_IMM32 \ |
| 257 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 258 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 259 | 0, 0, 0, 0, 0 } } |
| 260 | |
| 261 | #define OPERAND_TYPE_IMM32S \ |
| 262 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 263 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 264 | 0, 0, 0, 0, 0 } } |
| 265 | |
| 266 | #define OPERAND_TYPE_IMM64 \ |
| 267 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 268 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 269 | 0, 0, 0, 0, 0 } } |
| 270 | |
| 271 | #define OPERAND_TYPE_BASEINDEX \ |
| 272 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 273 | 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 274 | 0, 0, 0, 0, 0 } } |
| 275 | |
| 276 | #define OPERAND_TYPE_DISP8 \ |
| 277 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 278 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 279 | 0, 0, 0, 0, 0 } } |
| 280 | |
| 281 | #define OPERAND_TYPE_DISP16 \ |
| 282 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 283 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 284 | 0, 0, 0, 0, 0 } } |
| 285 | |
| 286 | #define OPERAND_TYPE_DISP32 \ |
| 287 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 288 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 289 | 0, 0, 0, 0, 0 } } |
| 290 | |
| 291 | #define OPERAND_TYPE_DISP32S \ |
| 292 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 293 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 294 | 0, 0, 0, 0, 0 } } |
| 295 | |
| 296 | #define OPERAND_TYPE_DISP64 \ |
| 297 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 298 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 299 | 0, 0, 0, 0, 0 } } |
| 300 | |
| 301 | #define OPERAND_TYPE_INOUTPORTREG \ |
| 302 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 303 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 304 | 0, 0, 0, 0, 0 } } |
| 305 | |
| 306 | #define OPERAND_TYPE_SHIFTCOUNT \ |
| 307 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 308 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 309 | 0, 0, 0, 0, 0 } } |
| 310 | |
| 311 | #define OPERAND_TYPE_CONTROL \ |
| 312 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 313 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 314 | 0, 0, 0, 0, 0 } } |
| 315 | |
| 316 | #define OPERAND_TYPE_TEST \ |
| 317 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 318 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 319 | 0, 0, 0, 0, 0 } } |
| 320 | |
| 321 | #define OPERAND_TYPE_DEBUG \ |
| 322 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 323 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 324 | 0, 0, 0, 0, 0 } } |
| 325 | |
| 326 | #define OPERAND_TYPE_FLOATREG \ |
| 327 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 328 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 329 | 0, 0, 0, 0, 0 } } |
| 330 | |
| 331 | #define OPERAND_TYPE_FLOATACC \ |
| 332 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 333 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 334 | 0, 0, 0, 0, 0 } } |
| 335 | |
| 336 | #define OPERAND_TYPE_SREG2 \ |
| 337 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 338 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 339 | 0, 0, 0, 0, 0 } } |
| 340 | |
| 341 | #define OPERAND_TYPE_SREG3 \ |
| 342 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 343 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 344 | 0, 0, 0, 0, 0 } } |
| 345 | |
| 346 | #define OPERAND_TYPE_ACC \ |
| 347 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 348 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 349 | 0, 0, 0, 0, 0 } } |
| 350 | |
| 351 | #define OPERAND_TYPE_JUMPABSOLUTE \ |
| 352 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 353 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 354 | 0, 0, 0, 0, 0 } } |
| 355 | |
| 356 | #define OPERAND_TYPE_REGMMX \ |
| 357 | { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 358 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 359 | 0, 0, 0, 0, 0 } } |
| 360 | |
| 361 | #define OPERAND_TYPE_REGXMM \ |
| 362 | { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 363 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 364 | 0, 0, 0, 0, 0 } } |
| 365 | |
| 366 | #define OPERAND_TYPE_REGYMM \ |
| 367 | { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 368 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 369 | 0, 0, 0, 0, 0 } } |
| 370 | |
| 371 | #define OPERAND_TYPE_ESSEG \ |
| 372 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 373 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 374 | 0, 0, 0, 0, 0 } } |
| 375 | |
| 376 | #define OPERAND_TYPE_ACC32 \ |
| 377 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 378 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 379 | 0, 0, 0, 0, 0 } } |
| 380 | |
| 381 | #define OPERAND_TYPE_ACC64 \ |
| 382 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 383 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 384 | 0, 0, 0, 0, 0 } } |
| 385 | |
| 386 | #define OPERAND_TYPE_INOUTPORTREG \ |
| 387 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 388 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 389 | 0, 0, 0, 0, 0 } } |
| 390 | |
| 391 | #define OPERAND_TYPE_REG16_INOUTPORTREG \ |
| 392 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 393 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 394 | 0, 0, 0, 0, 0 } } |
| 395 | |
| 396 | #define OPERAND_TYPE_DISP16_32 \ |
| 397 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 398 | 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 399 | 0, 0, 0, 0, 0 } } |
| 400 | |
| 401 | #define OPERAND_TYPE_ANYDISP \ |
| 402 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 403 | 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 404 | 0, 0, 0, 0, 0 } } |
| 405 | |
| 406 | #define OPERAND_TYPE_IMM16_32 \ |
| 407 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \ |
| 408 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 409 | 0, 0, 0, 0, 0 } } |
| 410 | |
| 411 | #define OPERAND_TYPE_IMM16_32S \ |
| 412 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \ |
| 413 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 414 | 0, 0, 0, 0, 0 } } |
| 415 | |
| 416 | #define OPERAND_TYPE_IMM16_32_32S \ |
| 417 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \ |
| 418 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 419 | 0, 0, 0, 0, 0 } } |
| 420 | |
| 421 | #define OPERAND_TYPE_IMM32_32S_DISP32 \ |
| 422 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \ |
| 423 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 424 | 0, 0, 0, 0, 0 } } |
| 425 | |
| 426 | #define OPERAND_TYPE_IMM64_DISP64 \ |
| 427 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 428 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 429 | 0, 0, 0, 0, 0 } } |
| 430 | |
| 431 | #define OPERAND_TYPE_IMM32_32S_64_DISP32 \ |
| 432 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ |
| 433 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 434 | 0, 0, 0, 0, 0 } } |
| 435 | |
| 436 | #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \ |
| 437 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ |
| 438 | 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 439 | 0, 0, 0, 0, 0 } } |