| 1 | /* This file is automatically generated by i386-gen. Do not edit! */ |
| 2 | /* Copyright 2007, 2008, 2009 |
| 3 | Free Software Foundation, Inc. |
| 4 | |
| 5 | This file is part of the GNU opcodes library. |
| 6 | |
| 7 | This library is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3, or (at your option) |
| 10 | any later version. |
| 11 | |
| 12 | It is distributed in the hope that it will be useful, but WITHOUT |
| 13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 15 | License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
| 20 | MA 02110-1301, USA. */ |
| 21 | |
| 22 | #define CPU_UNKNOWN_FLAGS \ |
| 23 | { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |
| 24 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |
| 25 | 1, 0, 1, 1 } } |
| 26 | |
| 27 | #define CPU_GENERIC32_FLAGS \ |
| 28 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 29 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 30 | 0, 0, 0, 0 } } |
| 31 | |
| 32 | #define CPU_GENERIC64_FLAGS \ |
| 33 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, \ |
| 34 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 35 | 1, 0, 0, 0 } } |
| 36 | |
| 37 | #define CPU_NONE_FLAGS \ |
| 38 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 39 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 40 | 0, 0, 0, 0 } } |
| 41 | |
| 42 | #define CPU_I186_FLAGS \ |
| 43 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 44 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 45 | 0, 0, 0, 0 } } |
| 46 | |
| 47 | #define CPU_I286_FLAGS \ |
| 48 | { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 49 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 50 | 0, 0, 0, 0 } } |
| 51 | |
| 52 | #define CPU_I386_FLAGS \ |
| 53 | { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 54 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 55 | 0, 0, 0, 0 } } |
| 56 | |
| 57 | #define CPU_I486_FLAGS \ |
| 58 | { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 59 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 60 | 0, 0, 0, 0 } } |
| 61 | |
| 62 | #define CPU_I586_FLAGS \ |
| 63 | { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 64 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 65 | 0, 0, 0, 0 } } |
| 66 | |
| 67 | #define CPU_I686_FLAGS \ |
| 68 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 69 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 70 | 0, 0, 0, 0 } } |
| 71 | |
| 72 | #define CPU_P2_FLAGS \ |
| 73 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 74 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 75 | 0, 0, 0, 0 } } |
| 76 | |
| 77 | #define CPU_P3_FLAGS \ |
| 78 | { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, \ |
| 79 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 80 | 0, 0, 0, 0 } } |
| 81 | |
| 82 | #define CPU_P4_FLAGS \ |
| 83 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, \ |
| 84 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 85 | 0, 0, 0, 0 } } |
| 86 | |
| 87 | #define CPU_NOCONA_FLAGS \ |
| 88 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \ |
| 89 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 90 | 1, 0, 0, 0 } } |
| 91 | |
| 92 | #define CPU_CORE_FLAGS \ |
| 93 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \ |
| 94 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 95 | 0, 0, 0, 0 } } |
| 96 | |
| 97 | #define CPU_CORE2_FLAGS \ |
| 98 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \ |
| 99 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 100 | 1, 0, 0, 0 } } |
| 101 | |
| 102 | #define CPU_COREI7_FLAGS \ |
| 103 | { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, \ |
| 104 | 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 105 | 1, 0, 0, 0 } } |
| 106 | |
| 107 | #define CPU_K6_FLAGS \ |
| 108 | { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 109 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 110 | 0, 0, 0, 0 } } |
| 111 | |
| 112 | #define CPU_K6_2_FLAGS \ |
| 113 | { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, \ |
| 114 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 115 | 0, 0, 0, 0 } } |
| 116 | |
| 117 | #define CPU_ATHLON_FLAGS \ |
| 118 | { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, \ |
| 119 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 120 | 0, 0, 0, 0 } } |
| 121 | |
| 122 | #define CPU_K8_FLAGS \ |
| 123 | { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, \ |
| 124 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 125 | 1, 0, 0, 0 } } |
| 126 | |
| 127 | #define CPU_AMDFAM10_FLAGS \ |
| 128 | { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, \ |
| 129 | 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 130 | 1, 0, 0, 0 } } |
| 131 | |
| 132 | #define CPU_8087_FLAGS \ |
| 133 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 134 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 135 | 0, 0, 0, 0 } } |
| 136 | |
| 137 | #define CPU_287_FLAGS \ |
| 138 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 139 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 140 | 0, 0, 0, 0 } } |
| 141 | |
| 142 | #define CPU_387_FLAGS \ |
| 143 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 144 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 145 | 0, 0, 0, 0 } } |
| 146 | |
| 147 | #define CPU_ANY87_FLAGS \ |
| 148 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 149 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 150 | 0, 0, 0, 0 } } |
| 151 | |
| 152 | #define CPU_CLFLUSH_FLAGS \ |
| 153 | { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 154 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 155 | 0, 0, 0, 0 } } |
| 156 | |
| 157 | #define CPU_SYSCALL_FLAGS \ |
| 158 | { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 159 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 160 | 0, 0, 0, 0 } } |
| 161 | |
| 162 | #define CPU_MMX_FLAGS \ |
| 163 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 164 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 165 | 0, 0, 0, 0 } } |
| 166 | |
| 167 | #define CPU_SSE_FLAGS \ |
| 168 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, \ |
| 169 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 170 | 0, 0, 0, 0 } } |
| 171 | |
| 172 | #define CPU_SSE2_FLAGS \ |
| 173 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, \ |
| 174 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 175 | 0, 0, 0, 0 } } |
| 176 | |
| 177 | #define CPU_SSE3_FLAGS \ |
| 178 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 179 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 180 | 0, 0, 0, 0 } } |
| 181 | |
| 182 | #define CPU_SSSE3_FLAGS \ |
| 183 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 184 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 185 | 0, 0, 0, 0 } } |
| 186 | |
| 187 | #define CPU_SSE4_1_FLAGS \ |
| 188 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 189 | 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 190 | 0, 0, 0, 0 } } |
| 191 | |
| 192 | #define CPU_SSE4_2_FLAGS \ |
| 193 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 194 | 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 195 | 0, 0, 0, 0 } } |
| 196 | |
| 197 | #define CPU_ANY_SSE_FLAGS \ |
| 198 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 0, \ |
| 199 | 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 200 | 0, 0, 0, 0 } } |
| 201 | |
| 202 | #define CPU_VMX_FLAGS \ |
| 203 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 204 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 205 | 0, 0, 0, 0 } } |
| 206 | |
| 207 | #define CPU_SMX_FLAGS \ |
| 208 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 209 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 210 | 0, 0, 0, 0 } } |
| 211 | |
| 212 | #define CPU_XSAVE_FLAGS \ |
| 213 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 214 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 215 | 0, 0, 0, 0 } } |
| 216 | |
| 217 | #define CPU_AES_FLAGS \ |
| 218 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 219 | 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 220 | 0, 0, 0, 0 } } |
| 221 | |
| 222 | #define CPU_PCLMUL_FLAGS \ |
| 223 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 224 | 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 225 | 0, 0, 0, 0 } } |
| 226 | |
| 227 | #define CPU_FMA_FLAGS \ |
| 228 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 229 | 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 230 | 0, 0, 0, 0 } } |
| 231 | |
| 232 | #define CPU_FMA4_FLAGS \ |
| 233 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 234 | 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 235 | 0, 0, 0, 0 } } |
| 236 | |
| 237 | #define CPU_XOP_FLAGS \ |
| 238 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 239 | 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \ |
| 240 | 0, 0, 0, 0 } } |
| 241 | |
| 242 | #define CPU_LWP_FLAGS \ |
| 243 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 244 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 245 | 0, 0, 0, 0 } } |
| 246 | |
| 247 | #define CPU_MOVBE_FLAGS \ |
| 248 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 249 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 250 | 0, 0, 0, 0 } } |
| 251 | |
| 252 | #define CPU_RDTSCP_FLAGS \ |
| 253 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 254 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 255 | 0, 0, 0, 0 } } |
| 256 | |
| 257 | #define CPU_EPT_FLAGS \ |
| 258 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 259 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 260 | 0, 0, 0, 0 } } |
| 261 | |
| 262 | #define CPU_3DNOW_FLAGS \ |
| 263 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, \ |
| 264 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 265 | 0, 0, 0, 0 } } |
| 266 | |
| 267 | #define CPU_3DNOWA_FLAGS \ |
| 268 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, \ |
| 269 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 270 | 0, 0, 0, 0 } } |
| 271 | |
| 272 | #define CPU_PADLOCK_FLAGS \ |
| 273 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 274 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 275 | 0, 0, 0, 0 } } |
| 276 | |
| 277 | #define CPU_SVME_FLAGS \ |
| 278 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 279 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 280 | 0, 0, 0, 0 } } |
| 281 | |
| 282 | #define CPU_SSE4A_FLAGS \ |
| 283 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 284 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 285 | 0, 0, 0, 0 } } |
| 286 | |
| 287 | #define CPU_ABM_FLAGS \ |
| 288 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 289 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 290 | 0, 0, 0, 0 } } |
| 291 | |
| 292 | #define CPU_AVX_FLAGS \ |
| 293 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, 0, \ |
| 294 | 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 295 | 0, 0, 0, 0 } } |
| 296 | |
| 297 | #define CPU_ANY_AVX_FLAGS \ |
| 298 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 299 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 300 | 0, 0, 0, 0 } } |
| 301 | |
| 302 | #define CPU_L1OM_FLAGS \ |
| 303 | { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |
| 304 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \ |
| 305 | 1, 0, 1, 1 } } |
| 306 | |
| 307 | |
| 308 | #define OPERAND_TYPE_NONE \ |
| 309 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 310 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 311 | 0, 0, 0, 0, 0 } } |
| 312 | |
| 313 | #define OPERAND_TYPE_REG8 \ |
| 314 | { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 315 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 316 | 0, 0, 0, 0, 0 } } |
| 317 | |
| 318 | #define OPERAND_TYPE_REG16 \ |
| 319 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 320 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 321 | 0, 0, 0, 0, 0 } } |
| 322 | |
| 323 | #define OPERAND_TYPE_REG32 \ |
| 324 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 325 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 326 | 0, 0, 0, 0, 0 } } |
| 327 | |
| 328 | #define OPERAND_TYPE_REG64 \ |
| 329 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 330 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 331 | 0, 0, 0, 0, 0 } } |
| 332 | |
| 333 | #define OPERAND_TYPE_IMM1 \ |
| 334 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \ |
| 335 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 336 | 0, 0, 0, 0, 0 } } |
| 337 | |
| 338 | #define OPERAND_TYPE_IMM8 \ |
| 339 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \ |
| 340 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 341 | 0, 0, 0, 0, 0 } } |
| 342 | |
| 343 | #define OPERAND_TYPE_IMM8S \ |
| 344 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \ |
| 345 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 346 | 0, 0, 0, 0, 0 } } |
| 347 | |
| 348 | #define OPERAND_TYPE_IMM16 \ |
| 349 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 350 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 351 | 0, 0, 0, 0, 0 } } |
| 352 | |
| 353 | #define OPERAND_TYPE_IMM32 \ |
| 354 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \ |
| 355 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 356 | 0, 0, 0, 0, 0 } } |
| 357 | |
| 358 | #define OPERAND_TYPE_IMM32S \ |
| 359 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 360 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 361 | 0, 0, 0, 0, 0 } } |
| 362 | |
| 363 | #define OPERAND_TYPE_IMM64 \ |
| 364 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 365 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 366 | 0, 0, 0, 0, 0 } } |
| 367 | |
| 368 | #define OPERAND_TYPE_BASEINDEX \ |
| 369 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 370 | 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 371 | 0, 0, 0, 0, 0 } } |
| 372 | |
| 373 | #define OPERAND_TYPE_DISP8 \ |
| 374 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 375 | 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 376 | 0, 0, 0, 0, 0 } } |
| 377 | |
| 378 | #define OPERAND_TYPE_DISP16 \ |
| 379 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 380 | 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 381 | 0, 0, 0, 0, 0 } } |
| 382 | |
| 383 | #define OPERAND_TYPE_DISP32 \ |
| 384 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 385 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 386 | 0, 0, 0, 0, 0 } } |
| 387 | |
| 388 | #define OPERAND_TYPE_DISP32S \ |
| 389 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 390 | 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 391 | 0, 0, 0, 0, 0 } } |
| 392 | |
| 393 | #define OPERAND_TYPE_DISP64 \ |
| 394 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 395 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 396 | 0, 0, 0, 0, 0 } } |
| 397 | |
| 398 | #define OPERAND_TYPE_INOUTPORTREG \ |
| 399 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 400 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 401 | 0, 0, 0, 0, 0 } } |
| 402 | |
| 403 | #define OPERAND_TYPE_SHIFTCOUNT \ |
| 404 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 405 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 406 | 0, 0, 0, 0, 0 } } |
| 407 | |
| 408 | #define OPERAND_TYPE_CONTROL \ |
| 409 | { { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 410 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 411 | 0, 0, 0, 0, 0 } } |
| 412 | |
| 413 | #define OPERAND_TYPE_TEST \ |
| 414 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 415 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 416 | 0, 0, 0, 0, 0 } } |
| 417 | |
| 418 | #define OPERAND_TYPE_DEBUG \ |
| 419 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 420 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 421 | 0, 0, 0, 0, 0 } } |
| 422 | |
| 423 | #define OPERAND_TYPE_FLOATREG \ |
| 424 | { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 425 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 426 | 0, 0, 0, 0, 0 } } |
| 427 | |
| 428 | #define OPERAND_TYPE_FLOATACC \ |
| 429 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 430 | 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 431 | 0, 0, 0, 0, 0 } } |
| 432 | |
| 433 | #define OPERAND_TYPE_SREG2 \ |
| 434 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 435 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 436 | 0, 0, 0, 0, 0 } } |
| 437 | |
| 438 | #define OPERAND_TYPE_SREG3 \ |
| 439 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \ |
| 440 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 441 | 0, 0, 0, 0, 0 } } |
| 442 | |
| 443 | #define OPERAND_TYPE_ACC \ |
| 444 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 445 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 446 | 0, 0, 0, 0, 0 } } |
| 447 | |
| 448 | #define OPERAND_TYPE_JUMPABSOLUTE \ |
| 449 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 450 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 451 | 0, 0, 0, 0, 0 } } |
| 452 | |
| 453 | #define OPERAND_TYPE_REGMMX \ |
| 454 | { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 455 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 456 | 0, 0, 0, 0, 0 } } |
| 457 | |
| 458 | #define OPERAND_TYPE_REGXMM \ |
| 459 | { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 460 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 461 | 0, 0, 0, 0, 0 } } |
| 462 | |
| 463 | #define OPERAND_TYPE_REGYMM \ |
| 464 | { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 465 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 466 | 0, 0, 0, 0, 0 } } |
| 467 | |
| 468 | #define OPERAND_TYPE_ESSEG \ |
| 469 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 470 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 471 | 0, 0, 0, 0, 0 } } |
| 472 | |
| 473 | #define OPERAND_TYPE_ACC32 \ |
| 474 | { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 475 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \ |
| 476 | 0, 0, 0, 0, 0 } } |
| 477 | |
| 478 | #define OPERAND_TYPE_ACC64 \ |
| 479 | { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 480 | 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \ |
| 481 | 0, 0, 0, 0, 0 } } |
| 482 | |
| 483 | #define OPERAND_TYPE_INOUTPORTREG \ |
| 484 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 485 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 486 | 0, 0, 0, 0, 0 } } |
| 487 | |
| 488 | #define OPERAND_TYPE_REG16_INOUTPORTREG \ |
| 489 | { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 490 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 491 | 0, 0, 0, 0, 0 } } |
| 492 | |
| 493 | #define OPERAND_TYPE_DISP16_32 \ |
| 494 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 495 | 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 496 | 0, 0, 0, 0, 0 } } |
| 497 | |
| 498 | #define OPERAND_TYPE_ANYDISP \ |
| 499 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 500 | 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 501 | 0, 0, 0, 0, 0 } } |
| 502 | |
| 503 | #define OPERAND_TYPE_IMM16_32 \ |
| 504 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \ |
| 505 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 506 | 0, 0, 0, 0, 0 } } |
| 507 | |
| 508 | #define OPERAND_TYPE_IMM16_32S \ |
| 509 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, \ |
| 510 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 511 | 0, 0, 0, 0, 0 } } |
| 512 | |
| 513 | #define OPERAND_TYPE_IMM16_32_32S \ |
| 514 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \ |
| 515 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 516 | 0, 0, 0, 0, 0 } } |
| 517 | |
| 518 | #define OPERAND_TYPE_IMM32_32S_DISP32 \ |
| 519 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, \ |
| 520 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 521 | 0, 0, 0, 0, 0 } } |
| 522 | |
| 523 | #define OPERAND_TYPE_IMM64_DISP64 \ |
| 524 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \ |
| 525 | 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 526 | 0, 0, 0, 0, 0 } } |
| 527 | |
| 528 | #define OPERAND_TYPE_IMM32_32S_64_DISP32 \ |
| 529 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ |
| 530 | 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 531 | 0, 0, 0, 0, 0 } } |
| 532 | |
| 533 | #define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \ |
| 534 | { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ |
| 535 | 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |
| 536 | 0, 0, 0, 0, 0 } } |