| 1 | /* ia64-opc-m.c -- IA-64 `M' opcode table. |
| 2 | Copyright 1998, 1999, 2000, 2002, 2005, 2007, 2009 |
| 3 | Free Software Foundation, Inc. |
| 4 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
| 5 | |
| 6 | This file is part of the GNU opcodes library. |
| 7 | |
| 8 | This library is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3, or (at your option) |
| 11 | any later version. |
| 12 | |
| 13 | It is distributed in the hope that it will be useful, but WITHOUT |
| 14 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 16 | License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this file; see the file COPYING. If not, write to the |
| 20 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
| 21 | MA 02110-1301, USA. */ |
| 22 | |
| 23 | #include "ia64-opc.h" |
| 24 | |
| 25 | #define M0 IA64_TYPE_M, 0 |
| 26 | #define M IA64_TYPE_M, 1 |
| 27 | #define M2 IA64_TYPE_M, 2 |
| 28 | |
| 29 | /* instruction bit fields: */ |
| 30 | #define bM(x) (((ia64_insn) ((x) & 0x1)) << 36) |
| 31 | #define bX(x) (((ia64_insn) ((x) & 0x1)) << 27) |
| 32 | #define bX2(x) (((ia64_insn) ((x) & 0x3)) << 31) |
| 33 | #define bX3(x) (((ia64_insn) ((x) & 0x7)) << 33) |
| 34 | #define bX4(x) (((ia64_insn) ((x) & 0xf)) << 27) |
| 35 | #define bX6a(x) (((ia64_insn) ((x) & 0x3f)) << 30) |
| 36 | #define bX6b(x) (((ia64_insn) ((x) & 0x3f)) << 27) |
| 37 | #define bX7(x) (((ia64_insn) ((x) & 0x1)) << 36) /* note: alias for bM() */ |
| 38 | #define bY(x) (((ia64_insn) ((x) & 0x1)) << 26) |
| 39 | #define bHint(x) (((ia64_insn) ((x) & 0x3)) << 28) |
| 40 | |
| 41 | #define mM bM (-1) |
| 42 | #define mX bX (-1) |
| 43 | #define mX2 bX2 (-1) |
| 44 | #define mX3 bX3 (-1) |
| 45 | #define mX4 bX4 (-1) |
| 46 | #define mX6a bX6a (-1) |
| 47 | #define mX6b bX6b (-1) |
| 48 | #define mX7 bX7 (-1) |
| 49 | #define mY bY (-1) |
| 50 | #define mHint bHint (-1) |
| 51 | |
| 52 | #define OpX3(a,b) (bOp (a) | bX3 (b)), (mOp | mX3) |
| 53 | #define OpX3X6b(a,b,c) (bOp (a) | bX3 (b) | bX6b (c)), \ |
| 54 | (mOp | mX3 | mX6b) |
| 55 | #define OpX3X6bX7(a,b,c,d) (bOp (a) | bX3 (b) | bX6b (c) | bX7 (d)), \ |
| 56 | (mOp | mX3 | mX6b | mX7) |
| 57 | #define OpX3X4(a,b,c) (bOp (a) | bX3 (b) | bX4 (c)), \ |
| 58 | (mOp | mX3 | mX4) |
| 59 | #define OpX3X4X2(a,b,c,d) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d)), \ |
| 60 | (mOp | mX3 | mX4 | mX2) |
| 61 | #define OpX3X4X2Y(a,b,c,d,e) (bOp (a) | bX3 (b) | bX4 (c) | bX2 (d) | bY (e)), \ |
| 62 | (mOp | mX3 | mX4 | mX2 | mY) |
| 63 | #define OpX6aHint(a,b,c) (bOp (a) | bX6a (b) | bHint (c)), \ |
| 64 | (mOp | mX6a | mHint) |
| 65 | #define OpXX6aHint(a,b,c,d) (bOp (a) | bX (b) | bX6a (c) | bHint (d)), \ |
| 66 | (mOp | mX | mX6a | mHint) |
| 67 | #define OpMXX6a(a,b,c,d) \ |
| 68 | (bOp (a) | bM (b) | bX (c) | bX6a (d)), (mOp | mM | mX | mX6a) |
| 69 | #define OpMXX6aHint(a,b,c,d,e) \ |
| 70 | (bOp (a) | bM (b) | bX (c) | bX6a (d) | bHint (e)), \ |
| 71 | (mOp | mM | mX | mX6a | mHint) |
| 72 | |
| 73 | /* Used to initialise unused fields in ia64_opcode struct, |
| 74 | in order to stop gcc from complaining. */ |
| 75 | #define EMPTY 0,0,NULL |
| 76 | |
| 77 | struct ia64_opcode ia64_opcodes_m[] = |
| 78 | { |
| 79 | /* M-type instruction encodings (sorted according to major opcode). */ |
| 80 | |
| 81 | {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY}, |
| 82 | {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY}, |
| 83 | {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY}, |
| 84 | {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY}, |
| 85 | |
| 86 | {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY}, |
| 87 | {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY}, |
| 88 | {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY}, |
| 89 | {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY}, |
| 90 | {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY}, |
| 91 | {"srlz.i", M0, OpX3X4X2 (0, 0, 1, 3), {}, EMPTY}, |
| 92 | {"sync.i", M0, OpX3X4X2 (0, 0, 3, 3), {}, EMPTY}, |
| 93 | {"flushrs", M0, OpX3X4X2 (0, 0, 0xc, 0), {}, FIRST | NO_PRED, 0, NULL}, |
| 94 | {"loadrs", M0, OpX3X4X2 (0, 0, 0xa, 0), {}, FIRST | NO_PRED, 0, NULL}, |
| 95 | {"invala.e", M0, OpX3X4X2 (0, 0, 2, 1), {R1}, EMPTY}, |
| 96 | {"invala.e", M0, OpX3X4X2 (0, 0, 3, 1), {F1}, EMPTY}, |
| 97 | {"mov.m", M, OpX3X4X2 (0, 0, 8, 2), {AR3, IMM8}, EMPTY}, |
| 98 | |
| 99 | {"break.m", M0, OpX3X4X2 (0, 0, 0, 0), {IMMU21}, EMPTY}, |
| 100 | {"nop.m", M0, OpX3X4X2Y (0, 0, 1, 0, 0), {IMMU21}, EMPTY}, |
| 101 | {"hint.m", M0, OpX3X4X2Y (0, 0, 1, 0, 1), {IMMU21}, EMPTY}, |
| 102 | |
| 103 | {"sum", M0, OpX3X4 (0, 0, 4), {IMMU24}, EMPTY}, |
| 104 | {"rum", M0, OpX3X4 (0, 0, 5), {IMMU24}, EMPTY}, |
| 105 | {"ssm", M0, OpX3X4 (0, 0, 6), {IMMU24}, PRIV, 0, NULL}, |
| 106 | {"rsm", M0, OpX3X4 (0, 0, 7), {IMMU24}, PRIV, 0, NULL}, |
| 107 | |
| 108 | {"mov.m", M, OpX3X6b (1, 0, 0x2a), {AR3, R2}, EMPTY}, |
| 109 | {"mov.m", M, OpX3X6b (1, 0, 0x22), {R1, AR3}, EMPTY}, |
| 110 | {"mov", M, OpX3X6b (1, 0, 0x2c), {CR3, R2}, PRIV, 0, NULL}, |
| 111 | {"mov", M, OpX3X6b (1, 0, 0x24), {R1, CR3}, PRIV, 0, NULL}, |
| 112 | |
| 113 | {"alloc", M, OpX3 (1, 6), {R1, AR_PFS, SOF, SOL, SOR}, FIRST|NO_PRED|MOD_RRBS, 0, NULL}, |
| 114 | {"alloc", M, OpX3 (1, 6), {R1, SOF, SOL, SOR}, PSEUDO|FIRST|NO_PRED|MOD_RRBS, 0, NULL}, |
| 115 | |
| 116 | {"mov", M, OpX3X6b (1, 0, 0x2d), {PSR_L, R2}, PRIV, 0, NULL}, |
| 117 | {"mov", M, OpX3X6b (1, 0, 0x29), {PSR_UM, R2}, EMPTY}, |
| 118 | {"mov", M, OpX3X6b (1, 0, 0x25), {R1, PSR}, PRIV, 0, NULL}, |
| 119 | {"mov", M, OpX3X6b (1, 0, 0x21), {R1, PSR_UM}, EMPTY}, |
| 120 | {"probe.r", M, OpX3X6b (1, 0, 0x38), {R1, R3, R2}, EMPTY}, |
| 121 | {"probe.w", M, OpX3X6b (1, 0, 0x39), {R1, R3, R2}, EMPTY}, |
| 122 | {"probe.r", M, OpX3X6b (1, 0, 0x18), {R1, R3, IMMU2}, EMPTY}, |
| 123 | {"probe.w", M, OpX3X6b (1, 0, 0x19), {R1, R3, IMMU2}, EMPTY}, |
| 124 | {"probe.rw.fault", M0, OpX3X6b (1, 0, 0x31), {R3, IMMU2}, EMPTY}, |
| 125 | {"probe.r.fault", M0, OpX3X6b (1, 0, 0x32), {R3, IMMU2}, EMPTY}, |
| 126 | {"probe.w.fault", M0, OpX3X6b (1, 0, 0x33), {R3, IMMU2}, EMPTY}, |
| 127 | {"itc.d", M0, OpX3X6b (1, 0, 0x2e), {R2}, LAST | PRIV, 0, NULL}, |
| 128 | {"itc.i", M0, OpX3X6b (1, 0, 0x2f), {R2}, LAST | PRIV, 0, NULL}, |
| 129 | |
| 130 | {"mov", M, OpX3X6b (1, 0, 0x00), {RR_R3, R2}, PRIV, 0, NULL}, |
| 131 | {"mov", M, OpX3X6b (1, 0, 0x01), {DBR_R3, R2}, PRIV, 0, NULL}, |
| 132 | {"mov", M, OpX3X6b (1, 0, 0x02), {IBR_R3, R2}, PRIV, 0, NULL}, |
| 133 | {"mov", M, OpX3X6b (1, 0, 0x03), {PKR_R3, R2}, PRIV, 0, NULL}, |
| 134 | {"mov", M, OpX3X6b (1, 0, 0x04), {PMC_R3, R2}, PRIV, 0, NULL}, |
| 135 | {"mov", M, OpX3X6b (1, 0, 0x05), {PMD_R3, R2}, PRIV, 0, NULL}, |
| 136 | {"mov", M, OpX3X6b (1, 0, 0x06), {MSR_R3, R2}, PRIV, 0, NULL}, |
| 137 | {"itr.d", M, OpX3X6b (1, 0, 0x0e), {DTR_R3, R2}, PRIV, 0, NULL}, |
| 138 | {"itr.i", M, OpX3X6b (1, 0, 0x0f), {ITR_R3, R2}, PRIV, 0, NULL}, |
| 139 | |
| 140 | {"mov", M, OpX3X6b (1, 0, 0x10), {R1, RR_R3}, PRIV, 0, NULL}, |
| 141 | {"mov", M, OpX3X6b (1, 0, 0x11), {R1, DBR_R3}, PRIV, 0, NULL}, |
| 142 | {"mov", M, OpX3X6b (1, 0, 0x12), {R1, IBR_R3}, PRIV, 0, NULL}, |
| 143 | {"mov", M, OpX3X6b (1, 0, 0x13), {R1, PKR_R3}, PRIV, 0, NULL}, |
| 144 | {"mov", M, OpX3X6b (1, 0, 0x14), {R1, PMC_R3}, PRIV, 0, NULL}, |
| 145 | {"mov", M, OpX3X6b (1, 0, 0x15), {R1, PMD_R3}, EMPTY}, |
| 146 | {"mov", M, OpX3X6b (1, 0, 0x16), {R1, MSR_R3}, PRIV, 0, NULL}, |
| 147 | {"mov", M, OpX3X6b (1, 0, 0x17), {R1, CPUID_R3}, EMPTY}, |
| 148 | |
| 149 | {"ptc.l", M0, OpX3X6b (1, 0, 0x09), {R3, R2}, PRIV, 0, NULL}, |
| 150 | {"ptc.g", M0, OpX3X6b (1, 0, 0x0a), {R3, R2}, LAST | PRIV, 0, NULL}, |
| 151 | {"ptc.ga", M0, OpX3X6b (1, 0, 0x0b), {R3, R2}, LAST | PRIV, 0, NULL}, |
| 152 | {"ptr.d", M0, OpX3X6b (1, 0, 0x0c), {R3, R2}, PRIV, 0, NULL}, |
| 153 | {"ptr.i", M0, OpX3X6b (1, 0, 0x0d), {R3, R2}, PRIV, 0, NULL}, |
| 154 | |
| 155 | {"thash", M, OpX3X6b (1, 0, 0x1a), {R1, R3}, EMPTY}, |
| 156 | {"ttag", M, OpX3X6b (1, 0, 0x1b), {R1, R3}, EMPTY}, |
| 157 | {"tpa", M, OpX3X6b (1, 0, 0x1e), {R1, R3}, PRIV, 0, NULL}, |
| 158 | {"tak", M, OpX3X6b (1, 0, 0x1f), {R1, R3}, PRIV, 0, NULL}, |
| 159 | |
| 160 | {"chk.s.m", M0, OpX3 (1, 1), {R2, TGT25b}, EMPTY}, |
| 161 | {"chk.s", M0, OpX3 (1, 3), {F2, TGT25b}, EMPTY}, |
| 162 | |
| 163 | {"fc", M0, OpX3X6bX7 (1, 0, 0x30, 0), {R3}, EMPTY}, |
| 164 | {"fc.i", M0, OpX3X6bX7 (1, 0, 0x30, 1), {R3}, EMPTY}, |
| 165 | {"ptc.e", M0, OpX3X6b (1, 0, 0x34), {R3}, PRIV, 0, NULL}, |
| 166 | |
| 167 | /* integer load */ |
| 168 | {"ld1", M, OpMXX6aHint (4, 0, 0, 0x00, 0), {R1, MR3}, EMPTY}, |
| 169 | {"ld1.nt1", M, OpMXX6aHint (4, 0, 0, 0x00, 1), {R1, MR3}, EMPTY}, |
| 170 | {"ld1.nta", M, OpMXX6aHint (4, 0, 0, 0x00, 3), {R1, MR3}, EMPTY}, |
| 171 | {"ld2", M, OpMXX6aHint (4, 0, 0, 0x01, 0), {R1, MR3}, EMPTY}, |
| 172 | {"ld2.nt1", M, OpMXX6aHint (4, 0, 0, 0x01, 1), {R1, MR3}, EMPTY}, |
| 173 | {"ld2.nta", M, OpMXX6aHint (4, 0, 0, 0x01, 3), {R1, MR3}, EMPTY}, |
| 174 | {"ld4", M, OpMXX6aHint (4, 0, 0, 0x02, 0), {R1, MR3}, EMPTY}, |
| 175 | {"ld4.nt1", M, OpMXX6aHint (4, 0, 0, 0x02, 1), {R1, MR3}, EMPTY}, |
| 176 | {"ld4.nta", M, OpMXX6aHint (4, 0, 0, 0x02, 3), {R1, MR3}, EMPTY}, |
| 177 | {"ld8", M, OpMXX6aHint (4, 0, 0, 0x03, 0), {R1, MR3}, EMPTY}, |
| 178 | {"ld8.nt1", M, OpMXX6aHint (4, 0, 0, 0x03, 1), {R1, MR3}, EMPTY}, |
| 179 | {"ld8.nta", M, OpMXX6aHint (4, 0, 0, 0x03, 3), {R1, MR3}, EMPTY}, |
| 180 | {"ld16", M2, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, AR_CSD, MR3}, EMPTY}, |
| 181 | {"ld16", M, OpMXX6aHint (4, 0, 1, 0x28, 0), {R1, MR3}, PSEUDO, 0, NULL}, |
| 182 | {"ld16.nt1", M2, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, AR_CSD, MR3}, EMPTY}, |
| 183 | {"ld16.nt1", M, OpMXX6aHint (4, 0, 1, 0x28, 1), {R1, MR3}, PSEUDO, 0, NULL}, |
| 184 | {"ld16.nta", M2, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, AR_CSD, MR3}, EMPTY}, |
| 185 | {"ld16.nta", M, OpMXX6aHint (4, 0, 1, 0x28, 3), {R1, MR3}, PSEUDO, 0, NULL}, |
| 186 | {"ld1.s", M, OpMXX6aHint (4, 0, 0, 0x04, 0), {R1, MR3}, EMPTY}, |
| 187 | {"ld1.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x04, 1), {R1, MR3}, EMPTY}, |
| 188 | {"ld1.s.nta", M, OpMXX6aHint (4, 0, 0, 0x04, 3), {R1, MR3}, EMPTY}, |
| 189 | {"ld2.s", M, OpMXX6aHint (4, 0, 0, 0x05, 0), {R1, MR3}, EMPTY}, |
| 190 | {"ld2.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x05, 1), {R1, MR3}, EMPTY}, |
| 191 | {"ld2.s.nta", M, OpMXX6aHint (4, 0, 0, 0x05, 3), {R1, MR3}, EMPTY}, |
| 192 | {"ld4.s", M, OpMXX6aHint (4, 0, 0, 0x06, 0), {R1, MR3}, EMPTY}, |
| 193 | {"ld4.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x06, 1), {R1, MR3}, EMPTY}, |
| 194 | {"ld4.s.nta", M, OpMXX6aHint (4, 0, 0, 0x06, 3), {R1, MR3}, EMPTY}, |
| 195 | {"ld8.s", M, OpMXX6aHint (4, 0, 0, 0x07, 0), {R1, MR3}, EMPTY}, |
| 196 | {"ld8.s.nt1", M, OpMXX6aHint (4, 0, 0, 0x07, 1), {R1, MR3}, EMPTY}, |
| 197 | {"ld8.s.nta", M, OpMXX6aHint (4, 0, 0, 0x07, 3), {R1, MR3}, EMPTY}, |
| 198 | {"ld1.a", M, OpMXX6aHint (4, 0, 0, 0x08, 0), {R1, MR3}, EMPTY}, |
| 199 | {"ld1.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x08, 1), {R1, MR3}, EMPTY}, |
| 200 | {"ld1.a.nta", M, OpMXX6aHint (4, 0, 0, 0x08, 3), {R1, MR3}, EMPTY}, |
| 201 | {"ld2.a", M, OpMXX6aHint (4, 0, 0, 0x09, 0), {R1, MR3}, EMPTY}, |
| 202 | {"ld2.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x09, 1), {R1, MR3}, EMPTY}, |
| 203 | {"ld2.a.nta", M, OpMXX6aHint (4, 0, 0, 0x09, 3), {R1, MR3}, EMPTY}, |
| 204 | {"ld4.a", M, OpMXX6aHint (4, 0, 0, 0x0a, 0), {R1, MR3}, EMPTY}, |
| 205 | {"ld4.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0a, 1), {R1, MR3}, EMPTY}, |
| 206 | {"ld4.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0a, 3), {R1, MR3}, EMPTY}, |
| 207 | {"ld8.a", M, OpMXX6aHint (4, 0, 0, 0x0b, 0), {R1, MR3}, EMPTY}, |
| 208 | {"ld8.a.nt1", M, OpMXX6aHint (4, 0, 0, 0x0b, 1), {R1, MR3}, EMPTY}, |
| 209 | {"ld8.a.nta", M, OpMXX6aHint (4, 0, 0, 0x0b, 3), {R1, MR3}, EMPTY}, |
| 210 | {"ld1.sa", M, OpMXX6aHint (4, 0, 0, 0x0c, 0), {R1, MR3}, EMPTY}, |
| 211 | {"ld1.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0c, 1), {R1, MR3}, EMPTY}, |
| 212 | {"ld1.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0c, 3), {R1, MR3}, EMPTY}, |
| 213 | {"ld2.sa", M, OpMXX6aHint (4, 0, 0, 0x0d, 0), {R1, MR3}, EMPTY}, |
| 214 | {"ld2.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0d, 1), {R1, MR3}, EMPTY}, |
| 215 | {"ld2.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0d, 3), {R1, MR3}, EMPTY}, |
| 216 | {"ld4.sa", M, OpMXX6aHint (4, 0, 0, 0x0e, 0), {R1, MR3}, EMPTY}, |
| 217 | {"ld4.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0e, 1), {R1, MR3}, EMPTY}, |
| 218 | {"ld4.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0e, 3), {R1, MR3}, EMPTY}, |
| 219 | {"ld8.sa", M, OpMXX6aHint (4, 0, 0, 0x0f, 0), {R1, MR3}, EMPTY}, |
| 220 | {"ld8.sa.nt1", M, OpMXX6aHint (4, 0, 0, 0x0f, 1), {R1, MR3}, EMPTY}, |
| 221 | {"ld8.sa.nta", M, OpMXX6aHint (4, 0, 0, 0x0f, 3), {R1, MR3}, EMPTY}, |
| 222 | {"ld1.bias", M, OpMXX6aHint (4, 0, 0, 0x10, 0), {R1, MR3}, EMPTY}, |
| 223 | {"ld1.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x10, 1), {R1, MR3}, EMPTY}, |
| 224 | {"ld1.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x10, 3), {R1, MR3}, EMPTY}, |
| 225 | {"ld2.bias", M, OpMXX6aHint (4, 0, 0, 0x11, 0), {R1, MR3}, EMPTY}, |
| 226 | {"ld2.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x11, 1), {R1, MR3}, EMPTY}, |
| 227 | {"ld2.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x11, 3), {R1, MR3}, EMPTY}, |
| 228 | {"ld4.bias", M, OpMXX6aHint (4, 0, 0, 0x12, 0), {R1, MR3}, EMPTY}, |
| 229 | {"ld4.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x12, 1), {R1, MR3}, EMPTY}, |
| 230 | {"ld4.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x12, 3), {R1, MR3}, EMPTY}, |
| 231 | {"ld8.bias", M, OpMXX6aHint (4, 0, 0, 0x13, 0), {R1, MR3}, EMPTY}, |
| 232 | {"ld8.bias.nt1", M, OpMXX6aHint (4, 0, 0, 0x13, 1), {R1, MR3}, EMPTY}, |
| 233 | {"ld8.bias.nta", M, OpMXX6aHint (4, 0, 0, 0x13, 3), {R1, MR3}, EMPTY}, |
| 234 | {"ld1.acq", M, OpMXX6aHint (4, 0, 0, 0x14, 0), {R1, MR3}, EMPTY}, |
| 235 | {"ld1.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x14, 1), {R1, MR3}, EMPTY}, |
| 236 | {"ld1.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x14, 3), {R1, MR3}, EMPTY}, |
| 237 | {"ld2.acq", M, OpMXX6aHint (4, 0, 0, 0x15, 0), {R1, MR3}, EMPTY}, |
| 238 | {"ld2.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x15, 1), {R1, MR3}, EMPTY}, |
| 239 | {"ld2.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x15, 3), {R1, MR3}, EMPTY}, |
| 240 | {"ld4.acq", M, OpMXX6aHint (4, 0, 0, 0x16, 0), {R1, MR3}, EMPTY}, |
| 241 | {"ld4.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x16, 1), {R1, MR3}, EMPTY}, |
| 242 | {"ld4.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x16, 3), {R1, MR3}, EMPTY}, |
| 243 | {"ld8.acq", M, OpMXX6aHint (4, 0, 0, 0x17, 0), {R1, MR3}, EMPTY}, |
| 244 | {"ld8.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x17, 1), {R1, MR3}, EMPTY}, |
| 245 | {"ld8.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x17, 3), {R1, MR3}, EMPTY}, |
| 246 | {"ld16.acq", M2, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, AR_CSD, MR3}, EMPTY}, |
| 247 | {"ld16.acq", M, OpMXX6aHint (4, 0, 1, 0x2c, 0), {R1, MR3}, PSEUDO, 0, NULL}, |
| 248 | {"ld16.acq.nt1", M2, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, AR_CSD, MR3}, EMPTY}, |
| 249 | {"ld16.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x2c, 1), {R1, MR3}, PSEUDO, 0, NULL}, |
| 250 | {"ld16.acq.nta", M2, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, AR_CSD, MR3}, EMPTY}, |
| 251 | {"ld16.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x2c, 3), {R1, MR3}, PSEUDO, 0, NULL}, |
| 252 | {"ld8.fill", M, OpMXX6aHint (4, 0, 0, 0x1b, 0), {R1, MR3}, EMPTY}, |
| 253 | {"ld8.fill.nt1", M, OpMXX6aHint (4, 0, 0, 0x1b, 1), {R1, MR3}, EMPTY}, |
| 254 | {"ld8.fill.nta", M, OpMXX6aHint (4, 0, 0, 0x1b, 3), {R1, MR3}, EMPTY}, |
| 255 | {"ld1.c.clr", M, OpMXX6aHint (4, 0, 0, 0x20, 0), {R1, MR3}, EMPTY}, |
| 256 | {"ld1.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x20, 1), {R1, MR3}, EMPTY}, |
| 257 | {"ld1.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x20, 3), {R1, MR3}, EMPTY}, |
| 258 | {"ld2.c.clr", M, OpMXX6aHint (4, 0, 0, 0x21, 0), {R1, MR3}, EMPTY}, |
| 259 | {"ld2.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x21, 1), {R1, MR3}, EMPTY}, |
| 260 | {"ld2.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x21, 3), {R1, MR3}, EMPTY}, |
| 261 | {"ld4.c.clr", M, OpMXX6aHint (4, 0, 0, 0x22, 0), {R1, MR3}, EMPTY}, |
| 262 | {"ld4.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x22, 1), {R1, MR3}, EMPTY}, |
| 263 | {"ld4.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x22, 3), {R1, MR3}, EMPTY}, |
| 264 | {"ld8.c.clr", M, OpMXX6aHint (4, 0, 0, 0x23, 0), {R1, MR3}, EMPTY}, |
| 265 | {"ld8.c.clr.nt1", M, OpMXX6aHint (4, 0, 0, 0x23, 1), {R1, MR3}, EMPTY}, |
| 266 | {"ld8.c.clr.nta", M, OpMXX6aHint (4, 0, 0, 0x23, 3), {R1, MR3}, EMPTY}, |
| 267 | {"ld1.c.nc", M, OpMXX6aHint (4, 0, 0, 0x24, 0), {R1, MR3}, EMPTY}, |
| 268 | {"ld1.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x24, 1), {R1, MR3}, EMPTY}, |
| 269 | {"ld1.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x24, 3), {R1, MR3}, EMPTY}, |
| 270 | {"ld2.c.nc", M, OpMXX6aHint (4, 0, 0, 0x25, 0), {R1, MR3}, EMPTY}, |
| 271 | {"ld2.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x25, 1), {R1, MR3}, EMPTY}, |
| 272 | {"ld2.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x25, 3), {R1, MR3}, EMPTY}, |
| 273 | {"ld4.c.nc", M, OpMXX6aHint (4, 0, 0, 0x26, 0), {R1, MR3}, EMPTY}, |
| 274 | {"ld4.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x26, 1), {R1, MR3}, EMPTY}, |
| 275 | {"ld4.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x26, 3), {R1, MR3}, EMPTY}, |
| 276 | {"ld8.c.nc", M, OpMXX6aHint (4, 0, 0, 0x27, 0), {R1, MR3}, EMPTY}, |
| 277 | {"ld8.c.nc.nt1", M, OpMXX6aHint (4, 0, 0, 0x27, 1), {R1, MR3}, EMPTY}, |
| 278 | {"ld8.c.nc.nta", M, OpMXX6aHint (4, 0, 0, 0x27, 3), {R1, MR3}, EMPTY}, |
| 279 | {"ld1.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x28, 0), {R1, MR3}, EMPTY}, |
| 280 | {"ld1.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x28, 1), {R1, MR3}, EMPTY}, |
| 281 | {"ld1.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x28, 3), {R1, MR3}, EMPTY}, |
| 282 | {"ld2.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x29, 0), {R1, MR3}, EMPTY}, |
| 283 | {"ld2.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x29, 1), {R1, MR3}, EMPTY}, |
| 284 | {"ld2.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x29, 3), {R1, MR3}, EMPTY}, |
| 285 | {"ld4.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2a, 0), {R1, MR3}, EMPTY}, |
| 286 | {"ld4.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2a, 1), {R1, MR3}, EMPTY}, |
| 287 | {"ld4.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2a, 3), {R1, MR3}, EMPTY}, |
| 288 | {"ld8.c.clr.acq", M, OpMXX6aHint (4, 0, 0, 0x2b, 0), {R1, MR3}, EMPTY}, |
| 289 | {"ld8.c.clr.acq.nt1", M, OpMXX6aHint (4, 0, 0, 0x2b, 1), {R1, MR3}, EMPTY}, |
| 290 | {"ld8.c.clr.acq.nta", M, OpMXX6aHint (4, 0, 0, 0x2b, 3), {R1, MR3}, EMPTY}, |
| 291 | |
| 292 | /* Pseudo-op that generates ldxmov relocation. */ |
| 293 | {"ld8.mov", M, OpMXX6aHint (4, 0, 0, 0x03, 0), |
| 294 | {R1, MR3, IA64_OPND_LDXMOV}, EMPTY}, |
| 295 | |
| 296 | /* Integer load w/increment by register. */ |
| 297 | #define LDINCREG(c,h) M, OpMXX6aHint (4, 1, 0, c, h), {R1, MR3, R2}, POSTINC, 0, NULL |
| 298 | {"ld1", LDINCREG (0x00, 0)}, |
| 299 | {"ld1.nt1", LDINCREG (0x00, 1)}, |
| 300 | {"ld1.nta", LDINCREG (0x00, 3)}, |
| 301 | {"ld2", LDINCREG (0x01, 0)}, |
| 302 | {"ld2.nt1", LDINCREG (0x01, 1)}, |
| 303 | {"ld2.nta", LDINCREG (0x01, 3)}, |
| 304 | {"ld4", LDINCREG (0x02, 0)}, |
| 305 | {"ld4.nt1", LDINCREG (0x02, 1)}, |
| 306 | {"ld4.nta", LDINCREG (0x02, 3)}, |
| 307 | {"ld8", LDINCREG (0x03, 0)}, |
| 308 | {"ld8.nt1", LDINCREG (0x03, 1)}, |
| 309 | {"ld8.nta", LDINCREG (0x03, 3)}, |
| 310 | {"ld1.s", LDINCREG (0x04, 0)}, |
| 311 | {"ld1.s.nt1", LDINCREG (0x04, 1)}, |
| 312 | {"ld1.s.nta", LDINCREG (0x04, 3)}, |
| 313 | {"ld2.s", LDINCREG (0x05, 0)}, |
| 314 | {"ld2.s.nt1", LDINCREG (0x05, 1)}, |
| 315 | {"ld2.s.nta", LDINCREG (0x05, 3)}, |
| 316 | {"ld4.s", LDINCREG (0x06, 0)}, |
| 317 | {"ld4.s.nt1", LDINCREG (0x06, 1)}, |
| 318 | {"ld4.s.nta", LDINCREG (0x06, 3)}, |
| 319 | {"ld8.s", LDINCREG (0x07, 0)}, |
| 320 | {"ld8.s.nt1", LDINCREG (0x07, 1)}, |
| 321 | {"ld8.s.nta", LDINCREG (0x07, 3)}, |
| 322 | {"ld1.a", LDINCREG (0x08, 0)}, |
| 323 | {"ld1.a.nt1", LDINCREG (0x08, 1)}, |
| 324 | {"ld1.a.nta", LDINCREG (0x08, 3)}, |
| 325 | {"ld2.a", LDINCREG (0x09, 0)}, |
| 326 | {"ld2.a.nt1", LDINCREG (0x09, 1)}, |
| 327 | {"ld2.a.nta", LDINCREG (0x09, 3)}, |
| 328 | {"ld4.a", LDINCREG (0x0a, 0)}, |
| 329 | {"ld4.a.nt1", LDINCREG (0x0a, 1)}, |
| 330 | {"ld4.a.nta", LDINCREG (0x0a, 3)}, |
| 331 | {"ld8.a", LDINCREG (0x0b, 0)}, |
| 332 | {"ld8.a.nt1", LDINCREG (0x0b, 1)}, |
| 333 | {"ld8.a.nta", LDINCREG (0x0b, 3)}, |
| 334 | {"ld1.sa", LDINCREG (0x0c, 0)}, |
| 335 | {"ld1.sa.nt1", LDINCREG (0x0c, 1)}, |
| 336 | {"ld1.sa.nta", LDINCREG (0x0c, 3)}, |
| 337 | {"ld2.sa", LDINCREG (0x0d, 0)}, |
| 338 | {"ld2.sa.nt1", LDINCREG (0x0d, 1)}, |
| 339 | {"ld2.sa.nta", LDINCREG (0x0d, 3)}, |
| 340 | {"ld4.sa", LDINCREG (0x0e, 0)}, |
| 341 | {"ld4.sa.nt1", LDINCREG (0x0e, 1)}, |
| 342 | {"ld4.sa.nta", LDINCREG (0x0e, 3)}, |
| 343 | {"ld8.sa", LDINCREG (0x0f, 0)}, |
| 344 | {"ld8.sa.nt1", LDINCREG (0x0f, 1)}, |
| 345 | {"ld8.sa.nta", LDINCREG (0x0f, 3)}, |
| 346 | {"ld1.bias", LDINCREG (0x10, 0)}, |
| 347 | {"ld1.bias.nt1", LDINCREG (0x10, 1)}, |
| 348 | {"ld1.bias.nta", LDINCREG (0x10, 3)}, |
| 349 | {"ld2.bias", LDINCREG (0x11, 0)}, |
| 350 | {"ld2.bias.nt1", LDINCREG (0x11, 1)}, |
| 351 | {"ld2.bias.nta", LDINCREG (0x11, 3)}, |
| 352 | {"ld4.bias", LDINCREG (0x12, 0)}, |
| 353 | {"ld4.bias.nt1", LDINCREG (0x12, 1)}, |
| 354 | {"ld4.bias.nta", LDINCREG (0x12, 3)}, |
| 355 | {"ld8.bias", LDINCREG (0x13, 0)}, |
| 356 | {"ld8.bias.nt1", LDINCREG (0x13, 1)}, |
| 357 | {"ld8.bias.nta", LDINCREG (0x13, 3)}, |
| 358 | {"ld1.acq", LDINCREG (0x14, 0)}, |
| 359 | {"ld1.acq.nt1", LDINCREG (0x14, 1)}, |
| 360 | {"ld1.acq.nta", LDINCREG (0x14, 3)}, |
| 361 | {"ld2.acq", LDINCREG (0x15, 0)}, |
| 362 | {"ld2.acq.nt1", LDINCREG (0x15, 1)}, |
| 363 | {"ld2.acq.nta", LDINCREG (0x15, 3)}, |
| 364 | {"ld4.acq", LDINCREG (0x16, 0)}, |
| 365 | {"ld4.acq.nt1", LDINCREG (0x16, 1)}, |
| 366 | {"ld4.acq.nta", LDINCREG (0x16, 3)}, |
| 367 | {"ld8.acq", LDINCREG (0x17, 0)}, |
| 368 | {"ld8.acq.nt1", LDINCREG (0x17, 1)}, |
| 369 | {"ld8.acq.nta", LDINCREG (0x17, 3)}, |
| 370 | {"ld8.fill", LDINCREG (0x1b, 0)}, |
| 371 | {"ld8.fill.nt1", LDINCREG (0x1b, 1)}, |
| 372 | {"ld8.fill.nta", LDINCREG (0x1b, 3)}, |
| 373 | {"ld1.c.clr", LDINCREG (0x20, 0)}, |
| 374 | {"ld1.c.clr.nt1", LDINCREG (0x20, 1)}, |
| 375 | {"ld1.c.clr.nta", LDINCREG (0x20, 3)}, |
| 376 | {"ld2.c.clr", LDINCREG (0x21, 0)}, |
| 377 | {"ld2.c.clr.nt1", LDINCREG (0x21, 1)}, |
| 378 | {"ld2.c.clr.nta", LDINCREG (0x21, 3)}, |
| 379 | {"ld4.c.clr", LDINCREG (0x22, 0)}, |
| 380 | {"ld4.c.clr.nt1", LDINCREG (0x22, 1)}, |
| 381 | {"ld4.c.clr.nta", LDINCREG (0x22, 3)}, |
| 382 | {"ld8.c.clr", LDINCREG (0x23, 0)}, |
| 383 | {"ld8.c.clr.nt1", LDINCREG (0x23, 1)}, |
| 384 | {"ld8.c.clr.nta", LDINCREG (0x23, 3)}, |
| 385 | {"ld1.c.nc", LDINCREG (0x24, 0)}, |
| 386 | {"ld1.c.nc.nt1", LDINCREG (0x24, 1)}, |
| 387 | {"ld1.c.nc.nta", LDINCREG (0x24, 3)}, |
| 388 | {"ld2.c.nc", LDINCREG (0x25, 0)}, |
| 389 | {"ld2.c.nc.nt1", LDINCREG (0x25, 1)}, |
| 390 | {"ld2.c.nc.nta", LDINCREG (0x25, 3)}, |
| 391 | {"ld4.c.nc", LDINCREG (0x26, 0)}, |
| 392 | {"ld4.c.nc.nt1", LDINCREG (0x26, 1)}, |
| 393 | {"ld4.c.nc.nta", LDINCREG (0x26, 3)}, |
| 394 | {"ld8.c.nc", LDINCREG (0x27, 0)}, |
| 395 | {"ld8.c.nc.nt1", LDINCREG (0x27, 1)}, |
| 396 | {"ld8.c.nc.nta", LDINCREG (0x27, 3)}, |
| 397 | {"ld1.c.clr.acq", LDINCREG (0x28, 0)}, |
| 398 | {"ld1.c.clr.acq.nt1", LDINCREG (0x28, 1)}, |
| 399 | {"ld1.c.clr.acq.nta", LDINCREG (0x28, 3)}, |
| 400 | {"ld2.c.clr.acq", LDINCREG (0x29, 0)}, |
| 401 | {"ld2.c.clr.acq.nt1", LDINCREG (0x29, 1)}, |
| 402 | {"ld2.c.clr.acq.nta", LDINCREG (0x29, 3)}, |
| 403 | {"ld4.c.clr.acq", LDINCREG (0x2a, 0)}, |
| 404 | {"ld4.c.clr.acq.nt1", LDINCREG (0x2a, 1)}, |
| 405 | {"ld4.c.clr.acq.nta", LDINCREG (0x2a, 3)}, |
| 406 | {"ld8.c.clr.acq", LDINCREG (0x2b, 0)}, |
| 407 | {"ld8.c.clr.acq.nt1", LDINCREG (0x2b, 1)}, |
| 408 | {"ld8.c.clr.acq.nta", LDINCREG (0x2b, 3)}, |
| 409 | #undef LDINCREG |
| 410 | |
| 411 | {"st1", M, OpMXX6aHint (4, 0, 0, 0x30, 0), {MR3, R2}, EMPTY}, |
| 412 | {"st1.nta", M, OpMXX6aHint (4, 0, 0, 0x30, 3), {MR3, R2}, EMPTY}, |
| 413 | {"st2", M, OpMXX6aHint (4, 0, 0, 0x31, 0), {MR3, R2}, EMPTY}, |
| 414 | {"st2.nta", M, OpMXX6aHint (4, 0, 0, 0x31, 3), {MR3, R2}, EMPTY}, |
| 415 | {"st4", M, OpMXX6aHint (4, 0, 0, 0x32, 0), {MR3, R2}, EMPTY}, |
| 416 | {"st4.nta", M, OpMXX6aHint (4, 0, 0, 0x32, 3), {MR3, R2}, EMPTY}, |
| 417 | {"st8", M, OpMXX6aHint (4, 0, 0, 0x33, 0), {MR3, R2}, EMPTY}, |
| 418 | {"st8.nta", M, OpMXX6aHint (4, 0, 0, 0x33, 3), {MR3, R2}, EMPTY}, |
| 419 | {"st16", M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2, AR_CSD}, EMPTY}, |
| 420 | {"st16", M, OpMXX6aHint (4, 0, 1, 0x30, 0), {MR3, R2}, PSEUDO, 0, NULL}, |
| 421 | {"st16.nta", M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2, AR_CSD}, EMPTY}, |
| 422 | {"st16.nta", M, OpMXX6aHint (4, 0, 1, 0x30, 3), {MR3, R2}, PSEUDO, 0, NULL}, |
| 423 | {"st1.rel", M, OpMXX6aHint (4, 0, 0, 0x34, 0), {MR3, R2}, EMPTY}, |
| 424 | {"st1.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x34, 3), {MR3, R2}, EMPTY}, |
| 425 | {"st2.rel", M, OpMXX6aHint (4, 0, 0, 0x35, 0), {MR3, R2}, EMPTY}, |
| 426 | {"st2.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x35, 3), {MR3, R2}, EMPTY}, |
| 427 | {"st4.rel", M, OpMXX6aHint (4, 0, 0, 0x36, 0), {MR3, R2}, EMPTY}, |
| 428 | {"st4.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x36, 3), {MR3, R2}, EMPTY}, |
| 429 | {"st8.rel", M, OpMXX6aHint (4, 0, 0, 0x37, 0), {MR3, R2}, EMPTY}, |
| 430 | {"st8.rel.nta", M, OpMXX6aHint (4, 0, 0, 0x37, 3), {MR3, R2}, EMPTY}, |
| 431 | {"st16.rel", M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2, AR_CSD}, EMPTY}, |
| 432 | {"st16.rel", M, OpMXX6aHint (4, 0, 1, 0x34, 0), {MR3, R2}, PSEUDO, 0, NULL}, |
| 433 | {"st16.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2, AR_CSD}, EMPTY}, |
| 434 | {"st16.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x34, 3), {MR3, R2}, PSEUDO, 0, NULL}, |
| 435 | {"st8.spill", M, OpMXX6aHint (4, 0, 0, 0x3b, 0), {MR3, R2}, EMPTY}, |
| 436 | {"st8.spill.nta", M, OpMXX6aHint (4, 0, 0, 0x3b, 3), {MR3, R2}, EMPTY}, |
| 437 | |
| 438 | #define CMPXCHG(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CCV}, EMPTY |
| 439 | #define CMPXCHG_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL |
| 440 | #define CMPXCHG16(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2, AR_CSD, AR_CCV}, EMPTY |
| 441 | #define CMPXCHG16_P(c,h) M, OpMXX6aHint (4, 0, 1, c, h), {R1, MR3, R2}, PSEUDO, 0, NULL |
| 442 | #define CMPXCHG_acq 0 |
| 443 | #define CMPXCHG_rel 4 |
| 444 | #define CMPXCHG_1 0 |
| 445 | #define CMPXCHG_2 1 |
| 446 | #define CMPXCHG_4 2 |
| 447 | #define CMPXCHG_8 3 |
| 448 | #define CMPXCHGn(n, s) \ |
| 449 | {"cmpxchg"#n"."#s, CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 0)}, \ |
| 450 | {"cmpxchg"#n"."#s, CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 0)}, \ |
| 451 | {"cmpxchg"#n"."#s".nt1", CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 1)}, \ |
| 452 | {"cmpxchg"#n"."#s".nt1", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 1)}, \ |
| 453 | {"cmpxchg"#n"."#s".nta", CMPXCHG (CMPXCHG_##n|CMPXCHG_##s, 3)}, \ |
| 454 | {"cmpxchg"#n"."#s".nta", CMPXCHG_P (CMPXCHG_##n|CMPXCHG_##s, 3)} |
| 455 | #define CMP8XCHG16(s) \ |
| 456 | {"cmp8xchg16."#s, CMPXCHG16 (0x20|CMPXCHG_##s, 0)}, \ |
| 457 | {"cmp8xchg16."#s, CMPXCHG16_P (0x20|CMPXCHG_##s, 0)}, \ |
| 458 | {"cmp8xchg16."#s".nt1", CMPXCHG16 (0x20|CMPXCHG_##s, 1)}, \ |
| 459 | {"cmp8xchg16."#s".nt1", CMPXCHG16_P (0x20|CMPXCHG_##s, 1)}, \ |
| 460 | {"cmp8xchg16."#s".nta", CMPXCHG16 (0x20|CMPXCHG_##s, 3)}, \ |
| 461 | {"cmp8xchg16."#s".nta", CMPXCHG16_P (0x20|CMPXCHG_##s, 3)} |
| 462 | #define CMPXCHG_ALL(s) CMPXCHGn(1, s), \ |
| 463 | CMPXCHGn(2, s), \ |
| 464 | CMPXCHGn(4, s), \ |
| 465 | CMPXCHGn(8, s), \ |
| 466 | CMP8XCHG16(s) |
| 467 | CMPXCHG_ALL(acq), |
| 468 | CMPXCHG_ALL(rel), |
| 469 | #undef CMPXCHG |
| 470 | #undef CMPXCHG_P |
| 471 | #undef CMPXCHG16 |
| 472 | #undef CMPXCHG16_P |
| 473 | #undef CMPXCHG_acq |
| 474 | #undef CMPXCHG_rel |
| 475 | #undef CMPXCHG_1 |
| 476 | #undef CMPXCHG_2 |
| 477 | #undef CMPXCHG_4 |
| 478 | #undef CMPXCHG_8 |
| 479 | #undef CMPXCHGn |
| 480 | #undef CMPXCHG16 |
| 481 | #undef CMPXCHG_ALL |
| 482 | {"xchg1", M, OpMXX6aHint (4, 0, 1, 0x08, 0), {R1, MR3, R2}, EMPTY}, |
| 483 | {"xchg1.nt1", M, OpMXX6aHint (4, 0, 1, 0x08, 1), {R1, MR3, R2}, EMPTY}, |
| 484 | {"xchg1.nta", M, OpMXX6aHint (4, 0, 1, 0x08, 3), {R1, MR3, R2}, EMPTY}, |
| 485 | {"xchg2", M, OpMXX6aHint (4, 0, 1, 0x09, 0), {R1, MR3, R2}, EMPTY}, |
| 486 | {"xchg2.nt1", M, OpMXX6aHint (4, 0, 1, 0x09, 1), {R1, MR3, R2}, EMPTY}, |
| 487 | {"xchg2.nta", M, OpMXX6aHint (4, 0, 1, 0x09, 3), {R1, MR3, R2}, EMPTY}, |
| 488 | {"xchg4", M, OpMXX6aHint (4, 0, 1, 0x0a, 0), {R1, MR3, R2}, EMPTY}, |
| 489 | {"xchg4.nt1", M, OpMXX6aHint (4, 0, 1, 0x0a, 1), {R1, MR3, R2}, EMPTY}, |
| 490 | {"xchg4.nta", M, OpMXX6aHint (4, 0, 1, 0x0a, 3), {R1, MR3, R2}, EMPTY}, |
| 491 | {"xchg8", M, OpMXX6aHint (4, 0, 1, 0x0b, 0), {R1, MR3, R2}, EMPTY}, |
| 492 | {"xchg8.nt1", M, OpMXX6aHint (4, 0, 1, 0x0b, 1), {R1, MR3, R2}, EMPTY}, |
| 493 | {"xchg8.nta", M, OpMXX6aHint (4, 0, 1, 0x0b, 3), {R1, MR3, R2}, EMPTY}, |
| 494 | |
| 495 | {"fetchadd4.acq", M, OpMXX6aHint (4, 0, 1, 0x12, 0), {R1, MR3, INC3}, EMPTY}, |
| 496 | {"fetchadd4.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x12, 1), {R1, MR3, INC3}, EMPTY}, |
| 497 | {"fetchadd4.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x12, 3), {R1, MR3, INC3}, EMPTY}, |
| 498 | {"fetchadd8.acq", M, OpMXX6aHint (4, 0, 1, 0x13, 0), {R1, MR3, INC3}, EMPTY}, |
| 499 | {"fetchadd8.acq.nt1", M, OpMXX6aHint (4, 0, 1, 0x13, 1), {R1, MR3, INC3}, EMPTY}, |
| 500 | {"fetchadd8.acq.nta", M, OpMXX6aHint (4, 0, 1, 0x13, 3), {R1, MR3, INC3}, EMPTY}, |
| 501 | {"fetchadd4.rel", M, OpMXX6aHint (4, 0, 1, 0x16, 0), {R1, MR3, INC3}, EMPTY}, |
| 502 | {"fetchadd4.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x16, 1), {R1, MR3, INC3}, EMPTY}, |
| 503 | {"fetchadd4.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x16, 3), {R1, MR3, INC3}, EMPTY}, |
| 504 | {"fetchadd8.rel", M, OpMXX6aHint (4, 0, 1, 0x17, 0), {R1, MR3, INC3}, EMPTY}, |
| 505 | {"fetchadd8.rel.nt1", M, OpMXX6aHint (4, 0, 1, 0x17, 1), {R1, MR3, INC3}, EMPTY}, |
| 506 | {"fetchadd8.rel.nta", M, OpMXX6aHint (4, 0, 1, 0x17, 3), {R1, MR3, INC3}, EMPTY}, |
| 507 | |
| 508 | {"getf.sig", M, OpMXX6a (4, 0, 1, 0x1c), {R1, F2}, EMPTY}, |
| 509 | {"getf.exp", M, OpMXX6a (4, 0, 1, 0x1d), {R1, F2}, EMPTY}, |
| 510 | {"getf.s", M, OpMXX6a (4, 0, 1, 0x1e), {R1, F2}, EMPTY}, |
| 511 | {"getf.d", M, OpMXX6a (4, 0, 1, 0x1f), {R1, F2}, EMPTY}, |
| 512 | |
| 513 | /* Integer load w/increment by immediate. */ |
| 514 | #define LDINCIMMED(c,h) M, OpX6aHint (5, c, h), {R1, MR3, IMM9b}, POSTINC, 0, NULL |
| 515 | {"ld1", LDINCIMMED (0x00, 0)}, |
| 516 | {"ld1.nt1", LDINCIMMED (0x00, 1)}, |
| 517 | {"ld1.nta", LDINCIMMED (0x00, 3)}, |
| 518 | {"ld2", LDINCIMMED (0x01, 0)}, |
| 519 | {"ld2.nt1", LDINCIMMED (0x01, 1)}, |
| 520 | {"ld2.nta", LDINCIMMED (0x01, 3)}, |
| 521 | {"ld4", LDINCIMMED (0x02, 0)}, |
| 522 | {"ld4.nt1", LDINCIMMED (0x02, 1)}, |
| 523 | {"ld4.nta", LDINCIMMED (0x02, 3)}, |
| 524 | {"ld8", LDINCIMMED (0x03, 0)}, |
| 525 | {"ld8.nt1", LDINCIMMED (0x03, 1)}, |
| 526 | {"ld8.nta", LDINCIMMED (0x03, 3)}, |
| 527 | {"ld1.s", LDINCIMMED (0x04, 0)}, |
| 528 | {"ld1.s.nt1", LDINCIMMED (0x04, 1)}, |
| 529 | {"ld1.s.nta", LDINCIMMED (0x04, 3)}, |
| 530 | {"ld2.s", LDINCIMMED (0x05, 0)}, |
| 531 | {"ld2.s.nt1", LDINCIMMED (0x05, 1)}, |
| 532 | {"ld2.s.nta", LDINCIMMED (0x05, 3)}, |
| 533 | {"ld4.s", LDINCIMMED (0x06, 0)}, |
| 534 | {"ld4.s.nt1", LDINCIMMED (0x06, 1)}, |
| 535 | {"ld4.s.nta", LDINCIMMED (0x06, 3)}, |
| 536 | {"ld8.s", LDINCIMMED (0x07, 0)}, |
| 537 | {"ld8.s.nt1", LDINCIMMED (0x07, 1)}, |
| 538 | {"ld8.s.nta", LDINCIMMED (0x07, 3)}, |
| 539 | {"ld1.a", LDINCIMMED (0x08, 0)}, |
| 540 | {"ld1.a.nt1", LDINCIMMED (0x08, 1)}, |
| 541 | {"ld1.a.nta", LDINCIMMED (0x08, 3)}, |
| 542 | {"ld2.a", LDINCIMMED (0x09, 0)}, |
| 543 | {"ld2.a.nt1", LDINCIMMED (0x09, 1)}, |
| 544 | {"ld2.a.nta", LDINCIMMED (0x09, 3)}, |
| 545 | {"ld4.a", LDINCIMMED (0x0a, 0)}, |
| 546 | {"ld4.a.nt1", LDINCIMMED (0x0a, 1)}, |
| 547 | {"ld4.a.nta", LDINCIMMED (0x0a, 3)}, |
| 548 | {"ld8.a", LDINCIMMED (0x0b, 0)}, |
| 549 | {"ld8.a.nt1", LDINCIMMED (0x0b, 1)}, |
| 550 | {"ld8.a.nta", LDINCIMMED (0x0b, 3)}, |
| 551 | {"ld1.sa", LDINCIMMED (0x0c, 0)}, |
| 552 | {"ld1.sa.nt1", LDINCIMMED (0x0c, 1)}, |
| 553 | {"ld1.sa.nta", LDINCIMMED (0x0c, 3)}, |
| 554 | {"ld2.sa", LDINCIMMED (0x0d, 0)}, |
| 555 | {"ld2.sa.nt1", LDINCIMMED (0x0d, 1)}, |
| 556 | {"ld2.sa.nta", LDINCIMMED (0x0d, 3)}, |
| 557 | {"ld4.sa", LDINCIMMED (0x0e, 0)}, |
| 558 | {"ld4.sa.nt1", LDINCIMMED (0x0e, 1)}, |
| 559 | {"ld4.sa.nta", LDINCIMMED (0x0e, 3)}, |
| 560 | {"ld8.sa", LDINCIMMED (0x0f, 0)}, |
| 561 | {"ld8.sa.nt1", LDINCIMMED (0x0f, 1)}, |
| 562 | {"ld8.sa.nta", LDINCIMMED (0x0f, 3)}, |
| 563 | {"ld1.bias", LDINCIMMED (0x10, 0)}, |
| 564 | {"ld1.bias.nt1", LDINCIMMED (0x10, 1)}, |
| 565 | {"ld1.bias.nta", LDINCIMMED (0x10, 3)}, |
| 566 | {"ld2.bias", LDINCIMMED (0x11, 0)}, |
| 567 | {"ld2.bias.nt1", LDINCIMMED (0x11, 1)}, |
| 568 | {"ld2.bias.nta", LDINCIMMED (0x11, 3)}, |
| 569 | {"ld4.bias", LDINCIMMED (0x12, 0)}, |
| 570 | {"ld4.bias.nt1", LDINCIMMED (0x12, 1)}, |
| 571 | {"ld4.bias.nta", LDINCIMMED (0x12, 3)}, |
| 572 | {"ld8.bias", LDINCIMMED (0x13, 0)}, |
| 573 | {"ld8.bias.nt1", LDINCIMMED (0x13, 1)}, |
| 574 | {"ld8.bias.nta", LDINCIMMED (0x13, 3)}, |
| 575 | {"ld1.acq", LDINCIMMED (0x14, 0)}, |
| 576 | {"ld1.acq.nt1", LDINCIMMED (0x14, 1)}, |
| 577 | {"ld1.acq.nta", LDINCIMMED (0x14, 3)}, |
| 578 | {"ld2.acq", LDINCIMMED (0x15, 0)}, |
| 579 | {"ld2.acq.nt1", LDINCIMMED (0x15, 1)}, |
| 580 | {"ld2.acq.nta", LDINCIMMED (0x15, 3)}, |
| 581 | {"ld4.acq", LDINCIMMED (0x16, 0)}, |
| 582 | {"ld4.acq.nt1", LDINCIMMED (0x16, 1)}, |
| 583 | {"ld4.acq.nta", LDINCIMMED (0x16, 3)}, |
| 584 | {"ld8.acq", LDINCIMMED (0x17, 0)}, |
| 585 | {"ld8.acq.nt1", LDINCIMMED (0x17, 1)}, |
| 586 | {"ld8.acq.nta", LDINCIMMED (0x17, 3)}, |
| 587 | {"ld8.fill", LDINCIMMED (0x1b, 0)}, |
| 588 | {"ld8.fill.nt1", LDINCIMMED (0x1b, 1)}, |
| 589 | {"ld8.fill.nta", LDINCIMMED (0x1b, 3)}, |
| 590 | {"ld1.c.clr", LDINCIMMED (0x20, 0)}, |
| 591 | {"ld1.c.clr.nt1", LDINCIMMED (0x20, 1)}, |
| 592 | {"ld1.c.clr.nta", LDINCIMMED (0x20, 3)}, |
| 593 | {"ld2.c.clr", LDINCIMMED (0x21, 0)}, |
| 594 | {"ld2.c.clr.nt1", LDINCIMMED (0x21, 1)}, |
| 595 | {"ld2.c.clr.nta", LDINCIMMED (0x21, 3)}, |
| 596 | {"ld4.c.clr", LDINCIMMED (0x22, 0)}, |
| 597 | {"ld4.c.clr.nt1", LDINCIMMED (0x22, 1)}, |
| 598 | {"ld4.c.clr.nta", LDINCIMMED (0x22, 3)}, |
| 599 | {"ld8.c.clr", LDINCIMMED (0x23, 0)}, |
| 600 | {"ld8.c.clr.nt1", LDINCIMMED (0x23, 1)}, |
| 601 | {"ld8.c.clr.nta", LDINCIMMED (0x23, 3)}, |
| 602 | {"ld1.c.nc", LDINCIMMED (0x24, 0)}, |
| 603 | {"ld1.c.nc.nt1", LDINCIMMED (0x24, 1)}, |
| 604 | {"ld1.c.nc.nta", LDINCIMMED (0x24, 3)}, |
| 605 | {"ld2.c.nc", LDINCIMMED (0x25, 0)}, |
| 606 | {"ld2.c.nc.nt1", LDINCIMMED (0x25, 1)}, |
| 607 | {"ld2.c.nc.nta", LDINCIMMED (0x25, 3)}, |
| 608 | {"ld4.c.nc", LDINCIMMED (0x26, 0)}, |
| 609 | {"ld4.c.nc.nt1", LDINCIMMED (0x26, 1)}, |
| 610 | {"ld4.c.nc.nta", LDINCIMMED (0x26, 3)}, |
| 611 | {"ld8.c.nc", LDINCIMMED (0x27, 0)}, |
| 612 | {"ld8.c.nc.nt1", LDINCIMMED (0x27, 1)}, |
| 613 | {"ld8.c.nc.nta", LDINCIMMED (0x27, 3)}, |
| 614 | {"ld1.c.clr.acq", LDINCIMMED (0x28, 0)}, |
| 615 | {"ld1.c.clr.acq.nt1", LDINCIMMED (0x28, 1)}, |
| 616 | {"ld1.c.clr.acq.nta", LDINCIMMED (0x28, 3)}, |
| 617 | {"ld2.c.clr.acq", LDINCIMMED (0x29, 0)}, |
| 618 | {"ld2.c.clr.acq.nt1", LDINCIMMED (0x29, 1)}, |
| 619 | {"ld2.c.clr.acq.nta", LDINCIMMED (0x29, 3)}, |
| 620 | {"ld4.c.clr.acq", LDINCIMMED (0x2a, 0)}, |
| 621 | {"ld4.c.clr.acq.nt1", LDINCIMMED (0x2a, 1)}, |
| 622 | {"ld4.c.clr.acq.nta", LDINCIMMED (0x2a, 3)}, |
| 623 | {"ld8.c.clr.acq", LDINCIMMED (0x2b, 0)}, |
| 624 | {"ld8.c.clr.acq.nt1", LDINCIMMED (0x2b, 1)}, |
| 625 | {"ld8.c.clr.acq.nta", LDINCIMMED (0x2b, 3)}, |
| 626 | #undef LDINCIMMED |
| 627 | |
| 628 | /* Store w/increment by immediate. */ |
| 629 | #define STINCIMMED(c,h) M, OpX6aHint (5, c, h), {MR3, R2, IMM9a}, POSTINC, 0, NULL |
| 630 | {"st1", STINCIMMED (0x30, 0)}, |
| 631 | {"st1.nta", STINCIMMED (0x30, 3)}, |
| 632 | {"st2", STINCIMMED (0x31, 0)}, |
| 633 | {"st2.nta", STINCIMMED (0x31, 3)}, |
| 634 | {"st4", STINCIMMED (0x32, 0)}, |
| 635 | {"st4.nta", STINCIMMED (0x32, 3)}, |
| 636 | {"st8", STINCIMMED (0x33, 0)}, |
| 637 | {"st8.nta", STINCIMMED (0x33, 3)}, |
| 638 | {"st1.rel", STINCIMMED (0x34, 0)}, |
| 639 | {"st1.rel.nta", STINCIMMED (0x34, 3)}, |
| 640 | {"st2.rel", STINCIMMED (0x35, 0)}, |
| 641 | {"st2.rel.nta", STINCIMMED (0x35, 3)}, |
| 642 | {"st4.rel", STINCIMMED (0x36, 0)}, |
| 643 | {"st4.rel.nta", STINCIMMED (0x36, 3)}, |
| 644 | {"st8.rel", STINCIMMED (0x37, 0)}, |
| 645 | {"st8.rel.nta", STINCIMMED (0x37, 3)}, |
| 646 | {"st8.spill", STINCIMMED (0x3b, 0)}, |
| 647 | {"st8.spill.nta", STINCIMMED (0x3b, 3)}, |
| 648 | #undef STINCIMMED |
| 649 | |
| 650 | /* Floating-point load. */ |
| 651 | {"ldfs", M, OpMXX6aHint (6, 0, 0, 0x02, 0), {F1, MR3}, EMPTY}, |
| 652 | {"ldfs.nt1", M, OpMXX6aHint (6, 0, 0, 0x02, 1), {F1, MR3}, EMPTY}, |
| 653 | {"ldfs.nta", M, OpMXX6aHint (6, 0, 0, 0x02, 3), {F1, MR3}, EMPTY}, |
| 654 | {"ldfd", M, OpMXX6aHint (6, 0, 0, 0x03, 0), {F1, MR3}, EMPTY}, |
| 655 | {"ldfd.nt1", M, OpMXX6aHint (6, 0, 0, 0x03, 1), {F1, MR3}, EMPTY}, |
| 656 | {"ldfd.nta", M, OpMXX6aHint (6, 0, 0, 0x03, 3), {F1, MR3}, EMPTY}, |
| 657 | {"ldf8", M, OpMXX6aHint (6, 0, 0, 0x01, 0), {F1, MR3}, EMPTY}, |
| 658 | {"ldf8.nt1", M, OpMXX6aHint (6, 0, 0, 0x01, 1), {F1, MR3}, EMPTY}, |
| 659 | {"ldf8.nta", M, OpMXX6aHint (6, 0, 0, 0x01, 3), {F1, MR3}, EMPTY}, |
| 660 | {"ldfe", M, OpMXX6aHint (6, 0, 0, 0x00, 0), {F1, MR3}, EMPTY}, |
| 661 | {"ldfe.nt1", M, OpMXX6aHint (6, 0, 0, 0x00, 1), {F1, MR3}, EMPTY}, |
| 662 | {"ldfe.nta", M, OpMXX6aHint (6, 0, 0, 0x00, 3), {F1, MR3}, EMPTY}, |
| 663 | {"ldfs.s", M, OpMXX6aHint (6, 0, 0, 0x06, 0), {F1, MR3}, EMPTY}, |
| 664 | {"ldfs.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x06, 1), {F1, MR3}, EMPTY}, |
| 665 | {"ldfs.s.nta", M, OpMXX6aHint (6, 0, 0, 0x06, 3), {F1, MR3}, EMPTY}, |
| 666 | {"ldfd.s", M, OpMXX6aHint (6, 0, 0, 0x07, 0), {F1, MR3}, EMPTY}, |
| 667 | {"ldfd.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x07, 1), {F1, MR3}, EMPTY}, |
| 668 | {"ldfd.s.nta", M, OpMXX6aHint (6, 0, 0, 0x07, 3), {F1, MR3}, EMPTY}, |
| 669 | {"ldf8.s", M, OpMXX6aHint (6, 0, 0, 0x05, 0), {F1, MR3}, EMPTY}, |
| 670 | {"ldf8.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x05, 1), {F1, MR3}, EMPTY}, |
| 671 | {"ldf8.s.nta", M, OpMXX6aHint (6, 0, 0, 0x05, 3), {F1, MR3}, EMPTY}, |
| 672 | {"ldfe.s", M, OpMXX6aHint (6, 0, 0, 0x04, 0), {F1, MR3}, EMPTY}, |
| 673 | {"ldfe.s.nt1", M, OpMXX6aHint (6, 0, 0, 0x04, 1), {F1, MR3}, EMPTY}, |
| 674 | {"ldfe.s.nta", M, OpMXX6aHint (6, 0, 0, 0x04, 3), {F1, MR3}, EMPTY}, |
| 675 | {"ldfs.a", M, OpMXX6aHint (6, 0, 0, 0x0a, 0), {F1, MR3}, EMPTY}, |
| 676 | {"ldfs.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0a, 1), {F1, MR3}, EMPTY}, |
| 677 | {"ldfs.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0a, 3), {F1, MR3}, EMPTY}, |
| 678 | {"ldfd.a", M, OpMXX6aHint (6, 0, 0, 0x0b, 0), {F1, MR3}, EMPTY}, |
| 679 | {"ldfd.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x0b, 1), {F1, MR3}, EMPTY}, |
| 680 | {"ldfd.a.nta", M, OpMXX6aHint (6, 0, 0, 0x0b, 3), {F1, MR3}, EMPTY}, |
| 681 | {"ldf8.a", M, OpMXX6aHint (6, 0, 0, 0x09, 0), {F1, MR3}, EMPTY}, |
| 682 | {"ldf8.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x09, 1), {F1, MR3}, EMPTY}, |
| 683 | {"ldf8.a.nta", M, OpMXX6aHint (6, 0, 0, 0x09, 3), {F1, MR3}, EMPTY}, |
| 684 | {"ldfe.a", M, OpMXX6aHint (6, 0, 0, 0x08, 0), {F1, MR3}, EMPTY}, |
| 685 | {"ldfe.a.nt1", M, OpMXX6aHint (6, 0, 0, 0x08, 1), {F1, MR3}, EMPTY}, |
| 686 | {"ldfe.a.nta", M, OpMXX6aHint (6, 0, 0, 0x08, 3), {F1, MR3}, EMPTY}, |
| 687 | {"ldfs.sa", M, OpMXX6aHint (6, 0, 0, 0x0e, 0), {F1, MR3}, EMPTY}, |
| 688 | {"ldfs.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0e, 1), {F1, MR3}, EMPTY}, |
| 689 | {"ldfs.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0e, 3), {F1, MR3}, EMPTY}, |
| 690 | {"ldfd.sa", M, OpMXX6aHint (6, 0, 0, 0x0f, 0), {F1, MR3}, EMPTY}, |
| 691 | {"ldfd.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0f, 1), {F1, MR3}, EMPTY}, |
| 692 | {"ldfd.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0f, 3), {F1, MR3}, EMPTY}, |
| 693 | {"ldf8.sa", M, OpMXX6aHint (6, 0, 0, 0x0d, 0), {F1, MR3}, EMPTY}, |
| 694 | {"ldf8.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0d, 1), {F1, MR3}, EMPTY}, |
| 695 | {"ldf8.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0d, 3), {F1, MR3}, EMPTY}, |
| 696 | {"ldfe.sa", M, OpMXX6aHint (6, 0, 0, 0x0c, 0), {F1, MR3}, EMPTY}, |
| 697 | {"ldfe.sa.nt1", M, OpMXX6aHint (6, 0, 0, 0x0c, 1), {F1, MR3}, EMPTY}, |
| 698 | {"ldfe.sa.nta", M, OpMXX6aHint (6, 0, 0, 0x0c, 3), {F1, MR3}, EMPTY}, |
| 699 | {"ldf.fill", M, OpMXX6aHint (6, 0, 0, 0x1b, 0), {F1, MR3}, EMPTY}, |
| 700 | {"ldf.fill.nt1", M, OpMXX6aHint (6, 0, 0, 0x1b, 1), {F1, MR3}, EMPTY}, |
| 701 | {"ldf.fill.nta", M, OpMXX6aHint (6, 0, 0, 0x1b, 3), {F1, MR3}, EMPTY}, |
| 702 | {"ldfs.c.clr", M, OpMXX6aHint (6, 0, 0, 0x22, 0), {F1, MR3}, EMPTY}, |
| 703 | {"ldfs.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x22, 1), {F1, MR3}, EMPTY}, |
| 704 | {"ldfs.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x22, 3), {F1, MR3}, EMPTY}, |
| 705 | {"ldfd.c.clr", M, OpMXX6aHint (6, 0, 0, 0x23, 0), {F1, MR3}, EMPTY}, |
| 706 | {"ldfd.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x23, 1), {F1, MR3}, EMPTY}, |
| 707 | {"ldfd.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x23, 3), {F1, MR3}, EMPTY}, |
| 708 | {"ldf8.c.clr", M, OpMXX6aHint (6, 0, 0, 0x21, 0), {F1, MR3}, EMPTY}, |
| 709 | {"ldf8.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x21, 1), {F1, MR3}, EMPTY}, |
| 710 | {"ldf8.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x21, 3), {F1, MR3}, EMPTY}, |
| 711 | {"ldfe.c.clr", M, OpMXX6aHint (6, 0, 0, 0x20, 0), {F1, MR3}, EMPTY}, |
| 712 | {"ldfe.c.clr.nt1", M, OpMXX6aHint (6, 0, 0, 0x20, 1), {F1, MR3}, EMPTY}, |
| 713 | {"ldfe.c.clr.nta", M, OpMXX6aHint (6, 0, 0, 0x20, 3), {F1, MR3}, EMPTY}, |
| 714 | {"ldfs.c.nc", M, OpMXX6aHint (6, 0, 0, 0x26, 0), {F1, MR3}, EMPTY}, |
| 715 | {"ldfs.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x26, 1), {F1, MR3}, EMPTY}, |
| 716 | {"ldfs.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x26, 3), {F1, MR3}, EMPTY}, |
| 717 | {"ldfd.c.nc", M, OpMXX6aHint (6, 0, 0, 0x27, 0), {F1, MR3}, EMPTY}, |
| 718 | {"ldfd.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x27, 1), {F1, MR3}, EMPTY}, |
| 719 | {"ldfd.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x27, 3), {F1, MR3}, EMPTY}, |
| 720 | {"ldf8.c.nc", M, OpMXX6aHint (6, 0, 0, 0x25, 0), {F1, MR3}, EMPTY}, |
| 721 | {"ldf8.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x25, 1), {F1, MR3}, EMPTY}, |
| 722 | {"ldf8.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x25, 3), {F1, MR3}, EMPTY}, |
| 723 | {"ldfe.c.nc", M, OpMXX6aHint (6, 0, 0, 0x24, 0), {F1, MR3}, EMPTY}, |
| 724 | {"ldfe.c.nc.nt1", M, OpMXX6aHint (6, 0, 0, 0x24, 1), {F1, MR3}, EMPTY}, |
| 725 | {"ldfe.c.nc.nta", M, OpMXX6aHint (6, 0, 0, 0x24, 3), {F1, MR3}, EMPTY}, |
| 726 | |
| 727 | /* Floating-point load w/increment by register. */ |
| 728 | #define FLDINCREG(c,h) M, OpMXX6aHint (6, 1, 0, c, h), {F1, MR3, R2}, POSTINC, 0, NULL |
| 729 | {"ldfs", FLDINCREG (0x02, 0)}, |
| 730 | {"ldfs.nt1", FLDINCREG (0x02, 1)}, |
| 731 | {"ldfs.nta", FLDINCREG (0x02, 3)}, |
| 732 | {"ldfd", FLDINCREG (0x03, 0)}, |
| 733 | {"ldfd.nt1", FLDINCREG (0x03, 1)}, |
| 734 | {"ldfd.nta", FLDINCREG (0x03, 3)}, |
| 735 | {"ldf8", FLDINCREG (0x01, 0)}, |
| 736 | {"ldf8.nt1", FLDINCREG (0x01, 1)}, |
| 737 | {"ldf8.nta", FLDINCREG (0x01, 3)}, |
| 738 | {"ldfe", FLDINCREG (0x00, 0)}, |
| 739 | {"ldfe.nt1", FLDINCREG (0x00, 1)}, |
| 740 | {"ldfe.nta", FLDINCREG (0x00, 3)}, |
| 741 | {"ldfs.s", FLDINCREG (0x06, 0)}, |
| 742 | {"ldfs.s.nt1", FLDINCREG (0x06, 1)}, |
| 743 | {"ldfs.s.nta", FLDINCREG (0x06, 3)}, |
| 744 | {"ldfd.s", FLDINCREG (0x07, 0)}, |
| 745 | {"ldfd.s.nt1", FLDINCREG (0x07, 1)}, |
| 746 | {"ldfd.s.nta", FLDINCREG (0x07, 3)}, |
| 747 | {"ldf8.s", FLDINCREG (0x05, 0)}, |
| 748 | {"ldf8.s.nt1", FLDINCREG (0x05, 1)}, |
| 749 | {"ldf8.s.nta", FLDINCREG (0x05, 3)}, |
| 750 | {"ldfe.s", FLDINCREG (0x04, 0)}, |
| 751 | {"ldfe.s.nt1", FLDINCREG (0x04, 1)}, |
| 752 | {"ldfe.s.nta", FLDINCREG (0x04, 3)}, |
| 753 | {"ldfs.a", FLDINCREG (0x0a, 0)}, |
| 754 | {"ldfs.a.nt1", FLDINCREG (0x0a, 1)}, |
| 755 | {"ldfs.a.nta", FLDINCREG (0x0a, 3)}, |
| 756 | {"ldfd.a", FLDINCREG (0x0b, 0)}, |
| 757 | {"ldfd.a.nt1", FLDINCREG (0x0b, 1)}, |
| 758 | {"ldfd.a.nta", FLDINCREG (0x0b, 3)}, |
| 759 | {"ldf8.a", FLDINCREG (0x09, 0)}, |
| 760 | {"ldf8.a.nt1", FLDINCREG (0x09, 1)}, |
| 761 | {"ldf8.a.nta", FLDINCREG (0x09, 3)}, |
| 762 | {"ldfe.a", FLDINCREG (0x08, 0)}, |
| 763 | {"ldfe.a.nt1", FLDINCREG (0x08, 1)}, |
| 764 | {"ldfe.a.nta", FLDINCREG (0x08, 3)}, |
| 765 | {"ldfs.sa", FLDINCREG (0x0e, 0)}, |
| 766 | {"ldfs.sa.nt1", FLDINCREG (0x0e, 1)}, |
| 767 | {"ldfs.sa.nta", FLDINCREG (0x0e, 3)}, |
| 768 | {"ldfd.sa", FLDINCREG (0x0f, 0)}, |
| 769 | {"ldfd.sa.nt1", FLDINCREG (0x0f, 1)}, |
| 770 | {"ldfd.sa.nta", FLDINCREG (0x0f, 3)}, |
| 771 | {"ldf8.sa", FLDINCREG (0x0d, 0)}, |
| 772 | {"ldf8.sa.nt1", FLDINCREG (0x0d, 1)}, |
| 773 | {"ldf8.sa.nta", FLDINCREG (0x0d, 3)}, |
| 774 | {"ldfe.sa", FLDINCREG (0x0c, 0)}, |
| 775 | {"ldfe.sa.nt1", FLDINCREG (0x0c, 1)}, |
| 776 | {"ldfe.sa.nta", FLDINCREG (0x0c, 3)}, |
| 777 | {"ldf.fill", FLDINCREG (0x1b, 0)}, |
| 778 | {"ldf.fill.nt1", FLDINCREG (0x1b, 1)}, |
| 779 | {"ldf.fill.nta", FLDINCREG (0x1b, 3)}, |
| 780 | {"ldfs.c.clr", FLDINCREG (0x22, 0)}, |
| 781 | {"ldfs.c.clr.nt1", FLDINCREG (0x22, 1)}, |
| 782 | {"ldfs.c.clr.nta", FLDINCREG (0x22, 3)}, |
| 783 | {"ldfd.c.clr", FLDINCREG (0x23, 0)}, |
| 784 | {"ldfd.c.clr.nt1", FLDINCREG (0x23, 1)}, |
| 785 | {"ldfd.c.clr.nta", FLDINCREG (0x23, 3)}, |
| 786 | {"ldf8.c.clr", FLDINCREG (0x21, 0)}, |
| 787 | {"ldf8.c.clr.nt1", FLDINCREG (0x21, 1)}, |
| 788 | {"ldf8.c.clr.nta", FLDINCREG (0x21, 3)}, |
| 789 | {"ldfe.c.clr", FLDINCREG (0x20, 0)}, |
| 790 | {"ldfe.c.clr.nt1", FLDINCREG (0x20, 1)}, |
| 791 | {"ldfe.c.clr.nta", FLDINCREG (0x20, 3)}, |
| 792 | {"ldfs.c.nc", FLDINCREG (0x26, 0)}, |
| 793 | {"ldfs.c.nc.nt1", FLDINCREG (0x26, 1)}, |
| 794 | {"ldfs.c.nc.nta", FLDINCREG (0x26, 3)}, |
| 795 | {"ldfd.c.nc", FLDINCREG (0x27, 0)}, |
| 796 | {"ldfd.c.nc.nt1", FLDINCREG (0x27, 1)}, |
| 797 | {"ldfd.c.nc.nta", FLDINCREG (0x27, 3)}, |
| 798 | {"ldf8.c.nc", FLDINCREG (0x25, 0)}, |
| 799 | {"ldf8.c.nc.nt1", FLDINCREG (0x25, 1)}, |
| 800 | {"ldf8.c.nc.nta", FLDINCREG (0x25, 3)}, |
| 801 | {"ldfe.c.nc", FLDINCREG (0x24, 0)}, |
| 802 | {"ldfe.c.nc.nt1", FLDINCREG (0x24, 1)}, |
| 803 | {"ldfe.c.nc.nta", FLDINCREG (0x24, 3)}, |
| 804 | #undef FLDINCREG |
| 805 | |
| 806 | /* Floating-point store. */ |
| 807 | {"stfs", M, OpMXX6aHint (6, 0, 0, 0x32, 0), {MR3, F2}, EMPTY}, |
| 808 | {"stfs.nta", M, OpMXX6aHint (6, 0, 0, 0x32, 3), {MR3, F2}, EMPTY}, |
| 809 | {"stfd", M, OpMXX6aHint (6, 0, 0, 0x33, 0), {MR3, F2}, EMPTY}, |
| 810 | {"stfd.nta", M, OpMXX6aHint (6, 0, 0, 0x33, 3), {MR3, F2}, EMPTY}, |
| 811 | {"stf8", M, OpMXX6aHint (6, 0, 0, 0x31, 0), {MR3, F2}, EMPTY}, |
| 812 | {"stf8.nta", M, OpMXX6aHint (6, 0, 0, 0x31, 3), {MR3, F2}, EMPTY}, |
| 813 | {"stfe", M, OpMXX6aHint (6, 0, 0, 0x30, 0), {MR3, F2}, EMPTY}, |
| 814 | {"stfe.nta", M, OpMXX6aHint (6, 0, 0, 0x30, 3), {MR3, F2}, EMPTY}, |
| 815 | {"stf.spill", M, OpMXX6aHint (6, 0, 0, 0x3b, 0), {MR3, F2}, EMPTY}, |
| 816 | {"stf.spill.nta", M, OpMXX6aHint (6, 0, 0, 0x3b, 3), {MR3, F2}, EMPTY}, |
| 817 | |
| 818 | /* Floating-point load pair. */ |
| 819 | {"ldfps", M2, OpMXX6aHint (6, 0, 1, 0x02, 0), {F1, F2, MR3}, EMPTY}, |
| 820 | {"ldfps.nt1", M2, OpMXX6aHint (6, 0, 1, 0x02, 1), {F1, F2, MR3}, EMPTY}, |
| 821 | {"ldfps.nta", M2, OpMXX6aHint (6, 0, 1, 0x02, 3), {F1, F2, MR3}, EMPTY}, |
| 822 | {"ldfpd", M2, OpMXX6aHint (6, 0, 1, 0x03, 0), {F1, F2, MR3}, EMPTY}, |
| 823 | {"ldfpd.nt1", M2, OpMXX6aHint (6, 0, 1, 0x03, 1), {F1, F2, MR3}, EMPTY}, |
| 824 | {"ldfpd.nta", M2, OpMXX6aHint (6, 0, 1, 0x03, 3), {F1, F2, MR3}, EMPTY}, |
| 825 | {"ldfp8", M2, OpMXX6aHint (6, 0, 1, 0x01, 0), {F1, F2, MR3}, EMPTY}, |
| 826 | {"ldfp8.nt1", M2, OpMXX6aHint (6, 0, 1, 0x01, 1), {F1, F2, MR3}, EMPTY}, |
| 827 | {"ldfp8.nta", M2, OpMXX6aHint (6, 0, 1, 0x01, 3), {F1, F2, MR3}, EMPTY}, |
| 828 | {"ldfps.s", M2, OpMXX6aHint (6, 0, 1, 0x06, 0), {F1, F2, MR3}, EMPTY}, |
| 829 | {"ldfps.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x06, 1), {F1, F2, MR3}, EMPTY}, |
| 830 | {"ldfps.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x06, 3), {F1, F2, MR3}, EMPTY}, |
| 831 | {"ldfpd.s", M2, OpMXX6aHint (6, 0, 1, 0x07, 0), {F1, F2, MR3}, EMPTY}, |
| 832 | {"ldfpd.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x07, 1), {F1, F2, MR3}, EMPTY}, |
| 833 | {"ldfpd.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x07, 3), {F1, F2, MR3}, EMPTY}, |
| 834 | {"ldfp8.s", M2, OpMXX6aHint (6, 0, 1, 0x05, 0), {F1, F2, MR3}, EMPTY}, |
| 835 | {"ldfp8.s.nt1", M2, OpMXX6aHint (6, 0, 1, 0x05, 1), {F1, F2, MR3}, EMPTY}, |
| 836 | {"ldfp8.s.nta", M2, OpMXX6aHint (6, 0, 1, 0x05, 3), {F1, F2, MR3}, EMPTY}, |
| 837 | {"ldfps.a", M2, OpMXX6aHint (6, 0, 1, 0x0a, 0), {F1, F2, MR3}, EMPTY}, |
| 838 | {"ldfps.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0a, 1), {F1, F2, MR3}, EMPTY}, |
| 839 | {"ldfps.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0a, 3), {F1, F2, MR3}, EMPTY}, |
| 840 | {"ldfpd.a", M2, OpMXX6aHint (6, 0, 1, 0x0b, 0), {F1, F2, MR3}, EMPTY}, |
| 841 | {"ldfpd.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0b, 1), {F1, F2, MR3}, EMPTY}, |
| 842 | {"ldfpd.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x0b, 3), {F1, F2, MR3}, EMPTY}, |
| 843 | {"ldfp8.a", M2, OpMXX6aHint (6, 0, 1, 0x09, 0), {F1, F2, MR3}, EMPTY}, |
| 844 | {"ldfp8.a.nt1", M2, OpMXX6aHint (6, 0, 1, 0x09, 1), {F1, F2, MR3}, EMPTY}, |
| 845 | {"ldfp8.a.nta", M2, OpMXX6aHint (6, 0, 1, 0x09, 3), {F1, F2, MR3}, EMPTY}, |
| 846 | {"ldfps.sa", M2, OpMXX6aHint (6, 0, 1, 0x0e, 0), {F1, F2, MR3}, EMPTY}, |
| 847 | {"ldfps.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0e, 1), {F1, F2, MR3}, EMPTY}, |
| 848 | {"ldfps.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0e, 3), {F1, F2, MR3}, EMPTY}, |
| 849 | {"ldfpd.sa", M2, OpMXX6aHint (6, 0, 1, 0x0f, 0), {F1, F2, MR3}, EMPTY}, |
| 850 | {"ldfpd.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0f, 1), {F1, F2, MR3}, EMPTY}, |
| 851 | {"ldfpd.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0f, 3), {F1, F2, MR3}, EMPTY}, |
| 852 | {"ldfp8.sa", M2, OpMXX6aHint (6, 0, 1, 0x0d, 0), {F1, F2, MR3}, EMPTY}, |
| 853 | {"ldfp8.sa.nt1", M2, OpMXX6aHint (6, 0, 1, 0x0d, 1), {F1, F2, MR3}, EMPTY}, |
| 854 | {"ldfp8.sa.nta", M2, OpMXX6aHint (6, 0, 1, 0x0d, 3), {F1, F2, MR3}, EMPTY}, |
| 855 | {"ldfps.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x22, 0), {F1, F2, MR3}, EMPTY}, |
| 856 | {"ldfps.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x22, 1), {F1, F2, MR3}, EMPTY}, |
| 857 | {"ldfps.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x22, 3), {F1, F2, MR3}, EMPTY}, |
| 858 | {"ldfpd.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x23, 0), {F1, F2, MR3}, EMPTY}, |
| 859 | {"ldfpd.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x23, 1), {F1, F2, MR3}, EMPTY}, |
| 860 | {"ldfpd.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x23, 3), {F1, F2, MR3}, EMPTY}, |
| 861 | {"ldfp8.c.clr", M2, OpMXX6aHint (6, 0, 1, 0x21, 0), {F1, F2, MR3}, EMPTY}, |
| 862 | {"ldfp8.c.clr.nt1", M2, OpMXX6aHint (6, 0, 1, 0x21, 1), {F1, F2, MR3}, EMPTY}, |
| 863 | {"ldfp8.c.clr.nta", M2, OpMXX6aHint (6, 0, 1, 0x21, 3), {F1, F2, MR3}, EMPTY}, |
| 864 | {"ldfps.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x26, 0), {F1, F2, MR3}, EMPTY}, |
| 865 | {"ldfps.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x26, 1), {F1, F2, MR3}, EMPTY}, |
| 866 | {"ldfps.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x26, 3), {F1, F2, MR3}, EMPTY}, |
| 867 | {"ldfpd.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x27, 0), {F1, F2, MR3}, EMPTY}, |
| 868 | {"ldfpd.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x27, 1), {F1, F2, MR3}, EMPTY}, |
| 869 | {"ldfpd.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x27, 3), {F1, F2, MR3}, EMPTY}, |
| 870 | {"ldfp8.c.nc", M2, OpMXX6aHint (6, 0, 1, 0x25, 0), {F1, F2, MR3}, EMPTY}, |
| 871 | {"ldfp8.c.nc.nt1", M2, OpMXX6aHint (6, 0, 1, 0x25, 1), {F1, F2, MR3}, EMPTY}, |
| 872 | {"ldfp8.c.nc.nta", M2, OpMXX6aHint (6, 0, 1, 0x25, 3), {F1, F2, MR3}, EMPTY}, |
| 873 | |
| 874 | /* Floating-point load pair w/increment by immediate. */ |
| 875 | #define LD(a,b,c) M2, OpMXX6aHint (6, 1, 1, a, b), {F1, F2, MR3, c}, POSTINC, 0, NULL |
| 876 | {"ldfps", LD (0x02, 0, C8)}, |
| 877 | {"ldfps.nt1", LD (0x02, 1, C8)}, |
| 878 | {"ldfps.nta", LD (0x02, 3, C8)}, |
| 879 | {"ldfpd", LD (0x03, 0, C16)}, |
| 880 | {"ldfpd.nt1", LD (0x03, 1, C16)}, |
| 881 | {"ldfpd.nta", LD (0x03, 3, C16)}, |
| 882 | {"ldfp8", LD (0x01, 0, C16)}, |
| 883 | {"ldfp8.nt1", LD (0x01, 1, C16)}, |
| 884 | {"ldfp8.nta", LD (0x01, 3, C16)}, |
| 885 | {"ldfps.s", LD (0x06, 0, C8)}, |
| 886 | {"ldfps.s.nt1", LD (0x06, 1, C8)}, |
| 887 | {"ldfps.s.nta", LD (0x06, 3, C8)}, |
| 888 | {"ldfpd.s", LD (0x07, 0, C16)}, |
| 889 | {"ldfpd.s.nt1", LD (0x07, 1, C16)}, |
| 890 | {"ldfpd.s.nta", LD (0x07, 3, C16)}, |
| 891 | {"ldfp8.s", LD (0x05, 0, C16)}, |
| 892 | {"ldfp8.s.nt1", LD (0x05, 1, C16)}, |
| 893 | {"ldfp8.s.nta", LD (0x05, 3, C16)}, |
| 894 | {"ldfps.a", LD (0x0a, 0, C8)}, |
| 895 | {"ldfps.a.nt1", LD (0x0a, 1, C8)}, |
| 896 | {"ldfps.a.nta", LD (0x0a, 3, C8)}, |
| 897 | {"ldfpd.a", LD (0x0b, 0, C16)}, |
| 898 | {"ldfpd.a.nt1", LD (0x0b, 1, C16)}, |
| 899 | {"ldfpd.a.nta", LD (0x0b, 3, C16)}, |
| 900 | {"ldfp8.a", LD (0x09, 0, C16)}, |
| 901 | {"ldfp8.a.nt1", LD (0x09, 1, C16)}, |
| 902 | {"ldfp8.a.nta", LD (0x09, 3, C16)}, |
| 903 | {"ldfps.sa", LD (0x0e, 0, C8)}, |
| 904 | {"ldfps.sa.nt1", LD (0x0e, 1, C8)}, |
| 905 | {"ldfps.sa.nta", LD (0x0e, 3, C8)}, |
| 906 | {"ldfpd.sa", LD (0x0f, 0, C16)}, |
| 907 | {"ldfpd.sa.nt1", LD (0x0f, 1, C16)}, |
| 908 | {"ldfpd.sa.nta", LD (0x0f, 3, C16)}, |
| 909 | {"ldfp8.sa", LD (0x0d, 0, C16)}, |
| 910 | {"ldfp8.sa.nt1", LD (0x0d, 1, C16)}, |
| 911 | {"ldfp8.sa.nta", LD (0x0d, 3, C16)}, |
| 912 | {"ldfps.c.clr", LD (0x22, 0, C8)}, |
| 913 | {"ldfps.c.clr.nt1", LD (0x22, 1, C8)}, |
| 914 | {"ldfps.c.clr.nta", LD (0x22, 3, C8)}, |
| 915 | {"ldfpd.c.clr", LD (0x23, 0, C16)}, |
| 916 | {"ldfpd.c.clr.nt1", LD (0x23, 1, C16)}, |
| 917 | {"ldfpd.c.clr.nta", LD (0x23, 3, C16)}, |
| 918 | {"ldfp8.c.clr", LD (0x21, 0, C16)}, |
| 919 | {"ldfp8.c.clr.nt1", LD (0x21, 1, C16)}, |
| 920 | {"ldfp8.c.clr.nta", LD (0x21, 3, C16)}, |
| 921 | {"ldfps.c.nc", LD (0x26, 0, C8)}, |
| 922 | {"ldfps.c.nc.nt1", LD (0x26, 1, C8)}, |
| 923 | {"ldfps.c.nc.nta", LD (0x26, 3, C8)}, |
| 924 | {"ldfpd.c.nc", LD (0x27, 0, C16)}, |
| 925 | {"ldfpd.c.nc.nt1", LD (0x27, 1, C16)}, |
| 926 | {"ldfpd.c.nc.nta", LD (0x27, 3, C16)}, |
| 927 | {"ldfp8.c.nc", LD (0x25, 0, C16)}, |
| 928 | {"ldfp8.c.nc.nt1", LD (0x25, 1, C16)}, |
| 929 | {"ldfp8.c.nc.nta", LD (0x25, 3, C16)}, |
| 930 | #undef LD |
| 931 | |
| 932 | /* Line prefetch. */ |
| 933 | {"lfetch", M0, OpMXX6aHint (6, 0, 0, 0x2c, 0), {MR3}, EMPTY}, |
| 934 | {"lfetch.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2c, 1), {MR3}, EMPTY}, |
| 935 | {"lfetch.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2c, 2), {MR3}, EMPTY}, |
| 936 | {"lfetch.nta", M0, OpMXX6aHint (6, 0, 0, 0x2c, 3), {MR3}, EMPTY}, |
| 937 | {"lfetch.excl", M0, OpMXX6aHint (6, 0, 0, 0x2d, 0), {MR3}, EMPTY}, |
| 938 | {"lfetch.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2d, 1), {MR3}, EMPTY}, |
| 939 | {"lfetch.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2d, 2), {MR3}, EMPTY}, |
| 940 | {"lfetch.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2d, 3), {MR3}, EMPTY}, |
| 941 | {"lfetch.fault", M0, OpMXX6aHint (6, 0, 0, 0x2e, 0), {MR3}, EMPTY}, |
| 942 | {"lfetch.fault.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2e, 1), {MR3}, EMPTY}, |
| 943 | {"lfetch.fault.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2e, 2), {MR3}, EMPTY}, |
| 944 | {"lfetch.fault.nta", M0, OpMXX6aHint (6, 0, 0, 0x2e, 3), {MR3}, EMPTY}, |
| 945 | {"lfetch.fault.excl", M0, OpMXX6aHint (6, 0, 0, 0x2f, 0), {MR3}, EMPTY}, |
| 946 | {"lfetch.fault.excl.nt1", M0, OpMXX6aHint (6, 0, 0, 0x2f, 1), {MR3}, EMPTY}, |
| 947 | {"lfetch.fault.excl.nt2", M0, OpMXX6aHint (6, 0, 0, 0x2f, 2), {MR3}, EMPTY}, |
| 948 | {"lfetch.fault.excl.nta", M0, OpMXX6aHint (6, 0, 0, 0x2f, 3), {MR3}, EMPTY}, |
| 949 | |
| 950 | /* Line prefetch w/increment by register. */ |
| 951 | #define LFETCHINCREG(c,h) M0, OpMXX6aHint (6, 1, 0, c, h), {MR3, R2}, POSTINC, 0, NULL |
| 952 | {"lfetch", LFETCHINCREG (0x2c, 0)}, |
| 953 | {"lfetch.nt1", LFETCHINCREG (0x2c, 1)}, |
| 954 | {"lfetch.nt2", LFETCHINCREG (0x2c, 2)}, |
| 955 | {"lfetch.nta", LFETCHINCREG (0x2c, 3)}, |
| 956 | {"lfetch.excl", LFETCHINCREG (0x2d, 0)}, |
| 957 | {"lfetch.excl.nt1", LFETCHINCREG (0x2d, 1)}, |
| 958 | {"lfetch.excl.nt2", LFETCHINCREG (0x2d, 2)}, |
| 959 | {"lfetch.excl.nta", LFETCHINCREG (0x2d, 3)}, |
| 960 | {"lfetch.fault", LFETCHINCREG (0x2e, 0)}, |
| 961 | {"lfetch.fault.nt1", LFETCHINCREG (0x2e, 1)}, |
| 962 | {"lfetch.fault.nt2", LFETCHINCREG (0x2e, 2)}, |
| 963 | {"lfetch.fault.nta", LFETCHINCREG (0x2e, 3)}, |
| 964 | {"lfetch.fault.excl", LFETCHINCREG (0x2f, 0)}, |
| 965 | {"lfetch.fault.excl.nt1", LFETCHINCREG (0x2f, 1)}, |
| 966 | {"lfetch.fault.excl.nt2", LFETCHINCREG (0x2f, 2)}, |
| 967 | {"lfetch.fault.excl.nta", LFETCHINCREG (0x2f, 3)}, |
| 968 | #undef LFETCHINCREG |
| 969 | |
| 970 | /* Semaphore operations. */ |
| 971 | {"setf.sig", M, OpMXX6a (6, 0, 1, 0x1c), {F1, R2}, EMPTY}, |
| 972 | {"setf.exp", M, OpMXX6a (6, 0, 1, 0x1d), {F1, R2}, EMPTY}, |
| 973 | {"setf.s", M, OpMXX6a (6, 0, 1, 0x1e), {F1, R2}, EMPTY}, |
| 974 | {"setf.d", M, OpMXX6a (6, 0, 1, 0x1f), {F1, R2}, EMPTY}, |
| 975 | |
| 976 | /* Floating-point load w/increment by immediate. */ |
| 977 | #define FLDINCIMMED(c,h) M, OpX6aHint (7, c, h), {F1, MR3, IMM9b}, POSTINC, 0, NULL |
| 978 | {"ldfs", FLDINCIMMED (0x02, 0)}, |
| 979 | {"ldfs.nt1", FLDINCIMMED (0x02, 1)}, |
| 980 | {"ldfs.nta", FLDINCIMMED (0x02, 3)}, |
| 981 | {"ldfd", FLDINCIMMED (0x03, 0)}, |
| 982 | {"ldfd.nt1", FLDINCIMMED (0x03, 1)}, |
| 983 | {"ldfd.nta", FLDINCIMMED (0x03, 3)}, |
| 984 | {"ldf8", FLDINCIMMED (0x01, 0)}, |
| 985 | {"ldf8.nt1", FLDINCIMMED (0x01, 1)}, |
| 986 | {"ldf8.nta", FLDINCIMMED (0x01, 3)}, |
| 987 | {"ldfe", FLDINCIMMED (0x00, 0)}, |
| 988 | {"ldfe.nt1", FLDINCIMMED (0x00, 1)}, |
| 989 | {"ldfe.nta", FLDINCIMMED (0x00, 3)}, |
| 990 | {"ldfs.s", FLDINCIMMED (0x06, 0)}, |
| 991 | {"ldfs.s.nt1", FLDINCIMMED (0x06, 1)}, |
| 992 | {"ldfs.s.nta", FLDINCIMMED (0x06, 3)}, |
| 993 | {"ldfd.s", FLDINCIMMED (0x07, 0)}, |
| 994 | {"ldfd.s.nt1", FLDINCIMMED (0x07, 1)}, |
| 995 | {"ldfd.s.nta", FLDINCIMMED (0x07, 3)}, |
| 996 | {"ldf8.s", FLDINCIMMED (0x05, 0)}, |
| 997 | {"ldf8.s.nt1", FLDINCIMMED (0x05, 1)}, |
| 998 | {"ldf8.s.nta", FLDINCIMMED (0x05, 3)}, |
| 999 | {"ldfe.s", FLDINCIMMED (0x04, 0)}, |
| 1000 | {"ldfe.s.nt1", FLDINCIMMED (0x04, 1)}, |
| 1001 | {"ldfe.s.nta", FLDINCIMMED (0x04, 3)}, |
| 1002 | {"ldfs.a", FLDINCIMMED (0x0a, 0)}, |
| 1003 | {"ldfs.a.nt1", FLDINCIMMED (0x0a, 1)}, |
| 1004 | {"ldfs.a.nta", FLDINCIMMED (0x0a, 3)}, |
| 1005 | {"ldfd.a", FLDINCIMMED (0x0b, 0)}, |
| 1006 | {"ldfd.a.nt1", FLDINCIMMED (0x0b, 1)}, |
| 1007 | {"ldfd.a.nta", FLDINCIMMED (0x0b, 3)}, |
| 1008 | {"ldf8.a", FLDINCIMMED (0x09, 0)}, |
| 1009 | {"ldf8.a.nt1", FLDINCIMMED (0x09, 1)}, |
| 1010 | {"ldf8.a.nta", FLDINCIMMED (0x09, 3)}, |
| 1011 | {"ldfe.a", FLDINCIMMED (0x08, 0)}, |
| 1012 | {"ldfe.a.nt1", FLDINCIMMED (0x08, 1)}, |
| 1013 | {"ldfe.a.nta", FLDINCIMMED (0x08, 3)}, |
| 1014 | {"ldfs.sa", FLDINCIMMED (0x0e, 0)}, |
| 1015 | {"ldfs.sa.nt1", FLDINCIMMED (0x0e, 1)}, |
| 1016 | {"ldfs.sa.nta", FLDINCIMMED (0x0e, 3)}, |
| 1017 | {"ldfd.sa", FLDINCIMMED (0x0f, 0)}, |
| 1018 | {"ldfd.sa.nt1", FLDINCIMMED (0x0f, 1)}, |
| 1019 | {"ldfd.sa.nta", FLDINCIMMED (0x0f, 3)}, |
| 1020 | {"ldf8.sa", FLDINCIMMED (0x0d, 0)}, |
| 1021 | {"ldf8.sa.nt1", FLDINCIMMED (0x0d, 1)}, |
| 1022 | {"ldf8.sa.nta", FLDINCIMMED (0x0d, 3)}, |
| 1023 | {"ldfe.sa", FLDINCIMMED (0x0c, 0)}, |
| 1024 | {"ldfe.sa.nt1", FLDINCIMMED (0x0c, 1)}, |
| 1025 | {"ldfe.sa.nta", FLDINCIMMED (0x0c, 3)}, |
| 1026 | {"ldf.fill", FLDINCIMMED (0x1b, 0)}, |
| 1027 | {"ldf.fill.nt1", FLDINCIMMED (0x1b, 1)}, |
| 1028 | {"ldf.fill.nta", FLDINCIMMED (0x1b, 3)}, |
| 1029 | {"ldfs.c.clr", FLDINCIMMED (0x22, 0)}, |
| 1030 | {"ldfs.c.clr.nt1", FLDINCIMMED (0x22, 1)}, |
| 1031 | {"ldfs.c.clr.nta", FLDINCIMMED (0x22, 3)}, |
| 1032 | {"ldfd.c.clr", FLDINCIMMED (0x23, 0)}, |
| 1033 | {"ldfd.c.clr.nt1", FLDINCIMMED (0x23, 1)}, |
| 1034 | {"ldfd.c.clr.nta", FLDINCIMMED (0x23, 3)}, |
| 1035 | {"ldf8.c.clr", FLDINCIMMED (0x21, 0)}, |
| 1036 | {"ldf8.c.clr.nt1", FLDINCIMMED (0x21, 1)}, |
| 1037 | {"ldf8.c.clr.nta", FLDINCIMMED (0x21, 3)}, |
| 1038 | {"ldfe.c.clr", FLDINCIMMED (0x20, 0)}, |
| 1039 | {"ldfe.c.clr.nt1", FLDINCIMMED (0x20, 1)}, |
| 1040 | {"ldfe.c.clr.nta", FLDINCIMMED (0x20, 3)}, |
| 1041 | {"ldfs.c.nc", FLDINCIMMED (0x26, 0)}, |
| 1042 | {"ldfs.c.nc.nt1", FLDINCIMMED (0x26, 1)}, |
| 1043 | {"ldfs.c.nc.nta", FLDINCIMMED (0x26, 3)}, |
| 1044 | {"ldfd.c.nc", FLDINCIMMED (0x27, 0)}, |
| 1045 | {"ldfd.c.nc.nt1", FLDINCIMMED (0x27, 1)}, |
| 1046 | {"ldfd.c.nc.nta", FLDINCIMMED (0x27, 3)}, |
| 1047 | {"ldf8.c.nc", FLDINCIMMED (0x25, 0)}, |
| 1048 | {"ldf8.c.nc.nt1", FLDINCIMMED (0x25, 1)}, |
| 1049 | {"ldf8.c.nc.nta", FLDINCIMMED (0x25, 3)}, |
| 1050 | {"ldfe.c.nc", FLDINCIMMED (0x24, 0)}, |
| 1051 | {"ldfe.c.nc.nt1", FLDINCIMMED (0x24, 1)}, |
| 1052 | {"ldfe.c.nc.nta", FLDINCIMMED (0x24, 3)}, |
| 1053 | #undef FLDINCIMMED |
| 1054 | |
| 1055 | /* Floating-point store w/increment by immediate. */ |
| 1056 | #define FSTINCIMMED(c,h) M, OpX6aHint (7, c, h), {MR3, F2, IMM9a}, POSTINC, 0, NULL |
| 1057 | {"stfs", FSTINCIMMED (0x32, 0)}, |
| 1058 | {"stfs.nta", FSTINCIMMED (0x32, 3)}, |
| 1059 | {"stfd", FSTINCIMMED (0x33, 0)}, |
| 1060 | {"stfd.nta", FSTINCIMMED (0x33, 3)}, |
| 1061 | {"stf8", FSTINCIMMED (0x31, 0)}, |
| 1062 | {"stf8.nta", FSTINCIMMED (0x31, 3)}, |
| 1063 | {"stfe", FSTINCIMMED (0x30, 0)}, |
| 1064 | {"stfe.nta", FSTINCIMMED (0x30, 3)}, |
| 1065 | {"stf.spill", FSTINCIMMED (0x3b, 0)}, |
| 1066 | {"stf.spill.nta", FSTINCIMMED (0x3b, 3)}, |
| 1067 | #undef FSTINCIMMED |
| 1068 | |
| 1069 | /* Line prefetch w/increment by immediate. */ |
| 1070 | #define LFETCHINCIMMED(c,h) M0, OpX6aHint (7, c, h), {MR3, IMM9b}, POSTINC, 0, NULL |
| 1071 | {"lfetch", LFETCHINCIMMED (0x2c, 0)}, |
| 1072 | {"lfetch.nt1", LFETCHINCIMMED (0x2c, 1)}, |
| 1073 | {"lfetch.nt2", LFETCHINCIMMED (0x2c, 2)}, |
| 1074 | {"lfetch.nta", LFETCHINCIMMED (0x2c, 3)}, |
| 1075 | {"lfetch.excl", LFETCHINCIMMED (0x2d, 0)}, |
| 1076 | {"lfetch.excl.nt1", LFETCHINCIMMED (0x2d, 1)}, |
| 1077 | {"lfetch.excl.nt2", LFETCHINCIMMED (0x2d, 2)}, |
| 1078 | {"lfetch.excl.nta", LFETCHINCIMMED (0x2d, 3)}, |
| 1079 | {"lfetch.fault", LFETCHINCIMMED (0x2e, 0)}, |
| 1080 | {"lfetch.fault.nt1", LFETCHINCIMMED (0x2e, 1)}, |
| 1081 | {"lfetch.fault.nt2", LFETCHINCIMMED (0x2e, 2)}, |
| 1082 | {"lfetch.fault.nta", LFETCHINCIMMED (0x2e, 3)}, |
| 1083 | {"lfetch.fault.excl", LFETCHINCIMMED (0x2f, 0)}, |
| 1084 | {"lfetch.fault.excl.nt1", LFETCHINCIMMED (0x2f, 1)}, |
| 1085 | {"lfetch.fault.excl.nt2", LFETCHINCIMMED (0x2f, 2)}, |
| 1086 | {"lfetch.fault.excl.nta", LFETCHINCIMMED (0x2f, 3)}, |
| 1087 | #undef LFETCHINCIMMED |
| 1088 | |
| 1089 | {NULL, 0, 0, 0, 0, {0}, 0, 0, NULL} |
| 1090 | }; |
| 1091 | |
| 1092 | #undef M0 |
| 1093 | #undef M |
| 1094 | #undef M2 |
| 1095 | #undef bM |
| 1096 | #undef bX |
| 1097 | #undef bX2 |
| 1098 | #undef bX3 |
| 1099 | #undef bX4 |
| 1100 | #undef bX6a |
| 1101 | #undef bX6b |
| 1102 | #undef bHint |
| 1103 | #undef mM |
| 1104 | #undef mX |
| 1105 | #undef mX2 |
| 1106 | #undef mX3 |
| 1107 | #undef mX4 |
| 1108 | #undef mX6a |
| 1109 | #undef mX6b |
| 1110 | #undef mHint |
| 1111 | #undef OpX3 |
| 1112 | #undef OpX3X6b |
| 1113 | #undef OpX3X4 |
| 1114 | #undef OpX3X4X2 |
| 1115 | #undef OpX6aHint |
| 1116 | #undef OpXX6aHint |
| 1117 | #undef OpMXX6a |
| 1118 | #undef OpMXX6aHint |
| 1119 | #undef EMPTY |