| 1 | /* Instruction opcode header for iq2000. |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
| 4 | |
| 5 | Copyright 1996-2010 Free Software Foundation, Inc. |
| 6 | |
| 7 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
| 8 | |
| 9 | This file is free software; you can redistribute it and/or modify |
| 10 | it under the terms of the GNU General Public License as published by |
| 11 | the Free Software Foundation; either version 3, or (at your option) |
| 12 | any later version. |
| 13 | |
| 14 | It is distributed in the hope that it will be useful, but WITHOUT |
| 15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 17 | License for more details. |
| 18 | |
| 19 | You should have received a copy of the GNU General Public License along |
| 20 | with this program; if not, write to the Free Software Foundation, Inc., |
| 21 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| 22 | |
| 23 | */ |
| 24 | |
| 25 | #ifndef IQ2000_OPC_H |
| 26 | #define IQ2000_OPC_H |
| 27 | |
| 28 | /* -- opc.h */ |
| 29 | |
| 30 | /* Allows reason codes to be output when assembler errors occur. */ |
| 31 | #define CGEN_VERBOSE_ASSEMBLER_ERRORS |
| 32 | |
| 33 | /* Override disassembly hashing - there are variable bits in the top |
| 34 | byte of these instructions. */ |
| 35 | #define CGEN_DIS_HASH_SIZE 8 |
| 36 | #define CGEN_DIS_HASH(buf,value) (((* (unsigned char*) (buf)) >> 6) % CGEN_DIS_HASH_SIZE) |
| 37 | |
| 38 | /* following activates check beyond hashing since some iq2000 and iq10 |
| 39 | instructions have same mnemonics but different functionality. */ |
| 40 | #define CGEN_VALIDATE_INSN_SUPPORTED |
| 41 | |
| 42 | extern int iq2000_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *); |
| 43 | |
| 44 | /* -- asm.c */ |
| 45 | /* Enum declaration for iq2000 instruction types. */ |
| 46 | typedef enum cgen_insn_type { |
| 47 | IQ2000_INSN_INVALID, IQ2000_INSN_ADD2, IQ2000_INSN_ADD, IQ2000_INSN_ADDI2 |
| 48 | , IQ2000_INSN_ADDI, IQ2000_INSN_ADDIU2, IQ2000_INSN_ADDIU, IQ2000_INSN_ADDU2 |
| 49 | , IQ2000_INSN_ADDU, IQ2000_INSN_ADO162, IQ2000_INSN_ADO16, IQ2000_INSN_AND2 |
| 50 | , IQ2000_INSN_AND, IQ2000_INSN_ANDI2, IQ2000_INSN_ANDI, IQ2000_INSN_ANDOI2 |
| 51 | , IQ2000_INSN_ANDOI, IQ2000_INSN_NOR2, IQ2000_INSN_NOR, IQ2000_INSN_OR2 |
| 52 | , IQ2000_INSN_OR, IQ2000_INSN_ORI2, IQ2000_INSN_ORI, IQ2000_INSN_RAM |
| 53 | , IQ2000_INSN_SLL, IQ2000_INSN_SLLV2, IQ2000_INSN_SLLV, IQ2000_INSN_SLMV2 |
| 54 | , IQ2000_INSN_SLMV, IQ2000_INSN_SLT2, IQ2000_INSN_SLT, IQ2000_INSN_SLTI2 |
| 55 | , IQ2000_INSN_SLTI, IQ2000_INSN_SLTIU2, IQ2000_INSN_SLTIU, IQ2000_INSN_SLTU2 |
| 56 | , IQ2000_INSN_SLTU, IQ2000_INSN_SRA2, IQ2000_INSN_SRA, IQ2000_INSN_SRAV2 |
| 57 | , IQ2000_INSN_SRAV, IQ2000_INSN_SRL, IQ2000_INSN_SRLV2, IQ2000_INSN_SRLV |
| 58 | , IQ2000_INSN_SRMV2, IQ2000_INSN_SRMV, IQ2000_INSN_SUB2, IQ2000_INSN_SUB |
| 59 | , IQ2000_INSN_SUBU2, IQ2000_INSN_SUBU, IQ2000_INSN_XOR2, IQ2000_INSN_XOR |
| 60 | , IQ2000_INSN_XORI2, IQ2000_INSN_XORI, IQ2000_INSN_BBI, IQ2000_INSN_BBIN |
| 61 | , IQ2000_INSN_BBV, IQ2000_INSN_BBVN, IQ2000_INSN_BEQ, IQ2000_INSN_BEQL |
| 62 | , IQ2000_INSN_BGEZ, IQ2000_INSN_BGEZAL, IQ2000_INSN_BGEZALL, IQ2000_INSN_BGEZL |
| 63 | , IQ2000_INSN_BLTZ, IQ2000_INSN_BLTZL, IQ2000_INSN_BLTZAL, IQ2000_INSN_BLTZALL |
| 64 | , IQ2000_INSN_BMB0, IQ2000_INSN_BMB1, IQ2000_INSN_BMB2, IQ2000_INSN_BMB3 |
| 65 | , IQ2000_INSN_BNE, IQ2000_INSN_BNEL, IQ2000_INSN_JALR, IQ2000_INSN_JR |
| 66 | , IQ2000_INSN_LB, IQ2000_INSN_LBU, IQ2000_INSN_LH, IQ2000_INSN_LHU |
| 67 | , IQ2000_INSN_LUI, IQ2000_INSN_LW, IQ2000_INSN_SB, IQ2000_INSN_SH |
| 68 | , IQ2000_INSN_SW, IQ2000_INSN_BREAK, IQ2000_INSN_SYSCALL, IQ2000_INSN_ANDOUI |
| 69 | , IQ2000_INSN_ANDOUI2, IQ2000_INSN_ORUI2, IQ2000_INSN_ORUI, IQ2000_INSN_BGTZ |
| 70 | , IQ2000_INSN_BGTZL, IQ2000_INSN_BLEZ, IQ2000_INSN_BLEZL, IQ2000_INSN_MRGB |
| 71 | , IQ2000_INSN_MRGB2, IQ2000_INSN_BCTXT, IQ2000_INSN_BC0F, IQ2000_INSN_BC0FL |
| 72 | , IQ2000_INSN_BC3F, IQ2000_INSN_BC3FL, IQ2000_INSN_BC0T, IQ2000_INSN_BC0TL |
| 73 | , IQ2000_INSN_BC3T, IQ2000_INSN_BC3TL, IQ2000_INSN_CFC0, IQ2000_INSN_CFC1 |
| 74 | , IQ2000_INSN_CFC2, IQ2000_INSN_CFC3, IQ2000_INSN_CHKHDR, IQ2000_INSN_CTC0 |
| 75 | , IQ2000_INSN_CTC1, IQ2000_INSN_CTC2, IQ2000_INSN_CTC3, IQ2000_INSN_JCR |
| 76 | , IQ2000_INSN_LUC32, IQ2000_INSN_LUC32L, IQ2000_INSN_LUC64, IQ2000_INSN_LUC64L |
| 77 | , IQ2000_INSN_LUK, IQ2000_INSN_LULCK, IQ2000_INSN_LUM32, IQ2000_INSN_LUM32L |
| 78 | , IQ2000_INSN_LUM64, IQ2000_INSN_LUM64L, IQ2000_INSN_LUR, IQ2000_INSN_LURL |
| 79 | , IQ2000_INSN_LUULCK, IQ2000_INSN_MFC0, IQ2000_INSN_MFC1, IQ2000_INSN_MFC2 |
| 80 | , IQ2000_INSN_MFC3, IQ2000_INSN_MTC0, IQ2000_INSN_MTC1, IQ2000_INSN_MTC2 |
| 81 | , IQ2000_INSN_MTC3, IQ2000_INSN_PKRL, IQ2000_INSN_PKRLR1, IQ2000_INSN_PKRLR30 |
| 82 | , IQ2000_INSN_RB, IQ2000_INSN_RBR1, IQ2000_INSN_RBR30, IQ2000_INSN_RFE |
| 83 | , IQ2000_INSN_RX, IQ2000_INSN_RXR1, IQ2000_INSN_RXR30, IQ2000_INSN_SLEEP |
| 84 | , IQ2000_INSN_SRRD, IQ2000_INSN_SRRDL, IQ2000_INSN_SRULCK, IQ2000_INSN_SRWR |
| 85 | , IQ2000_INSN_SRWRU, IQ2000_INSN_TRAPQFL, IQ2000_INSN_TRAPQNE, IQ2000_INSN_TRAPREL |
| 86 | , IQ2000_INSN_WB, IQ2000_INSN_WBU, IQ2000_INSN_WBR1, IQ2000_INSN_WBR1U |
| 87 | , IQ2000_INSN_WBR30, IQ2000_INSN_WBR30U, IQ2000_INSN_WX, IQ2000_INSN_WXU |
| 88 | , IQ2000_INSN_WXR1, IQ2000_INSN_WXR1U, IQ2000_INSN_WXR30, IQ2000_INSN_WXR30U |
| 89 | , IQ2000_INSN_LDW, IQ2000_INSN_SDW, IQ2000_INSN_J, IQ2000_INSN_JAL |
| 90 | , IQ2000_INSN_BMB, IQ2000_INSN_ANDOUI_Q10, IQ2000_INSN_ANDOUI2_Q10, IQ2000_INSN_ORUI_Q10 |
| 91 | , IQ2000_INSN_ORUI2_Q10, IQ2000_INSN_MRGBQ10, IQ2000_INSN_MRGBQ102, IQ2000_INSN_JQ10 |
| 92 | , IQ2000_INSN_JALQ10, IQ2000_INSN_JALQ10_2, IQ2000_INSN_BBIL, IQ2000_INSN_BBINL |
| 93 | , IQ2000_INSN_BBVL, IQ2000_INSN_BBVNL, IQ2000_INSN_BGTZAL, IQ2000_INSN_BGTZALL |
| 94 | , IQ2000_INSN_BLEZAL, IQ2000_INSN_BLEZALL, IQ2000_INSN_BGTZ_Q10, IQ2000_INSN_BGTZL_Q10 |
| 95 | , IQ2000_INSN_BLEZ_Q10, IQ2000_INSN_BLEZL_Q10, IQ2000_INSN_BMB_Q10, IQ2000_INSN_BMBL |
| 96 | , IQ2000_INSN_BRI, IQ2000_INSN_BRV, IQ2000_INSN_BCTX, IQ2000_INSN_YIELD |
| 97 | , IQ2000_INSN_CRC32, IQ2000_INSN_CRC32B, IQ2000_INSN_CNT1S, IQ2000_INSN_AVAIL |
| 98 | , IQ2000_INSN_FREE, IQ2000_INSN_TSTOD, IQ2000_INSN_CMPHDR, IQ2000_INSN_MCID |
| 99 | , IQ2000_INSN_DBA, IQ2000_INSN_DBD, IQ2000_INSN_DPWT, IQ2000_INSN_CHKHDRQ10 |
| 100 | , IQ2000_INSN_RBA, IQ2000_INSN_RBAL, IQ2000_INSN_RBAR, IQ2000_INSN_WBA |
| 101 | , IQ2000_INSN_WBAU, IQ2000_INSN_WBAC, IQ2000_INSN_RBI, IQ2000_INSN_RBIL |
| 102 | , IQ2000_INSN_RBIR, IQ2000_INSN_WBI, IQ2000_INSN_WBIC, IQ2000_INSN_WBIU |
| 103 | , IQ2000_INSN_PKRLI, IQ2000_INSN_PKRLIH, IQ2000_INSN_PKRLIU, IQ2000_INSN_PKRLIC |
| 104 | , IQ2000_INSN_PKRLA, IQ2000_INSN_PKRLAU, IQ2000_INSN_PKRLAH, IQ2000_INSN_PKRLAC |
| 105 | , IQ2000_INSN_LOCK, IQ2000_INSN_UNLK, IQ2000_INSN_SWRD, IQ2000_INSN_SWRDL |
| 106 | , IQ2000_INSN_SWWR, IQ2000_INSN_SWWRU, IQ2000_INSN_DWRD, IQ2000_INSN_DWRDL |
| 107 | , IQ2000_INSN_CAM36, IQ2000_INSN_CAM72, IQ2000_INSN_CAM144, IQ2000_INSN_CAM288 |
| 108 | , IQ2000_INSN_CM32AND, IQ2000_INSN_CM32ANDN, IQ2000_INSN_CM32OR, IQ2000_INSN_CM32RA |
| 109 | , IQ2000_INSN_CM32RD, IQ2000_INSN_CM32RI, IQ2000_INSN_CM32RS, IQ2000_INSN_CM32SA |
| 110 | , IQ2000_INSN_CM32SD, IQ2000_INSN_CM32SI, IQ2000_INSN_CM32SS, IQ2000_INSN_CM32XOR |
| 111 | , IQ2000_INSN_CM64CLR, IQ2000_INSN_CM64RA, IQ2000_INSN_CM64RD, IQ2000_INSN_CM64RI |
| 112 | , IQ2000_INSN_CM64RIA2, IQ2000_INSN_CM64RS, IQ2000_INSN_CM64SA, IQ2000_INSN_CM64SD |
| 113 | , IQ2000_INSN_CM64SI, IQ2000_INSN_CM64SIA2, IQ2000_INSN_CM64SS, IQ2000_INSN_CM128RIA2 |
| 114 | , IQ2000_INSN_CM128RIA3, IQ2000_INSN_CM128RIA4, IQ2000_INSN_CM128SIA2, IQ2000_INSN_CM128SIA3 |
| 115 | , IQ2000_INSN_CM128SIA4, IQ2000_INSN_CM128VSA, IQ2000_INSN_CFC, IQ2000_INSN_CTC |
| 116 | } CGEN_INSN_TYPE; |
| 117 | |
| 118 | /* Index of `invalid' insn place holder. */ |
| 119 | #define CGEN_INSN_INVALID IQ2000_INSN_INVALID |
| 120 | |
| 121 | /* Total number of insns in table. */ |
| 122 | #define MAX_INSNS ((int) IQ2000_INSN_CTC + 1) |
| 123 | |
| 124 | /* This struct records data prior to insertion or after extraction. */ |
| 125 | struct cgen_fields |
| 126 | { |
| 127 | int length; |
| 128 | long f_nil; |
| 129 | long f_anyof; |
| 130 | long f_opcode; |
| 131 | long f_rs; |
| 132 | long f_rt; |
| 133 | long f_rd; |
| 134 | long f_shamt; |
| 135 | long f_cp_op; |
| 136 | long f_cp_op_10; |
| 137 | long f_cp_grp; |
| 138 | long f_func; |
| 139 | long f_imm; |
| 140 | long f_rd_rs; |
| 141 | long f_rd_rt; |
| 142 | long f_rt_rs; |
| 143 | long f_jtarg; |
| 144 | long f_jtargq10; |
| 145 | long f_offset; |
| 146 | long f_count; |
| 147 | long f_bytecount; |
| 148 | long f_index; |
| 149 | long f_mask; |
| 150 | long f_maskq10; |
| 151 | long f_maskl; |
| 152 | long f_excode; |
| 153 | long f_rsrvd; |
| 154 | long f_10_11; |
| 155 | long f_24_19; |
| 156 | long f_5; |
| 157 | long f_10; |
| 158 | long f_25; |
| 159 | long f_cam_z; |
| 160 | long f_cam_y; |
| 161 | long f_cm_3func; |
| 162 | long f_cm_4func; |
| 163 | long f_cm_3z; |
| 164 | long f_cm_4z; |
| 165 | }; |
| 166 | |
| 167 | #define CGEN_INIT_PARSE(od) \ |
| 168 | {\ |
| 169 | } |
| 170 | #define CGEN_INIT_INSERT(od) \ |
| 171 | {\ |
| 172 | } |
| 173 | #define CGEN_INIT_EXTRACT(od) \ |
| 174 | {\ |
| 175 | } |
| 176 | #define CGEN_INIT_PRINT(od) \ |
| 177 | {\ |
| 178 | } |
| 179 | |
| 180 | |
| 181 | #endif /* IQ2000_OPC_H */ |