| 1 | /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ |
| 2 | /* Semantic operand instances for m32r. |
| 3 | |
| 4 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
| 5 | |
| 6 | Copyright (C) 1996-2019 Free Software Foundation, Inc. |
| 7 | |
| 8 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. |
| 9 | |
| 10 | This file is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 3, or (at your option) |
| 13 | any later version. |
| 14 | |
| 15 | It is distributed in the hope that it will be useful, but WITHOUT |
| 16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 18 | License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License along |
| 21 | with this program; if not, write to the Free Software Foundation, Inc., |
| 22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. |
| 23 | |
| 24 | */ |
| 25 | |
| 26 | #include "sysdep.h" |
| 27 | #include "ansidecl.h" |
| 28 | #include "bfd.h" |
| 29 | #include "symcat.h" |
| 30 | #include "m32r-desc.h" |
| 31 | #include "m32r-opc.h" |
| 32 | |
| 33 | /* Operand references. */ |
| 34 | |
| 35 | #define OP_ENT(op) M32R_OPERAND_##op |
| 36 | #define INPUT CGEN_OPINST_INPUT |
| 37 | #define OUTPUT CGEN_OPINST_OUTPUT |
| 38 | #define END CGEN_OPINST_END |
| 39 | #define COND_REF CGEN_OPINST_COND_REF |
| 40 | |
| 41 | static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = { |
| 42 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 43 | }; |
| 44 | |
| 45 | static const CGEN_OPINST sfmt_add_ops[] ATTRIBUTE_UNUSED = { |
| 46 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 47 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 48 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 49 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 50 | }; |
| 51 | |
| 52 | static const CGEN_OPINST sfmt_add3_ops[] ATTRIBUTE_UNUSED = { |
| 53 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 54 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 55 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 56 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 57 | }; |
| 58 | |
| 59 | static const CGEN_OPINST sfmt_and3_ops[] ATTRIBUTE_UNUSED = { |
| 60 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 61 | { INPUT, "uimm16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 }, |
| 62 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 63 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 64 | }; |
| 65 | |
| 66 | static const CGEN_OPINST sfmt_or3_ops[] ATTRIBUTE_UNUSED = { |
| 67 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 68 | { INPUT, "ulo16", HW_H_ULO16, CGEN_MODE_UINT, OP_ENT (ULO16), 0, 0 }, |
| 69 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 70 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 71 | }; |
| 72 | |
| 73 | static const CGEN_OPINST sfmt_addi_ops[] ATTRIBUTE_UNUSED = { |
| 74 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 75 | { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 }, |
| 76 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 77 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 78 | }; |
| 79 | |
| 80 | static const CGEN_OPINST sfmt_addv_ops[] ATTRIBUTE_UNUSED = { |
| 81 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 82 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 83 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 84 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 85 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 86 | }; |
| 87 | |
| 88 | static const CGEN_OPINST sfmt_addv3_ops[] ATTRIBUTE_UNUSED = { |
| 89 | { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 90 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 91 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 92 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 93 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 94 | }; |
| 95 | |
| 96 | static const CGEN_OPINST sfmt_addx_ops[] ATTRIBUTE_UNUSED = { |
| 97 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 98 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 99 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 100 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 101 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 102 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 103 | }; |
| 104 | |
| 105 | static const CGEN_OPINST sfmt_bc8_ops[] ATTRIBUTE_UNUSED = { |
| 106 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 107 | { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, |
| 108 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 109 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 110 | }; |
| 111 | |
| 112 | static const CGEN_OPINST sfmt_bc24_ops[] ATTRIBUTE_UNUSED = { |
| 113 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 114 | { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF }, |
| 115 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 116 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 117 | }; |
| 118 | |
| 119 | static const CGEN_OPINST sfmt_beq_ops[] ATTRIBUTE_UNUSED = { |
| 120 | { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, |
| 121 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 122 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 123 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 124 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 125 | }; |
| 126 | |
| 127 | static const CGEN_OPINST sfmt_beqz_ops[] ATTRIBUTE_UNUSED = { |
| 128 | { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, |
| 129 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 130 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 131 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 132 | }; |
| 133 | |
| 134 | static const CGEN_OPINST sfmt_bl8_ops[] ATTRIBUTE_UNUSED = { |
| 135 | { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 }, |
| 136 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 137 | { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 }, |
| 138 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 139 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 140 | }; |
| 141 | |
| 142 | static const CGEN_OPINST sfmt_bl24_ops[] ATTRIBUTE_UNUSED = { |
| 143 | { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 }, |
| 144 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 145 | { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 }, |
| 146 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 147 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 148 | }; |
| 149 | |
| 150 | static const CGEN_OPINST sfmt_bcl8_ops[] ATTRIBUTE_UNUSED = { |
| 151 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 152 | { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, |
| 153 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 154 | { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF }, |
| 155 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 156 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 157 | }; |
| 158 | |
| 159 | static const CGEN_OPINST sfmt_bcl24_ops[] ATTRIBUTE_UNUSED = { |
| 160 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 161 | { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF }, |
| 162 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 163 | { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF }, |
| 164 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 165 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 166 | }; |
| 167 | |
| 168 | static const CGEN_OPINST sfmt_bra8_ops[] ATTRIBUTE_UNUSED = { |
| 169 | { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 }, |
| 170 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 171 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 172 | }; |
| 173 | |
| 174 | static const CGEN_OPINST sfmt_bra24_ops[] ATTRIBUTE_UNUSED = { |
| 175 | { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 }, |
| 176 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 177 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 178 | }; |
| 179 | |
| 180 | static const CGEN_OPINST sfmt_cmp_ops[] ATTRIBUTE_UNUSED = { |
| 181 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 182 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 183 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 184 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 185 | }; |
| 186 | |
| 187 | static const CGEN_OPINST sfmt_cmpi_ops[] ATTRIBUTE_UNUSED = { |
| 188 | { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 189 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 190 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 191 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 192 | }; |
| 193 | |
| 194 | static const CGEN_OPINST sfmt_cmpz_ops[] ATTRIBUTE_UNUSED = { |
| 195 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 196 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 197 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 198 | }; |
| 199 | |
| 200 | static const CGEN_OPINST sfmt_div_ops[] ATTRIBUTE_UNUSED = { |
| 201 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF }, |
| 202 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 203 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF }, |
| 204 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 205 | }; |
| 206 | |
| 207 | static const CGEN_OPINST sfmt_jc_ops[] ATTRIBUTE_UNUSED = { |
| 208 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 209 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF }, |
| 210 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, |
| 211 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 212 | }; |
| 213 | |
| 214 | static const CGEN_OPINST sfmt_jl_ops[] ATTRIBUTE_UNUSED = { |
| 215 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 216 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 217 | { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 }, |
| 218 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 219 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 220 | }; |
| 221 | |
| 222 | static const CGEN_OPINST sfmt_jmp_ops[] ATTRIBUTE_UNUSED = { |
| 223 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 224 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 225 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 226 | }; |
| 227 | |
| 228 | static const CGEN_OPINST sfmt_ld_ops[] ATTRIBUTE_UNUSED = { |
| 229 | { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 230 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 231 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 232 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 233 | }; |
| 234 | |
| 235 | static const CGEN_OPINST sfmt_ld_d_ops[] ATTRIBUTE_UNUSED = { |
| 236 | { INPUT, "h_memory_SI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 237 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 238 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 239 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 240 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 241 | }; |
| 242 | |
| 243 | static const CGEN_OPINST sfmt_ldb_ops[] ATTRIBUTE_UNUSED = { |
| 244 | { INPUT, "h_memory_QI_sr", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 245 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 246 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 247 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 248 | }; |
| 249 | |
| 250 | static const CGEN_OPINST sfmt_ldb_d_ops[] ATTRIBUTE_UNUSED = { |
| 251 | { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 252 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 253 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 254 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 255 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 256 | }; |
| 257 | |
| 258 | static const CGEN_OPINST sfmt_ldh_ops[] ATTRIBUTE_UNUSED = { |
| 259 | { INPUT, "h_memory_HI_sr", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 260 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 261 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 262 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 263 | }; |
| 264 | |
| 265 | static const CGEN_OPINST sfmt_ldh_d_ops[] ATTRIBUTE_UNUSED = { |
| 266 | { INPUT, "h_memory_HI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 267 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 268 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 269 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 270 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 271 | }; |
| 272 | |
| 273 | static const CGEN_OPINST sfmt_ld_plus_ops[] ATTRIBUTE_UNUSED = { |
| 274 | { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 275 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 276 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 277 | { OUTPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 278 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 279 | }; |
| 280 | |
| 281 | static const CGEN_OPINST sfmt_ld24_ops[] ATTRIBUTE_UNUSED = { |
| 282 | { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 }, |
| 283 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 284 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 285 | }; |
| 286 | |
| 287 | static const CGEN_OPINST sfmt_ldi8_ops[] ATTRIBUTE_UNUSED = { |
| 288 | { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 }, |
| 289 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 290 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 291 | }; |
| 292 | |
| 293 | static const CGEN_OPINST sfmt_ldi16_ops[] ATTRIBUTE_UNUSED = { |
| 294 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 295 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 296 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 297 | }; |
| 298 | |
| 299 | static const CGEN_OPINST sfmt_lock_ops[] ATTRIBUTE_UNUSED = { |
| 300 | { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 301 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 302 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 303 | { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 }, |
| 304 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 305 | }; |
| 306 | |
| 307 | static const CGEN_OPINST sfmt_machi_ops[] ATTRIBUTE_UNUSED = { |
| 308 | { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 309 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 310 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 311 | { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 312 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 313 | }; |
| 314 | |
| 315 | static const CGEN_OPINST sfmt_machi_a_ops[] ATTRIBUTE_UNUSED = { |
| 316 | { INPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 }, |
| 317 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 318 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 319 | { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 }, |
| 320 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 321 | }; |
| 322 | |
| 323 | static const CGEN_OPINST sfmt_mulhi_ops[] ATTRIBUTE_UNUSED = { |
| 324 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 325 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 326 | { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 327 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 328 | }; |
| 329 | |
| 330 | static const CGEN_OPINST sfmt_mulhi_a_ops[] ATTRIBUTE_UNUSED = { |
| 331 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 332 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 333 | { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 }, |
| 334 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 335 | }; |
| 336 | |
| 337 | static const CGEN_OPINST sfmt_mv_ops[] ATTRIBUTE_UNUSED = { |
| 338 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 339 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 340 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 341 | }; |
| 342 | |
| 343 | static const CGEN_OPINST sfmt_mvfachi_ops[] ATTRIBUTE_UNUSED = { |
| 344 | { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 345 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 346 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 347 | }; |
| 348 | |
| 349 | static const CGEN_OPINST sfmt_mvfachi_a_ops[] ATTRIBUTE_UNUSED = { |
| 350 | { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 }, |
| 351 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 352 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 353 | }; |
| 354 | |
| 355 | static const CGEN_OPINST sfmt_mvfc_ops[] ATTRIBUTE_UNUSED = { |
| 356 | { INPUT, "scr", HW_H_CR, CGEN_MODE_USI, OP_ENT (SCR), 0, 0 }, |
| 357 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 358 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 359 | }; |
| 360 | |
| 361 | static const CGEN_OPINST sfmt_mvtachi_ops[] ATTRIBUTE_UNUSED = { |
| 362 | { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 363 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 364 | { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 365 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 366 | }; |
| 367 | |
| 368 | static const CGEN_OPINST sfmt_mvtachi_a_ops[] ATTRIBUTE_UNUSED = { |
| 369 | { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 }, |
| 370 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 371 | { OUTPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 }, |
| 372 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 373 | }; |
| 374 | |
| 375 | static const CGEN_OPINST sfmt_mvtc_ops[] ATTRIBUTE_UNUSED = { |
| 376 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 377 | { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 }, |
| 378 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 379 | }; |
| 380 | |
| 381 | static const CGEN_OPINST sfmt_nop_ops[] ATTRIBUTE_UNUSED = { |
| 382 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 383 | }; |
| 384 | |
| 385 | static const CGEN_OPINST sfmt_rac_ops[] ATTRIBUTE_UNUSED = { |
| 386 | { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 387 | { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 }, |
| 388 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 389 | }; |
| 390 | |
| 391 | static const CGEN_OPINST sfmt_rac_dsi_ops[] ATTRIBUTE_UNUSED = { |
| 392 | { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 }, |
| 393 | { INPUT, "imm1", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (IMM1), 0, 0 }, |
| 394 | { OUTPUT, "accd", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCD), 0, 0 }, |
| 395 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 396 | }; |
| 397 | |
| 398 | static const CGEN_OPINST sfmt_rte_ops[] ATTRIBUTE_UNUSED = { |
| 399 | { INPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 400 | { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 401 | { INPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 }, |
| 402 | { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 }, |
| 403 | { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 404 | { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 }, |
| 405 | { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 406 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 407 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 408 | }; |
| 409 | |
| 410 | static const CGEN_OPINST sfmt_seth_ops[] ATTRIBUTE_UNUSED = { |
| 411 | { INPUT, "hi16", HW_H_HI16, CGEN_MODE_UINT, OP_ENT (HI16), 0, 0 }, |
| 412 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 413 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 414 | }; |
| 415 | |
| 416 | static const CGEN_OPINST sfmt_sll3_ops[] ATTRIBUTE_UNUSED = { |
| 417 | { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 }, |
| 418 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 419 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 420 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 421 | }; |
| 422 | |
| 423 | static const CGEN_OPINST sfmt_slli_ops[] ATTRIBUTE_UNUSED = { |
| 424 | { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 425 | { INPUT, "uimm5", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM5), 0, 0 }, |
| 426 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 427 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 428 | }; |
| 429 | |
| 430 | static const CGEN_OPINST sfmt_st_ops[] ATTRIBUTE_UNUSED = { |
| 431 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 432 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 433 | { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 434 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 435 | }; |
| 436 | |
| 437 | static const CGEN_OPINST sfmt_st_d_ops[] ATTRIBUTE_UNUSED = { |
| 438 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 439 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 440 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 441 | { OUTPUT, "h_memory_SI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 442 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 443 | }; |
| 444 | |
| 445 | static const CGEN_OPINST sfmt_stb_ops[] ATTRIBUTE_UNUSED = { |
| 446 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 447 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 448 | { OUTPUT, "h_memory_QI_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 449 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 450 | }; |
| 451 | |
| 452 | static const CGEN_OPINST sfmt_stb_d_ops[] ATTRIBUTE_UNUSED = { |
| 453 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 454 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 455 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 456 | { OUTPUT, "h_memory_QI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 457 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 458 | }; |
| 459 | |
| 460 | static const CGEN_OPINST sfmt_sth_ops[] ATTRIBUTE_UNUSED = { |
| 461 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 462 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 463 | { OUTPUT, "h_memory_HI_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 464 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 465 | }; |
| 466 | |
| 467 | static const CGEN_OPINST sfmt_sth_d_ops[] ATTRIBUTE_UNUSED = { |
| 468 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 469 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 470 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 471 | { OUTPUT, "h_memory_HI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 472 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 473 | }; |
| 474 | |
| 475 | static const CGEN_OPINST sfmt_st_plus_ops[] ATTRIBUTE_UNUSED = { |
| 476 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 477 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 478 | { OUTPUT, "h_memory_SI_new_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 }, |
| 479 | { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 480 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 481 | }; |
| 482 | |
| 483 | static const CGEN_OPINST sfmt_sth_plus_ops[] ATTRIBUTE_UNUSED = { |
| 484 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 485 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 486 | { OUTPUT, "h_memory_HI_new_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 }, |
| 487 | { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 488 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 489 | }; |
| 490 | |
| 491 | static const CGEN_OPINST sfmt_stb_plus_ops[] ATTRIBUTE_UNUSED = { |
| 492 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 493 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 494 | { OUTPUT, "h_memory_QI_new_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 495 | { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 496 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 497 | }; |
| 498 | |
| 499 | static const CGEN_OPINST sfmt_trap_ops[] ATTRIBUTE_UNUSED = { |
| 500 | { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 501 | { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 }, |
| 502 | { INPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 503 | { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 504 | { INPUT, "uimm4", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM4), 0, 0 }, |
| 505 | { OUTPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 506 | { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 507 | { OUTPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 }, |
| 508 | { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 }, |
| 509 | { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 }, |
| 510 | { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 }, |
| 511 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 512 | }; |
| 513 | |
| 514 | static const CGEN_OPINST sfmt_unlock_ops[] ATTRIBUTE_UNUSED = { |
| 515 | { INPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 }, |
| 516 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, COND_REF }, |
| 517 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, COND_REF }, |
| 518 | { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 }, |
| 519 | { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, COND_REF }, |
| 520 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 521 | }; |
| 522 | |
| 523 | static const CGEN_OPINST sfmt_satb_ops[] ATTRIBUTE_UNUSED = { |
| 524 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 525 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 526 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 527 | }; |
| 528 | |
| 529 | static const CGEN_OPINST sfmt_sat_ops[] ATTRIBUTE_UNUSED = { |
| 530 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 531 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF }, |
| 532 | { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 }, |
| 533 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 534 | }; |
| 535 | |
| 536 | static const CGEN_OPINST sfmt_sadd_ops[] ATTRIBUTE_UNUSED = { |
| 537 | { INPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 }, |
| 538 | { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 }, |
| 539 | { OUTPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 }, |
| 540 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 541 | }; |
| 542 | |
| 543 | static const CGEN_OPINST sfmt_macwu1_ops[] ATTRIBUTE_UNUSED = { |
| 544 | { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 }, |
| 545 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 546 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 547 | { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 }, |
| 548 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 549 | }; |
| 550 | |
| 551 | static const CGEN_OPINST sfmt_mulwu1_ops[] ATTRIBUTE_UNUSED = { |
| 552 | { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 }, |
| 553 | { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 }, |
| 554 | { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 }, |
| 555 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 556 | }; |
| 557 | |
| 558 | static const CGEN_OPINST sfmt_sc_ops[] ATTRIBUTE_UNUSED = { |
| 559 | { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 560 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 561 | }; |
| 562 | |
| 563 | static const CGEN_OPINST sfmt_clrpsw_ops[] ATTRIBUTE_UNUSED = { |
| 564 | { INPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 }, |
| 565 | { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 }, |
| 566 | { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 }, |
| 567 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 568 | }; |
| 569 | |
| 570 | static const CGEN_OPINST sfmt_setpsw_ops[] ATTRIBUTE_UNUSED = { |
| 571 | { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 }, |
| 572 | { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 }, |
| 573 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 574 | }; |
| 575 | |
| 576 | static const CGEN_OPINST sfmt_bset_ops[] ATTRIBUTE_UNUSED = { |
| 577 | { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 578 | { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 }, |
| 579 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 580 | { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 }, |
| 581 | { OUTPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 }, |
| 582 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 583 | }; |
| 584 | |
| 585 | static const CGEN_OPINST sfmt_btst_ops[] ATTRIBUTE_UNUSED = { |
| 586 | { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 }, |
| 587 | { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 }, |
| 588 | { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 }, |
| 589 | { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 } |
| 590 | }; |
| 591 | |
| 592 | #undef OP_ENT |
| 593 | #undef INPUT |
| 594 | #undef OUTPUT |
| 595 | #undef END |
| 596 | #undef COND_REF |
| 597 | |
| 598 | /* Operand instance lookup table. */ |
| 599 | |
| 600 | static const CGEN_OPINST *m32r_cgen_opinst_table[MAX_INSNS] = { |
| 601 | 0, |
| 602 | & sfmt_add_ops[0], |
| 603 | & sfmt_add3_ops[0], |
| 604 | & sfmt_add_ops[0], |
| 605 | & sfmt_and3_ops[0], |
| 606 | & sfmt_add_ops[0], |
| 607 | & sfmt_or3_ops[0], |
| 608 | & sfmt_add_ops[0], |
| 609 | & sfmt_and3_ops[0], |
| 610 | & sfmt_addi_ops[0], |
| 611 | & sfmt_addv_ops[0], |
| 612 | & sfmt_addv3_ops[0], |
| 613 | & sfmt_addx_ops[0], |
| 614 | & sfmt_bc8_ops[0], |
| 615 | & sfmt_bc24_ops[0], |
| 616 | & sfmt_beq_ops[0], |
| 617 | & sfmt_beqz_ops[0], |
| 618 | & sfmt_beqz_ops[0], |
| 619 | & sfmt_beqz_ops[0], |
| 620 | & sfmt_beqz_ops[0], |
| 621 | & sfmt_beqz_ops[0], |
| 622 | & sfmt_beqz_ops[0], |
| 623 | & sfmt_bl8_ops[0], |
| 624 | & sfmt_bl24_ops[0], |
| 625 | & sfmt_bcl8_ops[0], |
| 626 | & sfmt_bcl24_ops[0], |
| 627 | & sfmt_bc8_ops[0], |
| 628 | & sfmt_bc24_ops[0], |
| 629 | & sfmt_beq_ops[0], |
| 630 | & sfmt_bra8_ops[0], |
| 631 | & sfmt_bra24_ops[0], |
| 632 | & sfmt_bcl8_ops[0], |
| 633 | & sfmt_bcl24_ops[0], |
| 634 | & sfmt_cmp_ops[0], |
| 635 | & sfmt_cmpi_ops[0], |
| 636 | & sfmt_cmp_ops[0], |
| 637 | & sfmt_cmpi_ops[0], |
| 638 | & sfmt_cmp_ops[0], |
| 639 | & sfmt_cmpz_ops[0], |
| 640 | & sfmt_div_ops[0], |
| 641 | & sfmt_div_ops[0], |
| 642 | & sfmt_div_ops[0], |
| 643 | & sfmt_div_ops[0], |
| 644 | & sfmt_div_ops[0], |
| 645 | & sfmt_div_ops[0], |
| 646 | & sfmt_div_ops[0], |
| 647 | & sfmt_div_ops[0], |
| 648 | & sfmt_div_ops[0], |
| 649 | & sfmt_div_ops[0], |
| 650 | & sfmt_div_ops[0], |
| 651 | & sfmt_div_ops[0], |
| 652 | & sfmt_jc_ops[0], |
| 653 | & sfmt_jc_ops[0], |
| 654 | & sfmt_jl_ops[0], |
| 655 | & sfmt_jmp_ops[0], |
| 656 | & sfmt_ld_ops[0], |
| 657 | & sfmt_ld_d_ops[0], |
| 658 | & sfmt_ldb_ops[0], |
| 659 | & sfmt_ldb_d_ops[0], |
| 660 | & sfmt_ldh_ops[0], |
| 661 | & sfmt_ldh_d_ops[0], |
| 662 | & sfmt_ldb_ops[0], |
| 663 | & sfmt_ldb_d_ops[0], |
| 664 | & sfmt_ldh_ops[0], |
| 665 | & sfmt_ldh_d_ops[0], |
| 666 | & sfmt_ld_plus_ops[0], |
| 667 | & sfmt_ld24_ops[0], |
| 668 | & sfmt_ldi8_ops[0], |
| 669 | & sfmt_ldi16_ops[0], |
| 670 | & sfmt_lock_ops[0], |
| 671 | & sfmt_machi_ops[0], |
| 672 | & sfmt_machi_a_ops[0], |
| 673 | & sfmt_machi_ops[0], |
| 674 | & sfmt_machi_a_ops[0], |
| 675 | & sfmt_machi_ops[0], |
| 676 | & sfmt_machi_a_ops[0], |
| 677 | & sfmt_machi_ops[0], |
| 678 | & sfmt_machi_a_ops[0], |
| 679 | & sfmt_add_ops[0], |
| 680 | & sfmt_mulhi_ops[0], |
| 681 | & sfmt_mulhi_a_ops[0], |
| 682 | & sfmt_mulhi_ops[0], |
| 683 | & sfmt_mulhi_a_ops[0], |
| 684 | & sfmt_mulhi_ops[0], |
| 685 | & sfmt_mulhi_a_ops[0], |
| 686 | & sfmt_mulhi_ops[0], |
| 687 | & sfmt_mulhi_a_ops[0], |
| 688 | & sfmt_mv_ops[0], |
| 689 | & sfmt_mvfachi_ops[0], |
| 690 | & sfmt_mvfachi_a_ops[0], |
| 691 | & sfmt_mvfachi_ops[0], |
| 692 | & sfmt_mvfachi_a_ops[0], |
| 693 | & sfmt_mvfachi_ops[0], |
| 694 | & sfmt_mvfachi_a_ops[0], |
| 695 | & sfmt_mvfc_ops[0], |
| 696 | & sfmt_mvtachi_ops[0], |
| 697 | & sfmt_mvtachi_a_ops[0], |
| 698 | & sfmt_mvtachi_ops[0], |
| 699 | & sfmt_mvtachi_a_ops[0], |
| 700 | & sfmt_mvtc_ops[0], |
| 701 | & sfmt_mv_ops[0], |
| 702 | & sfmt_nop_ops[0], |
| 703 | & sfmt_mv_ops[0], |
| 704 | & sfmt_rac_ops[0], |
| 705 | & sfmt_rac_dsi_ops[0], |
| 706 | & sfmt_rac_ops[0], |
| 707 | & sfmt_rac_dsi_ops[0], |
| 708 | & sfmt_rte_ops[0], |
| 709 | & sfmt_seth_ops[0], |
| 710 | & sfmt_add_ops[0], |
| 711 | & sfmt_sll3_ops[0], |
| 712 | & sfmt_slli_ops[0], |
| 713 | & sfmt_add_ops[0], |
| 714 | & sfmt_sll3_ops[0], |
| 715 | & sfmt_slli_ops[0], |
| 716 | & sfmt_add_ops[0], |
| 717 | & sfmt_sll3_ops[0], |
| 718 | & sfmt_slli_ops[0], |
| 719 | & sfmt_st_ops[0], |
| 720 | & sfmt_st_d_ops[0], |
| 721 | & sfmt_stb_ops[0], |
| 722 | & sfmt_stb_d_ops[0], |
| 723 | & sfmt_sth_ops[0], |
| 724 | & sfmt_sth_d_ops[0], |
| 725 | & sfmt_st_plus_ops[0], |
| 726 | & sfmt_sth_plus_ops[0], |
| 727 | & sfmt_stb_plus_ops[0], |
| 728 | & sfmt_st_plus_ops[0], |
| 729 | & sfmt_add_ops[0], |
| 730 | & sfmt_addv_ops[0], |
| 731 | & sfmt_addx_ops[0], |
| 732 | & sfmt_trap_ops[0], |
| 733 | & sfmt_unlock_ops[0], |
| 734 | & sfmt_satb_ops[0], |
| 735 | & sfmt_satb_ops[0], |
| 736 | & sfmt_sat_ops[0], |
| 737 | & sfmt_cmpz_ops[0], |
| 738 | & sfmt_sadd_ops[0], |
| 739 | & sfmt_macwu1_ops[0], |
| 740 | & sfmt_machi_ops[0], |
| 741 | & sfmt_mulwu1_ops[0], |
| 742 | & sfmt_macwu1_ops[0], |
| 743 | & sfmt_sc_ops[0], |
| 744 | & sfmt_sc_ops[0], |
| 745 | & sfmt_clrpsw_ops[0], |
| 746 | & sfmt_setpsw_ops[0], |
| 747 | & sfmt_bset_ops[0], |
| 748 | & sfmt_bset_ops[0], |
| 749 | & sfmt_btst_ops[0], |
| 750 | }; |
| 751 | |
| 752 | /* Function to call before using the operand instance table. */ |
| 753 | |
| 754 | void |
| 755 | m32r_cgen_init_opinst_table (CGEN_CPU_DESC cd) |
| 756 | { |
| 757 | int i; |
| 758 | const CGEN_OPINST **oi = & m32r_cgen_opinst_table[0]; |
| 759 | CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries; |
| 760 | for (i = 0; i < MAX_INSNS; ++i) |
| 761 | insns[i].opinst = oi[i]; |
| 762 | } |