| 1 | /* Instruction building/extraction support for mep. -*- C -*- |
| 2 | |
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. |
| 4 | - the resultant file is machine generated, cgen-ibld.in isn't |
| 5 | |
| 6 | Copyright (C) 1996-2014 Free Software Foundation, Inc. |
| 7 | |
| 8 | This file is part of libopcodes. |
| 9 | |
| 10 | This library is free software; you can redistribute it and/or modify |
| 11 | it under the terms of the GNU General Public License as published by |
| 12 | the Free Software Foundation; either version 3, or (at your option) |
| 13 | any later version. |
| 14 | |
| 15 | It is distributed in the hope that it will be useful, but WITHOUT |
| 16 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 17 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 18 | License for more details. |
| 19 | |
| 20 | You should have received a copy of the GNU General Public License |
| 21 | along with this program; if not, write to the Free Software Foundation, Inc., |
| 22 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
| 23 | |
| 24 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
| 25 | Keep that in mind. */ |
| 26 | |
| 27 | #include "sysdep.h" |
| 28 | #include <stdio.h> |
| 29 | #include "ansidecl.h" |
| 30 | #include "dis-asm.h" |
| 31 | #include "bfd.h" |
| 32 | #include "symcat.h" |
| 33 | #include "mep-desc.h" |
| 34 | #include "mep-opc.h" |
| 35 | #include "cgen/basic-modes.h" |
| 36 | #include "opintl.h" |
| 37 | #include "safe-ctype.h" |
| 38 | |
| 39 | #undef min |
| 40 | #define min(a,b) ((a) < (b) ? (a) : (b)) |
| 41 | #undef max |
| 42 | #define max(a,b) ((a) > (b) ? (a) : (b)) |
| 43 | |
| 44 | /* Used by the ifield rtx function. */ |
| 45 | #define FLD(f) (fields->f) |
| 46 | |
| 47 | static const char * insert_normal |
| 48 | (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, |
| 49 | unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); |
| 50 | static const char * insert_insn_normal |
| 51 | (CGEN_CPU_DESC, const CGEN_INSN *, |
| 52 | CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 53 | static int extract_normal |
| 54 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, |
| 55 | unsigned int, unsigned int, unsigned int, unsigned int, |
| 56 | unsigned int, unsigned int, bfd_vma, long *); |
| 57 | static int extract_insn_normal |
| 58 | (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, |
| 59 | CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 60 | #if CGEN_INT_INSN_P |
| 61 | static void put_insn_int_value |
| 62 | (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); |
| 63 | #endif |
| 64 | #if ! CGEN_INT_INSN_P |
| 65 | static CGEN_INLINE void insert_1 |
| 66 | (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); |
| 67 | static CGEN_INLINE int fill_cache |
| 68 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); |
| 69 | static CGEN_INLINE long extract_1 |
| 70 | (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); |
| 71 | #endif |
| 72 | \f |
| 73 | /* Operand insertion. */ |
| 74 | |
| 75 | #if ! CGEN_INT_INSN_P |
| 76 | |
| 77 | /* Subroutine of insert_normal. */ |
| 78 | |
| 79 | static CGEN_INLINE void |
| 80 | insert_1 (CGEN_CPU_DESC cd, |
| 81 | unsigned long value, |
| 82 | int start, |
| 83 | int length, |
| 84 | int word_length, |
| 85 | unsigned char *bufp) |
| 86 | { |
| 87 | unsigned long x,mask; |
| 88 | int shift; |
| 89 | |
| 90 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 91 | |
| 92 | /* Written this way to avoid undefined behaviour. */ |
| 93 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 94 | if (CGEN_INSN_LSB0_P) |
| 95 | shift = (start + 1) - length; |
| 96 | else |
| 97 | shift = (word_length - (start + length)); |
| 98 | x = (x & ~(mask << shift)) | ((value & mask) << shift); |
| 99 | |
| 100 | cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); |
| 101 | } |
| 102 | |
| 103 | #endif /* ! CGEN_INT_INSN_P */ |
| 104 | |
| 105 | /* Default insertion routine. |
| 106 | |
| 107 | ATTRS is a mask of the boolean attributes. |
| 108 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 109 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 110 | START is the starting bit number in the word, architecture origin. |
| 111 | LENGTH is the length of VALUE in bits. |
| 112 | TOTAL_LENGTH is the total length of the insn in bits. |
| 113 | |
| 114 | The result is an error message or NULL if success. */ |
| 115 | |
| 116 | /* ??? This duplicates functionality with bfd's howto table and |
| 117 | bfd_install_relocation. */ |
| 118 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 119 | necessary. */ |
| 120 | |
| 121 | static const char * |
| 122 | insert_normal (CGEN_CPU_DESC cd, |
| 123 | long value, |
| 124 | unsigned int attrs, |
| 125 | unsigned int word_offset, |
| 126 | unsigned int start, |
| 127 | unsigned int length, |
| 128 | unsigned int word_length, |
| 129 | unsigned int total_length, |
| 130 | CGEN_INSN_BYTES_PTR buffer) |
| 131 | { |
| 132 | static char errbuf[100]; |
| 133 | /* Written this way to avoid undefined behaviour. */ |
| 134 | unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 135 | |
| 136 | /* If LENGTH is zero, this operand doesn't contribute to the value. */ |
| 137 | if (length == 0) |
| 138 | return NULL; |
| 139 | |
| 140 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 141 | abort (); |
| 142 | |
| 143 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 144 | word_length may be too big. */ |
| 145 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 146 | { |
| 147 | if (word_offset == 0 |
| 148 | && word_length > total_length) |
| 149 | word_length = total_length; |
| 150 | } |
| 151 | |
| 152 | /* Ensure VALUE will fit. */ |
| 153 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) |
| 154 | { |
| 155 | long minval = - (1L << (length - 1)); |
| 156 | unsigned long maxval = mask; |
| 157 | |
| 158 | if ((value > 0 && (unsigned long) value > maxval) |
| 159 | || value < minval) |
| 160 | { |
| 161 | /* xgettext:c-format */ |
| 162 | sprintf (errbuf, |
| 163 | _("operand out of range (%ld not between %ld and %lu)"), |
| 164 | value, minval, maxval); |
| 165 | return errbuf; |
| 166 | } |
| 167 | } |
| 168 | else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) |
| 169 | { |
| 170 | unsigned long maxval = mask; |
| 171 | unsigned long val = (unsigned long) value; |
| 172 | |
| 173 | /* For hosts with a word size > 32 check to see if value has been sign |
| 174 | extended beyond 32 bits. If so then ignore these higher sign bits |
| 175 | as the user is attempting to store a 32-bit signed value into an |
| 176 | unsigned 32-bit field which is allowed. */ |
| 177 | if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) |
| 178 | val &= 0xFFFFFFFF; |
| 179 | |
| 180 | if (val > maxval) |
| 181 | { |
| 182 | /* xgettext:c-format */ |
| 183 | sprintf (errbuf, |
| 184 | _("operand out of range (0x%lx not between 0 and 0x%lx)"), |
| 185 | val, maxval); |
| 186 | return errbuf; |
| 187 | } |
| 188 | } |
| 189 | else |
| 190 | { |
| 191 | if (! cgen_signed_overflow_ok_p (cd)) |
| 192 | { |
| 193 | long minval = - (1L << (length - 1)); |
| 194 | long maxval = (1L << (length - 1)) - 1; |
| 195 | |
| 196 | if (value < minval || value > maxval) |
| 197 | { |
| 198 | sprintf |
| 199 | /* xgettext:c-format */ |
| 200 | (errbuf, _("operand out of range (%ld not between %ld and %ld)"), |
| 201 | value, minval, maxval); |
| 202 | return errbuf; |
| 203 | } |
| 204 | } |
| 205 | } |
| 206 | |
| 207 | #if CGEN_INT_INSN_P |
| 208 | |
| 209 | { |
| 210 | int shift; |
| 211 | |
| 212 | if (CGEN_INSN_LSB0_P) |
| 213 | shift = (word_offset + start + 1) - length; |
| 214 | else |
| 215 | shift = total_length - (word_offset + start + length); |
| 216 | *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); |
| 217 | } |
| 218 | |
| 219 | #else /* ! CGEN_INT_INSN_P */ |
| 220 | |
| 221 | { |
| 222 | unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; |
| 223 | |
| 224 | insert_1 (cd, value, start, length, word_length, bufp); |
| 225 | } |
| 226 | |
| 227 | #endif /* ! CGEN_INT_INSN_P */ |
| 228 | |
| 229 | return NULL; |
| 230 | } |
| 231 | |
| 232 | /* Default insn builder (insert handler). |
| 233 | The instruction is recorded in CGEN_INT_INSN_P byte order (meaning |
| 234 | that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is |
| 235 | recorded in host byte order, otherwise BUFFER is an array of bytes |
| 236 | and the value is recorded in target byte order). |
| 237 | The result is an error message or NULL if success. */ |
| 238 | |
| 239 | static const char * |
| 240 | insert_insn_normal (CGEN_CPU_DESC cd, |
| 241 | const CGEN_INSN * insn, |
| 242 | CGEN_FIELDS * fields, |
| 243 | CGEN_INSN_BYTES_PTR buffer, |
| 244 | bfd_vma pc) |
| 245 | { |
| 246 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 247 | unsigned long value; |
| 248 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
| 249 | |
| 250 | CGEN_INIT_INSERT (cd); |
| 251 | value = CGEN_INSN_BASE_VALUE (insn); |
| 252 | |
| 253 | /* If we're recording insns as numbers (rather than a string of bytes), |
| 254 | target byte order handling is deferred until later. */ |
| 255 | |
| 256 | #if CGEN_INT_INSN_P |
| 257 | |
| 258 | put_insn_int_value (cd, buffer, cd->base_insn_bitsize, |
| 259 | CGEN_FIELDS_BITSIZE (fields), value); |
| 260 | |
| 261 | #else |
| 262 | |
| 263 | cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, |
| 264 | (unsigned) CGEN_FIELDS_BITSIZE (fields)), |
| 265 | value); |
| 266 | |
| 267 | #endif /* ! CGEN_INT_INSN_P */ |
| 268 | |
| 269 | /* ??? It would be better to scan the format's fields. |
| 270 | Still need to be able to insert a value based on the operand though; |
| 271 | e.g. storing a branch displacement that got resolved later. |
| 272 | Needs more thought first. */ |
| 273 | |
| 274 | for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) |
| 275 | { |
| 276 | const char *errmsg; |
| 277 | |
| 278 | if (CGEN_SYNTAX_CHAR_P (* syn)) |
| 279 | continue; |
| 280 | |
| 281 | errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 282 | fields, buffer, pc); |
| 283 | if (errmsg) |
| 284 | return errmsg; |
| 285 | } |
| 286 | |
| 287 | return NULL; |
| 288 | } |
| 289 | |
| 290 | #if CGEN_INT_INSN_P |
| 291 | /* Cover function to store an insn value into an integral insn. Must go here |
| 292 | because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ |
| 293 | |
| 294 | static void |
| 295 | put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 296 | CGEN_INSN_BYTES_PTR buf, |
| 297 | int length, |
| 298 | int insn_length, |
| 299 | CGEN_INSN_INT value) |
| 300 | { |
| 301 | /* For architectures with insns smaller than the base-insn-bitsize, |
| 302 | length may be too big. */ |
| 303 | if (length > insn_length) |
| 304 | *buf = value; |
| 305 | else |
| 306 | { |
| 307 | int shift = insn_length - length; |
| 308 | /* Written this way to avoid undefined behaviour. */ |
| 309 | CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 310 | |
| 311 | *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); |
| 312 | } |
| 313 | } |
| 314 | #endif |
| 315 | \f |
| 316 | /* Operand extraction. */ |
| 317 | |
| 318 | #if ! CGEN_INT_INSN_P |
| 319 | |
| 320 | /* Subroutine of extract_normal. |
| 321 | Ensure sufficient bytes are cached in EX_INFO. |
| 322 | OFFSET is the offset in bytes from the start of the insn of the value. |
| 323 | BYTES is the length of the needed value. |
| 324 | Returns 1 for success, 0 for failure. */ |
| 325 | |
| 326 | static CGEN_INLINE int |
| 327 | fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 328 | CGEN_EXTRACT_INFO *ex_info, |
| 329 | int offset, |
| 330 | int bytes, |
| 331 | bfd_vma pc) |
| 332 | { |
| 333 | /* It's doubtful that the middle part has already been fetched so |
| 334 | we don't optimize that case. kiss. */ |
| 335 | unsigned int mask; |
| 336 | disassemble_info *info = (disassemble_info *) ex_info->dis_info; |
| 337 | |
| 338 | /* First do a quick check. */ |
| 339 | mask = (1 << bytes) - 1; |
| 340 | if (((ex_info->valid >> offset) & mask) == mask) |
| 341 | return 1; |
| 342 | |
| 343 | /* Search for the first byte we need to read. */ |
| 344 | for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) |
| 345 | if (! (mask & ex_info->valid)) |
| 346 | break; |
| 347 | |
| 348 | if (bytes) |
| 349 | { |
| 350 | int status; |
| 351 | |
| 352 | pc += offset; |
| 353 | status = (*info->read_memory_func) |
| 354 | (pc, ex_info->insn_bytes + offset, bytes, info); |
| 355 | |
| 356 | if (status != 0) |
| 357 | { |
| 358 | (*info->memory_error_func) (status, pc, info); |
| 359 | return 0; |
| 360 | } |
| 361 | |
| 362 | ex_info->valid |= ((1 << bytes) - 1) << offset; |
| 363 | } |
| 364 | |
| 365 | return 1; |
| 366 | } |
| 367 | |
| 368 | /* Subroutine of extract_normal. */ |
| 369 | |
| 370 | static CGEN_INLINE long |
| 371 | extract_1 (CGEN_CPU_DESC cd, |
| 372 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 373 | int start, |
| 374 | int length, |
| 375 | int word_length, |
| 376 | unsigned char *bufp, |
| 377 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 378 | { |
| 379 | unsigned long x; |
| 380 | int shift; |
| 381 | |
| 382 | x = cgen_get_insn_value (cd, bufp, word_length); |
| 383 | |
| 384 | if (CGEN_INSN_LSB0_P) |
| 385 | shift = (start + 1) - length; |
| 386 | else |
| 387 | shift = (word_length - (start + length)); |
| 388 | return x >> shift; |
| 389 | } |
| 390 | |
| 391 | #endif /* ! CGEN_INT_INSN_P */ |
| 392 | |
| 393 | /* Default extraction routine. |
| 394 | |
| 395 | INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, |
| 396 | or sometimes less for cases like the m32r where the base insn size is 32 |
| 397 | but some insns are 16 bits. |
| 398 | ATTRS is a mask of the boolean attributes. We only need `SIGNED', |
| 399 | but for generality we take a bitmask of all of them. |
| 400 | WORD_OFFSET is the offset in bits from the start of the insn of the value. |
| 401 | WORD_LENGTH is the length of the word in bits in which the value resides. |
| 402 | START is the starting bit number in the word, architecture origin. |
| 403 | LENGTH is the length of VALUE in bits. |
| 404 | TOTAL_LENGTH is the total length of the insn in bits. |
| 405 | |
| 406 | Returns 1 for success, 0 for failure. */ |
| 407 | |
| 408 | /* ??? The return code isn't properly used. wip. */ |
| 409 | |
| 410 | /* ??? This doesn't handle bfd_vma's. Create another function when |
| 411 | necessary. */ |
| 412 | |
| 413 | static int |
| 414 | extract_normal (CGEN_CPU_DESC cd, |
| 415 | #if ! CGEN_INT_INSN_P |
| 416 | CGEN_EXTRACT_INFO *ex_info, |
| 417 | #else |
| 418 | CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, |
| 419 | #endif |
| 420 | CGEN_INSN_INT insn_value, |
| 421 | unsigned int attrs, |
| 422 | unsigned int word_offset, |
| 423 | unsigned int start, |
| 424 | unsigned int length, |
| 425 | unsigned int word_length, |
| 426 | unsigned int total_length, |
| 427 | #if ! CGEN_INT_INSN_P |
| 428 | bfd_vma pc, |
| 429 | #else |
| 430 | bfd_vma pc ATTRIBUTE_UNUSED, |
| 431 | #endif |
| 432 | long *valuep) |
| 433 | { |
| 434 | long value, mask; |
| 435 | |
| 436 | /* If LENGTH is zero, this operand doesn't contribute to the value |
| 437 | so give it a standard value of zero. */ |
| 438 | if (length == 0) |
| 439 | { |
| 440 | *valuep = 0; |
| 441 | return 1; |
| 442 | } |
| 443 | |
| 444 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 445 | abort (); |
| 446 | |
| 447 | /* For architectures with insns smaller than the insn-base-bitsize, |
| 448 | word_length may be too big. */ |
| 449 | if (cd->min_insn_bitsize < cd->base_insn_bitsize) |
| 450 | { |
| 451 | if (word_offset + word_length > total_length) |
| 452 | word_length = total_length - word_offset; |
| 453 | } |
| 454 | |
| 455 | /* Does the value reside in INSN_VALUE, and at the right alignment? */ |
| 456 | |
| 457 | if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) |
| 458 | { |
| 459 | if (CGEN_INSN_LSB0_P) |
| 460 | value = insn_value >> ((word_offset + start + 1) - length); |
| 461 | else |
| 462 | value = insn_value >> (total_length - ( word_offset + start + length)); |
| 463 | } |
| 464 | |
| 465 | #if ! CGEN_INT_INSN_P |
| 466 | |
| 467 | else |
| 468 | { |
| 469 | unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; |
| 470 | |
| 471 | if (word_length > 8 * sizeof (CGEN_INSN_INT)) |
| 472 | abort (); |
| 473 | |
| 474 | if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) |
| 475 | return 0; |
| 476 | |
| 477 | value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); |
| 478 | } |
| 479 | |
| 480 | #endif /* ! CGEN_INT_INSN_P */ |
| 481 | |
| 482 | /* Written this way to avoid undefined behaviour. */ |
| 483 | mask = (((1L << (length - 1)) - 1) << 1) | 1; |
| 484 | |
| 485 | value &= mask; |
| 486 | /* sign extend? */ |
| 487 | if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) |
| 488 | && (value & (1L << (length - 1)))) |
| 489 | value |= ~mask; |
| 490 | |
| 491 | *valuep = value; |
| 492 | |
| 493 | return 1; |
| 494 | } |
| 495 | |
| 496 | /* Default insn extractor. |
| 497 | |
| 498 | INSN_VALUE is the first base_insn_bitsize bits, translated to host order. |
| 499 | The extracted fields are stored in FIELDS. |
| 500 | EX_INFO is used to handle reading variable length insns. |
| 501 | Return the length of the insn in bits, or 0 if no match, |
| 502 | or -1 if an error occurs fetching data (memory_error_func will have |
| 503 | been called). */ |
| 504 | |
| 505 | static int |
| 506 | extract_insn_normal (CGEN_CPU_DESC cd, |
| 507 | const CGEN_INSN *insn, |
| 508 | CGEN_EXTRACT_INFO *ex_info, |
| 509 | CGEN_INSN_INT insn_value, |
| 510 | CGEN_FIELDS *fields, |
| 511 | bfd_vma pc) |
| 512 | { |
| 513 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); |
| 514 | const CGEN_SYNTAX_CHAR_TYPE *syn; |
| 515 | |
| 516 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); |
| 517 | |
| 518 | CGEN_INIT_EXTRACT (cd); |
| 519 | |
| 520 | for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) |
| 521 | { |
| 522 | int length; |
| 523 | |
| 524 | if (CGEN_SYNTAX_CHAR_P (*syn)) |
| 525 | continue; |
| 526 | |
| 527 | length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), |
| 528 | ex_info, insn_value, fields, pc); |
| 529 | if (length <= 0) |
| 530 | return length; |
| 531 | } |
| 532 | |
| 533 | /* We recognized and successfully extracted this insn. */ |
| 534 | return CGEN_INSN_BITSIZE (insn); |
| 535 | } |
| 536 | \f |
| 537 | /* Machine generated code added here. */ |
| 538 | |
| 539 | const char * mep_cgen_insert_operand |
| 540 | (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); |
| 541 | |
| 542 | /* Main entry point for operand insertion. |
| 543 | |
| 544 | This function is basically just a big switch statement. Earlier versions |
| 545 | used tables to look up the function to use, but |
| 546 | - if the table contains both assembler and disassembler functions then |
| 547 | the disassembler contains much of the assembler and vice-versa, |
| 548 | - there's a lot of inlining possibilities as things grow, |
| 549 | - using a switch statement avoids the function call overhead. |
| 550 | |
| 551 | This function could be moved into `parse_insn_normal', but keeping it |
| 552 | separate makes clear the interface between `parse_insn_normal' and each of |
| 553 | the handlers. It's also needed by GAS to insert operands that couldn't be |
| 554 | resolved during parsing. */ |
| 555 | |
| 556 | const char * |
| 557 | mep_cgen_insert_operand (CGEN_CPU_DESC cd, |
| 558 | int opindex, |
| 559 | CGEN_FIELDS * fields, |
| 560 | CGEN_INSN_BYTES_PTR buffer, |
| 561 | bfd_vma pc ATTRIBUTE_UNUSED) |
| 562 | { |
| 563 | const char * errmsg = NULL; |
| 564 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 565 | |
| 566 | switch (opindex) |
| 567 | { |
| 568 | case MEP_OPERAND_ADDR24A4 : |
| 569 | { |
| 570 | { |
| 571 | FLD (f_24u8a4n_hi) = ((UINT) (FLD (f_24u8a4n)) >> (8)); |
| 572 | FLD (f_24u8a4n_lo) = ((UINT) (((FLD (f_24u8a4n)) & (252))) >> (2)); |
| 573 | } |
| 574 | errmsg = insert_normal (cd, fields->f_24u8a4n_hi, 0, 0, 16, 16, 32, total_length, buffer); |
| 575 | if (errmsg) |
| 576 | break; |
| 577 | errmsg = insert_normal (cd, fields->f_24u8a4n_lo, 0, 0, 8, 6, 32, total_length, buffer); |
| 578 | if (errmsg) |
| 579 | break; |
| 580 | } |
| 581 | break; |
| 582 | case MEP_OPERAND_C5RMUIMM20 : |
| 583 | { |
| 584 | { |
| 585 | FLD (f_c5_rm) = ((UINT) (FLD (f_c5_rmuimm20)) >> (16)); |
| 586 | FLD (f_c5_16u16) = ((FLD (f_c5_rmuimm20)) & (65535)); |
| 587 | } |
| 588 | errmsg = insert_normal (cd, fields->f_c5_rm, 0, 0, 8, 4, 32, total_length, buffer); |
| 589 | if (errmsg) |
| 590 | break; |
| 591 | errmsg = insert_normal (cd, fields->f_c5_16u16, 0, 0, 16, 16, 32, total_length, buffer); |
| 592 | if (errmsg) |
| 593 | break; |
| 594 | } |
| 595 | break; |
| 596 | case MEP_OPERAND_C5RNMUIMM24 : |
| 597 | { |
| 598 | { |
| 599 | FLD (f_c5_rnm) = ((UINT) (FLD (f_c5_rnmuimm24)) >> (16)); |
| 600 | FLD (f_c5_16u16) = ((FLD (f_c5_rnmuimm24)) & (65535)); |
| 601 | } |
| 602 | errmsg = insert_normal (cd, fields->f_c5_rnm, 0, 0, 4, 8, 32, total_length, buffer); |
| 603 | if (errmsg) |
| 604 | break; |
| 605 | errmsg = insert_normal (cd, fields->f_c5_16u16, 0, 0, 16, 16, 32, total_length, buffer); |
| 606 | if (errmsg) |
| 607 | break; |
| 608 | } |
| 609 | break; |
| 610 | case MEP_OPERAND_CALLNUM : |
| 611 | { |
| 612 | { |
| 613 | FLD (f_5) = ((((UINT) (FLD (f_callnum)) >> (3))) & (1)); |
| 614 | FLD (f_6) = ((((UINT) (FLD (f_callnum)) >> (2))) & (1)); |
| 615 | FLD (f_7) = ((((UINT) (FLD (f_callnum)) >> (1))) & (1)); |
| 616 | FLD (f_11) = ((FLD (f_callnum)) & (1)); |
| 617 | } |
| 618 | errmsg = insert_normal (cd, fields->f_5, 0, 0, 5, 1, 32, total_length, buffer); |
| 619 | if (errmsg) |
| 620 | break; |
| 621 | errmsg = insert_normal (cd, fields->f_6, 0, 0, 6, 1, 32, total_length, buffer); |
| 622 | if (errmsg) |
| 623 | break; |
| 624 | errmsg = insert_normal (cd, fields->f_7, 0, 0, 7, 1, 32, total_length, buffer); |
| 625 | if (errmsg) |
| 626 | break; |
| 627 | errmsg = insert_normal (cd, fields->f_11, 0, 0, 11, 1, 32, total_length, buffer); |
| 628 | if (errmsg) |
| 629 | break; |
| 630 | } |
| 631 | break; |
| 632 | case MEP_OPERAND_CCCC : |
| 633 | errmsg = insert_normal (cd, fields->f_rm, 0, 0, 8, 4, 32, total_length, buffer); |
| 634 | break; |
| 635 | case MEP_OPERAND_CCRN : |
| 636 | { |
| 637 | { |
| 638 | FLD (f_ccrn_hi) = ((((UINT) (FLD (f_ccrn)) >> (4))) & (3)); |
| 639 | FLD (f_ccrn_lo) = ((FLD (f_ccrn)) & (15)); |
| 640 | } |
| 641 | errmsg = insert_normal (cd, fields->f_ccrn_hi, 0, 0, 28, 2, 32, total_length, buffer); |
| 642 | if (errmsg) |
| 643 | break; |
| 644 | errmsg = insert_normal (cd, fields->f_ccrn_lo, 0, 0, 4, 4, 32, total_length, buffer); |
| 645 | if (errmsg) |
| 646 | break; |
| 647 | } |
| 648 | break; |
| 649 | case MEP_OPERAND_CDISP10 : |
| 650 | { |
| 651 | long value = fields->f_cdisp10; |
| 652 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 653 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); |
| 654 | } |
| 655 | break; |
| 656 | case MEP_OPERAND_CDISP10A2 : |
| 657 | { |
| 658 | long value = fields->f_cdisp10; |
| 659 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 660 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); |
| 661 | } |
| 662 | break; |
| 663 | case MEP_OPERAND_CDISP10A4 : |
| 664 | { |
| 665 | long value = fields->f_cdisp10; |
| 666 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 667 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); |
| 668 | } |
| 669 | break; |
| 670 | case MEP_OPERAND_CDISP10A8 : |
| 671 | { |
| 672 | long value = fields->f_cdisp10; |
| 673 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 674 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, buffer); |
| 675 | } |
| 676 | break; |
| 677 | case MEP_OPERAND_CDISP12 : |
| 678 | errmsg = insert_normal (cd, fields->f_12s20, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, buffer); |
| 679 | break; |
| 680 | case MEP_OPERAND_CIMM4 : |
| 681 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 682 | break; |
| 683 | case MEP_OPERAND_CIMM5 : |
| 684 | errmsg = insert_normal (cd, fields->f_5u24, 0, 0, 24, 5, 32, total_length, buffer); |
| 685 | break; |
| 686 | case MEP_OPERAND_CODE16 : |
| 687 | errmsg = insert_normal (cd, fields->f_16u16, 0, 0, 16, 16, 32, total_length, buffer); |
| 688 | break; |
| 689 | case MEP_OPERAND_CODE24 : |
| 690 | { |
| 691 | { |
| 692 | FLD (f_24u4n_hi) = ((UINT) (FLD (f_24u4n)) >> (16)); |
| 693 | FLD (f_24u4n_lo) = ((FLD (f_24u4n)) & (65535)); |
| 694 | } |
| 695 | errmsg = insert_normal (cd, fields->f_24u4n_hi, 0, 0, 4, 8, 32, total_length, buffer); |
| 696 | if (errmsg) |
| 697 | break; |
| 698 | errmsg = insert_normal (cd, fields->f_24u4n_lo, 0, 0, 16, 16, 32, total_length, buffer); |
| 699 | if (errmsg) |
| 700 | break; |
| 701 | } |
| 702 | break; |
| 703 | case MEP_OPERAND_CP_FLAG : |
| 704 | break; |
| 705 | case MEP_OPERAND_CRN : |
| 706 | errmsg = insert_normal (cd, fields->f_crn, 0, 0, 4, 4, 32, total_length, buffer); |
| 707 | break; |
| 708 | case MEP_OPERAND_CRN64 : |
| 709 | errmsg = insert_normal (cd, fields->f_crn, 0, 0, 4, 4, 32, total_length, buffer); |
| 710 | break; |
| 711 | case MEP_OPERAND_CRNX : |
| 712 | { |
| 713 | { |
| 714 | FLD (f_crnx_lo) = ((FLD (f_crnx)) & (15)); |
| 715 | FLD (f_crnx_hi) = ((UINT) (FLD (f_crnx)) >> (4)); |
| 716 | } |
| 717 | errmsg = insert_normal (cd, fields->f_crnx_hi, 0, 0, 28, 1, 32, total_length, buffer); |
| 718 | if (errmsg) |
| 719 | break; |
| 720 | errmsg = insert_normal (cd, fields->f_crnx_lo, 0, 0, 4, 4, 32, total_length, buffer); |
| 721 | if (errmsg) |
| 722 | break; |
| 723 | } |
| 724 | break; |
| 725 | case MEP_OPERAND_CRNX64 : |
| 726 | { |
| 727 | { |
| 728 | FLD (f_crnx_lo) = ((FLD (f_crnx)) & (15)); |
| 729 | FLD (f_crnx_hi) = ((UINT) (FLD (f_crnx)) >> (4)); |
| 730 | } |
| 731 | errmsg = insert_normal (cd, fields->f_crnx_hi, 0, 0, 28, 1, 32, total_length, buffer); |
| 732 | if (errmsg) |
| 733 | break; |
| 734 | errmsg = insert_normal (cd, fields->f_crnx_lo, 0, 0, 4, 4, 32, total_length, buffer); |
| 735 | if (errmsg) |
| 736 | break; |
| 737 | } |
| 738 | break; |
| 739 | case MEP_OPERAND_CROC : |
| 740 | errmsg = insert_normal (cd, fields->f_ivc2_5u7, 0, 0, 7, 5, 32, total_length, buffer); |
| 741 | break; |
| 742 | case MEP_OPERAND_CROP : |
| 743 | errmsg = insert_normal (cd, fields->f_ivc2_5u23, 0, 0, 23, 5, 32, total_length, buffer); |
| 744 | break; |
| 745 | case MEP_OPERAND_CRPC : |
| 746 | errmsg = insert_normal (cd, fields->f_ivc2_5u26, 0, 0, 26, 5, 32, total_length, buffer); |
| 747 | break; |
| 748 | case MEP_OPERAND_CRPP : |
| 749 | errmsg = insert_normal (cd, fields->f_ivc2_5u18, 0, 0, 18, 5, 32, total_length, buffer); |
| 750 | break; |
| 751 | case MEP_OPERAND_CRQC : |
| 752 | errmsg = insert_normal (cd, fields->f_ivc2_5u21, 0, 0, 21, 5, 32, total_length, buffer); |
| 753 | break; |
| 754 | case MEP_OPERAND_CRQP : |
| 755 | errmsg = insert_normal (cd, fields->f_ivc2_5u13, 0, 0, 13, 5, 32, total_length, buffer); |
| 756 | break; |
| 757 | case MEP_OPERAND_CSRN : |
| 758 | { |
| 759 | { |
| 760 | FLD (f_csrn_lo) = ((FLD (f_csrn)) & (15)); |
| 761 | FLD (f_csrn_hi) = ((UINT) (FLD (f_csrn)) >> (4)); |
| 762 | } |
| 763 | errmsg = insert_normal (cd, fields->f_csrn_hi, 0, 0, 15, 1, 32, total_length, buffer); |
| 764 | if (errmsg) |
| 765 | break; |
| 766 | errmsg = insert_normal (cd, fields->f_csrn_lo, 0, 0, 8, 4, 32, total_length, buffer); |
| 767 | if (errmsg) |
| 768 | break; |
| 769 | } |
| 770 | break; |
| 771 | case MEP_OPERAND_CSRN_IDX : |
| 772 | { |
| 773 | { |
| 774 | FLD (f_csrn_lo) = ((FLD (f_csrn)) & (15)); |
| 775 | FLD (f_csrn_hi) = ((UINT) (FLD (f_csrn)) >> (4)); |
| 776 | } |
| 777 | errmsg = insert_normal (cd, fields->f_csrn_hi, 0, 0, 15, 1, 32, total_length, buffer); |
| 778 | if (errmsg) |
| 779 | break; |
| 780 | errmsg = insert_normal (cd, fields->f_csrn_lo, 0, 0, 8, 4, 32, total_length, buffer); |
| 781 | if (errmsg) |
| 782 | break; |
| 783 | } |
| 784 | break; |
| 785 | case MEP_OPERAND_DBG : |
| 786 | break; |
| 787 | case MEP_OPERAND_DEPC : |
| 788 | break; |
| 789 | case MEP_OPERAND_EPC : |
| 790 | break; |
| 791 | case MEP_OPERAND_EXC : |
| 792 | break; |
| 793 | case MEP_OPERAND_HI : |
| 794 | break; |
| 795 | case MEP_OPERAND_IMM16P0 : |
| 796 | { |
| 797 | { |
| 798 | FLD (f_ivc2_8u0) = ((((UINT) (FLD (f_ivc2_imm16p0)) >> (8))) & (255)); |
| 799 | FLD (f_ivc2_8u20) = ((FLD (f_ivc2_imm16p0)) & (255)); |
| 800 | } |
| 801 | errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer); |
| 802 | if (errmsg) |
| 803 | break; |
| 804 | errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer); |
| 805 | if (errmsg) |
| 806 | break; |
| 807 | } |
| 808 | break; |
| 809 | case MEP_OPERAND_IMM3P12 : |
| 810 | errmsg = insert_normal (cd, fields->f_ivc2_3u12, 0, 0, 12, 3, 32, total_length, buffer); |
| 811 | break; |
| 812 | case MEP_OPERAND_IMM3P25 : |
| 813 | errmsg = insert_normal (cd, fields->f_ivc2_3u25, 0, 0, 25, 3, 32, total_length, buffer); |
| 814 | break; |
| 815 | case MEP_OPERAND_IMM3P4 : |
| 816 | errmsg = insert_normal (cd, fields->f_ivc2_3u4, 0, 0, 4, 3, 32, total_length, buffer); |
| 817 | break; |
| 818 | case MEP_OPERAND_IMM3P5 : |
| 819 | errmsg = insert_normal (cd, fields->f_ivc2_3u5, 0, 0, 5, 3, 32, total_length, buffer); |
| 820 | break; |
| 821 | case MEP_OPERAND_IMM3P9 : |
| 822 | errmsg = insert_normal (cd, fields->f_ivc2_3u9, 0, 0, 9, 3, 32, total_length, buffer); |
| 823 | break; |
| 824 | case MEP_OPERAND_IMM4P10 : |
| 825 | errmsg = insert_normal (cd, fields->f_ivc2_4u10, 0, 0, 10, 4, 32, total_length, buffer); |
| 826 | break; |
| 827 | case MEP_OPERAND_IMM4P4 : |
| 828 | errmsg = insert_normal (cd, fields->f_ivc2_4u4, 0, 0, 4, 4, 32, total_length, buffer); |
| 829 | break; |
| 830 | case MEP_OPERAND_IMM4P8 : |
| 831 | errmsg = insert_normal (cd, fields->f_ivc2_4u8, 0, 0, 8, 4, 32, total_length, buffer); |
| 832 | break; |
| 833 | case MEP_OPERAND_IMM5P23 : |
| 834 | errmsg = insert_normal (cd, fields->f_ivc2_5u23, 0, 0, 23, 5, 32, total_length, buffer); |
| 835 | break; |
| 836 | case MEP_OPERAND_IMM5P3 : |
| 837 | errmsg = insert_normal (cd, fields->f_ivc2_5u3, 0, 0, 3, 5, 32, total_length, buffer); |
| 838 | break; |
| 839 | case MEP_OPERAND_IMM5P7 : |
| 840 | errmsg = insert_normal (cd, fields->f_ivc2_5u7, 0, 0, 7, 5, 32, total_length, buffer); |
| 841 | break; |
| 842 | case MEP_OPERAND_IMM5P8 : |
| 843 | errmsg = insert_normal (cd, fields->f_ivc2_5u8, 0, 0, 8, 5, 32, total_length, buffer); |
| 844 | break; |
| 845 | case MEP_OPERAND_IMM6P2 : |
| 846 | errmsg = insert_normal (cd, fields->f_ivc2_6u2, 0, 0, 2, 6, 32, total_length, buffer); |
| 847 | break; |
| 848 | case MEP_OPERAND_IMM6P6 : |
| 849 | errmsg = insert_normal (cd, fields->f_ivc2_6u6, 0, 0, 6, 6, 32, total_length, buffer); |
| 850 | break; |
| 851 | case MEP_OPERAND_IMM8P0 : |
| 852 | errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer); |
| 853 | break; |
| 854 | case MEP_OPERAND_IMM8P20 : |
| 855 | errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer); |
| 856 | break; |
| 857 | case MEP_OPERAND_IMM8P4 : |
| 858 | errmsg = insert_normal (cd, fields->f_ivc2_8u4, 0, 0, 4, 8, 32, total_length, buffer); |
| 859 | break; |
| 860 | case MEP_OPERAND_IVC_X_0_2 : |
| 861 | errmsg = insert_normal (cd, fields->f_ivc2_2u0, 0, 0, 0, 2, 32, total_length, buffer); |
| 862 | break; |
| 863 | case MEP_OPERAND_IVC_X_0_3 : |
| 864 | errmsg = insert_normal (cd, fields->f_ivc2_3u0, 0, 0, 0, 3, 32, total_length, buffer); |
| 865 | break; |
| 866 | case MEP_OPERAND_IVC_X_0_4 : |
| 867 | errmsg = insert_normal (cd, fields->f_ivc2_4u0, 0, 0, 0, 4, 32, total_length, buffer); |
| 868 | break; |
| 869 | case MEP_OPERAND_IVC_X_0_5 : |
| 870 | errmsg = insert_normal (cd, fields->f_ivc2_5u0, 0, 0, 0, 5, 32, total_length, buffer); |
| 871 | break; |
| 872 | case MEP_OPERAND_IVC_X_6_1 : |
| 873 | errmsg = insert_normal (cd, fields->f_ivc2_1u6, 0, 0, 6, 1, 32, total_length, buffer); |
| 874 | break; |
| 875 | case MEP_OPERAND_IVC_X_6_2 : |
| 876 | errmsg = insert_normal (cd, fields->f_ivc2_2u6, 0, 0, 6, 2, 32, total_length, buffer); |
| 877 | break; |
| 878 | case MEP_OPERAND_IVC_X_6_3 : |
| 879 | errmsg = insert_normal (cd, fields->f_ivc2_3u6, 0, 0, 6, 3, 32, total_length, buffer); |
| 880 | break; |
| 881 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 882 | break; |
| 883 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 884 | break; |
| 885 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 886 | break; |
| 887 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 888 | break; |
| 889 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 890 | break; |
| 891 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 892 | break; |
| 893 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 894 | break; |
| 895 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 896 | break; |
| 897 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 898 | break; |
| 899 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 900 | break; |
| 901 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 902 | break; |
| 903 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 904 | break; |
| 905 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 906 | break; |
| 907 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 908 | break; |
| 909 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 910 | break; |
| 911 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 912 | break; |
| 913 | case MEP_OPERAND_IVC2_CC : |
| 914 | break; |
| 915 | case MEP_OPERAND_IVC2_COFA0 : |
| 916 | break; |
| 917 | case MEP_OPERAND_IVC2_COFA1 : |
| 918 | break; |
| 919 | case MEP_OPERAND_IVC2_COFR0 : |
| 920 | break; |
| 921 | case MEP_OPERAND_IVC2_COFR1 : |
| 922 | break; |
| 923 | case MEP_OPERAND_IVC2_CSAR0 : |
| 924 | break; |
| 925 | case MEP_OPERAND_IVC2_CSAR1 : |
| 926 | break; |
| 927 | case MEP_OPERAND_IVC2C3CCRN : |
| 928 | { |
| 929 | { |
| 930 | FLD (f_ivc2_ccrn_c3hi) = ((((UINT) (FLD (f_ivc2_ccrn_c3)) >> (4))) & (3)); |
| 931 | FLD (f_ivc2_ccrn_c3lo) = ((FLD (f_ivc2_ccrn_c3)) & (15)); |
| 932 | } |
| 933 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_c3hi, 0, 0, 28, 2, 32, total_length, buffer); |
| 934 | if (errmsg) |
| 935 | break; |
| 936 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_c3lo, 0, 0, 4, 4, 32, total_length, buffer); |
| 937 | if (errmsg) |
| 938 | break; |
| 939 | } |
| 940 | break; |
| 941 | case MEP_OPERAND_IVC2CCRN : |
| 942 | { |
| 943 | { |
| 944 | FLD (f_ivc2_ccrn_h2) = ((((UINT) (FLD (f_ivc2_ccrn)) >> (4))) & (3)); |
| 945 | FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_ccrn)) & (15)); |
| 946 | } |
| 947 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h2, 0, 0, 20, 2, 32, total_length, buffer); |
| 948 | if (errmsg) |
| 949 | break; |
| 950 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_lo, 0, 0, 0, 4, 32, total_length, buffer); |
| 951 | if (errmsg) |
| 952 | break; |
| 953 | } |
| 954 | break; |
| 955 | case MEP_OPERAND_IVC2CRN : |
| 956 | { |
| 957 | { |
| 958 | FLD (f_ivc2_ccrn_h1) = ((((UINT) (FLD (f_ivc2_crnx)) >> (4))) & (1)); |
| 959 | FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_crnx)) & (15)); |
| 960 | } |
| 961 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h1, 0, 0, 20, 1, 32, total_length, buffer); |
| 962 | if (errmsg) |
| 963 | break; |
| 964 | errmsg = insert_normal (cd, fields->f_ivc2_ccrn_lo, 0, 0, 0, 4, 32, total_length, buffer); |
| 965 | if (errmsg) |
| 966 | break; |
| 967 | } |
| 968 | break; |
| 969 | case MEP_OPERAND_IVC2RM : |
| 970 | errmsg = insert_normal (cd, fields->f_ivc2_crm, 0, 0, 4, 4, 32, total_length, buffer); |
| 971 | break; |
| 972 | case MEP_OPERAND_LO : |
| 973 | break; |
| 974 | case MEP_OPERAND_LP : |
| 975 | break; |
| 976 | case MEP_OPERAND_MB0 : |
| 977 | break; |
| 978 | case MEP_OPERAND_MB1 : |
| 979 | break; |
| 980 | case MEP_OPERAND_ME0 : |
| 981 | break; |
| 982 | case MEP_OPERAND_ME1 : |
| 983 | break; |
| 984 | case MEP_OPERAND_NPC : |
| 985 | break; |
| 986 | case MEP_OPERAND_OPT : |
| 987 | break; |
| 988 | case MEP_OPERAND_PCABS24A2 : |
| 989 | { |
| 990 | { |
| 991 | FLD (f_24u5a2n_lo) = ((UINT) (((FLD (f_24u5a2n)) & (255))) >> (1)); |
| 992 | FLD (f_24u5a2n_hi) = ((UINT) (FLD (f_24u5a2n)) >> (8)); |
| 993 | } |
| 994 | errmsg = insert_normal (cd, fields->f_24u5a2n_hi, 0, 0, 16, 16, 32, total_length, buffer); |
| 995 | if (errmsg) |
| 996 | break; |
| 997 | errmsg = insert_normal (cd, fields->f_24u5a2n_lo, 0, 0, 5, 7, 32, total_length, buffer); |
| 998 | if (errmsg) |
| 999 | break; |
| 1000 | } |
| 1001 | break; |
| 1002 | case MEP_OPERAND_PCREL12A2 : |
| 1003 | { |
| 1004 | long value = fields->f_12s4a2; |
| 1005 | value = ((SI) (((value) - (pc))) >> (1)); |
| 1006 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, buffer); |
| 1007 | } |
| 1008 | break; |
| 1009 | case MEP_OPERAND_PCREL17A2 : |
| 1010 | { |
| 1011 | long value = fields->f_17s16a2; |
| 1012 | value = ((SI) (((value) - (pc))) >> (1)); |
| 1013 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer); |
| 1014 | } |
| 1015 | break; |
| 1016 | case MEP_OPERAND_PCREL24A2 : |
| 1017 | { |
| 1018 | { |
| 1019 | FLD (f_24s5a2n) = ((FLD (f_24s5a2n)) - (pc)); |
| 1020 | FLD (f_24s5a2n_lo) = ((UINT) (((FLD (f_24s5a2n)) & (254))) >> (1)); |
| 1021 | FLD (f_24s5a2n_hi) = ((INT) (FLD (f_24s5a2n)) >> (8)); |
| 1022 | } |
| 1023 | errmsg = insert_normal (cd, fields->f_24s5a2n_hi, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer); |
| 1024 | if (errmsg) |
| 1025 | break; |
| 1026 | errmsg = insert_normal (cd, fields->f_24s5a2n_lo, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 7, 32, total_length, buffer); |
| 1027 | if (errmsg) |
| 1028 | break; |
| 1029 | } |
| 1030 | break; |
| 1031 | case MEP_OPERAND_PCREL8A2 : |
| 1032 | { |
| 1033 | long value = fields->f_8s8a2; |
| 1034 | value = ((SI) (((value) - (pc))) >> (1)); |
| 1035 | errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, buffer); |
| 1036 | } |
| 1037 | break; |
| 1038 | case MEP_OPERAND_PSW : |
| 1039 | break; |
| 1040 | case MEP_OPERAND_R0 : |
| 1041 | break; |
| 1042 | case MEP_OPERAND_R1 : |
| 1043 | break; |
| 1044 | case MEP_OPERAND_RL : |
| 1045 | errmsg = insert_normal (cd, fields->f_rl, 0, 0, 12, 4, 32, total_length, buffer); |
| 1046 | break; |
| 1047 | case MEP_OPERAND_RL5 : |
| 1048 | errmsg = insert_normal (cd, fields->f_rl5, 0, 0, 20, 4, 32, total_length, buffer); |
| 1049 | break; |
| 1050 | case MEP_OPERAND_RM : |
| 1051 | errmsg = insert_normal (cd, fields->f_rm, 0, 0, 8, 4, 32, total_length, buffer); |
| 1052 | break; |
| 1053 | case MEP_OPERAND_RMA : |
| 1054 | errmsg = insert_normal (cd, fields->f_rm, 0, 0, 8, 4, 32, total_length, buffer); |
| 1055 | break; |
| 1056 | case MEP_OPERAND_RN : |
| 1057 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1058 | break; |
| 1059 | case MEP_OPERAND_RN3 : |
| 1060 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1061 | break; |
| 1062 | case MEP_OPERAND_RN3C : |
| 1063 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1064 | break; |
| 1065 | case MEP_OPERAND_RN3L : |
| 1066 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1067 | break; |
| 1068 | case MEP_OPERAND_RN3S : |
| 1069 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1070 | break; |
| 1071 | case MEP_OPERAND_RN3UC : |
| 1072 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1073 | break; |
| 1074 | case MEP_OPERAND_RN3UL : |
| 1075 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1076 | break; |
| 1077 | case MEP_OPERAND_RN3US : |
| 1078 | errmsg = insert_normal (cd, fields->f_rn3, 0, 0, 5, 3, 32, total_length, buffer); |
| 1079 | break; |
| 1080 | case MEP_OPERAND_RNC : |
| 1081 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1082 | break; |
| 1083 | case MEP_OPERAND_RNL : |
| 1084 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1085 | break; |
| 1086 | case MEP_OPERAND_RNS : |
| 1087 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1088 | break; |
| 1089 | case MEP_OPERAND_RNUC : |
| 1090 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1091 | break; |
| 1092 | case MEP_OPERAND_RNUL : |
| 1093 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1094 | break; |
| 1095 | case MEP_OPERAND_RNUS : |
| 1096 | errmsg = insert_normal (cd, fields->f_rn, 0, 0, 4, 4, 32, total_length, buffer); |
| 1097 | break; |
| 1098 | case MEP_OPERAND_SAR : |
| 1099 | break; |
| 1100 | case MEP_OPERAND_SDISP16 : |
| 1101 | errmsg = insert_normal (cd, fields->f_16s16, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 1102 | break; |
| 1103 | case MEP_OPERAND_SIMM16 : |
| 1104 | errmsg = insert_normal (cd, fields->f_16s16, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer); |
| 1105 | break; |
| 1106 | case MEP_OPERAND_SIMM16P0 : |
| 1107 | { |
| 1108 | { |
| 1109 | FLD (f_ivc2_8u0) = ((((UINT) (FLD (f_ivc2_simm16p0)) >> (8))) & (255)); |
| 1110 | FLD (f_ivc2_8u20) = ((FLD (f_ivc2_simm16p0)) & (255)); |
| 1111 | } |
| 1112 | errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer); |
| 1113 | if (errmsg) |
| 1114 | break; |
| 1115 | errmsg = insert_normal (cd, fields->f_ivc2_8u20, 0, 0, 20, 8, 32, total_length, buffer); |
| 1116 | if (errmsg) |
| 1117 | break; |
| 1118 | } |
| 1119 | break; |
| 1120 | case MEP_OPERAND_SIMM6 : |
| 1121 | errmsg = insert_normal (cd, fields->f_6s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 6, 32, total_length, buffer); |
| 1122 | break; |
| 1123 | case MEP_OPERAND_SIMM8 : |
| 1124 | errmsg = insert_normal (cd, fields->f_8s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer); |
| 1125 | break; |
| 1126 | case MEP_OPERAND_SIMM8P0 : |
| 1127 | errmsg = insert_normal (cd, fields->f_ivc2_8s0, 0|(1<<CGEN_IFLD_SIGNED), 0, 0, 8, 32, total_length, buffer); |
| 1128 | break; |
| 1129 | case MEP_OPERAND_SIMM8P20 : |
| 1130 | errmsg = insert_normal (cd, fields->f_ivc2_8s20, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 8, 32, total_length, buffer); |
| 1131 | break; |
| 1132 | case MEP_OPERAND_SIMM8P4 : |
| 1133 | errmsg = insert_normal (cd, fields->f_ivc2_8s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 32, total_length, buffer); |
| 1134 | break; |
| 1135 | case MEP_OPERAND_SP : |
| 1136 | break; |
| 1137 | case MEP_OPERAND_SPR : |
| 1138 | break; |
| 1139 | case MEP_OPERAND_TP : |
| 1140 | break; |
| 1141 | case MEP_OPERAND_TPR : |
| 1142 | break; |
| 1143 | case MEP_OPERAND_UDISP2 : |
| 1144 | errmsg = insert_normal (cd, fields->f_2u6, 0, 0, 6, 2, 32, total_length, buffer); |
| 1145 | break; |
| 1146 | case MEP_OPERAND_UDISP7 : |
| 1147 | errmsg = insert_normal (cd, fields->f_7u9, 0, 0, 9, 7, 32, total_length, buffer); |
| 1148 | break; |
| 1149 | case MEP_OPERAND_UDISP7A2 : |
| 1150 | { |
| 1151 | long value = fields->f_7u9a2; |
| 1152 | value = ((USI) (value) >> (1)); |
| 1153 | errmsg = insert_normal (cd, value, 0, 0, 9, 6, 32, total_length, buffer); |
| 1154 | } |
| 1155 | break; |
| 1156 | case MEP_OPERAND_UDISP7A4 : |
| 1157 | { |
| 1158 | long value = fields->f_7u9a4; |
| 1159 | value = ((USI) (value) >> (2)); |
| 1160 | errmsg = insert_normal (cd, value, 0, 0, 9, 5, 32, total_length, buffer); |
| 1161 | } |
| 1162 | break; |
| 1163 | case MEP_OPERAND_UIMM16 : |
| 1164 | errmsg = insert_normal (cd, fields->f_16u16, 0, 0, 16, 16, 32, total_length, buffer); |
| 1165 | break; |
| 1166 | case MEP_OPERAND_UIMM2 : |
| 1167 | errmsg = insert_normal (cd, fields->f_2u10, 0, 0, 10, 2, 32, total_length, buffer); |
| 1168 | break; |
| 1169 | case MEP_OPERAND_UIMM24 : |
| 1170 | { |
| 1171 | { |
| 1172 | FLD (f_24u8n_hi) = ((UINT) (FLD (f_24u8n)) >> (8)); |
| 1173 | FLD (f_24u8n_lo) = ((FLD (f_24u8n)) & (255)); |
| 1174 | } |
| 1175 | errmsg = insert_normal (cd, fields->f_24u8n_hi, 0, 0, 16, 16, 32, total_length, buffer); |
| 1176 | if (errmsg) |
| 1177 | break; |
| 1178 | errmsg = insert_normal (cd, fields->f_24u8n_lo, 0, 0, 8, 8, 32, total_length, buffer); |
| 1179 | if (errmsg) |
| 1180 | break; |
| 1181 | } |
| 1182 | break; |
| 1183 | case MEP_OPERAND_UIMM3 : |
| 1184 | errmsg = insert_normal (cd, fields->f_3u5, 0, 0, 5, 3, 32, total_length, buffer); |
| 1185 | break; |
| 1186 | case MEP_OPERAND_UIMM4 : |
| 1187 | errmsg = insert_normal (cd, fields->f_4u8, 0, 0, 8, 4, 32, total_length, buffer); |
| 1188 | break; |
| 1189 | case MEP_OPERAND_UIMM5 : |
| 1190 | errmsg = insert_normal (cd, fields->f_5u8, 0, 0, 8, 5, 32, total_length, buffer); |
| 1191 | break; |
| 1192 | case MEP_OPERAND_UIMM7A4 : |
| 1193 | { |
| 1194 | long value = fields->f_7u9a4; |
| 1195 | value = ((USI) (value) >> (2)); |
| 1196 | errmsg = insert_normal (cd, value, 0, 0, 9, 5, 32, total_length, buffer); |
| 1197 | } |
| 1198 | break; |
| 1199 | case MEP_OPERAND_ZERO : |
| 1200 | break; |
| 1201 | |
| 1202 | default : |
| 1203 | /* xgettext:c-format */ |
| 1204 | fprintf (stderr, _("Unrecognized field %d while building insn.\n"), |
| 1205 | opindex); |
| 1206 | abort (); |
| 1207 | } |
| 1208 | |
| 1209 | return errmsg; |
| 1210 | } |
| 1211 | |
| 1212 | int mep_cgen_extract_operand |
| 1213 | (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); |
| 1214 | |
| 1215 | /* Main entry point for operand extraction. |
| 1216 | The result is <= 0 for error, >0 for success. |
| 1217 | ??? Actual values aren't well defined right now. |
| 1218 | |
| 1219 | This function is basically just a big switch statement. Earlier versions |
| 1220 | used tables to look up the function to use, but |
| 1221 | - if the table contains both assembler and disassembler functions then |
| 1222 | the disassembler contains much of the assembler and vice-versa, |
| 1223 | - there's a lot of inlining possibilities as things grow, |
| 1224 | - using a switch statement avoids the function call overhead. |
| 1225 | |
| 1226 | This function could be moved into `print_insn_normal', but keeping it |
| 1227 | separate makes clear the interface between `print_insn_normal' and each of |
| 1228 | the handlers. */ |
| 1229 | |
| 1230 | int |
| 1231 | mep_cgen_extract_operand (CGEN_CPU_DESC cd, |
| 1232 | int opindex, |
| 1233 | CGEN_EXTRACT_INFO *ex_info, |
| 1234 | CGEN_INSN_INT insn_value, |
| 1235 | CGEN_FIELDS * fields, |
| 1236 | bfd_vma pc) |
| 1237 | { |
| 1238 | /* Assume success (for those operands that are nops). */ |
| 1239 | int length = 1; |
| 1240 | unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); |
| 1241 | |
| 1242 | switch (opindex) |
| 1243 | { |
| 1244 | case MEP_OPERAND_ADDR24A4 : |
| 1245 | { |
| 1246 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_24u8a4n_hi); |
| 1247 | if (length <= 0) break; |
| 1248 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_24u8a4n_lo); |
| 1249 | if (length <= 0) break; |
| 1250 | FLD (f_24u8a4n) = ((((FLD (f_24u8a4n_hi)) << (8))) | (((FLD (f_24u8a4n_lo)) << (2)))); |
| 1251 | } |
| 1252 | break; |
| 1253 | case MEP_OPERAND_C5RMUIMM20 : |
| 1254 | { |
| 1255 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_c5_rm); |
| 1256 | if (length <= 0) break; |
| 1257 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_c5_16u16); |
| 1258 | if (length <= 0) break; |
| 1259 | { |
| 1260 | FLD (f_c5_rmuimm20) = ((FLD (f_c5_16u16)) | (((FLD (f_c5_rm)) << (16)))); |
| 1261 | } |
| 1262 | } |
| 1263 | break; |
| 1264 | case MEP_OPERAND_C5RNMUIMM24 : |
| 1265 | { |
| 1266 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 32, total_length, pc, & fields->f_c5_rnm); |
| 1267 | if (length <= 0) break; |
| 1268 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_c5_16u16); |
| 1269 | if (length <= 0) break; |
| 1270 | { |
| 1271 | FLD (f_c5_rnmuimm24) = ((FLD (f_c5_16u16)) | (((FLD (f_c5_rnm)) << (16)))); |
| 1272 | } |
| 1273 | } |
| 1274 | break; |
| 1275 | case MEP_OPERAND_CALLNUM : |
| 1276 | { |
| 1277 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5); |
| 1278 | if (length <= 0) break; |
| 1279 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_6); |
| 1280 | if (length <= 0) break; |
| 1281 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7); |
| 1282 | if (length <= 0) break; |
| 1283 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_11); |
| 1284 | if (length <= 0) break; |
| 1285 | FLD (f_callnum) = ((((FLD (f_5)) << (3))) | (((((FLD (f_6)) << (2))) | (((((FLD (f_7)) << (1))) | (FLD (f_11))))))); |
| 1286 | } |
| 1287 | break; |
| 1288 | case MEP_OPERAND_CCCC : |
| 1289 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_rm); |
| 1290 | break; |
| 1291 | case MEP_OPERAND_CCRN : |
| 1292 | { |
| 1293 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 2, 32, total_length, pc, & fields->f_ccrn_hi); |
| 1294 | if (length <= 0) break; |
| 1295 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ccrn_lo); |
| 1296 | if (length <= 0) break; |
| 1297 | FLD (f_ccrn) = ((((FLD (f_ccrn_hi)) << (4))) | (FLD (f_ccrn_lo))); |
| 1298 | } |
| 1299 | break; |
| 1300 | case MEP_OPERAND_CDISP10 : |
| 1301 | { |
| 1302 | long value; |
| 1303 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); |
| 1304 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 1305 | fields->f_cdisp10 = value; |
| 1306 | } |
| 1307 | break; |
| 1308 | case MEP_OPERAND_CDISP10A2 : |
| 1309 | { |
| 1310 | long value; |
| 1311 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); |
| 1312 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 1313 | fields->f_cdisp10 = value; |
| 1314 | } |
| 1315 | break; |
| 1316 | case MEP_OPERAND_CDISP10A4 : |
| 1317 | { |
| 1318 | long value; |
| 1319 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); |
| 1320 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 1321 | fields->f_cdisp10 = value; |
| 1322 | } |
| 1323 | break; |
| 1324 | case MEP_OPERAND_CDISP10A8 : |
| 1325 | { |
| 1326 | long value; |
| 1327 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 22, 10, 32, total_length, pc, & value); |
| 1328 | value = (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (512))) ? (((((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))) - (1024))) : (((((((((value) & (128))) ? (((value) ^ (768))) : (value)) & (512))) ? ((((((value) & (128))) ? (((value) ^ (768))) : (value)) - (1024))) : ((((value) & (128))) ? (((value) ^ (768))) : (value))) & (1023))); |
| 1329 | fields->f_cdisp10 = value; |
| 1330 | } |
| 1331 | break; |
| 1332 | case MEP_OPERAND_CDISP12 : |
| 1333 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 12, 32, total_length, pc, & fields->f_12s20); |
| 1334 | break; |
| 1335 | case MEP_OPERAND_CIMM4 : |
| 1336 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1337 | break; |
| 1338 | case MEP_OPERAND_CIMM5 : |
| 1339 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 5, 32, total_length, pc, & fields->f_5u24); |
| 1340 | break; |
| 1341 | case MEP_OPERAND_CODE16 : |
| 1342 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_16u16); |
| 1343 | break; |
| 1344 | case MEP_OPERAND_CODE24 : |
| 1345 | { |
| 1346 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 32, total_length, pc, & fields->f_24u4n_hi); |
| 1347 | if (length <= 0) break; |
| 1348 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_24u4n_lo); |
| 1349 | if (length <= 0) break; |
| 1350 | FLD (f_24u4n) = ((((FLD (f_24u4n_hi)) << (16))) | (FLD (f_24u4n_lo))); |
| 1351 | } |
| 1352 | break; |
| 1353 | case MEP_OPERAND_CP_FLAG : |
| 1354 | break; |
| 1355 | case MEP_OPERAND_CRN : |
| 1356 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_crn); |
| 1357 | break; |
| 1358 | case MEP_OPERAND_CRN64 : |
| 1359 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_crn); |
| 1360 | break; |
| 1361 | case MEP_OPERAND_CRNX : |
| 1362 | { |
| 1363 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 1, 32, total_length, pc, & fields->f_crnx_hi); |
| 1364 | if (length <= 0) break; |
| 1365 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_crnx_lo); |
| 1366 | if (length <= 0) break; |
| 1367 | FLD (f_crnx) = ((((FLD (f_crnx_hi)) << (4))) | (FLD (f_crnx_lo))); |
| 1368 | } |
| 1369 | break; |
| 1370 | case MEP_OPERAND_CRNX64 : |
| 1371 | { |
| 1372 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 1, 32, total_length, pc, & fields->f_crnx_hi); |
| 1373 | if (length <= 0) break; |
| 1374 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_crnx_lo); |
| 1375 | if (length <= 0) break; |
| 1376 | FLD (f_crnx) = ((((FLD (f_crnx_hi)) << (4))) | (FLD (f_crnx_lo))); |
| 1377 | } |
| 1378 | break; |
| 1379 | case MEP_OPERAND_CROC : |
| 1380 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 5, 32, total_length, pc, & fields->f_ivc2_5u7); |
| 1381 | break; |
| 1382 | case MEP_OPERAND_CROP : |
| 1383 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 5, 32, total_length, pc, & fields->f_ivc2_5u23); |
| 1384 | break; |
| 1385 | case MEP_OPERAND_CRPC : |
| 1386 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 26, 5, 32, total_length, pc, & fields->f_ivc2_5u26); |
| 1387 | break; |
| 1388 | case MEP_OPERAND_CRPP : |
| 1389 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 5, 32, total_length, pc, & fields->f_ivc2_5u18); |
| 1390 | break; |
| 1391 | case MEP_OPERAND_CRQC : |
| 1392 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 5, 32, total_length, pc, & fields->f_ivc2_5u21); |
| 1393 | break; |
| 1394 | case MEP_OPERAND_CRQP : |
| 1395 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 5, 32, total_length, pc, & fields->f_ivc2_5u13); |
| 1396 | break; |
| 1397 | case MEP_OPERAND_CSRN : |
| 1398 | { |
| 1399 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_csrn_hi); |
| 1400 | if (length <= 0) break; |
| 1401 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_csrn_lo); |
| 1402 | if (length <= 0) break; |
| 1403 | FLD (f_csrn) = ((((FLD (f_csrn_hi)) << (4))) | (FLD (f_csrn_lo))); |
| 1404 | } |
| 1405 | break; |
| 1406 | case MEP_OPERAND_CSRN_IDX : |
| 1407 | { |
| 1408 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_csrn_hi); |
| 1409 | if (length <= 0) break; |
| 1410 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_csrn_lo); |
| 1411 | if (length <= 0) break; |
| 1412 | FLD (f_csrn) = ((((FLD (f_csrn_hi)) << (4))) | (FLD (f_csrn_lo))); |
| 1413 | } |
| 1414 | break; |
| 1415 | case MEP_OPERAND_DBG : |
| 1416 | break; |
| 1417 | case MEP_OPERAND_DEPC : |
| 1418 | break; |
| 1419 | case MEP_OPERAND_EPC : |
| 1420 | break; |
| 1421 | case MEP_OPERAND_EXC : |
| 1422 | break; |
| 1423 | case MEP_OPERAND_HI : |
| 1424 | break; |
| 1425 | case MEP_OPERAND_IMM16P0 : |
| 1426 | { |
| 1427 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0); |
| 1428 | if (length <= 0) break; |
| 1429 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20); |
| 1430 | if (length <= 0) break; |
| 1431 | { |
| 1432 | FLD (f_ivc2_imm16p0) = ((FLD (f_ivc2_8u20)) | (((FLD (f_ivc2_8u0)) << (8)))); |
| 1433 | } |
| 1434 | } |
| 1435 | break; |
| 1436 | case MEP_OPERAND_IMM3P12 : |
| 1437 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 3, 32, total_length, pc, & fields->f_ivc2_3u12); |
| 1438 | break; |
| 1439 | case MEP_OPERAND_IMM3P25 : |
| 1440 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 3, 32, total_length, pc, & fields->f_ivc2_3u25); |
| 1441 | break; |
| 1442 | case MEP_OPERAND_IMM3P4 : |
| 1443 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 3, 32, total_length, pc, & fields->f_ivc2_3u4); |
| 1444 | break; |
| 1445 | case MEP_OPERAND_IMM3P5 : |
| 1446 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_ivc2_3u5); |
| 1447 | break; |
| 1448 | case MEP_OPERAND_IMM3P9 : |
| 1449 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_ivc2_3u9); |
| 1450 | break; |
| 1451 | case MEP_OPERAND_IMM4P10 : |
| 1452 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 4, 32, total_length, pc, & fields->f_ivc2_4u10); |
| 1453 | break; |
| 1454 | case MEP_OPERAND_IMM4P4 : |
| 1455 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_4u4); |
| 1456 | break; |
| 1457 | case MEP_OPERAND_IMM4P8 : |
| 1458 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_ivc2_4u8); |
| 1459 | break; |
| 1460 | case MEP_OPERAND_IMM5P23 : |
| 1461 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 5, 32, total_length, pc, & fields->f_ivc2_5u23); |
| 1462 | break; |
| 1463 | case MEP_OPERAND_IMM5P3 : |
| 1464 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 3, 5, 32, total_length, pc, & fields->f_ivc2_5u3); |
| 1465 | break; |
| 1466 | case MEP_OPERAND_IMM5P7 : |
| 1467 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 5, 32, total_length, pc, & fields->f_ivc2_5u7); |
| 1468 | break; |
| 1469 | case MEP_OPERAND_IMM5P8 : |
| 1470 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 5, 32, total_length, pc, & fields->f_ivc2_5u8); |
| 1471 | break; |
| 1472 | case MEP_OPERAND_IMM6P2 : |
| 1473 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 6, 32, total_length, pc, & fields->f_ivc2_6u2); |
| 1474 | break; |
| 1475 | case MEP_OPERAND_IMM6P6 : |
| 1476 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 6, 32, total_length, pc, & fields->f_ivc2_6u6); |
| 1477 | break; |
| 1478 | case MEP_OPERAND_IMM8P0 : |
| 1479 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0); |
| 1480 | break; |
| 1481 | case MEP_OPERAND_IMM8P20 : |
| 1482 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20); |
| 1483 | break; |
| 1484 | case MEP_OPERAND_IMM8P4 : |
| 1485 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 8, 32, total_length, pc, & fields->f_ivc2_8u4); |
| 1486 | break; |
| 1487 | case MEP_OPERAND_IVC_X_0_2 : |
| 1488 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 2, 32, total_length, pc, & fields->f_ivc2_2u0); |
| 1489 | break; |
| 1490 | case MEP_OPERAND_IVC_X_0_3 : |
| 1491 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 3, 32, total_length, pc, & fields->f_ivc2_3u0); |
| 1492 | break; |
| 1493 | case MEP_OPERAND_IVC_X_0_4 : |
| 1494 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_4u0); |
| 1495 | break; |
| 1496 | case MEP_OPERAND_IVC_X_0_5 : |
| 1497 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 5, 32, total_length, pc, & fields->f_ivc2_5u0); |
| 1498 | break; |
| 1499 | case MEP_OPERAND_IVC_X_6_1 : |
| 1500 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 1, 32, total_length, pc, & fields->f_ivc2_1u6); |
| 1501 | break; |
| 1502 | case MEP_OPERAND_IVC_X_6_2 : |
| 1503 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 2, 32, total_length, pc, & fields->f_ivc2_2u6); |
| 1504 | break; |
| 1505 | case MEP_OPERAND_IVC_X_6_3 : |
| 1506 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 3, 32, total_length, pc, & fields->f_ivc2_3u6); |
| 1507 | break; |
| 1508 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 1509 | break; |
| 1510 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 1511 | break; |
| 1512 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 1513 | break; |
| 1514 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 1515 | break; |
| 1516 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 1517 | break; |
| 1518 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 1519 | break; |
| 1520 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 1521 | break; |
| 1522 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 1523 | break; |
| 1524 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 1525 | break; |
| 1526 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 1527 | break; |
| 1528 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 1529 | break; |
| 1530 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 1531 | break; |
| 1532 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 1533 | break; |
| 1534 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 1535 | break; |
| 1536 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 1537 | break; |
| 1538 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 1539 | break; |
| 1540 | case MEP_OPERAND_IVC2_CC : |
| 1541 | break; |
| 1542 | case MEP_OPERAND_IVC2_COFA0 : |
| 1543 | break; |
| 1544 | case MEP_OPERAND_IVC2_COFA1 : |
| 1545 | break; |
| 1546 | case MEP_OPERAND_IVC2_COFR0 : |
| 1547 | break; |
| 1548 | case MEP_OPERAND_IVC2_COFR1 : |
| 1549 | break; |
| 1550 | case MEP_OPERAND_IVC2_CSAR0 : |
| 1551 | break; |
| 1552 | case MEP_OPERAND_IVC2_CSAR1 : |
| 1553 | break; |
| 1554 | case MEP_OPERAND_IVC2C3CCRN : |
| 1555 | { |
| 1556 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 28, 2, 32, total_length, pc, & fields->f_ivc2_ccrn_c3hi); |
| 1557 | if (length <= 0) break; |
| 1558 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_c3lo); |
| 1559 | if (length <= 0) break; |
| 1560 | FLD (f_ivc2_ccrn_c3) = ((((FLD (f_ivc2_ccrn_c3hi)) << (4))) | (FLD (f_ivc2_ccrn_c3lo))); |
| 1561 | } |
| 1562 | break; |
| 1563 | case MEP_OPERAND_IVC2CCRN : |
| 1564 | { |
| 1565 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 2, 32, total_length, pc, & fields->f_ivc2_ccrn_h2); |
| 1566 | if (length <= 0) break; |
| 1567 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_lo); |
| 1568 | if (length <= 0) break; |
| 1569 | FLD (f_ivc2_ccrn) = ((((FLD (f_ivc2_ccrn_h2)) << (4))) | (FLD (f_ivc2_ccrn_lo))); |
| 1570 | } |
| 1571 | break; |
| 1572 | case MEP_OPERAND_IVC2CRN : |
| 1573 | { |
| 1574 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 1, 32, total_length, pc, & fields->f_ivc2_ccrn_h1); |
| 1575 | if (length <= 0) break; |
| 1576 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 4, 32, total_length, pc, & fields->f_ivc2_ccrn_lo); |
| 1577 | if (length <= 0) break; |
| 1578 | FLD (f_ivc2_crnx) = ((((FLD (f_ivc2_ccrn_h1)) << (4))) | (FLD (f_ivc2_ccrn_lo))); |
| 1579 | } |
| 1580 | break; |
| 1581 | case MEP_OPERAND_IVC2RM : |
| 1582 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_ivc2_crm); |
| 1583 | break; |
| 1584 | case MEP_OPERAND_LO : |
| 1585 | break; |
| 1586 | case MEP_OPERAND_LP : |
| 1587 | break; |
| 1588 | case MEP_OPERAND_MB0 : |
| 1589 | break; |
| 1590 | case MEP_OPERAND_MB1 : |
| 1591 | break; |
| 1592 | case MEP_OPERAND_ME0 : |
| 1593 | break; |
| 1594 | case MEP_OPERAND_ME1 : |
| 1595 | break; |
| 1596 | case MEP_OPERAND_NPC : |
| 1597 | break; |
| 1598 | case MEP_OPERAND_OPT : |
| 1599 | break; |
| 1600 | case MEP_OPERAND_PCABS24A2 : |
| 1601 | { |
| 1602 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_24u5a2n_hi); |
| 1603 | if (length <= 0) break; |
| 1604 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 7, 32, total_length, pc, & fields->f_24u5a2n_lo); |
| 1605 | if (length <= 0) break; |
| 1606 | FLD (f_24u5a2n) = ((((FLD (f_24u5a2n_hi)) << (8))) | (((FLD (f_24u5a2n_lo)) << (1)))); |
| 1607 | } |
| 1608 | break; |
| 1609 | case MEP_OPERAND_PCREL12A2 : |
| 1610 | { |
| 1611 | long value; |
| 1612 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value); |
| 1613 | value = ((((value) << (1))) + (pc)); |
| 1614 | fields->f_12s4a2 = value; |
| 1615 | } |
| 1616 | break; |
| 1617 | case MEP_OPERAND_PCREL17A2 : |
| 1618 | { |
| 1619 | long value; |
| 1620 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value); |
| 1621 | value = ((((value) << (1))) + (pc)); |
| 1622 | fields->f_17s16a2 = value; |
| 1623 | } |
| 1624 | break; |
| 1625 | case MEP_OPERAND_PCREL24A2 : |
| 1626 | { |
| 1627 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & fields->f_24s5a2n_hi); |
| 1628 | if (length <= 0) break; |
| 1629 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 7, 32, total_length, pc, & fields->f_24s5a2n_lo); |
| 1630 | if (length <= 0) break; |
| 1631 | FLD (f_24s5a2n) = ((((((FLD (f_24s5a2n_hi)) << (8))) | (((FLD (f_24s5a2n_lo)) << (1))))) + (pc)); |
| 1632 | } |
| 1633 | break; |
| 1634 | case MEP_OPERAND_PCREL8A2 : |
| 1635 | { |
| 1636 | long value; |
| 1637 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, pc, & value); |
| 1638 | value = ((((value) << (1))) + (pc)); |
| 1639 | fields->f_8s8a2 = value; |
| 1640 | } |
| 1641 | break; |
| 1642 | case MEP_OPERAND_PSW : |
| 1643 | break; |
| 1644 | case MEP_OPERAND_R0 : |
| 1645 | break; |
| 1646 | case MEP_OPERAND_R1 : |
| 1647 | break; |
| 1648 | case MEP_OPERAND_RL : |
| 1649 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_rl); |
| 1650 | break; |
| 1651 | case MEP_OPERAND_RL5 : |
| 1652 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 4, 32, total_length, pc, & fields->f_rl5); |
| 1653 | break; |
| 1654 | case MEP_OPERAND_RM : |
| 1655 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_rm); |
| 1656 | break; |
| 1657 | case MEP_OPERAND_RMA : |
| 1658 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_rm); |
| 1659 | break; |
| 1660 | case MEP_OPERAND_RN : |
| 1661 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1662 | break; |
| 1663 | case MEP_OPERAND_RN3 : |
| 1664 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1665 | break; |
| 1666 | case MEP_OPERAND_RN3C : |
| 1667 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1668 | break; |
| 1669 | case MEP_OPERAND_RN3L : |
| 1670 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1671 | break; |
| 1672 | case MEP_OPERAND_RN3S : |
| 1673 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1674 | break; |
| 1675 | case MEP_OPERAND_RN3UC : |
| 1676 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1677 | break; |
| 1678 | case MEP_OPERAND_RN3UL : |
| 1679 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1680 | break; |
| 1681 | case MEP_OPERAND_RN3US : |
| 1682 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_rn3); |
| 1683 | break; |
| 1684 | case MEP_OPERAND_RNC : |
| 1685 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1686 | break; |
| 1687 | case MEP_OPERAND_RNL : |
| 1688 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1689 | break; |
| 1690 | case MEP_OPERAND_RNS : |
| 1691 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1692 | break; |
| 1693 | case MEP_OPERAND_RNUC : |
| 1694 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1695 | break; |
| 1696 | case MEP_OPERAND_RNUL : |
| 1697 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1698 | break; |
| 1699 | case MEP_OPERAND_RNUS : |
| 1700 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 4, 32, total_length, pc, & fields->f_rn); |
| 1701 | break; |
| 1702 | case MEP_OPERAND_SAR : |
| 1703 | break; |
| 1704 | case MEP_OPERAND_SDISP16 : |
| 1705 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & fields->f_16s16); |
| 1706 | break; |
| 1707 | case MEP_OPERAND_SIMM16 : |
| 1708 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & fields->f_16s16); |
| 1709 | break; |
| 1710 | case MEP_OPERAND_SIMM16P0 : |
| 1711 | { |
| 1712 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8u0); |
| 1713 | if (length <= 0) break; |
| 1714 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8u20); |
| 1715 | if (length <= 0) break; |
| 1716 | { |
| 1717 | FLD (f_ivc2_simm16p0) = ((FLD (f_ivc2_8u20)) | (((FLD (f_ivc2_8u0)) << (8)))); |
| 1718 | } |
| 1719 | } |
| 1720 | break; |
| 1721 | case MEP_OPERAND_SIMM6 : |
| 1722 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 6, 32, total_length, pc, & fields->f_6s8); |
| 1723 | break; |
| 1724 | case MEP_OPERAND_SIMM8 : |
| 1725 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_8s8); |
| 1726 | break; |
| 1727 | case MEP_OPERAND_SIMM8P0 : |
| 1728 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 0, 8, 32, total_length, pc, & fields->f_ivc2_8s0); |
| 1729 | break; |
| 1730 | case MEP_OPERAND_SIMM8P20 : |
| 1731 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 8, 32, total_length, pc, & fields->f_ivc2_8s20); |
| 1732 | break; |
| 1733 | case MEP_OPERAND_SIMM8P4 : |
| 1734 | length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 32, total_length, pc, & fields->f_ivc2_8s4); |
| 1735 | break; |
| 1736 | case MEP_OPERAND_SP : |
| 1737 | break; |
| 1738 | case MEP_OPERAND_SPR : |
| 1739 | break; |
| 1740 | case MEP_OPERAND_TP : |
| 1741 | break; |
| 1742 | case MEP_OPERAND_TPR : |
| 1743 | break; |
| 1744 | case MEP_OPERAND_UDISP2 : |
| 1745 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 6, 2, 32, total_length, pc, & fields->f_2u6); |
| 1746 | break; |
| 1747 | case MEP_OPERAND_UDISP7 : |
| 1748 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 7, 32, total_length, pc, & fields->f_7u9); |
| 1749 | break; |
| 1750 | case MEP_OPERAND_UDISP7A2 : |
| 1751 | { |
| 1752 | long value; |
| 1753 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 6, 32, total_length, pc, & value); |
| 1754 | value = ((value) << (1)); |
| 1755 | fields->f_7u9a2 = value; |
| 1756 | } |
| 1757 | break; |
| 1758 | case MEP_OPERAND_UDISP7A4 : |
| 1759 | { |
| 1760 | long value; |
| 1761 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 5, 32, total_length, pc, & value); |
| 1762 | value = ((value) << (2)); |
| 1763 | fields->f_7u9a4 = value; |
| 1764 | } |
| 1765 | break; |
| 1766 | case MEP_OPERAND_UIMM16 : |
| 1767 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_16u16); |
| 1768 | break; |
| 1769 | case MEP_OPERAND_UIMM2 : |
| 1770 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_2u10); |
| 1771 | break; |
| 1772 | case MEP_OPERAND_UIMM24 : |
| 1773 | { |
| 1774 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & fields->f_24u8n_hi); |
| 1775 | if (length <= 0) break; |
| 1776 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_24u8n_lo); |
| 1777 | if (length <= 0) break; |
| 1778 | FLD (f_24u8n) = ((((FLD (f_24u8n_hi)) << (8))) | (FLD (f_24u8n_lo))); |
| 1779 | } |
| 1780 | break; |
| 1781 | case MEP_OPERAND_UIMM3 : |
| 1782 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_3u5); |
| 1783 | break; |
| 1784 | case MEP_OPERAND_UIMM4 : |
| 1785 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 32, total_length, pc, & fields->f_4u8); |
| 1786 | break; |
| 1787 | case MEP_OPERAND_UIMM5 : |
| 1788 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 5, 32, total_length, pc, & fields->f_5u8); |
| 1789 | break; |
| 1790 | case MEP_OPERAND_UIMM7A4 : |
| 1791 | { |
| 1792 | long value; |
| 1793 | length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 5, 32, total_length, pc, & value); |
| 1794 | value = ((value) << (2)); |
| 1795 | fields->f_7u9a4 = value; |
| 1796 | } |
| 1797 | break; |
| 1798 | case MEP_OPERAND_ZERO : |
| 1799 | break; |
| 1800 | |
| 1801 | default : |
| 1802 | /* xgettext:c-format */ |
| 1803 | fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), |
| 1804 | opindex); |
| 1805 | abort (); |
| 1806 | } |
| 1807 | |
| 1808 | return length; |
| 1809 | } |
| 1810 | |
| 1811 | cgen_insert_fn * const mep_cgen_insert_handlers[] = |
| 1812 | { |
| 1813 | insert_insn_normal, |
| 1814 | }; |
| 1815 | |
| 1816 | cgen_extract_fn * const mep_cgen_extract_handlers[] = |
| 1817 | { |
| 1818 | extract_insn_normal, |
| 1819 | }; |
| 1820 | |
| 1821 | int mep_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 1822 | bfd_vma mep_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); |
| 1823 | |
| 1824 | /* Getting values from cgen_fields is handled by a collection of functions. |
| 1825 | They are distinguished by the type of the VALUE argument they return. |
| 1826 | TODO: floating point, inlining support, remove cases where result type |
| 1827 | not appropriate. */ |
| 1828 | |
| 1829 | int |
| 1830 | mep_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 1831 | int opindex, |
| 1832 | const CGEN_FIELDS * fields) |
| 1833 | { |
| 1834 | int value; |
| 1835 | |
| 1836 | switch (opindex) |
| 1837 | { |
| 1838 | case MEP_OPERAND_ADDR24A4 : |
| 1839 | value = fields->f_24u8a4n; |
| 1840 | break; |
| 1841 | case MEP_OPERAND_C5RMUIMM20 : |
| 1842 | value = fields->f_c5_rmuimm20; |
| 1843 | break; |
| 1844 | case MEP_OPERAND_C5RNMUIMM24 : |
| 1845 | value = fields->f_c5_rnmuimm24; |
| 1846 | break; |
| 1847 | case MEP_OPERAND_CALLNUM : |
| 1848 | value = fields->f_callnum; |
| 1849 | break; |
| 1850 | case MEP_OPERAND_CCCC : |
| 1851 | value = fields->f_rm; |
| 1852 | break; |
| 1853 | case MEP_OPERAND_CCRN : |
| 1854 | value = fields->f_ccrn; |
| 1855 | break; |
| 1856 | case MEP_OPERAND_CDISP10 : |
| 1857 | value = fields->f_cdisp10; |
| 1858 | break; |
| 1859 | case MEP_OPERAND_CDISP10A2 : |
| 1860 | value = fields->f_cdisp10; |
| 1861 | break; |
| 1862 | case MEP_OPERAND_CDISP10A4 : |
| 1863 | value = fields->f_cdisp10; |
| 1864 | break; |
| 1865 | case MEP_OPERAND_CDISP10A8 : |
| 1866 | value = fields->f_cdisp10; |
| 1867 | break; |
| 1868 | case MEP_OPERAND_CDISP12 : |
| 1869 | value = fields->f_12s20; |
| 1870 | break; |
| 1871 | case MEP_OPERAND_CIMM4 : |
| 1872 | value = fields->f_rn; |
| 1873 | break; |
| 1874 | case MEP_OPERAND_CIMM5 : |
| 1875 | value = fields->f_5u24; |
| 1876 | break; |
| 1877 | case MEP_OPERAND_CODE16 : |
| 1878 | value = fields->f_16u16; |
| 1879 | break; |
| 1880 | case MEP_OPERAND_CODE24 : |
| 1881 | value = fields->f_24u4n; |
| 1882 | break; |
| 1883 | case MEP_OPERAND_CP_FLAG : |
| 1884 | value = 0; |
| 1885 | break; |
| 1886 | case MEP_OPERAND_CRN : |
| 1887 | value = fields->f_crn; |
| 1888 | break; |
| 1889 | case MEP_OPERAND_CRN64 : |
| 1890 | value = fields->f_crn; |
| 1891 | break; |
| 1892 | case MEP_OPERAND_CRNX : |
| 1893 | value = fields->f_crnx; |
| 1894 | break; |
| 1895 | case MEP_OPERAND_CRNX64 : |
| 1896 | value = fields->f_crnx; |
| 1897 | break; |
| 1898 | case MEP_OPERAND_CROC : |
| 1899 | value = fields->f_ivc2_5u7; |
| 1900 | break; |
| 1901 | case MEP_OPERAND_CROP : |
| 1902 | value = fields->f_ivc2_5u23; |
| 1903 | break; |
| 1904 | case MEP_OPERAND_CRPC : |
| 1905 | value = fields->f_ivc2_5u26; |
| 1906 | break; |
| 1907 | case MEP_OPERAND_CRPP : |
| 1908 | value = fields->f_ivc2_5u18; |
| 1909 | break; |
| 1910 | case MEP_OPERAND_CRQC : |
| 1911 | value = fields->f_ivc2_5u21; |
| 1912 | break; |
| 1913 | case MEP_OPERAND_CRQP : |
| 1914 | value = fields->f_ivc2_5u13; |
| 1915 | break; |
| 1916 | case MEP_OPERAND_CSRN : |
| 1917 | value = fields->f_csrn; |
| 1918 | break; |
| 1919 | case MEP_OPERAND_CSRN_IDX : |
| 1920 | value = fields->f_csrn; |
| 1921 | break; |
| 1922 | case MEP_OPERAND_DBG : |
| 1923 | value = 0; |
| 1924 | break; |
| 1925 | case MEP_OPERAND_DEPC : |
| 1926 | value = 0; |
| 1927 | break; |
| 1928 | case MEP_OPERAND_EPC : |
| 1929 | value = 0; |
| 1930 | break; |
| 1931 | case MEP_OPERAND_EXC : |
| 1932 | value = 0; |
| 1933 | break; |
| 1934 | case MEP_OPERAND_HI : |
| 1935 | value = 0; |
| 1936 | break; |
| 1937 | case MEP_OPERAND_IMM16P0 : |
| 1938 | value = fields->f_ivc2_imm16p0; |
| 1939 | break; |
| 1940 | case MEP_OPERAND_IMM3P12 : |
| 1941 | value = fields->f_ivc2_3u12; |
| 1942 | break; |
| 1943 | case MEP_OPERAND_IMM3P25 : |
| 1944 | value = fields->f_ivc2_3u25; |
| 1945 | break; |
| 1946 | case MEP_OPERAND_IMM3P4 : |
| 1947 | value = fields->f_ivc2_3u4; |
| 1948 | break; |
| 1949 | case MEP_OPERAND_IMM3P5 : |
| 1950 | value = fields->f_ivc2_3u5; |
| 1951 | break; |
| 1952 | case MEP_OPERAND_IMM3P9 : |
| 1953 | value = fields->f_ivc2_3u9; |
| 1954 | break; |
| 1955 | case MEP_OPERAND_IMM4P10 : |
| 1956 | value = fields->f_ivc2_4u10; |
| 1957 | break; |
| 1958 | case MEP_OPERAND_IMM4P4 : |
| 1959 | value = fields->f_ivc2_4u4; |
| 1960 | break; |
| 1961 | case MEP_OPERAND_IMM4P8 : |
| 1962 | value = fields->f_ivc2_4u8; |
| 1963 | break; |
| 1964 | case MEP_OPERAND_IMM5P23 : |
| 1965 | value = fields->f_ivc2_5u23; |
| 1966 | break; |
| 1967 | case MEP_OPERAND_IMM5P3 : |
| 1968 | value = fields->f_ivc2_5u3; |
| 1969 | break; |
| 1970 | case MEP_OPERAND_IMM5P7 : |
| 1971 | value = fields->f_ivc2_5u7; |
| 1972 | break; |
| 1973 | case MEP_OPERAND_IMM5P8 : |
| 1974 | value = fields->f_ivc2_5u8; |
| 1975 | break; |
| 1976 | case MEP_OPERAND_IMM6P2 : |
| 1977 | value = fields->f_ivc2_6u2; |
| 1978 | break; |
| 1979 | case MEP_OPERAND_IMM6P6 : |
| 1980 | value = fields->f_ivc2_6u6; |
| 1981 | break; |
| 1982 | case MEP_OPERAND_IMM8P0 : |
| 1983 | value = fields->f_ivc2_8u0; |
| 1984 | break; |
| 1985 | case MEP_OPERAND_IMM8P20 : |
| 1986 | value = fields->f_ivc2_8u20; |
| 1987 | break; |
| 1988 | case MEP_OPERAND_IMM8P4 : |
| 1989 | value = fields->f_ivc2_8u4; |
| 1990 | break; |
| 1991 | case MEP_OPERAND_IVC_X_0_2 : |
| 1992 | value = fields->f_ivc2_2u0; |
| 1993 | break; |
| 1994 | case MEP_OPERAND_IVC_X_0_3 : |
| 1995 | value = fields->f_ivc2_3u0; |
| 1996 | break; |
| 1997 | case MEP_OPERAND_IVC_X_0_4 : |
| 1998 | value = fields->f_ivc2_4u0; |
| 1999 | break; |
| 2000 | case MEP_OPERAND_IVC_X_0_5 : |
| 2001 | value = fields->f_ivc2_5u0; |
| 2002 | break; |
| 2003 | case MEP_OPERAND_IVC_X_6_1 : |
| 2004 | value = fields->f_ivc2_1u6; |
| 2005 | break; |
| 2006 | case MEP_OPERAND_IVC_X_6_2 : |
| 2007 | value = fields->f_ivc2_2u6; |
| 2008 | break; |
| 2009 | case MEP_OPERAND_IVC_X_6_3 : |
| 2010 | value = fields->f_ivc2_3u6; |
| 2011 | break; |
| 2012 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 2013 | value = 0; |
| 2014 | break; |
| 2015 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 2016 | value = 0; |
| 2017 | break; |
| 2018 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 2019 | value = 0; |
| 2020 | break; |
| 2021 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 2022 | value = 0; |
| 2023 | break; |
| 2024 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 2025 | value = 0; |
| 2026 | break; |
| 2027 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 2028 | value = 0; |
| 2029 | break; |
| 2030 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 2031 | value = 0; |
| 2032 | break; |
| 2033 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 2034 | value = 0; |
| 2035 | break; |
| 2036 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 2037 | value = 0; |
| 2038 | break; |
| 2039 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 2040 | value = 0; |
| 2041 | break; |
| 2042 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 2043 | value = 0; |
| 2044 | break; |
| 2045 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 2046 | value = 0; |
| 2047 | break; |
| 2048 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 2049 | value = 0; |
| 2050 | break; |
| 2051 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 2052 | value = 0; |
| 2053 | break; |
| 2054 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 2055 | value = 0; |
| 2056 | break; |
| 2057 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 2058 | value = 0; |
| 2059 | break; |
| 2060 | case MEP_OPERAND_IVC2_CC : |
| 2061 | value = 0; |
| 2062 | break; |
| 2063 | case MEP_OPERAND_IVC2_COFA0 : |
| 2064 | value = 0; |
| 2065 | break; |
| 2066 | case MEP_OPERAND_IVC2_COFA1 : |
| 2067 | value = 0; |
| 2068 | break; |
| 2069 | case MEP_OPERAND_IVC2_COFR0 : |
| 2070 | value = 0; |
| 2071 | break; |
| 2072 | case MEP_OPERAND_IVC2_COFR1 : |
| 2073 | value = 0; |
| 2074 | break; |
| 2075 | case MEP_OPERAND_IVC2_CSAR0 : |
| 2076 | value = 0; |
| 2077 | break; |
| 2078 | case MEP_OPERAND_IVC2_CSAR1 : |
| 2079 | value = 0; |
| 2080 | break; |
| 2081 | case MEP_OPERAND_IVC2C3CCRN : |
| 2082 | value = fields->f_ivc2_ccrn_c3; |
| 2083 | break; |
| 2084 | case MEP_OPERAND_IVC2CCRN : |
| 2085 | value = fields->f_ivc2_ccrn; |
| 2086 | break; |
| 2087 | case MEP_OPERAND_IVC2CRN : |
| 2088 | value = fields->f_ivc2_crnx; |
| 2089 | break; |
| 2090 | case MEP_OPERAND_IVC2RM : |
| 2091 | value = fields->f_ivc2_crm; |
| 2092 | break; |
| 2093 | case MEP_OPERAND_LO : |
| 2094 | value = 0; |
| 2095 | break; |
| 2096 | case MEP_OPERAND_LP : |
| 2097 | value = 0; |
| 2098 | break; |
| 2099 | case MEP_OPERAND_MB0 : |
| 2100 | value = 0; |
| 2101 | break; |
| 2102 | case MEP_OPERAND_MB1 : |
| 2103 | value = 0; |
| 2104 | break; |
| 2105 | case MEP_OPERAND_ME0 : |
| 2106 | value = 0; |
| 2107 | break; |
| 2108 | case MEP_OPERAND_ME1 : |
| 2109 | value = 0; |
| 2110 | break; |
| 2111 | case MEP_OPERAND_NPC : |
| 2112 | value = 0; |
| 2113 | break; |
| 2114 | case MEP_OPERAND_OPT : |
| 2115 | value = 0; |
| 2116 | break; |
| 2117 | case MEP_OPERAND_PCABS24A2 : |
| 2118 | value = fields->f_24u5a2n; |
| 2119 | break; |
| 2120 | case MEP_OPERAND_PCREL12A2 : |
| 2121 | value = fields->f_12s4a2; |
| 2122 | break; |
| 2123 | case MEP_OPERAND_PCREL17A2 : |
| 2124 | value = fields->f_17s16a2; |
| 2125 | break; |
| 2126 | case MEP_OPERAND_PCREL24A2 : |
| 2127 | value = fields->f_24s5a2n; |
| 2128 | break; |
| 2129 | case MEP_OPERAND_PCREL8A2 : |
| 2130 | value = fields->f_8s8a2; |
| 2131 | break; |
| 2132 | case MEP_OPERAND_PSW : |
| 2133 | value = 0; |
| 2134 | break; |
| 2135 | case MEP_OPERAND_R0 : |
| 2136 | value = 0; |
| 2137 | break; |
| 2138 | case MEP_OPERAND_R1 : |
| 2139 | value = 0; |
| 2140 | break; |
| 2141 | case MEP_OPERAND_RL : |
| 2142 | value = fields->f_rl; |
| 2143 | break; |
| 2144 | case MEP_OPERAND_RL5 : |
| 2145 | value = fields->f_rl5; |
| 2146 | break; |
| 2147 | case MEP_OPERAND_RM : |
| 2148 | value = fields->f_rm; |
| 2149 | break; |
| 2150 | case MEP_OPERAND_RMA : |
| 2151 | value = fields->f_rm; |
| 2152 | break; |
| 2153 | case MEP_OPERAND_RN : |
| 2154 | value = fields->f_rn; |
| 2155 | break; |
| 2156 | case MEP_OPERAND_RN3 : |
| 2157 | value = fields->f_rn3; |
| 2158 | break; |
| 2159 | case MEP_OPERAND_RN3C : |
| 2160 | value = fields->f_rn3; |
| 2161 | break; |
| 2162 | case MEP_OPERAND_RN3L : |
| 2163 | value = fields->f_rn3; |
| 2164 | break; |
| 2165 | case MEP_OPERAND_RN3S : |
| 2166 | value = fields->f_rn3; |
| 2167 | break; |
| 2168 | case MEP_OPERAND_RN3UC : |
| 2169 | value = fields->f_rn3; |
| 2170 | break; |
| 2171 | case MEP_OPERAND_RN3UL : |
| 2172 | value = fields->f_rn3; |
| 2173 | break; |
| 2174 | case MEP_OPERAND_RN3US : |
| 2175 | value = fields->f_rn3; |
| 2176 | break; |
| 2177 | case MEP_OPERAND_RNC : |
| 2178 | value = fields->f_rn; |
| 2179 | break; |
| 2180 | case MEP_OPERAND_RNL : |
| 2181 | value = fields->f_rn; |
| 2182 | break; |
| 2183 | case MEP_OPERAND_RNS : |
| 2184 | value = fields->f_rn; |
| 2185 | break; |
| 2186 | case MEP_OPERAND_RNUC : |
| 2187 | value = fields->f_rn; |
| 2188 | break; |
| 2189 | case MEP_OPERAND_RNUL : |
| 2190 | value = fields->f_rn; |
| 2191 | break; |
| 2192 | case MEP_OPERAND_RNUS : |
| 2193 | value = fields->f_rn; |
| 2194 | break; |
| 2195 | case MEP_OPERAND_SAR : |
| 2196 | value = 0; |
| 2197 | break; |
| 2198 | case MEP_OPERAND_SDISP16 : |
| 2199 | value = fields->f_16s16; |
| 2200 | break; |
| 2201 | case MEP_OPERAND_SIMM16 : |
| 2202 | value = fields->f_16s16; |
| 2203 | break; |
| 2204 | case MEP_OPERAND_SIMM16P0 : |
| 2205 | value = fields->f_ivc2_simm16p0; |
| 2206 | break; |
| 2207 | case MEP_OPERAND_SIMM6 : |
| 2208 | value = fields->f_6s8; |
| 2209 | break; |
| 2210 | case MEP_OPERAND_SIMM8 : |
| 2211 | value = fields->f_8s8; |
| 2212 | break; |
| 2213 | case MEP_OPERAND_SIMM8P0 : |
| 2214 | value = fields->f_ivc2_8s0; |
| 2215 | break; |
| 2216 | case MEP_OPERAND_SIMM8P20 : |
| 2217 | value = fields->f_ivc2_8s20; |
| 2218 | break; |
| 2219 | case MEP_OPERAND_SIMM8P4 : |
| 2220 | value = fields->f_ivc2_8s4; |
| 2221 | break; |
| 2222 | case MEP_OPERAND_SP : |
| 2223 | value = 0; |
| 2224 | break; |
| 2225 | case MEP_OPERAND_SPR : |
| 2226 | value = 0; |
| 2227 | break; |
| 2228 | case MEP_OPERAND_TP : |
| 2229 | value = 0; |
| 2230 | break; |
| 2231 | case MEP_OPERAND_TPR : |
| 2232 | value = 0; |
| 2233 | break; |
| 2234 | case MEP_OPERAND_UDISP2 : |
| 2235 | value = fields->f_2u6; |
| 2236 | break; |
| 2237 | case MEP_OPERAND_UDISP7 : |
| 2238 | value = fields->f_7u9; |
| 2239 | break; |
| 2240 | case MEP_OPERAND_UDISP7A2 : |
| 2241 | value = fields->f_7u9a2; |
| 2242 | break; |
| 2243 | case MEP_OPERAND_UDISP7A4 : |
| 2244 | value = fields->f_7u9a4; |
| 2245 | break; |
| 2246 | case MEP_OPERAND_UIMM16 : |
| 2247 | value = fields->f_16u16; |
| 2248 | break; |
| 2249 | case MEP_OPERAND_UIMM2 : |
| 2250 | value = fields->f_2u10; |
| 2251 | break; |
| 2252 | case MEP_OPERAND_UIMM24 : |
| 2253 | value = fields->f_24u8n; |
| 2254 | break; |
| 2255 | case MEP_OPERAND_UIMM3 : |
| 2256 | value = fields->f_3u5; |
| 2257 | break; |
| 2258 | case MEP_OPERAND_UIMM4 : |
| 2259 | value = fields->f_4u8; |
| 2260 | break; |
| 2261 | case MEP_OPERAND_UIMM5 : |
| 2262 | value = fields->f_5u8; |
| 2263 | break; |
| 2264 | case MEP_OPERAND_UIMM7A4 : |
| 2265 | value = fields->f_7u9a4; |
| 2266 | break; |
| 2267 | case MEP_OPERAND_ZERO : |
| 2268 | value = 0; |
| 2269 | break; |
| 2270 | |
| 2271 | default : |
| 2272 | /* xgettext:c-format */ |
| 2273 | fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), |
| 2274 | opindex); |
| 2275 | abort (); |
| 2276 | } |
| 2277 | |
| 2278 | return value; |
| 2279 | } |
| 2280 | |
| 2281 | bfd_vma |
| 2282 | mep_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 2283 | int opindex, |
| 2284 | const CGEN_FIELDS * fields) |
| 2285 | { |
| 2286 | bfd_vma value; |
| 2287 | |
| 2288 | switch (opindex) |
| 2289 | { |
| 2290 | case MEP_OPERAND_ADDR24A4 : |
| 2291 | value = fields->f_24u8a4n; |
| 2292 | break; |
| 2293 | case MEP_OPERAND_C5RMUIMM20 : |
| 2294 | value = fields->f_c5_rmuimm20; |
| 2295 | break; |
| 2296 | case MEP_OPERAND_C5RNMUIMM24 : |
| 2297 | value = fields->f_c5_rnmuimm24; |
| 2298 | break; |
| 2299 | case MEP_OPERAND_CALLNUM : |
| 2300 | value = fields->f_callnum; |
| 2301 | break; |
| 2302 | case MEP_OPERAND_CCCC : |
| 2303 | value = fields->f_rm; |
| 2304 | break; |
| 2305 | case MEP_OPERAND_CCRN : |
| 2306 | value = fields->f_ccrn; |
| 2307 | break; |
| 2308 | case MEP_OPERAND_CDISP10 : |
| 2309 | value = fields->f_cdisp10; |
| 2310 | break; |
| 2311 | case MEP_OPERAND_CDISP10A2 : |
| 2312 | value = fields->f_cdisp10; |
| 2313 | break; |
| 2314 | case MEP_OPERAND_CDISP10A4 : |
| 2315 | value = fields->f_cdisp10; |
| 2316 | break; |
| 2317 | case MEP_OPERAND_CDISP10A8 : |
| 2318 | value = fields->f_cdisp10; |
| 2319 | break; |
| 2320 | case MEP_OPERAND_CDISP12 : |
| 2321 | value = fields->f_12s20; |
| 2322 | break; |
| 2323 | case MEP_OPERAND_CIMM4 : |
| 2324 | value = fields->f_rn; |
| 2325 | break; |
| 2326 | case MEP_OPERAND_CIMM5 : |
| 2327 | value = fields->f_5u24; |
| 2328 | break; |
| 2329 | case MEP_OPERAND_CODE16 : |
| 2330 | value = fields->f_16u16; |
| 2331 | break; |
| 2332 | case MEP_OPERAND_CODE24 : |
| 2333 | value = fields->f_24u4n; |
| 2334 | break; |
| 2335 | case MEP_OPERAND_CP_FLAG : |
| 2336 | value = 0; |
| 2337 | break; |
| 2338 | case MEP_OPERAND_CRN : |
| 2339 | value = fields->f_crn; |
| 2340 | break; |
| 2341 | case MEP_OPERAND_CRN64 : |
| 2342 | value = fields->f_crn; |
| 2343 | break; |
| 2344 | case MEP_OPERAND_CRNX : |
| 2345 | value = fields->f_crnx; |
| 2346 | break; |
| 2347 | case MEP_OPERAND_CRNX64 : |
| 2348 | value = fields->f_crnx; |
| 2349 | break; |
| 2350 | case MEP_OPERAND_CROC : |
| 2351 | value = fields->f_ivc2_5u7; |
| 2352 | break; |
| 2353 | case MEP_OPERAND_CROP : |
| 2354 | value = fields->f_ivc2_5u23; |
| 2355 | break; |
| 2356 | case MEP_OPERAND_CRPC : |
| 2357 | value = fields->f_ivc2_5u26; |
| 2358 | break; |
| 2359 | case MEP_OPERAND_CRPP : |
| 2360 | value = fields->f_ivc2_5u18; |
| 2361 | break; |
| 2362 | case MEP_OPERAND_CRQC : |
| 2363 | value = fields->f_ivc2_5u21; |
| 2364 | break; |
| 2365 | case MEP_OPERAND_CRQP : |
| 2366 | value = fields->f_ivc2_5u13; |
| 2367 | break; |
| 2368 | case MEP_OPERAND_CSRN : |
| 2369 | value = fields->f_csrn; |
| 2370 | break; |
| 2371 | case MEP_OPERAND_CSRN_IDX : |
| 2372 | value = fields->f_csrn; |
| 2373 | break; |
| 2374 | case MEP_OPERAND_DBG : |
| 2375 | value = 0; |
| 2376 | break; |
| 2377 | case MEP_OPERAND_DEPC : |
| 2378 | value = 0; |
| 2379 | break; |
| 2380 | case MEP_OPERAND_EPC : |
| 2381 | value = 0; |
| 2382 | break; |
| 2383 | case MEP_OPERAND_EXC : |
| 2384 | value = 0; |
| 2385 | break; |
| 2386 | case MEP_OPERAND_HI : |
| 2387 | value = 0; |
| 2388 | break; |
| 2389 | case MEP_OPERAND_IMM16P0 : |
| 2390 | value = fields->f_ivc2_imm16p0; |
| 2391 | break; |
| 2392 | case MEP_OPERAND_IMM3P12 : |
| 2393 | value = fields->f_ivc2_3u12; |
| 2394 | break; |
| 2395 | case MEP_OPERAND_IMM3P25 : |
| 2396 | value = fields->f_ivc2_3u25; |
| 2397 | break; |
| 2398 | case MEP_OPERAND_IMM3P4 : |
| 2399 | value = fields->f_ivc2_3u4; |
| 2400 | break; |
| 2401 | case MEP_OPERAND_IMM3P5 : |
| 2402 | value = fields->f_ivc2_3u5; |
| 2403 | break; |
| 2404 | case MEP_OPERAND_IMM3P9 : |
| 2405 | value = fields->f_ivc2_3u9; |
| 2406 | break; |
| 2407 | case MEP_OPERAND_IMM4P10 : |
| 2408 | value = fields->f_ivc2_4u10; |
| 2409 | break; |
| 2410 | case MEP_OPERAND_IMM4P4 : |
| 2411 | value = fields->f_ivc2_4u4; |
| 2412 | break; |
| 2413 | case MEP_OPERAND_IMM4P8 : |
| 2414 | value = fields->f_ivc2_4u8; |
| 2415 | break; |
| 2416 | case MEP_OPERAND_IMM5P23 : |
| 2417 | value = fields->f_ivc2_5u23; |
| 2418 | break; |
| 2419 | case MEP_OPERAND_IMM5P3 : |
| 2420 | value = fields->f_ivc2_5u3; |
| 2421 | break; |
| 2422 | case MEP_OPERAND_IMM5P7 : |
| 2423 | value = fields->f_ivc2_5u7; |
| 2424 | break; |
| 2425 | case MEP_OPERAND_IMM5P8 : |
| 2426 | value = fields->f_ivc2_5u8; |
| 2427 | break; |
| 2428 | case MEP_OPERAND_IMM6P2 : |
| 2429 | value = fields->f_ivc2_6u2; |
| 2430 | break; |
| 2431 | case MEP_OPERAND_IMM6P6 : |
| 2432 | value = fields->f_ivc2_6u6; |
| 2433 | break; |
| 2434 | case MEP_OPERAND_IMM8P0 : |
| 2435 | value = fields->f_ivc2_8u0; |
| 2436 | break; |
| 2437 | case MEP_OPERAND_IMM8P20 : |
| 2438 | value = fields->f_ivc2_8u20; |
| 2439 | break; |
| 2440 | case MEP_OPERAND_IMM8P4 : |
| 2441 | value = fields->f_ivc2_8u4; |
| 2442 | break; |
| 2443 | case MEP_OPERAND_IVC_X_0_2 : |
| 2444 | value = fields->f_ivc2_2u0; |
| 2445 | break; |
| 2446 | case MEP_OPERAND_IVC_X_0_3 : |
| 2447 | value = fields->f_ivc2_3u0; |
| 2448 | break; |
| 2449 | case MEP_OPERAND_IVC_X_0_4 : |
| 2450 | value = fields->f_ivc2_4u0; |
| 2451 | break; |
| 2452 | case MEP_OPERAND_IVC_X_0_5 : |
| 2453 | value = fields->f_ivc2_5u0; |
| 2454 | break; |
| 2455 | case MEP_OPERAND_IVC_X_6_1 : |
| 2456 | value = fields->f_ivc2_1u6; |
| 2457 | break; |
| 2458 | case MEP_OPERAND_IVC_X_6_2 : |
| 2459 | value = fields->f_ivc2_2u6; |
| 2460 | break; |
| 2461 | case MEP_OPERAND_IVC_X_6_3 : |
| 2462 | value = fields->f_ivc2_3u6; |
| 2463 | break; |
| 2464 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 2465 | value = 0; |
| 2466 | break; |
| 2467 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 2468 | value = 0; |
| 2469 | break; |
| 2470 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 2471 | value = 0; |
| 2472 | break; |
| 2473 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 2474 | value = 0; |
| 2475 | break; |
| 2476 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 2477 | value = 0; |
| 2478 | break; |
| 2479 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 2480 | value = 0; |
| 2481 | break; |
| 2482 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 2483 | value = 0; |
| 2484 | break; |
| 2485 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 2486 | value = 0; |
| 2487 | break; |
| 2488 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 2489 | value = 0; |
| 2490 | break; |
| 2491 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 2492 | value = 0; |
| 2493 | break; |
| 2494 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 2495 | value = 0; |
| 2496 | break; |
| 2497 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 2498 | value = 0; |
| 2499 | break; |
| 2500 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 2501 | value = 0; |
| 2502 | break; |
| 2503 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 2504 | value = 0; |
| 2505 | break; |
| 2506 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 2507 | value = 0; |
| 2508 | break; |
| 2509 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 2510 | value = 0; |
| 2511 | break; |
| 2512 | case MEP_OPERAND_IVC2_CC : |
| 2513 | value = 0; |
| 2514 | break; |
| 2515 | case MEP_OPERAND_IVC2_COFA0 : |
| 2516 | value = 0; |
| 2517 | break; |
| 2518 | case MEP_OPERAND_IVC2_COFA1 : |
| 2519 | value = 0; |
| 2520 | break; |
| 2521 | case MEP_OPERAND_IVC2_COFR0 : |
| 2522 | value = 0; |
| 2523 | break; |
| 2524 | case MEP_OPERAND_IVC2_COFR1 : |
| 2525 | value = 0; |
| 2526 | break; |
| 2527 | case MEP_OPERAND_IVC2_CSAR0 : |
| 2528 | value = 0; |
| 2529 | break; |
| 2530 | case MEP_OPERAND_IVC2_CSAR1 : |
| 2531 | value = 0; |
| 2532 | break; |
| 2533 | case MEP_OPERAND_IVC2C3CCRN : |
| 2534 | value = fields->f_ivc2_ccrn_c3; |
| 2535 | break; |
| 2536 | case MEP_OPERAND_IVC2CCRN : |
| 2537 | value = fields->f_ivc2_ccrn; |
| 2538 | break; |
| 2539 | case MEP_OPERAND_IVC2CRN : |
| 2540 | value = fields->f_ivc2_crnx; |
| 2541 | break; |
| 2542 | case MEP_OPERAND_IVC2RM : |
| 2543 | value = fields->f_ivc2_crm; |
| 2544 | break; |
| 2545 | case MEP_OPERAND_LO : |
| 2546 | value = 0; |
| 2547 | break; |
| 2548 | case MEP_OPERAND_LP : |
| 2549 | value = 0; |
| 2550 | break; |
| 2551 | case MEP_OPERAND_MB0 : |
| 2552 | value = 0; |
| 2553 | break; |
| 2554 | case MEP_OPERAND_MB1 : |
| 2555 | value = 0; |
| 2556 | break; |
| 2557 | case MEP_OPERAND_ME0 : |
| 2558 | value = 0; |
| 2559 | break; |
| 2560 | case MEP_OPERAND_ME1 : |
| 2561 | value = 0; |
| 2562 | break; |
| 2563 | case MEP_OPERAND_NPC : |
| 2564 | value = 0; |
| 2565 | break; |
| 2566 | case MEP_OPERAND_OPT : |
| 2567 | value = 0; |
| 2568 | break; |
| 2569 | case MEP_OPERAND_PCABS24A2 : |
| 2570 | value = fields->f_24u5a2n; |
| 2571 | break; |
| 2572 | case MEP_OPERAND_PCREL12A2 : |
| 2573 | value = fields->f_12s4a2; |
| 2574 | break; |
| 2575 | case MEP_OPERAND_PCREL17A2 : |
| 2576 | value = fields->f_17s16a2; |
| 2577 | break; |
| 2578 | case MEP_OPERAND_PCREL24A2 : |
| 2579 | value = fields->f_24s5a2n; |
| 2580 | break; |
| 2581 | case MEP_OPERAND_PCREL8A2 : |
| 2582 | value = fields->f_8s8a2; |
| 2583 | break; |
| 2584 | case MEP_OPERAND_PSW : |
| 2585 | value = 0; |
| 2586 | break; |
| 2587 | case MEP_OPERAND_R0 : |
| 2588 | value = 0; |
| 2589 | break; |
| 2590 | case MEP_OPERAND_R1 : |
| 2591 | value = 0; |
| 2592 | break; |
| 2593 | case MEP_OPERAND_RL : |
| 2594 | value = fields->f_rl; |
| 2595 | break; |
| 2596 | case MEP_OPERAND_RL5 : |
| 2597 | value = fields->f_rl5; |
| 2598 | break; |
| 2599 | case MEP_OPERAND_RM : |
| 2600 | value = fields->f_rm; |
| 2601 | break; |
| 2602 | case MEP_OPERAND_RMA : |
| 2603 | value = fields->f_rm; |
| 2604 | break; |
| 2605 | case MEP_OPERAND_RN : |
| 2606 | value = fields->f_rn; |
| 2607 | break; |
| 2608 | case MEP_OPERAND_RN3 : |
| 2609 | value = fields->f_rn3; |
| 2610 | break; |
| 2611 | case MEP_OPERAND_RN3C : |
| 2612 | value = fields->f_rn3; |
| 2613 | break; |
| 2614 | case MEP_OPERAND_RN3L : |
| 2615 | value = fields->f_rn3; |
| 2616 | break; |
| 2617 | case MEP_OPERAND_RN3S : |
| 2618 | value = fields->f_rn3; |
| 2619 | break; |
| 2620 | case MEP_OPERAND_RN3UC : |
| 2621 | value = fields->f_rn3; |
| 2622 | break; |
| 2623 | case MEP_OPERAND_RN3UL : |
| 2624 | value = fields->f_rn3; |
| 2625 | break; |
| 2626 | case MEP_OPERAND_RN3US : |
| 2627 | value = fields->f_rn3; |
| 2628 | break; |
| 2629 | case MEP_OPERAND_RNC : |
| 2630 | value = fields->f_rn; |
| 2631 | break; |
| 2632 | case MEP_OPERAND_RNL : |
| 2633 | value = fields->f_rn; |
| 2634 | break; |
| 2635 | case MEP_OPERAND_RNS : |
| 2636 | value = fields->f_rn; |
| 2637 | break; |
| 2638 | case MEP_OPERAND_RNUC : |
| 2639 | value = fields->f_rn; |
| 2640 | break; |
| 2641 | case MEP_OPERAND_RNUL : |
| 2642 | value = fields->f_rn; |
| 2643 | break; |
| 2644 | case MEP_OPERAND_RNUS : |
| 2645 | value = fields->f_rn; |
| 2646 | break; |
| 2647 | case MEP_OPERAND_SAR : |
| 2648 | value = 0; |
| 2649 | break; |
| 2650 | case MEP_OPERAND_SDISP16 : |
| 2651 | value = fields->f_16s16; |
| 2652 | break; |
| 2653 | case MEP_OPERAND_SIMM16 : |
| 2654 | value = fields->f_16s16; |
| 2655 | break; |
| 2656 | case MEP_OPERAND_SIMM16P0 : |
| 2657 | value = fields->f_ivc2_simm16p0; |
| 2658 | break; |
| 2659 | case MEP_OPERAND_SIMM6 : |
| 2660 | value = fields->f_6s8; |
| 2661 | break; |
| 2662 | case MEP_OPERAND_SIMM8 : |
| 2663 | value = fields->f_8s8; |
| 2664 | break; |
| 2665 | case MEP_OPERAND_SIMM8P0 : |
| 2666 | value = fields->f_ivc2_8s0; |
| 2667 | break; |
| 2668 | case MEP_OPERAND_SIMM8P20 : |
| 2669 | value = fields->f_ivc2_8s20; |
| 2670 | break; |
| 2671 | case MEP_OPERAND_SIMM8P4 : |
| 2672 | value = fields->f_ivc2_8s4; |
| 2673 | break; |
| 2674 | case MEP_OPERAND_SP : |
| 2675 | value = 0; |
| 2676 | break; |
| 2677 | case MEP_OPERAND_SPR : |
| 2678 | value = 0; |
| 2679 | break; |
| 2680 | case MEP_OPERAND_TP : |
| 2681 | value = 0; |
| 2682 | break; |
| 2683 | case MEP_OPERAND_TPR : |
| 2684 | value = 0; |
| 2685 | break; |
| 2686 | case MEP_OPERAND_UDISP2 : |
| 2687 | value = fields->f_2u6; |
| 2688 | break; |
| 2689 | case MEP_OPERAND_UDISP7 : |
| 2690 | value = fields->f_7u9; |
| 2691 | break; |
| 2692 | case MEP_OPERAND_UDISP7A2 : |
| 2693 | value = fields->f_7u9a2; |
| 2694 | break; |
| 2695 | case MEP_OPERAND_UDISP7A4 : |
| 2696 | value = fields->f_7u9a4; |
| 2697 | break; |
| 2698 | case MEP_OPERAND_UIMM16 : |
| 2699 | value = fields->f_16u16; |
| 2700 | break; |
| 2701 | case MEP_OPERAND_UIMM2 : |
| 2702 | value = fields->f_2u10; |
| 2703 | break; |
| 2704 | case MEP_OPERAND_UIMM24 : |
| 2705 | value = fields->f_24u8n; |
| 2706 | break; |
| 2707 | case MEP_OPERAND_UIMM3 : |
| 2708 | value = fields->f_3u5; |
| 2709 | break; |
| 2710 | case MEP_OPERAND_UIMM4 : |
| 2711 | value = fields->f_4u8; |
| 2712 | break; |
| 2713 | case MEP_OPERAND_UIMM5 : |
| 2714 | value = fields->f_5u8; |
| 2715 | break; |
| 2716 | case MEP_OPERAND_UIMM7A4 : |
| 2717 | value = fields->f_7u9a4; |
| 2718 | break; |
| 2719 | case MEP_OPERAND_ZERO : |
| 2720 | value = 0; |
| 2721 | break; |
| 2722 | |
| 2723 | default : |
| 2724 | /* xgettext:c-format */ |
| 2725 | fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), |
| 2726 | opindex); |
| 2727 | abort (); |
| 2728 | } |
| 2729 | |
| 2730 | return value; |
| 2731 | } |
| 2732 | |
| 2733 | void mep_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); |
| 2734 | void mep_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); |
| 2735 | |
| 2736 | /* Stuffing values in cgen_fields is handled by a collection of functions. |
| 2737 | They are distinguished by the type of the VALUE argument they accept. |
| 2738 | TODO: floating point, inlining support, remove cases where argument type |
| 2739 | not appropriate. */ |
| 2740 | |
| 2741 | void |
| 2742 | mep_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 2743 | int opindex, |
| 2744 | CGEN_FIELDS * fields, |
| 2745 | int value) |
| 2746 | { |
| 2747 | switch (opindex) |
| 2748 | { |
| 2749 | case MEP_OPERAND_ADDR24A4 : |
| 2750 | fields->f_24u8a4n = value; |
| 2751 | break; |
| 2752 | case MEP_OPERAND_C5RMUIMM20 : |
| 2753 | fields->f_c5_rmuimm20 = value; |
| 2754 | break; |
| 2755 | case MEP_OPERAND_C5RNMUIMM24 : |
| 2756 | fields->f_c5_rnmuimm24 = value; |
| 2757 | break; |
| 2758 | case MEP_OPERAND_CALLNUM : |
| 2759 | fields->f_callnum = value; |
| 2760 | break; |
| 2761 | case MEP_OPERAND_CCCC : |
| 2762 | fields->f_rm = value; |
| 2763 | break; |
| 2764 | case MEP_OPERAND_CCRN : |
| 2765 | fields->f_ccrn = value; |
| 2766 | break; |
| 2767 | case MEP_OPERAND_CDISP10 : |
| 2768 | fields->f_cdisp10 = value; |
| 2769 | break; |
| 2770 | case MEP_OPERAND_CDISP10A2 : |
| 2771 | fields->f_cdisp10 = value; |
| 2772 | break; |
| 2773 | case MEP_OPERAND_CDISP10A4 : |
| 2774 | fields->f_cdisp10 = value; |
| 2775 | break; |
| 2776 | case MEP_OPERAND_CDISP10A8 : |
| 2777 | fields->f_cdisp10 = value; |
| 2778 | break; |
| 2779 | case MEP_OPERAND_CDISP12 : |
| 2780 | fields->f_12s20 = value; |
| 2781 | break; |
| 2782 | case MEP_OPERAND_CIMM4 : |
| 2783 | fields->f_rn = value; |
| 2784 | break; |
| 2785 | case MEP_OPERAND_CIMM5 : |
| 2786 | fields->f_5u24 = value; |
| 2787 | break; |
| 2788 | case MEP_OPERAND_CODE16 : |
| 2789 | fields->f_16u16 = value; |
| 2790 | break; |
| 2791 | case MEP_OPERAND_CODE24 : |
| 2792 | fields->f_24u4n = value; |
| 2793 | break; |
| 2794 | case MEP_OPERAND_CP_FLAG : |
| 2795 | break; |
| 2796 | case MEP_OPERAND_CRN : |
| 2797 | fields->f_crn = value; |
| 2798 | break; |
| 2799 | case MEP_OPERAND_CRN64 : |
| 2800 | fields->f_crn = value; |
| 2801 | break; |
| 2802 | case MEP_OPERAND_CRNX : |
| 2803 | fields->f_crnx = value; |
| 2804 | break; |
| 2805 | case MEP_OPERAND_CRNX64 : |
| 2806 | fields->f_crnx = value; |
| 2807 | break; |
| 2808 | case MEP_OPERAND_CROC : |
| 2809 | fields->f_ivc2_5u7 = value; |
| 2810 | break; |
| 2811 | case MEP_OPERAND_CROP : |
| 2812 | fields->f_ivc2_5u23 = value; |
| 2813 | break; |
| 2814 | case MEP_OPERAND_CRPC : |
| 2815 | fields->f_ivc2_5u26 = value; |
| 2816 | break; |
| 2817 | case MEP_OPERAND_CRPP : |
| 2818 | fields->f_ivc2_5u18 = value; |
| 2819 | break; |
| 2820 | case MEP_OPERAND_CRQC : |
| 2821 | fields->f_ivc2_5u21 = value; |
| 2822 | break; |
| 2823 | case MEP_OPERAND_CRQP : |
| 2824 | fields->f_ivc2_5u13 = value; |
| 2825 | break; |
| 2826 | case MEP_OPERAND_CSRN : |
| 2827 | fields->f_csrn = value; |
| 2828 | break; |
| 2829 | case MEP_OPERAND_CSRN_IDX : |
| 2830 | fields->f_csrn = value; |
| 2831 | break; |
| 2832 | case MEP_OPERAND_DBG : |
| 2833 | break; |
| 2834 | case MEP_OPERAND_DEPC : |
| 2835 | break; |
| 2836 | case MEP_OPERAND_EPC : |
| 2837 | break; |
| 2838 | case MEP_OPERAND_EXC : |
| 2839 | break; |
| 2840 | case MEP_OPERAND_HI : |
| 2841 | break; |
| 2842 | case MEP_OPERAND_IMM16P0 : |
| 2843 | fields->f_ivc2_imm16p0 = value; |
| 2844 | break; |
| 2845 | case MEP_OPERAND_IMM3P12 : |
| 2846 | fields->f_ivc2_3u12 = value; |
| 2847 | break; |
| 2848 | case MEP_OPERAND_IMM3P25 : |
| 2849 | fields->f_ivc2_3u25 = value; |
| 2850 | break; |
| 2851 | case MEP_OPERAND_IMM3P4 : |
| 2852 | fields->f_ivc2_3u4 = value; |
| 2853 | break; |
| 2854 | case MEP_OPERAND_IMM3P5 : |
| 2855 | fields->f_ivc2_3u5 = value; |
| 2856 | break; |
| 2857 | case MEP_OPERAND_IMM3P9 : |
| 2858 | fields->f_ivc2_3u9 = value; |
| 2859 | break; |
| 2860 | case MEP_OPERAND_IMM4P10 : |
| 2861 | fields->f_ivc2_4u10 = value; |
| 2862 | break; |
| 2863 | case MEP_OPERAND_IMM4P4 : |
| 2864 | fields->f_ivc2_4u4 = value; |
| 2865 | break; |
| 2866 | case MEP_OPERAND_IMM4P8 : |
| 2867 | fields->f_ivc2_4u8 = value; |
| 2868 | break; |
| 2869 | case MEP_OPERAND_IMM5P23 : |
| 2870 | fields->f_ivc2_5u23 = value; |
| 2871 | break; |
| 2872 | case MEP_OPERAND_IMM5P3 : |
| 2873 | fields->f_ivc2_5u3 = value; |
| 2874 | break; |
| 2875 | case MEP_OPERAND_IMM5P7 : |
| 2876 | fields->f_ivc2_5u7 = value; |
| 2877 | break; |
| 2878 | case MEP_OPERAND_IMM5P8 : |
| 2879 | fields->f_ivc2_5u8 = value; |
| 2880 | break; |
| 2881 | case MEP_OPERAND_IMM6P2 : |
| 2882 | fields->f_ivc2_6u2 = value; |
| 2883 | break; |
| 2884 | case MEP_OPERAND_IMM6P6 : |
| 2885 | fields->f_ivc2_6u6 = value; |
| 2886 | break; |
| 2887 | case MEP_OPERAND_IMM8P0 : |
| 2888 | fields->f_ivc2_8u0 = value; |
| 2889 | break; |
| 2890 | case MEP_OPERAND_IMM8P20 : |
| 2891 | fields->f_ivc2_8u20 = value; |
| 2892 | break; |
| 2893 | case MEP_OPERAND_IMM8P4 : |
| 2894 | fields->f_ivc2_8u4 = value; |
| 2895 | break; |
| 2896 | case MEP_OPERAND_IVC_X_0_2 : |
| 2897 | fields->f_ivc2_2u0 = value; |
| 2898 | break; |
| 2899 | case MEP_OPERAND_IVC_X_0_3 : |
| 2900 | fields->f_ivc2_3u0 = value; |
| 2901 | break; |
| 2902 | case MEP_OPERAND_IVC_X_0_4 : |
| 2903 | fields->f_ivc2_4u0 = value; |
| 2904 | break; |
| 2905 | case MEP_OPERAND_IVC_X_0_5 : |
| 2906 | fields->f_ivc2_5u0 = value; |
| 2907 | break; |
| 2908 | case MEP_OPERAND_IVC_X_6_1 : |
| 2909 | fields->f_ivc2_1u6 = value; |
| 2910 | break; |
| 2911 | case MEP_OPERAND_IVC_X_6_2 : |
| 2912 | fields->f_ivc2_2u6 = value; |
| 2913 | break; |
| 2914 | case MEP_OPERAND_IVC_X_6_3 : |
| 2915 | fields->f_ivc2_3u6 = value; |
| 2916 | break; |
| 2917 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 2918 | break; |
| 2919 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 2920 | break; |
| 2921 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 2922 | break; |
| 2923 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 2924 | break; |
| 2925 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 2926 | break; |
| 2927 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 2928 | break; |
| 2929 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 2930 | break; |
| 2931 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 2932 | break; |
| 2933 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 2934 | break; |
| 2935 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 2936 | break; |
| 2937 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 2938 | break; |
| 2939 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 2940 | break; |
| 2941 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 2942 | break; |
| 2943 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 2944 | break; |
| 2945 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 2946 | break; |
| 2947 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 2948 | break; |
| 2949 | case MEP_OPERAND_IVC2_CC : |
| 2950 | break; |
| 2951 | case MEP_OPERAND_IVC2_COFA0 : |
| 2952 | break; |
| 2953 | case MEP_OPERAND_IVC2_COFA1 : |
| 2954 | break; |
| 2955 | case MEP_OPERAND_IVC2_COFR0 : |
| 2956 | break; |
| 2957 | case MEP_OPERAND_IVC2_COFR1 : |
| 2958 | break; |
| 2959 | case MEP_OPERAND_IVC2_CSAR0 : |
| 2960 | break; |
| 2961 | case MEP_OPERAND_IVC2_CSAR1 : |
| 2962 | break; |
| 2963 | case MEP_OPERAND_IVC2C3CCRN : |
| 2964 | fields->f_ivc2_ccrn_c3 = value; |
| 2965 | break; |
| 2966 | case MEP_OPERAND_IVC2CCRN : |
| 2967 | fields->f_ivc2_ccrn = value; |
| 2968 | break; |
| 2969 | case MEP_OPERAND_IVC2CRN : |
| 2970 | fields->f_ivc2_crnx = value; |
| 2971 | break; |
| 2972 | case MEP_OPERAND_IVC2RM : |
| 2973 | fields->f_ivc2_crm = value; |
| 2974 | break; |
| 2975 | case MEP_OPERAND_LO : |
| 2976 | break; |
| 2977 | case MEP_OPERAND_LP : |
| 2978 | break; |
| 2979 | case MEP_OPERAND_MB0 : |
| 2980 | break; |
| 2981 | case MEP_OPERAND_MB1 : |
| 2982 | break; |
| 2983 | case MEP_OPERAND_ME0 : |
| 2984 | break; |
| 2985 | case MEP_OPERAND_ME1 : |
| 2986 | break; |
| 2987 | case MEP_OPERAND_NPC : |
| 2988 | break; |
| 2989 | case MEP_OPERAND_OPT : |
| 2990 | break; |
| 2991 | case MEP_OPERAND_PCABS24A2 : |
| 2992 | fields->f_24u5a2n = value; |
| 2993 | break; |
| 2994 | case MEP_OPERAND_PCREL12A2 : |
| 2995 | fields->f_12s4a2 = value; |
| 2996 | break; |
| 2997 | case MEP_OPERAND_PCREL17A2 : |
| 2998 | fields->f_17s16a2 = value; |
| 2999 | break; |
| 3000 | case MEP_OPERAND_PCREL24A2 : |
| 3001 | fields->f_24s5a2n = value; |
| 3002 | break; |
| 3003 | case MEP_OPERAND_PCREL8A2 : |
| 3004 | fields->f_8s8a2 = value; |
| 3005 | break; |
| 3006 | case MEP_OPERAND_PSW : |
| 3007 | break; |
| 3008 | case MEP_OPERAND_R0 : |
| 3009 | break; |
| 3010 | case MEP_OPERAND_R1 : |
| 3011 | break; |
| 3012 | case MEP_OPERAND_RL : |
| 3013 | fields->f_rl = value; |
| 3014 | break; |
| 3015 | case MEP_OPERAND_RL5 : |
| 3016 | fields->f_rl5 = value; |
| 3017 | break; |
| 3018 | case MEP_OPERAND_RM : |
| 3019 | fields->f_rm = value; |
| 3020 | break; |
| 3021 | case MEP_OPERAND_RMA : |
| 3022 | fields->f_rm = value; |
| 3023 | break; |
| 3024 | case MEP_OPERAND_RN : |
| 3025 | fields->f_rn = value; |
| 3026 | break; |
| 3027 | case MEP_OPERAND_RN3 : |
| 3028 | fields->f_rn3 = value; |
| 3029 | break; |
| 3030 | case MEP_OPERAND_RN3C : |
| 3031 | fields->f_rn3 = value; |
| 3032 | break; |
| 3033 | case MEP_OPERAND_RN3L : |
| 3034 | fields->f_rn3 = value; |
| 3035 | break; |
| 3036 | case MEP_OPERAND_RN3S : |
| 3037 | fields->f_rn3 = value; |
| 3038 | break; |
| 3039 | case MEP_OPERAND_RN3UC : |
| 3040 | fields->f_rn3 = value; |
| 3041 | break; |
| 3042 | case MEP_OPERAND_RN3UL : |
| 3043 | fields->f_rn3 = value; |
| 3044 | break; |
| 3045 | case MEP_OPERAND_RN3US : |
| 3046 | fields->f_rn3 = value; |
| 3047 | break; |
| 3048 | case MEP_OPERAND_RNC : |
| 3049 | fields->f_rn = value; |
| 3050 | break; |
| 3051 | case MEP_OPERAND_RNL : |
| 3052 | fields->f_rn = value; |
| 3053 | break; |
| 3054 | case MEP_OPERAND_RNS : |
| 3055 | fields->f_rn = value; |
| 3056 | break; |
| 3057 | case MEP_OPERAND_RNUC : |
| 3058 | fields->f_rn = value; |
| 3059 | break; |
| 3060 | case MEP_OPERAND_RNUL : |
| 3061 | fields->f_rn = value; |
| 3062 | break; |
| 3063 | case MEP_OPERAND_RNUS : |
| 3064 | fields->f_rn = value; |
| 3065 | break; |
| 3066 | case MEP_OPERAND_SAR : |
| 3067 | break; |
| 3068 | case MEP_OPERAND_SDISP16 : |
| 3069 | fields->f_16s16 = value; |
| 3070 | break; |
| 3071 | case MEP_OPERAND_SIMM16 : |
| 3072 | fields->f_16s16 = value; |
| 3073 | break; |
| 3074 | case MEP_OPERAND_SIMM16P0 : |
| 3075 | fields->f_ivc2_simm16p0 = value; |
| 3076 | break; |
| 3077 | case MEP_OPERAND_SIMM6 : |
| 3078 | fields->f_6s8 = value; |
| 3079 | break; |
| 3080 | case MEP_OPERAND_SIMM8 : |
| 3081 | fields->f_8s8 = value; |
| 3082 | break; |
| 3083 | case MEP_OPERAND_SIMM8P0 : |
| 3084 | fields->f_ivc2_8s0 = value; |
| 3085 | break; |
| 3086 | case MEP_OPERAND_SIMM8P20 : |
| 3087 | fields->f_ivc2_8s20 = value; |
| 3088 | break; |
| 3089 | case MEP_OPERAND_SIMM8P4 : |
| 3090 | fields->f_ivc2_8s4 = value; |
| 3091 | break; |
| 3092 | case MEP_OPERAND_SP : |
| 3093 | break; |
| 3094 | case MEP_OPERAND_SPR : |
| 3095 | break; |
| 3096 | case MEP_OPERAND_TP : |
| 3097 | break; |
| 3098 | case MEP_OPERAND_TPR : |
| 3099 | break; |
| 3100 | case MEP_OPERAND_UDISP2 : |
| 3101 | fields->f_2u6 = value; |
| 3102 | break; |
| 3103 | case MEP_OPERAND_UDISP7 : |
| 3104 | fields->f_7u9 = value; |
| 3105 | break; |
| 3106 | case MEP_OPERAND_UDISP7A2 : |
| 3107 | fields->f_7u9a2 = value; |
| 3108 | break; |
| 3109 | case MEP_OPERAND_UDISP7A4 : |
| 3110 | fields->f_7u9a4 = value; |
| 3111 | break; |
| 3112 | case MEP_OPERAND_UIMM16 : |
| 3113 | fields->f_16u16 = value; |
| 3114 | break; |
| 3115 | case MEP_OPERAND_UIMM2 : |
| 3116 | fields->f_2u10 = value; |
| 3117 | break; |
| 3118 | case MEP_OPERAND_UIMM24 : |
| 3119 | fields->f_24u8n = value; |
| 3120 | break; |
| 3121 | case MEP_OPERAND_UIMM3 : |
| 3122 | fields->f_3u5 = value; |
| 3123 | break; |
| 3124 | case MEP_OPERAND_UIMM4 : |
| 3125 | fields->f_4u8 = value; |
| 3126 | break; |
| 3127 | case MEP_OPERAND_UIMM5 : |
| 3128 | fields->f_5u8 = value; |
| 3129 | break; |
| 3130 | case MEP_OPERAND_UIMM7A4 : |
| 3131 | fields->f_7u9a4 = value; |
| 3132 | break; |
| 3133 | case MEP_OPERAND_ZERO : |
| 3134 | break; |
| 3135 | |
| 3136 | default : |
| 3137 | /* xgettext:c-format */ |
| 3138 | fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), |
| 3139 | opindex); |
| 3140 | abort (); |
| 3141 | } |
| 3142 | } |
| 3143 | |
| 3144 | void |
| 3145 | mep_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, |
| 3146 | int opindex, |
| 3147 | CGEN_FIELDS * fields, |
| 3148 | bfd_vma value) |
| 3149 | { |
| 3150 | switch (opindex) |
| 3151 | { |
| 3152 | case MEP_OPERAND_ADDR24A4 : |
| 3153 | fields->f_24u8a4n = value; |
| 3154 | break; |
| 3155 | case MEP_OPERAND_C5RMUIMM20 : |
| 3156 | fields->f_c5_rmuimm20 = value; |
| 3157 | break; |
| 3158 | case MEP_OPERAND_C5RNMUIMM24 : |
| 3159 | fields->f_c5_rnmuimm24 = value; |
| 3160 | break; |
| 3161 | case MEP_OPERAND_CALLNUM : |
| 3162 | fields->f_callnum = value; |
| 3163 | break; |
| 3164 | case MEP_OPERAND_CCCC : |
| 3165 | fields->f_rm = value; |
| 3166 | break; |
| 3167 | case MEP_OPERAND_CCRN : |
| 3168 | fields->f_ccrn = value; |
| 3169 | break; |
| 3170 | case MEP_OPERAND_CDISP10 : |
| 3171 | fields->f_cdisp10 = value; |
| 3172 | break; |
| 3173 | case MEP_OPERAND_CDISP10A2 : |
| 3174 | fields->f_cdisp10 = value; |
| 3175 | break; |
| 3176 | case MEP_OPERAND_CDISP10A4 : |
| 3177 | fields->f_cdisp10 = value; |
| 3178 | break; |
| 3179 | case MEP_OPERAND_CDISP10A8 : |
| 3180 | fields->f_cdisp10 = value; |
| 3181 | break; |
| 3182 | case MEP_OPERAND_CDISP12 : |
| 3183 | fields->f_12s20 = value; |
| 3184 | break; |
| 3185 | case MEP_OPERAND_CIMM4 : |
| 3186 | fields->f_rn = value; |
| 3187 | break; |
| 3188 | case MEP_OPERAND_CIMM5 : |
| 3189 | fields->f_5u24 = value; |
| 3190 | break; |
| 3191 | case MEP_OPERAND_CODE16 : |
| 3192 | fields->f_16u16 = value; |
| 3193 | break; |
| 3194 | case MEP_OPERAND_CODE24 : |
| 3195 | fields->f_24u4n = value; |
| 3196 | break; |
| 3197 | case MEP_OPERAND_CP_FLAG : |
| 3198 | break; |
| 3199 | case MEP_OPERAND_CRN : |
| 3200 | fields->f_crn = value; |
| 3201 | break; |
| 3202 | case MEP_OPERAND_CRN64 : |
| 3203 | fields->f_crn = value; |
| 3204 | break; |
| 3205 | case MEP_OPERAND_CRNX : |
| 3206 | fields->f_crnx = value; |
| 3207 | break; |
| 3208 | case MEP_OPERAND_CRNX64 : |
| 3209 | fields->f_crnx = value; |
| 3210 | break; |
| 3211 | case MEP_OPERAND_CROC : |
| 3212 | fields->f_ivc2_5u7 = value; |
| 3213 | break; |
| 3214 | case MEP_OPERAND_CROP : |
| 3215 | fields->f_ivc2_5u23 = value; |
| 3216 | break; |
| 3217 | case MEP_OPERAND_CRPC : |
| 3218 | fields->f_ivc2_5u26 = value; |
| 3219 | break; |
| 3220 | case MEP_OPERAND_CRPP : |
| 3221 | fields->f_ivc2_5u18 = value; |
| 3222 | break; |
| 3223 | case MEP_OPERAND_CRQC : |
| 3224 | fields->f_ivc2_5u21 = value; |
| 3225 | break; |
| 3226 | case MEP_OPERAND_CRQP : |
| 3227 | fields->f_ivc2_5u13 = value; |
| 3228 | break; |
| 3229 | case MEP_OPERAND_CSRN : |
| 3230 | fields->f_csrn = value; |
| 3231 | break; |
| 3232 | case MEP_OPERAND_CSRN_IDX : |
| 3233 | fields->f_csrn = value; |
| 3234 | break; |
| 3235 | case MEP_OPERAND_DBG : |
| 3236 | break; |
| 3237 | case MEP_OPERAND_DEPC : |
| 3238 | break; |
| 3239 | case MEP_OPERAND_EPC : |
| 3240 | break; |
| 3241 | case MEP_OPERAND_EXC : |
| 3242 | break; |
| 3243 | case MEP_OPERAND_HI : |
| 3244 | break; |
| 3245 | case MEP_OPERAND_IMM16P0 : |
| 3246 | fields->f_ivc2_imm16p0 = value; |
| 3247 | break; |
| 3248 | case MEP_OPERAND_IMM3P12 : |
| 3249 | fields->f_ivc2_3u12 = value; |
| 3250 | break; |
| 3251 | case MEP_OPERAND_IMM3P25 : |
| 3252 | fields->f_ivc2_3u25 = value; |
| 3253 | break; |
| 3254 | case MEP_OPERAND_IMM3P4 : |
| 3255 | fields->f_ivc2_3u4 = value; |
| 3256 | break; |
| 3257 | case MEP_OPERAND_IMM3P5 : |
| 3258 | fields->f_ivc2_3u5 = value; |
| 3259 | break; |
| 3260 | case MEP_OPERAND_IMM3P9 : |
| 3261 | fields->f_ivc2_3u9 = value; |
| 3262 | break; |
| 3263 | case MEP_OPERAND_IMM4P10 : |
| 3264 | fields->f_ivc2_4u10 = value; |
| 3265 | break; |
| 3266 | case MEP_OPERAND_IMM4P4 : |
| 3267 | fields->f_ivc2_4u4 = value; |
| 3268 | break; |
| 3269 | case MEP_OPERAND_IMM4P8 : |
| 3270 | fields->f_ivc2_4u8 = value; |
| 3271 | break; |
| 3272 | case MEP_OPERAND_IMM5P23 : |
| 3273 | fields->f_ivc2_5u23 = value; |
| 3274 | break; |
| 3275 | case MEP_OPERAND_IMM5P3 : |
| 3276 | fields->f_ivc2_5u3 = value; |
| 3277 | break; |
| 3278 | case MEP_OPERAND_IMM5P7 : |
| 3279 | fields->f_ivc2_5u7 = value; |
| 3280 | break; |
| 3281 | case MEP_OPERAND_IMM5P8 : |
| 3282 | fields->f_ivc2_5u8 = value; |
| 3283 | break; |
| 3284 | case MEP_OPERAND_IMM6P2 : |
| 3285 | fields->f_ivc2_6u2 = value; |
| 3286 | break; |
| 3287 | case MEP_OPERAND_IMM6P6 : |
| 3288 | fields->f_ivc2_6u6 = value; |
| 3289 | break; |
| 3290 | case MEP_OPERAND_IMM8P0 : |
| 3291 | fields->f_ivc2_8u0 = value; |
| 3292 | break; |
| 3293 | case MEP_OPERAND_IMM8P20 : |
| 3294 | fields->f_ivc2_8u20 = value; |
| 3295 | break; |
| 3296 | case MEP_OPERAND_IMM8P4 : |
| 3297 | fields->f_ivc2_8u4 = value; |
| 3298 | break; |
| 3299 | case MEP_OPERAND_IVC_X_0_2 : |
| 3300 | fields->f_ivc2_2u0 = value; |
| 3301 | break; |
| 3302 | case MEP_OPERAND_IVC_X_0_3 : |
| 3303 | fields->f_ivc2_3u0 = value; |
| 3304 | break; |
| 3305 | case MEP_OPERAND_IVC_X_0_4 : |
| 3306 | fields->f_ivc2_4u0 = value; |
| 3307 | break; |
| 3308 | case MEP_OPERAND_IVC_X_0_5 : |
| 3309 | fields->f_ivc2_5u0 = value; |
| 3310 | break; |
| 3311 | case MEP_OPERAND_IVC_X_6_1 : |
| 3312 | fields->f_ivc2_1u6 = value; |
| 3313 | break; |
| 3314 | case MEP_OPERAND_IVC_X_6_2 : |
| 3315 | fields->f_ivc2_2u6 = value; |
| 3316 | break; |
| 3317 | case MEP_OPERAND_IVC_X_6_3 : |
| 3318 | fields->f_ivc2_3u6 = value; |
| 3319 | break; |
| 3320 | case MEP_OPERAND_IVC2_ACC0_0 : |
| 3321 | break; |
| 3322 | case MEP_OPERAND_IVC2_ACC0_1 : |
| 3323 | break; |
| 3324 | case MEP_OPERAND_IVC2_ACC0_2 : |
| 3325 | break; |
| 3326 | case MEP_OPERAND_IVC2_ACC0_3 : |
| 3327 | break; |
| 3328 | case MEP_OPERAND_IVC2_ACC0_4 : |
| 3329 | break; |
| 3330 | case MEP_OPERAND_IVC2_ACC0_5 : |
| 3331 | break; |
| 3332 | case MEP_OPERAND_IVC2_ACC0_6 : |
| 3333 | break; |
| 3334 | case MEP_OPERAND_IVC2_ACC0_7 : |
| 3335 | break; |
| 3336 | case MEP_OPERAND_IVC2_ACC1_0 : |
| 3337 | break; |
| 3338 | case MEP_OPERAND_IVC2_ACC1_1 : |
| 3339 | break; |
| 3340 | case MEP_OPERAND_IVC2_ACC1_2 : |
| 3341 | break; |
| 3342 | case MEP_OPERAND_IVC2_ACC1_3 : |
| 3343 | break; |
| 3344 | case MEP_OPERAND_IVC2_ACC1_4 : |
| 3345 | break; |
| 3346 | case MEP_OPERAND_IVC2_ACC1_5 : |
| 3347 | break; |
| 3348 | case MEP_OPERAND_IVC2_ACC1_6 : |
| 3349 | break; |
| 3350 | case MEP_OPERAND_IVC2_ACC1_7 : |
| 3351 | break; |
| 3352 | case MEP_OPERAND_IVC2_CC : |
| 3353 | break; |
| 3354 | case MEP_OPERAND_IVC2_COFA0 : |
| 3355 | break; |
| 3356 | case MEP_OPERAND_IVC2_COFA1 : |
| 3357 | break; |
| 3358 | case MEP_OPERAND_IVC2_COFR0 : |
| 3359 | break; |
| 3360 | case MEP_OPERAND_IVC2_COFR1 : |
| 3361 | break; |
| 3362 | case MEP_OPERAND_IVC2_CSAR0 : |
| 3363 | break; |
| 3364 | case MEP_OPERAND_IVC2_CSAR1 : |
| 3365 | break; |
| 3366 | case MEP_OPERAND_IVC2C3CCRN : |
| 3367 | fields->f_ivc2_ccrn_c3 = value; |
| 3368 | break; |
| 3369 | case MEP_OPERAND_IVC2CCRN : |
| 3370 | fields->f_ivc2_ccrn = value; |
| 3371 | break; |
| 3372 | case MEP_OPERAND_IVC2CRN : |
| 3373 | fields->f_ivc2_crnx = value; |
| 3374 | break; |
| 3375 | case MEP_OPERAND_IVC2RM : |
| 3376 | fields->f_ivc2_crm = value; |
| 3377 | break; |
| 3378 | case MEP_OPERAND_LO : |
| 3379 | break; |
| 3380 | case MEP_OPERAND_LP : |
| 3381 | break; |
| 3382 | case MEP_OPERAND_MB0 : |
| 3383 | break; |
| 3384 | case MEP_OPERAND_MB1 : |
| 3385 | break; |
| 3386 | case MEP_OPERAND_ME0 : |
| 3387 | break; |
| 3388 | case MEP_OPERAND_ME1 : |
| 3389 | break; |
| 3390 | case MEP_OPERAND_NPC : |
| 3391 | break; |
| 3392 | case MEP_OPERAND_OPT : |
| 3393 | break; |
| 3394 | case MEP_OPERAND_PCABS24A2 : |
| 3395 | fields->f_24u5a2n = value; |
| 3396 | break; |
| 3397 | case MEP_OPERAND_PCREL12A2 : |
| 3398 | fields->f_12s4a2 = value; |
| 3399 | break; |
| 3400 | case MEP_OPERAND_PCREL17A2 : |
| 3401 | fields->f_17s16a2 = value; |
| 3402 | break; |
| 3403 | case MEP_OPERAND_PCREL24A2 : |
| 3404 | fields->f_24s5a2n = value; |
| 3405 | break; |
| 3406 | case MEP_OPERAND_PCREL8A2 : |
| 3407 | fields->f_8s8a2 = value; |
| 3408 | break; |
| 3409 | case MEP_OPERAND_PSW : |
| 3410 | break; |
| 3411 | case MEP_OPERAND_R0 : |
| 3412 | break; |
| 3413 | case MEP_OPERAND_R1 : |
| 3414 | break; |
| 3415 | case MEP_OPERAND_RL : |
| 3416 | fields->f_rl = value; |
| 3417 | break; |
| 3418 | case MEP_OPERAND_RL5 : |
| 3419 | fields->f_rl5 = value; |
| 3420 | break; |
| 3421 | case MEP_OPERAND_RM : |
| 3422 | fields->f_rm = value; |
| 3423 | break; |
| 3424 | case MEP_OPERAND_RMA : |
| 3425 | fields->f_rm = value; |
| 3426 | break; |
| 3427 | case MEP_OPERAND_RN : |
| 3428 | fields->f_rn = value; |
| 3429 | break; |
| 3430 | case MEP_OPERAND_RN3 : |
| 3431 | fields->f_rn3 = value; |
| 3432 | break; |
| 3433 | case MEP_OPERAND_RN3C : |
| 3434 | fields->f_rn3 = value; |
| 3435 | break; |
| 3436 | case MEP_OPERAND_RN3L : |
| 3437 | fields->f_rn3 = value; |
| 3438 | break; |
| 3439 | case MEP_OPERAND_RN3S : |
| 3440 | fields->f_rn3 = value; |
| 3441 | break; |
| 3442 | case MEP_OPERAND_RN3UC : |
| 3443 | fields->f_rn3 = value; |
| 3444 | break; |
| 3445 | case MEP_OPERAND_RN3UL : |
| 3446 | fields->f_rn3 = value; |
| 3447 | break; |
| 3448 | case MEP_OPERAND_RN3US : |
| 3449 | fields->f_rn3 = value; |
| 3450 | break; |
| 3451 | case MEP_OPERAND_RNC : |
| 3452 | fields->f_rn = value; |
| 3453 | break; |
| 3454 | case MEP_OPERAND_RNL : |
| 3455 | fields->f_rn = value; |
| 3456 | break; |
| 3457 | case MEP_OPERAND_RNS : |
| 3458 | fields->f_rn = value; |
| 3459 | break; |
| 3460 | case MEP_OPERAND_RNUC : |
| 3461 | fields->f_rn = value; |
| 3462 | break; |
| 3463 | case MEP_OPERAND_RNUL : |
| 3464 | fields->f_rn = value; |
| 3465 | break; |
| 3466 | case MEP_OPERAND_RNUS : |
| 3467 | fields->f_rn = value; |
| 3468 | break; |
| 3469 | case MEP_OPERAND_SAR : |
| 3470 | break; |
| 3471 | case MEP_OPERAND_SDISP16 : |
| 3472 | fields->f_16s16 = value; |
| 3473 | break; |
| 3474 | case MEP_OPERAND_SIMM16 : |
| 3475 | fields->f_16s16 = value; |
| 3476 | break; |
| 3477 | case MEP_OPERAND_SIMM16P0 : |
| 3478 | fields->f_ivc2_simm16p0 = value; |
| 3479 | break; |
| 3480 | case MEP_OPERAND_SIMM6 : |
| 3481 | fields->f_6s8 = value; |
| 3482 | break; |
| 3483 | case MEP_OPERAND_SIMM8 : |
| 3484 | fields->f_8s8 = value; |
| 3485 | break; |
| 3486 | case MEP_OPERAND_SIMM8P0 : |
| 3487 | fields->f_ivc2_8s0 = value; |
| 3488 | break; |
| 3489 | case MEP_OPERAND_SIMM8P20 : |
| 3490 | fields->f_ivc2_8s20 = value; |
| 3491 | break; |
| 3492 | case MEP_OPERAND_SIMM8P4 : |
| 3493 | fields->f_ivc2_8s4 = value; |
| 3494 | break; |
| 3495 | case MEP_OPERAND_SP : |
| 3496 | break; |
| 3497 | case MEP_OPERAND_SPR : |
| 3498 | break; |
| 3499 | case MEP_OPERAND_TP : |
| 3500 | break; |
| 3501 | case MEP_OPERAND_TPR : |
| 3502 | break; |
| 3503 | case MEP_OPERAND_UDISP2 : |
| 3504 | fields->f_2u6 = value; |
| 3505 | break; |
| 3506 | case MEP_OPERAND_UDISP7 : |
| 3507 | fields->f_7u9 = value; |
| 3508 | break; |
| 3509 | case MEP_OPERAND_UDISP7A2 : |
| 3510 | fields->f_7u9a2 = value; |
| 3511 | break; |
| 3512 | case MEP_OPERAND_UDISP7A4 : |
| 3513 | fields->f_7u9a4 = value; |
| 3514 | break; |
| 3515 | case MEP_OPERAND_UIMM16 : |
| 3516 | fields->f_16u16 = value; |
| 3517 | break; |
| 3518 | case MEP_OPERAND_UIMM2 : |
| 3519 | fields->f_2u10 = value; |
| 3520 | break; |
| 3521 | case MEP_OPERAND_UIMM24 : |
| 3522 | fields->f_24u8n = value; |
| 3523 | break; |
| 3524 | case MEP_OPERAND_UIMM3 : |
| 3525 | fields->f_3u5 = value; |
| 3526 | break; |
| 3527 | case MEP_OPERAND_UIMM4 : |
| 3528 | fields->f_4u8 = value; |
| 3529 | break; |
| 3530 | case MEP_OPERAND_UIMM5 : |
| 3531 | fields->f_5u8 = value; |
| 3532 | break; |
| 3533 | case MEP_OPERAND_UIMM7A4 : |
| 3534 | fields->f_7u9a4 = value; |
| 3535 | break; |
| 3536 | case MEP_OPERAND_ZERO : |
| 3537 | break; |
| 3538 | |
| 3539 | default : |
| 3540 | /* xgettext:c-format */ |
| 3541 | fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), |
| 3542 | opindex); |
| 3543 | abort (); |
| 3544 | } |
| 3545 | } |
| 3546 | |
| 3547 | /* Function to call before using the instruction builder tables. */ |
| 3548 | |
| 3549 | void |
| 3550 | mep_cgen_init_ibld_table (CGEN_CPU_DESC cd) |
| 3551 | { |
| 3552 | cd->insert_handlers = & mep_cgen_insert_handlers[0]; |
| 3553 | cd->extract_handlers = & mep_cgen_extract_handlers[0]; |
| 3554 | |
| 3555 | cd->insert_operand = mep_cgen_insert_operand; |
| 3556 | cd->extract_operand = mep_cgen_extract_operand; |
| 3557 | |
| 3558 | cd->get_int_operand = mep_cgen_get_int_operand; |
| 3559 | cd->set_int_operand = mep_cgen_set_int_operand; |
| 3560 | cd->get_vma_operand = mep_cgen_get_vma_operand; |
| 3561 | cd->set_vma_operand = mep_cgen_set_vma_operand; |
| 3562 | } |