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[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
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1/* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6This file is part of GDB, GAS, and the GNU binutils.
7
8GDB, GAS, and the GNU binutils are free software; you can redistribute
9them and/or modify them under the terms of the GNU General Public
10License as published by the Free Software Foundation; either version
111, or (at your option) any later version.
12
13GDB, GAS, and the GNU binutils are distributed in the hope that they
14will be useful, but WITHOUT ANY WARRANTY; without even the implied
15warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this file; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
23#include "ansidecl.h"
24#include "opcode/mips.h"
25
26/* Short hand so the lines aren't too long. */
27
28#define LDD INSN_LOAD_MEMORY_DELAY
29#define LCD INSN_LOAD_COPROC_DELAY
30#define UBD INSN_UNCOND_BRANCH_DELAY
31#define CBD INSN_COND_BRANCH_DELAY
32#define COD INSN_COPROC_MOVE_DELAY
33#define CLD INSN_COPROC_MEMORY_DELAY
34#define CBL INSN_COND_BRANCH_LIKELY
35#define TRAP INSN_TRAP
36#define SM INSN_STORE_MEMORY
37
38#define WR_d INSN_WRITE_GPR_D
39#define WR_t INSN_WRITE_GPR_T
40#define WR_31 INSN_WRITE_GPR_31
41#define WR_D INSN_WRITE_FPR_D
42#define WR_T INSN_WRITE_FPR_T
43#define WR_S INSN_WRITE_FPR_S
44#define RD_s INSN_READ_GPR_S
45#define RD_b INSN_READ_GPR_S
46#define RD_t INSN_READ_GPR_T
47#define RD_S INSN_READ_FPR_S
48#define RD_T INSN_READ_FPR_T
49#define RD_R INSN_READ_FPR_R
50#define WR_CC INSN_WRITE_COND_CODE
51#define RD_CC INSN_READ_COND_CODE
52#define RD_C0 INSN_COP
53#define RD_C1 INSN_COP
54#define RD_C2 INSN_COP
55#define RD_C3 INSN_COP
56#define WR_C0 INSN_COP
57#define WR_C1 INSN_COP
58#define WR_C2 INSN_COP
59#define WR_C3 INSN_COP
60
61#define WR_HI INSN_WRITE_HI
62#define RD_HI INSN_READ_HI
63#define MOD_HI WR_HI|RD_HI
64
65#define WR_LO INSN_WRITE_LO
66#define RD_LO INSN_READ_LO
67#define MOD_LO WR_LO|RD_LO
68
69#define WR_HILO WR_HI|WR_LO
70#define RD_HILO RD_HI|RD_LO
71#define MOD_HILO WR_HILO|RD_HILO
72
73
74#define I1 INSN_ISA1
75#define I2 INSN_ISA2
76#define I3 INSN_ISA3
77#define I4 INSN_ISA4
78#define P3 INSN_4650
79#define L1 INSN_4010
80#define V1 INSN_4100
81#define T3 INSN_3900
82/* start-sanitize-tx49 */
83#define T4 INSN_4900
84/* end-sanitize-tx49 */
85/* start-sanitize-vr4320 */
86#define N4 INSN_4320
87/* end-sanitize-vr4320 */
88/* start-sanitize-vr5400 */
89#define N5 INSN_5400
90/* end-sanitize-vr5400 */
91/* start-sanitize-r5900 */
92#define T5 INSN_5900
93/* end-sanitize-r5900 */
94
95#define G1 (T3 \
96/* start-sanitize-tx49 */ \
97 | T4 \
98/* end-sanitize-tx49 */ \
99/* start-sanitize-r5900 */ \
100 | T5 \
101/* end-sanitize-r5900 */ \
102 )
103
104#define G2 (T3 \
105/* start-sanitize-tx49 */ \
106 | T4 \
107/* end-sanitize-tx49 */ \
108 )
109
110#define G3 (I4 \
111/* start-sanitize-tx49 */ \
112 | T4 \
113/* end-sanitize-tx49 */ \
114 )
115
116/* The order of overloaded instructions matters. Label arguments and
117 register arguments look the same. Instructions that can have either
118 for arguments must apear in the correct order in this table for the
119 assembler to pick the right one. In other words, entries with
120 immediate operands must apear after the same instruction with
121 registers.
122
123 Many instructions are short hand for other instructions (i.e., The
124 jal <register> instruction is short for jalr <register>). */
125
126const struct mips_opcode mips_builtin_opcodes[] = {
127/* These instructions appear first so that the disassembler will find
128 them first. The assemblers uses a hash table based on the
129 instruction name anyhow. */
130/* name, args, mask, match, pinfo */
131{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
132{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
133{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
134{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
135{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
136{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
137{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
138{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
139{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
140{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
141
142{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
143{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
144{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
145{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
146{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
147{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1},
148{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1},
149{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
150{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
151{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
152{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
153{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
154{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
155{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
156/* b is at the top of the table. */
157/* bal is at the top of the table. */
158{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
159{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
160{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
161{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
162{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
163{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
164{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
165{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
166{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
167{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
168{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
169{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
170{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
171{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
172{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
173{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
174{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
175{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
176{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
177{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
178{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
179{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
180{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
181{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
182{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
183{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
184{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
185{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
186{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
187{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
188{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
189{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
190{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
191{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
192{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
193{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
194{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
195{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
196{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
197{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
198{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
199{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
200{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
201{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
202{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
203{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
204{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
205{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
206{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
207{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
208{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
209{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
210{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
211{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
212{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
213{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
214{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
215{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
216{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
217{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
218{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
219{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
220{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
221{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
222{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
223{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
224{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
225{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
226{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
227{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
228{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
229{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
230{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
231{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
232{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
233{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
234{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
235{"break", "c", 0x0000000d, 0xfc00003f, TRAP, I1 },
236{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
237{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
238{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
239{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
240{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
241{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
242{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
243{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
244{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
245{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
246{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
247{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
248{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
249{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
250{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
251{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
252{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
253{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
254{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
255{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
256{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
257{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
258{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
259{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
260{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
261{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
262{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
263{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
264{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
265{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
266{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
267{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
268{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
269{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
270{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
271{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
272{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
273{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
274{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
275{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
276{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
277{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
278{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
279{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
280{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
281{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
282{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
283{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
284{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
285{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
286/* start-sanitize-r5900 */
287{"c.lt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, T5 },
288/* end-sanitize-r5900 */
289{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
290{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
291{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
292{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
293{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
294{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
295{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
296{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
297/* start-sanitize-r5900 */
298{"c.le.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, T5 },
299/* end-santiize-r5900 */
300{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
301{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
302{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
303{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
304{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
305{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
306{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3 },
307{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
308{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
309{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
310{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
311{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
312{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
313{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
314{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
315{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
316 /* start-sanitize-vr4320 */
317{"clz", "d,s", 0x00000035, 0xfc1f07ff, WR_d|RD_s, N4 },
318 /* end-sanitize-vr4320 */
319{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
320{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
321{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
322{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
323{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
324{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
325{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
326{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
327{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
328{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
329{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
330{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
331{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
332{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
333{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
334{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
335{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
336{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
337{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
338{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
339{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
340{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
341 /* start-sanitize-vr5400 */
342{"dbreak", "", 0x7000003f, 0xffffffff, 0, N5 },
343 /* end-sanitize-vr5400 */
344 /* start-sanitize-vr4320 */
345{"dclz", "d,s", 0x0000003D, 0xfc1f07ff, WR_d|RD_s, N4 },
346 /* end-sanitize-vr4320 */
347/* dctr and dctw are used on the r5000. */
348{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
349{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
350{"deret", "", 0x4200001f, 0xffffffff, 0, G2 },
351/* For ddiv, see the comments about div. */
352{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
353{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
354{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
355/* For ddivu, see the comments about div. */
356{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
357{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
358{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
359/* The MIPS assembler treats the div opcode with two operands as
360 though the first operand appeared twice (the first operand is both
361 a source and a destination). To get the div machine instruction,
362 you must use an explicit destination of $0. */
363{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
364{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
365{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
366{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
367 /* start-sanitize-r5900 */
368{"div1", "s,t", 0x7000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
369 /* end-sanitize-r5900 */
370{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
371{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
372/* For divu, see the comments about div. */
373{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
374{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
375{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
376{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
377 /* start-sanitize-r5900 */
378{"divu1", "s,t", 0x7000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
379 /* end-sanitize-r5900 */
380{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
381{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
382{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
383{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
384{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
385{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
386{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
387{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
388{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
389{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
390{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
391{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
392{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
393{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
394{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
395{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
396 /* start-sanitize-tx49 */
397{"dmult", "d,s,t", 0x0000001c, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
398 /* end-sanitize-tx49 */
399{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
400 /* start-sanitize-tx49 */
401{"dmultu", "d,s,t", 0x0000001d, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
402 /* end-sanitize-tx49 */
403{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
404{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
405{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
406{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
407{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
408{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
409{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
410{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
411 /* start-sanitize-vr5400 */
412{"dret", "", 0x7000003e, 0xffffffff, 0, N5 },
413{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
414{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
415{"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
416{"dror", "d,w,<", 0x00200036, 0xffe0003f, WR_d|RD_t, N5 },
417 /* end-sanitize-vr5400 */
418{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
419{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
420{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
421{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
422{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
423{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
424{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
425{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
426{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
427{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
428{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
429{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
430{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
431{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
432{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
433{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
434{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
435{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
436{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
437{"eret", "", 0x42000018, 0xffffffff, 0, I3 },
438{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
439{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
440{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
441{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
442{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
443{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
444{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
445{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
446{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
447{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
448/* SVR4 PIC code requires special handling for j, so it must be a
449 macro. */
450{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
451/* This form of j is used by the disassembler and internally by the
452 assembler, but will never match user input (because the line above
453 will match first). */
454{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
455{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
456{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
457/* SVR4 PIC code requires special handling for jal, so it must be a
458 macro. */
459{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
460{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
461{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
462/* This form of jal is used by the disassembler and internally by the
463 assembler, but will never match user input (because the line above
464 will match first). */
465{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
466 /* jalx really should only be avaliable if mips16 is available,
467 but for now make it I1. */
468{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
469{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
470{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
471{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
472{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
473{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
474{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
475{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
476{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
477{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
478{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
479{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
480{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
481{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
482{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
483{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
484{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
485{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
486{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
487{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
488{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
489{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
490{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
491{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
492{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
493{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
494{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
495{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
496{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
497/* li is at the start of the table. */
498{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
499{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
500{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
501{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
502{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
503{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
504{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
505{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
506{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
507 /* start-sanitize-r5900 */
508{"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_t|RD_b, T5 },
509 /* end-sanitize-r5900 */
510{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
511{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
512{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
513{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
514{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
515{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
516{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
517{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
518{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
519{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
520{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
521{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
522{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
523{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
524{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
525{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
526{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
527{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
528{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
529{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
530{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
531{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
532{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
533{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
534{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
535 /* start-sanitize-vr4320 */
536{"mac", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, N4},
537{"dmac", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, N4},
538 /* end-sanitize-vr4320 */
539 /* start-sanitize-vr4320 */
540{"macc", "d,s,t", 0x000000A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
541 /* end-sanitize-vr4320 */
542 /* start-sanitize-vr5400 */
543{"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N5},
544 /* end-sanitize-vr5400 */
545 /* start-sanitize-vr4320 */
546{"maccu", "d,s,t", 0x000000E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
547 /* end-sanitize-vr4320 */
548 /* start-sanitize-vr5400 */
549{"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N5},
550 /* end-sanitize-vr5400 */
551 /* start-sanitize-vr4320 */
552{"macchi", "d,s,t", 0x000002A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
553 /* end-sanitize-vr4320 */
554 /* start-sanitize-vr5400 */
555{"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N5},
556 /* end-sanitize-vr5400 */
557 /* start-sanitize-vr4320 */
558{"macchiu", "d,s,t", 0x000002E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
559 /* end-sanitize-vr4320 */
560 /* start-sanitize-vr5400 */
561{"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N5},
562 /* end-sanitize-vr5400 */
563{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
564{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
565{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
566{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
567/* start-sanitize-r5900 */
568{"madd.s", "D,S,T", 0x4600001c, 0xffe007ff, WR_D|RD_S|RD_T|FP_S, T5 },
569 /* end-sanitize-r5900 */
570{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
571{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
572{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
573 /* start-sanitize-r5900 */
574{"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
575{"madd1", "d,s,t", 0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
576 /* end-sanitize-r5900 */
577{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
578{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
579{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
580 /* start-sanitize-r5900 */
581{"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
582{"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
583{"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
584{"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
585{"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
586{"min.s", "D,S,T", 0x46000029, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
587{"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
588{"mula.s", "S,T", 0x4600001a, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
589{"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
590{"di", "", 0x42000039, 0xffffffff, WR_C0, T5 },
591{"ei", "", 0x42000038, 0xffffffff, WR_C0, T5 },
592{"mfbpc", "t", 0x4000c000, 0xffe0ffff, RD_C0|WR_t, T5 },
593{"mfdab", "t", 0x4000c004, 0xffe0ffff, RD_C0|WR_t, T5 },
594{"mfdabm", "t", 0x4000c005, 0xffe0ffff, RD_C0|WR_t, T5 },
595{"mfdvb", "t", 0x4000c006, 0xffe0ffff, RD_C0|WR_t, T5 },
596{"mfdvbm", "t", 0x4000c007, 0xffe0ffff, RD_C0|WR_t, T5 },
597{"mfiab", "t", 0x4000c002, 0xffe0ffff, RD_C0|WR_t, T5 },
598{"mfiabm", "t", 0x4000c003, 0xffe0ffff, RD_C0|WR_t, T5 },
599{"mtbpc", "t", 0x4080c000, 0xffe0ffff, WR_C0|RD_t, T5 },
600{"mtdab", "t", 0x4080c004, 0xffe0ffff, WR_C0|RD_t, T5 },
601{"mtdabm", "t", 0x4080c005, 0xffe0ffff, WR_C0|RD_t, T5 },
602{"mtdvb", "t", 0x4080c006, 0xffe0ffff, WR_C0|RD_t, T5 },
603{"mtdvbm", "t", 0x4080c007, 0xffe0ffff, WR_C0|RD_t, T5 },
604{"mtiab", "t", 0x4080c002, 0xffe0ffff, WR_C0|RD_t, T5 },
605{"mtiabm", "t", 0x4080c003, 0xffe0ffff, WR_C0|RD_t, T5 },
606 /* end-sanitize-r5900 */
607{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
608 /* start-sanitize-vr5400 */
609{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, N5 },
610 /* end-sanitize-vr5400 */
611 /* start-sanitize-r5900 */
612{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, T5 },
613 /* end-sanitize-r5900 */
614 /* start-sanitize-vr5400 */
615{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, N5 },
616 /* end-sanitize-vr5400 */
617 /* start-sanitize-r5900 */
618{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, T5 },
619 /* end-sanitize-r5900 */
620 /* start-sanitize-vr5400 */
621{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, N5 },
622 /* end-sanitize-vr5400 */
623 /* start-sanitize-r5900 */
624{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, T5 },
625 /* end-sanitize-r5900 */
626 /* start-sanitize-vr5400 */
627{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, N5 },
628 /* end-sanitize-vr5400 */
629 /* start-sanitize-r5900 */
630{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, T5 },
631 /* end-sanitize-r5900 */
632{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
633{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
634{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
635{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
636{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
637 /* start-sanitize-vr5400 */
638{"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, N5 },
639 /* end-sanitize-vr5400 */
640{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
641 /* start-sanitize-r5900 */
642{"mfhi1", "d", 0x70000010, 0xffff07ff, WR_d|RD_HI, T5 },
643 /* end-sanitize-r5900 */
644{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
645 /* start-sanitize-r5900 */
646{"mflo1", "d", 0x70000012, 0xffff07ff, WR_d|RD_LO, T5 },
647{"mfsa", "d", 0x00000028, 0xffff07ff, WR_d, T5 },
648 /* end-sanitize-r5900 */
649{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
650{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
651{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4 },
652{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
653{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
654{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
655 /* start-sanitize-r5900 */
656{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
657 /* end-sanitize-r5900 */
658{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 },
659{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
660{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
661{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4 },
662{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
663{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
664{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
665 /* start-sanitize-r5900 */
666{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
667 /* end-sanitize-r5900 */
668{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 },
669{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
670{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
671 /* start-sanitize-vr5400 */
672{"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
673{"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
674{"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
675{"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d, N5 },
676 /* end-sanitize-vr5400 */
677/* move is at the top of the table. */
678{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
679{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
680/* start-sanitize-r5900 */
681{"msub.s", "D,S,T", 0x4600001d, 0xffe007ff, WR_D|RD_S|RD_T|FP_S, T5 },
682/* end-sanitize-r5900 */
683{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
684{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
685{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
686{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
687{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
688{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
689{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
690 /* start-sanitize-vr5400 */
691{"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, N5 },
692 /* end-sanitize-vr5400 */
693{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
694 /* start-sanitize-r5900 */
695{"mthi1", "s", 0x70000011, 0xfc1fffff, RD_s|WR_HI, T5 },
696 /* end-sanitize-r5900 */
697{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
698 /* start-sanitize-r5900 */
699{"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_s|WR_LO, T5 },
700{"mtsa", "s", 0x00000029, 0xfc1fffff, RD_s, T5 },
701{"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_s, T5 },
702{"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_s, T5 },
703 /* end-sanitize-r5900 */
704{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
705{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
706{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,P3},
707 /* start-sanitize-vr4320 */
708{"mul", "d,s,t", 0x00000128, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
709 /* end-sanitize-vr4320 */
710 /* start-sanitize-vr5400 */
711{"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
712 /* end-sanitize-vr5400 */
713{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
714{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
715{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
716{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
717{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
718{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
719 /* start-sanitize-vr4320 */
720{"mulu", "d,s,t", 0x00000168, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
721 /* end-sanitize-vr4320 */
722 /* start-sanitize-vr5400 */
723{"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
724 /* end-sanitize-vr5400 */
725 /* start-sanitize-vr4320 */
726{"mulhi", "d,s,t", 0x00000328, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
727 /* end-sanitize-vr4320 */
728 /* start-sanitize-vr5400 */
729{"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
730 /* end-sanitize-vr5400 */
731 /* start-sanitize-vr4320 */
732{"mulhiu", "d,s,t", 0x00000368, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
733 /* end-sanitize-vr4320 */
734 /* start-sanitize-vr5400 */
735{"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
736 /* end-sanitize-vr5400 */
737 /* start-sanitize-vr5400 */
738{"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
739{"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
740{"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
741{"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
742 /* end-sanitize-vr5400 */
743{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
744{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
745 /* start-sanitize-r5900 */
746{"mult1", "d,s,t", 0x70000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
747 /* end-sanitize-r5900 */
748{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
749{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
750 /* start-sanitize-r5900 */
751{"multu1", "d,s,t", 0x70000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
752 /* end-sanitize-r5900 */
753{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
754{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
755{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
756{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
757{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
758{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
759{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
760{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
761/* nop is at the start of the table. */
762{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
763{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
764{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
765{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
766{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
767{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
768
769 /* start-sanitize-r5900 */
770{"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_d|RD_t, T5 },
771{"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_d|RD_t, T5 },
772{"paddb", "d,v,t", 0x70000208, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
773{"paddh", "d,v,t", 0x70000108, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
774{"paddw", "d,v,t", 0x70000008, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
775{"paddsb", "d,v,t", 0x70000608, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
776{"paddsh", "d,v,t", 0x70000508, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
777{"paddsw", "d,v,t", 0x70000408, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
778{"paddub", "d,v,t", 0x70000628, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
779{"padduh", "d,v,t", 0x70000528, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
780{"padduw", "d,v,t", 0x70000428, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
781{"padsbh", "d,v,t", 0x70000128, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
782{"pand", "d,v,t", 0x70000489, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
783{"pceqb", "d,v,t", 0x700002a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
784{"pceqh", "d,v,t", 0x700001a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
785{"pceqw", "d,v,t", 0x700000a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
786
787{"pcgtb", "d,v,t", 0x70000288, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
788{"pcgth", "d,v,t", 0x70000188, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
789{"pcgtw", "d,v,t", 0x70000088, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
790
791{"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_d|RD_t, T5 },
792
793{"pcpyld", "d,v,t", 0x70000389, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
794{"pcpyud", "d,v,t", 0x700003a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
795
796{"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
797{"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
798{"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
799
800{"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_d|RD_t, T5 },
801{"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_d|RD_t, T5 },
802{"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
803{"pexoh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
804{"pexew", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
805{"pexow", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
806
807{"pext5", "d,t", 0x70000788, 0xffe007ff, WR_d|RD_t, T5 },
808
809{"pextlb", "d,v,t", 0x70000688, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
810{"pextlh", "d,v,t", 0x70000588, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
811{"pextlw", "d,v,t", 0x70000488, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
812{"pextub", "d,v,t", 0x700006a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
813{"pextuh", "d,v,t", 0x700005a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
814{"pextuw", "d,v,t", 0x700004a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
815
816{"phmaddh", "d,v,t", 0x70000449, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
817{"phmsubh", "d,v,t", 0x70000549, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
818
819{"pinth", "d,v,t", 0x70000289, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
820{"pinteh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
821{"pintoh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
822
823{"plzcw", "d,v", 0x70000004, 0xfc1f07ff, WR_d|RD_s, T5 },
824
825{"pmaddh", "d,v,t", 0x70000409, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
826{"pmadduw", "d,v,t", 0x70000029, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
827{"pmaddw", "d,v,t", 0x70000009, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
828
829{"pmaxh", "d,v,t", 0x700001c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
830{"pmaxw", "d,v,t", 0x700000c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
831
832{"pmfhi", "d", 0x70000209, 0xffff07ff, WR_d|RD_HI, T5 },
833{"pmflo", "d", 0x70000249, 0xffff07ff, WR_d|RD_LO, T5 },
834
835{"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
836{"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
837{"pmfhl.slw","d", 0x700000b0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
838{"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
839{"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
840
841{"pminh", "d,v,t", 0x700001e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
842{"pminw", "d,v,t", 0x700000e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
843
844{"pmsubh", "d,v,t", 0x70000509, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
845{"pmsubw", "d,v,t", 0x70000109, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
846
847{"pmthi", "v", 0x70000229, 0xfc1fffff, WR_HI|RD_s, T5 },
848{"pmtlo", "v", 0x70000269, 0xfc1fffff, WR_LO|RD_s, T5 },
849
850{"pmthl.lw", "v", 0x70000031, 0xfc1fffff, WR_HI|WR_LO|RD_s, T5 },
851
852{"pmulth", "d,v,t", 0x70000709, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
853{"pmultuw", "d,v,t", 0x70000329, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
854{"pmultw", "d,v,t", 0x70000309, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
855
856{"pnor", "d,v,t", 0x700004e9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
857{"por", "d,v,t", 0x700004a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
858
859{"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_d|RD_t, T5 },
860
861{"ppacb", "d,v,t", 0x700006c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
862{"ppach", "d,v,t", 0x700005c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
863{"ppacw", "d,v,t", 0x700004c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
864
865{"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_d|RD_t, T5 },
866{"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_d|RD_t, T5 },
867
868{"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_d|RD_t, T5 },
869{"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
870{"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_d|RD_t, T5 },
871
872{"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_d|RD_t, T5 },
873{"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
874{"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_d|RD_t, T5 },
875
876{"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_d|RD_t, T5 },
877{"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
878{"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_d|RD_t, T5 },
879
880{"psubb", "d,v,t", 0x70000248, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
881{"psubh", "d,v,t", 0x70000148, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
882{"psubsb", "d,v,t", 0x70000648, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
883{"psubsh", "d,v,t", 0x70000548, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
884{"psubsw", "d,v,t", 0x70000448, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
885{"psubub", "d,v,t", 0x70000668, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
886{"psubuh", "d,v,t", 0x70000568, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
887{"psubuw", "d,v,t", 0x70000468, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
888{"psubw", "d,v,t", 0x70000048, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
889
890{"pxor", "d,v,t", 0x700004c9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
891 /* end-sanitize-r5900 */
892
893{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3 },
894{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
895
896 /* start-sanitize-r5900 */
897{"qfsrv", "d,v,t", 0x700006e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
898 /* end-sanitize-r5900 */
899
900{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
901{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
902{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
903{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
904{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
905{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
906{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
907{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
908{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
909{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
910{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
911 /* start-sanitize-vr5400 */
912{"ror", "d,t,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 },
913 /* end-sanitize-vr5400 */
914{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
915{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
916 /* start-sanitize-vr5400 */
917{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
918 /* end-sanitize-vr5400 */
919{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
920{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
921{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
922{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
923{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
924{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
925/* start-sanitize-r5900 */
926{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, T5 },
927/* end-sanitize-r5900 */
928{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
929{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
930{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
931{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
932{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
933{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
934{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
935{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
936{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
937{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
938{"sdbbp", "c", 0x0000000e, 0xfc00003f, TRAP, G2 },
939{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
940{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
941{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
942{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
943{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
944{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
945{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
946{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
947{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
948{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
949{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
950{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
951{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
952{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
953{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
954{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
955{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
956{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
957{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
958{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
959{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
960{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
961{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
962{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
963{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
964{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
965{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
966{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
967{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
968{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
969{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
970{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
971{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
972{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
973{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
974{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
975{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
976{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
977{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
978{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
979{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
980{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
981{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
982{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
983{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
984 /* start-sanitize-r5900 */
985{"sq", "t,o(b)", 0x7c000000, 0xfc000000, SM|RD_t|RD_b, T5 },
986 /* end-sanitize-r5900 */
987{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
988{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
989{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
990{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
991{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
992{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
993{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
994{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
995{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
996{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
997{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
998{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
999{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
1000{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1001{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
1002{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
1003{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1004{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
1005{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
1006{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
1007{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
1008{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
1009{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1010{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1011{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
1012{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1013{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
1014{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
1015{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
1016{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
1017{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1018{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
1019{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
1020{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
1021{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1022{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
1023{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
1024{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
1025{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
1026{"sync", "", 0x0000000f, 0xffffffff, 0, I2|T3 },
1027{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
1028{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
1029{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
1030{"teq", "s,t", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1031{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
1032{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
1033{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
1034{"tge", "s,t", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1035{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
1036{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
1037{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
1038{"tgeu", "s,t", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1039{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
1040{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
1041{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
1042{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
1043{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
1044{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
1045{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
1046{"tlt", "s,t", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1047{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
1048{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
1049{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
1050{"tltu", "s,t", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1051{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
1052{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
1053{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
1054{"tne", "s,t", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1055{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
1056{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
1057{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
1058{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
1059{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
1060{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
1061{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
1062{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
1063{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
1064{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
1065{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
1066{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
1067{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
1068{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
1069{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
1070{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
1071{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
1072{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
1073{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
1074{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
1075{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
1076{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
1077{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
1078{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
1079{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1080{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
1081{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
1082{"wait", "", 0x42000020, 0xffffffff, TRAP, I3 },
1083{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
1084{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
1085 /* start-sanitize-vr5400 */
1086{"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1087{"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1088{"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1089{"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D|RD_S|RD_T, N5 },
1090{"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1091{"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1092{"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1093{"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1094{"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1095{"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1096{"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1097{"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1098{"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1099{"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1100{"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1101{"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1102{"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1103{"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1104{"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1105{"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1106{"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1107{"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1108{"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1109{"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1110{"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1111{"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1112{"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1113{"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1114{"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1115{"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1116{"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1117{"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1118{"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1119{"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1120{"mulsl.ob","S,T", 0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1121{"mulsl.ob","S,T[e]", 0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1122{"mulsl.ob","S,k", 0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1123{"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1124{"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1125{"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1126{"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1127{"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1128{"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1129{"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1130{"pickf.ob", "D,S,T[e]", 0x48000002, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1131{"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1132{"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1133{"pickt.ob", "D,S,T[e]", 0x48000003, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1134{"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1135{"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D, N5 },
1136{"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D, N5 },
1137{"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D, N5 },
1138{"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T, N5 },
1139{"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1140{"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1141{"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1142{"shfl.pacl.ob","D,S,T",0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1143{"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1144{"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1145{"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1146{"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1147{"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1148{"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1149{"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1150{"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S, N5 },
1151{"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S|RD_T, N5 },
1152{"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1153{"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1154{"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1155 /* end-sanitize-vr5400 */
1156/* No hazard protection on coprocessor instructions--they shouldn't
1157 change the state of the processor and if they do it's up to the
1158 user to put in nops as necessary. These are at the end so that the
1159 disasembler recognizes more specific versions first. */
1160{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
1161{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
1162{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
1163{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
1164{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
1165{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
1166{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
1167{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
1168
1169 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1170 4010 any more, so move this insn out of the way. If the object
1171 format gave us more info, we could do this right. */
1172{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s,L1 },
1173};
1174
1175#define MIPS_NUM_OPCODES \
1176 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1177const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
1178
1179/* const removed from the following to allow for dynamic extensions to the
1180 * built-in instruction set. */
1181struct mips_opcode *mips_opcodes =
1182 (struct mips_opcode *) mips_builtin_opcodes;
1183int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
1184#undef MIPS_NUM_OPCODES
1185
GDB Binutils - Deliverables
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