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2002-03-15 Chris G. Demetriou <cgd@broadcom.com>
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
... / ...
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1/* mips-opc.c -- MIPS opcode list.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Ralph Campbell and OSF
5 Commented and modified by Ian Lance Taylor, Cygnus Support
6 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
7 MIPS-3D support added by Broadcom Corporation (SiByte).
8
9This file is part of GDB, GAS, and the GNU binutils.
10
11GDB, GAS, and the GNU binutils are free software; you can redistribute
12them and/or modify them under the terms of the GNU General Public
13License as published by the Free Software Foundation; either version
141, or (at your option) any later version.
15
16GDB, GAS, and the GNU binutils are distributed in the hope that they
17will be useful, but WITHOUT ANY WARRANTY; without even the implied
18warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
19the GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this file; see the file COPYING. If not, write to the Free
23Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25#include <stdio.h>
26#include "sysdep.h"
27#include "opcode/mips.h"
28
29/* Short hand so the lines aren't too long. */
30
31#define LDD INSN_LOAD_MEMORY_DELAY
32#define LCD INSN_LOAD_COPROC_DELAY
33#define UBD INSN_UNCOND_BRANCH_DELAY
34#define CBD INSN_COND_BRANCH_DELAY
35#define COD INSN_COPROC_MOVE_DELAY
36#define CLD INSN_COPROC_MEMORY_DELAY
37#define CBL INSN_COND_BRANCH_LIKELY
38#define TRAP INSN_TRAP
39#define SM INSN_STORE_MEMORY
40
41#define WR_d INSN_WRITE_GPR_D
42#define WR_t INSN_WRITE_GPR_T
43#define WR_31 INSN_WRITE_GPR_31
44#define WR_D INSN_WRITE_FPR_D
45#define WR_T INSN_WRITE_FPR_T
46#define WR_S INSN_WRITE_FPR_S
47#define RD_s INSN_READ_GPR_S
48#define RD_b INSN_READ_GPR_S
49#define RD_t INSN_READ_GPR_T
50#define RD_S INSN_READ_FPR_S
51#define RD_T INSN_READ_FPR_T
52#define RD_R INSN_READ_FPR_R
53#define WR_CC INSN_WRITE_COND_CODE
54#define RD_CC INSN_READ_COND_CODE
55#define RD_C0 INSN_COP
56#define RD_C1 INSN_COP
57#define RD_C2 INSN_COP
58#define RD_C3 INSN_COP
59#define WR_C0 INSN_COP
60#define WR_C1 INSN_COP
61#define WR_C2 INSN_COP
62#define WR_C3 INSN_COP
63
64#define WR_HI INSN_WRITE_HI
65#define RD_HI INSN_READ_HI
66#define MOD_HI WR_HI|RD_HI
67
68#define WR_LO INSN_WRITE_LO
69#define RD_LO INSN_READ_LO
70#define MOD_LO WR_LO|RD_LO
71
72#define WR_HILO WR_HI|WR_LO
73#define RD_HILO RD_HI|RD_LO
74#define MOD_HILO WR_HILO|RD_HILO
75
76#define IS_M INSN_MULT
77
78#define I1 INSN_ISA1
79#define I2 INSN_ISA2
80#define I3 INSN_ISA3
81#define I4 INSN_ISA4
82#define I5 INSN_ISA5
83#define I32 INSN_ISA32
84#define I64 INSN_ISA64
85
86/* MIPS-3D support. */
87#define M3D INSN_MIPS3D
88
89#define P3 INSN_4650
90#define L1 INSN_4010
91#define V1 INSN_4100
92#define T3 INSN_3900
93#define M1 INSN_10000
94#define SB1 INSN_SB1
95
96#define G1 (T3 \
97 )
98
99#define G2 (T3 \
100 )
101
102#define G3 (I4 \
103 )
104
105/* The order of overloaded instructions matters. Label arguments and
106 register arguments look the same. Instructions that can have either
107 for arguments must apear in the correct order in this table for the
108 assembler to pick the right one. In other words, entries with
109 immediate operands must apear after the same instruction with
110 registers.
111
112 Many instructions are short hand for other instructions (i.e., The
113 jal <register> instruction is short for jalr <register>). */
114
115const struct mips_opcode mips_builtin_opcodes[] =
116{
117/* These instructions appear first so that the disassembler will find
118 them first. The assemblers uses a hash table based on the
119 instruction name anyhow. */
120/* name, args, match, mask, pinfo, membership */
121{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I4|I32|G3 },
122{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
123{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
124{"ssnop", "", 0x00000040, 0xffffffff, 0, I32 },
125{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
126{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
127{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
128{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, I1 },
129{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
130{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
131{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
132{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
133{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
134{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
135
136{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
137{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
138{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
139{"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, I5 },
140{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
141{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
142{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
143{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
144{"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
145{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
146{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
147{"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
148{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
149{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
150{"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D|RD_S|RD_T|FP_D, I5 },
151{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
152{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
153{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
154/* b is at the top of the table. */
155/* bal is at the top of the table. */
156{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
157{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
158{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
159{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
160{"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
161{"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
162{"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
163{"bc1any4t", "N,p", 0x45410000, 0xffe30000, CBD|RD_CC|FP_S, M3D },
164{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
165{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
166{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
167{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
168{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
169{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4|I32 },
170{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
171{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4|I32 },
172{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
173{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
174{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
175{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
176{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
177{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
178{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
179{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
180{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
181{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
182{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
183{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
184{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
185{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2|T3 },
186{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
187{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
188{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2|T3 },
189{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2|T3 },
190{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
191{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
192{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2|T3 },
193{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2|T3 },
194{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
195{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
196{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
197{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
198{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
199{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
200{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2|T3 },
201{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2|T3 },
202{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
203{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
204{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2|T3 },
205{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2|T3 },
206{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
207{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
208{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
209{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
210{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2|T3 },
211{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2|T3 },
212{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
213{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
214{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2|T3 },
215{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2|T3 },
216{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
217{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
218{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
219{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
220{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2|T3 },
221{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2|T3 },
222{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
223{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
224{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2|T3 },
225{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2|T3 },
226{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
227{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
228{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
229{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s|WR_31, I2|T3 },
230{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
231{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
232{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
233{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
234{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
235{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2|T3 },
236{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
237{"break", "B", 0x0000000d, 0xfc00003f, TRAP, I32 },
238{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
239{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
240{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
241{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
242{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
243{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
244{"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
245{"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
246{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
247{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
248{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
249{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
250{"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
251{"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
252{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
253{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
254{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
255{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
256{"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
257{"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
258{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
259{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
260{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
261{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
262{"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
263{"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
264{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
265{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
266{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
267{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
268{"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
269{"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
270{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
271{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
272{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
273{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
274{"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
275{"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
276{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
277{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
278{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
279{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
280{"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
281{"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
282{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
283{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
284{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
285{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
286{"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
287{"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
288{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
289{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
290{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
291{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
292{"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
293{"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
294{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
295{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
296{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
297{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
298{"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
299{"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
300{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
301{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
302{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
303{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
304{"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
305{"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
306{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
307{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
308{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
309{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
310{"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
311{"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
312{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
313{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
314{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
315{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
316{"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
317{"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
318{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
319{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
320{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
321{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
322{"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
323{"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
324{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
325{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
326{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
327{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
328{"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
329{"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
330{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
331{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4|I32 },
332{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
333{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4|I32 },
334{"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I5 },
335{"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I5 },
336{"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
337{"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
338{"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
339{"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
340{"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
341{"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
342{"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
343{"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
344{"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
345{"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
346{"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
347{"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
348{"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
349{"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
350{"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
351{"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
352{"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
353{"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
354{"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
355{"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
356{"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
357{"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
358{"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
359{"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
360{"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
361{"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
362{"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
363{"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
364{"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
365{"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
366{"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
367{"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
368{"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
369{"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
370{"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
371{"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
372{"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
373{"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
374{"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
375{"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
376{"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
377{"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
378{"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
379{"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
380{"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
381{"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
382{"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, M3D },
383{"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, M3D },
384{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|I32|T3},
385{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
386{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
387{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
388{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
389{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
390{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
391{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
392{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
393{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
394{"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
395{"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, I32 },
396{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
397{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
398{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
399{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
400{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
401{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
402{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
403{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
404{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
405{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
406{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
407{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
408{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
409{"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
410{"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I5 },
411{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
412{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
413{"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
414{"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
415{"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, M3D },
416{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
417{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
418{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
419{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
420{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
421{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
422{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
423{"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
424{"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, I64 },
425/* dctr and dctw are used on the r5000. */
426{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
427{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
428{"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 },
429/* For ddiv, see the comments about div. */
430{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
431{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
432{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
433/* For ddivu, see the comments about div. */
434{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
435{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
436{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
437/* The MIPS assembler treats the div opcode with two operands as
438 though the first operand appeared twice (the first operand is both
439 a source and a destination). To get the div machine instruction,
440 you must use an explicit destination of $0. */
441{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
442{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
443{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
444{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
445{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
446{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
447{"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, SB1 },
448/* For divu, see the comments about div. */
449{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
450{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HILO, I1 },
451{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
452{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
453{"dla", "t,o(b)", 0x64000000, 0xfc000000, WR_t|RD_s, I3 }, /* daddiu */
454{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
455{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
456{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
457{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
458
459{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, V1 },
460{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
461{"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, I64 },
462{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
463{"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I64 },
464{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
465{"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
466{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
467{"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
468{"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD|WR_t|RD_C2, I3 },
469{"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, I64 },
470{"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I3 },
471{"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I64 },
472{"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD|WR_t|RD_C3, I3 },
473{"dmfc3", "t,G,H", 0x4c200000, 0xffe007f8, LCD|WR_t|RD_C3, I64 },
474{"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I3 },
475{"dmtc3", "t,G,H", 0x4ca00000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I64 },
476{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
477{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
478{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
479{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
480{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
481{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
482{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
483{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
484{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
485{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
486{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
487{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
488{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
489{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
490{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
491{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
492{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
493{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
494{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
495{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
496{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
497{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
498{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
499{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
500{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
501{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
502{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
503{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
504{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
505{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
506{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
507{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
508{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
509{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
510{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
511{"eret", "", 0x42000018, 0xffffffff, 0, I3|I32 },
512{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
513{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
514{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
515{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
516{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
517{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
518{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
519{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
520{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
521{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
522/* SVR4 PIC code requires special handling for j, so it must be a
523 macro. */
524{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
525/* This form of j is used by the disassembler and internally by the
526 assembler, but will never match user input (because the line above
527 will match first). */
528{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
529{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
530{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
531/* SVR4 PIC code requires special handling for jal, so it must be a
532 macro. */
533{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
534{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
535{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
536/* This form of jal is used by the disassembler and internally by the
537 assembler, but will never match user input (because the line above
538 will match first). */
539{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
540 /* jalx really should only be avaliable if mips16 is available,
541 but for now make it I1. */
542{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
543{"la", "t,o(b)", 0x24000000, 0xfc000000, WR_t|RD_s, I1 }, /* addiu */
544{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
545{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
546{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
547{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
548{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
549{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
550{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
551{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
552{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
553{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
554{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
555{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
556{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
557{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
558{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
559{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
560{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
561{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
562{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
563{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
564{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
565{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
566{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
567{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
568{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
569{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
570{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
571{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
572/* li is at the start of the table. */
573{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
574{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
575{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
576{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
577{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
578{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
579{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
580{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
581{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
582{"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I5 },
583{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
584{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
585{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
586{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
587{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
588{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
589{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
590{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
591{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
592{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
593{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
594{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
595{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
596{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
597{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
598{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
599{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
600{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
601{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
602{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
603{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
604{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
605{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
606{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
607{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
608{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
609{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, P3 },
610{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
611{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
612{"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
613{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
614{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
615{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
616{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
617{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
618{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32},
619{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, G1 },
620{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
621{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, V1 },
622{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
623{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD|WR_t|RD_C0, M1 },
624{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
625{"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 },
626{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
627{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
628{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
629{"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 },
630{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
631{"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 },
632{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
633{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
634{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
635{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
636{"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D|RD_S|FP_D, I5 },
637{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4|I32},
638{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
639{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
640{"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
641{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
642{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, L1 },
643{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
644{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
645{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
646{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|I32 },
647{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
648{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
649{"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I5 },
650{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4|I32 },
651{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, L1 },
652{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
653{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
654{"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
655/* move is at the top of the table. */
656{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
657{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
658{"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
659{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
660{"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
661{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, L1 },
662{"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, I32 },
663{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
664{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD|RD_t|WR_C0, M1 },
665{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
666{"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 },
667{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
668{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
669{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
670{"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 },
671{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
672{"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 },
673{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
674{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
675{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
676{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
677{"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
678{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HILO, I32|P3 },
679{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
680{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
681{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
682{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
683{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
684{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
685{"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
686{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
687{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
688{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, I1 },
689{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, G1 },
690{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
691{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
692{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
693{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
694{"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D|RD_S|FP_D, I5 },
695{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
696{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
697{"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
698{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
699{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
700{"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I5 },
701/* nop is at the start of the table. */
702{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
703{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
704{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
705{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
706{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
707{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
708
709{"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
710{"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
711
712 /* pref and prefx are at the start of the table. */
713
714{"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
715{"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
716
717{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
718{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
719{"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
720{"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D|RD_S|FP_D, M3D },
721{"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
722{"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D|RD_S|FP_S, M3D },
723{"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
724{"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
725{"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
726{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
727{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
728{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
729{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 },
730{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
731{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
732{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
733{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
734{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
735{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
736{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
737{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
738{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
739{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
740{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
741{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
742{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
743{"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
744{"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D|RD_S|FP_D, M3D },
745{"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
746{"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D|RD_S|FP_S, M3D },
747{"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, M3D },
748{"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
749{"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, M3D },
750{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
751{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
752{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
753{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
754{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
755{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
756{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
757{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
758{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
759{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
760{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2 },
761{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2 },
762{"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, I32 },
763{"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, I32 },
764{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
765{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
766{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
767{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
768{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
769{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
770{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
771{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
772{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
773{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
774{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
775{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
776{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
777{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
778{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
779{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
780{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
781{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 },
782{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
783{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
784{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
785{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
786{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
787{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
788{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
789{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
790{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
791{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
792{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
793{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
794{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
795{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
796{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
797{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
798{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
799{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
800{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
801{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
802{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
803{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
804{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
805{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
806{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
807{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
808{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
809{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
810{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
811{"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D|RD_S|FP_D, SB1 },
812{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
813{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
814{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
815{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
816{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
817{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
818/* ssnop is at the start of the table. */
819{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
820{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
821{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
822{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
823{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
824{"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I5 },
825{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
826{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
827{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
828{"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I5 },
829{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
830{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
831{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
832{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
833{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
834{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
835{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
836{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
837{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
838{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
839{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
840{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
841{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
842{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
843{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
844{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
845{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
846{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
847{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
848{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
849{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
850{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
851{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
852{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 },
853{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 },
854{"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 },
855{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
856{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
857{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
858{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
859{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
860{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
861{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
862{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
863{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
864{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
865{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
866{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
867{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
868{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
869{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
870{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
871{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
872{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
873{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
874{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
875{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
876{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
877{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
878{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
879{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
880{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
881{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
882{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
883{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
884{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
885{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
886{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
887{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
888{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
889{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
890{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
891{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
892{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
893{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
894{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
895{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
896{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
897{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
898{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
899{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
900{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
901{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
902{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
903{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
904{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
905{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
906{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
907{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
908{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
909{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
910{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
911{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
912{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
913{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
914{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
915{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
916{"wait", "", 0x42000020, 0xffffffff, TRAP, I3|I32 },
917{"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32 },
918{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
919{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
920/* No hazard protection on coprocessor instructions--they shouldn't
921 change the state of the processor and if they do it's up to the
922 user to put in nops as necessary. These are at the end so that the
923 disassembler recognizes more specific versions first. */
924{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
925{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
926{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
927{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
928{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
929{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
930{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
931{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
932
933 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
934 4010 any more, so move this insn out of the way. If the object
935 format gave us more info, we could do this right. */
936{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s, L1 },
937};
938
939#define MIPS_NUM_OPCODES \
940 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
941const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
942
943/* const removed from the following to allow for dynamic extensions to the
944 * built-in instruction set. */
945struct mips_opcode *mips_opcodes =
946 (struct mips_opcode *) mips_builtin_opcodes;
947int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
948#undef MIPS_NUM_OPCODES
GDB Binutils - Deliverables
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