projects / deliverable / binutils-gdb.git / blame_incremental
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (non-incremental) | history | HEAD
* m10300-opc.c (mn10300_opcodes): Fix opcode for 4 operand "mul" and
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
... / ...
CommitLineData
1/* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6This file is part of GDB, GAS, and the GNU binutils.
7
8GDB, GAS, and the GNU binutils are free software; you can redistribute
9them and/or modify them under the terms of the GNU General Public
10License as published by the Free Software Foundation; either version
111, or (at your option) any later version.
12
13GDB, GAS, and the GNU binutils are distributed in the hope that they
14will be useful, but WITHOUT ANY WARRANTY; without even the implied
15warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this file; see the file COPYING. If not, write to the Free
20Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
23#include "ansidecl.h"
24#include "opcode/mips.h"
25
26/* Short hand so the lines aren't too long. */
27
28#define LDD INSN_LOAD_MEMORY_DELAY
29#define LCD INSN_LOAD_COPROC_DELAY
30#define UBD INSN_UNCOND_BRANCH_DELAY
31#define CBD INSN_COND_BRANCH_DELAY
32#define COD INSN_COPROC_MOVE_DELAY
33#define CLD INSN_COPROC_MEMORY_DELAY
34#define CBL INSN_COND_BRANCH_LIKELY
35#define TRAP INSN_TRAP
36#define SM INSN_STORE_MEMORY
37
38#define WR_d INSN_WRITE_GPR_D
39#define WR_t INSN_WRITE_GPR_T
40#define WR_31 INSN_WRITE_GPR_31
41#define WR_D INSN_WRITE_FPR_D
42#define WR_T INSN_WRITE_FPR_T
43#define WR_S INSN_WRITE_FPR_S
44#define RD_s INSN_READ_GPR_S
45#define RD_b INSN_READ_GPR_S
46#define RD_t INSN_READ_GPR_T
47#define RD_S INSN_READ_FPR_S
48#define RD_T INSN_READ_FPR_T
49#define RD_R INSN_READ_FPR_R
50#define WR_CC INSN_WRITE_COND_CODE
51#define RD_CC INSN_READ_COND_CODE
52#define RD_C0 INSN_COP
53#define RD_C1 INSN_COP
54#define RD_C2 INSN_COP
55#define RD_C3 INSN_COP
56#define WR_C0 INSN_COP
57#define WR_C1 INSN_COP
58#define WR_C2 INSN_COP
59#define WR_C3 INSN_COP
60
61#define WR_HI INSN_WRITE_HI
62#define RD_HI INSN_READ_HI
63#define MOD_HI WR_HI|RD_HI
64
65#define WR_LO INSN_WRITE_LO
66#define RD_LO INSN_READ_LO
67#define MOD_LO WR_LO|RD_LO
68
69#define WR_HILO WR_HI|WR_LO
70#define RD_HILO RD_HI|RD_LO
71#define MOD_HILO WR_HILO|RD_HILO
72
73
74#define I1 INSN_ISA1
75#define I2 INSN_ISA2
76#define I3 INSN_ISA3
77#define I4 INSN_ISA4
78#define P3 INSN_4650
79#define L1 INSN_4010
80#define V1 INSN_4100
81#define T3 INSN_3900
82/* start-sanitize-tx49 */
83#define T4 INSN_4900
84/* end-sanitize-tx49 */
85/* start-sanitize-vr4320 */
86#define N4 INSN_4320
87/* end-sanitize-vr4320 */
88/* start-sanitize-vr5400 */
89#define N5 INSN_5400
90/* end-sanitize-vr5400 */
91/* start-sanitize-r5900 */
92#define T5 INSN_5900
93/* end-sanitize-r5900 */
94
95#define G1 (T3 \
96/* start-sanitize-tx49 */ \
97 | T4 \
98/* end-sanitize-tx49 */ \
99/* start-sanitize-r5900 */ \
100 | T5 \
101/* end-sanitize-r5900 */ \
102 )
103
104#define G2 (T3 \
105/* start-sanitize-tx49 */ \
106 | T4 \
107/* end-sanitize-tx49 */ \
108 )
109
110#define G3 (I4 \
111/* start-sanitize-tx49 */ \
112 | T4 \
113/* end-sanitize-tx49 */ \
114 )
115
116/* The order of overloaded instructions matters. Label arguments and
117 register arguments look the same. Instructions that can have either
118 for arguments must apear in the correct order in this table for the
119 assembler to pick the right one. In other words, entries with
120 immediate operands must apear after the same instruction with
121 registers.
122
123 Many instructions are short hand for other instructions (i.e., The
124 jal <register> instruction is short for jalr <register>). */
125
126const struct mips_opcode mips_builtin_opcodes[] = {
127/* These instructions appear first so that the disassembler will find
128 them first. The assemblers uses a hash table based on the
129 instruction name anyhow. */
130/* name, args, mask, match, pinfo */
131{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
132{"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */
133{"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */
134{"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 },
135{"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d|RD_s, I3 },/* daddu */
136{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s, I1 },/* addu */
137{"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d|RD_s, I1 },/* or */
138{"b", "p", 0x10000000, 0xffff0000, UBD, I1 },/* beq 0,0 */
139{"b", "p", 0x04010000, 0xffff0000, UBD, I1 },/* bgez 0 */
140{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31, I1 },/* bgezal 0*/
141
142/* start-sanitize-r5900 */
143#include "vu0.h"
144/* end-sanitize-r5900 */
145
146{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO, I1 },
147{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S|FP_S, I1 },
148{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S|FP_D, I1 },
149{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
150{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, I1 },
151{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1},
152{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1},
153{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s, I1 },
154{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s, I1 },
155{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
156{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO, I1 },
157{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
158{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO, I1 },
159{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, I1 },
160/* b is at the top of the table. */
161/* bal is at the top of the table. */
162{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC, I1 },
163{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC, I2|T3 },
164{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
165{"bc1f", "N,p", 0x45000000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
166{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
167{"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
168{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, I1 },
169{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC, I2|T3 },
170{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC, I1 },
171{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC, I2|T3 },
172{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC, I1 },
173{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC, I2|T3 },
174{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC|FP_S, I1 },
175{"bc1t", "N,p", 0x45010000, 0xffe30000, CBD|RD_CC|FP_S, I4 },
176{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|FP_S, I2|T3 },
177{"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL|RD_CC|FP_S, I4 },
178{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC, I1 },
179{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC, I2|T3 },
180{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC, I1 },
181{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC, I2|T3 },
182{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s, I1 },
183{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
184{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
185{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO, I1 },
186{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
187{"beql", "s,I,p", 0, (int) M_BEQL_I, INSN_MACRO, I2 },
188{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO, I1 },
189{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO, I1 },
190{"bgel", "s,t,p", 0, (int) M_BGEL, INSN_MACRO, I2 },
191{"bgel", "s,I,p", 0, (int) M_BGEL_I, INSN_MACRO, I2 },
192{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO, I1 },
193{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO, I1 },
194{"bgeul", "s,t,p", 0, (int) M_BGEUL, INSN_MACRO, I2 },
195{"bgeul", "s,I,p", 0, (int) M_BGEUL_I, INSN_MACRO, I2 },
196{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s, I1 },
197{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s, I2|T3 },
198{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
199{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s, I2|T3 },
200{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO, I1 },
201{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO, I1 },
202{"bgtl", "s,t,p", 0, (int) M_BGTL, INSN_MACRO, I2 },
203{"bgtl", "s,I,p", 0, (int) M_BGTL_I, INSN_MACRO, I2 },
204{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO, I1 },
205{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO, I1 },
206{"bgtul", "s,t,p", 0, (int) M_BGTUL, INSN_MACRO, I2 },
207{"bgtul", "s,I,p", 0, (int) M_BGTUL_I, INSN_MACRO, I2 },
208{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s, I1 },
209{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
210{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO, I1 },
211{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO, I1 },
212{"blel", "s,t,p", 0, (int) M_BLEL, INSN_MACRO, I2 },
213{"blel", "s,I,p", 0, (int) M_BLEL_I, INSN_MACRO, I2 },
214{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO, I1 },
215{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO, I1 },
216{"bleul", "s,t,p", 0, (int) M_BLEUL, INSN_MACRO, I2 },
217{"bleul", "s,I,p", 0, (int) M_BLEUL_I, INSN_MACRO, I2 },
218{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s, I1 },
219{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
220{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO, I1 },
221{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO, I1 },
222{"bltl", "s,t,p", 0, (int) M_BLTL, INSN_MACRO, I2 },
223{"bltl", "s,I,p", 0, (int) M_BLTL_I, INSN_MACRO, I2 },
224{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO, I1 },
225{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO, I1 },
226{"bltul", "s,t,p", 0, (int) M_BLTUL, INSN_MACRO, I2 },
227{"bltul", "s,I,p", 0, (int) M_BLTUL_I, INSN_MACRO, I2 },
228{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s, I1 },
229{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s, I2|T3 },
230{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31, I1 },
231{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s, I2|T3 },
232{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s, I1 },
233{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s, I2|T3 },
234{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t, I1 },
235{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO, I1 },
236{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, I2|T3 },
237{"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, I2 },
238{"break", "", 0x0000000d, 0xffffffff, TRAP, I1 },
239/* start-sanitize-r5900 */
240{"break", "B", 0x0000000d, 0xfc00003f, TRAP, T5 },
241/* end-sanitize-r5900 */
242{"break", "c", 0x0000000d, 0xfc00ffff, TRAP, I1 },
243{"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, I1 },
244{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
245{"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
246{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
247{"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
248{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
249{"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
250{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
251{"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
252{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
253{"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
254{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
255{"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
256{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
257{"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
258{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
259{"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
260{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
261{"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
262{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
263{"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
264{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
265{"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
266{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
267{"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
268{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
269{"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
270{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
271{"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
272{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
273{"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
274{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
275{"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
276{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
277{"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
278{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
279{"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
280{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
281{"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
282{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
283{"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
284{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
285{"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
286{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
287{"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
288{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
289{"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
290{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
291{"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
292{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
293{"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
294/* start-sanitize-r5900 */
295{"c.lt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, T5 },
296/* end-sanitize-r5900 */
297{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
298{"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
299{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
300{"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
301{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
302{"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
303{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
304{"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
305/* start-sanitize-r5900 */
306{"c.le.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, T5 },
307/* end-sanitize-r5900 */
308{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
309{"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
310{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, I1 },
311{"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_D, I4 },
312{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC|FP_S, I1 },
313{"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S|RD_T|WR_CC|FP_S, I4 },
314{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, I3|T3 },
315{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, I3 },
316{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S, I3 },
317{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_D, I2 },
318{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|FP_S, I2 },
319{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
320{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
321{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1|FP_S, I1 },
322{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
323{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
324 /* start-sanitize-vr4320 */
325{"clz", "d,s", 0x00000035, 0xfc1f07ff, WR_d|RD_s, N4 },
326 /* end-sanitize-vr4320 */
327{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
328{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
329{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, I1 },
330{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
331{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC, I1 },
332{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|FP_D, I3 },
333{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S|FP_D|FP_S, I1 },
334{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S|FP_D, I1 },
335{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|FP_D, I3 },
336{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|FP_S, I3 },
337{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|FP_S, I3 },
338{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S|FP_S|FP_D, I1 },
339{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S|FP_S, I1 },
340{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S|FP_D, I1 },
341{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S|FP_S, I1 },
342{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, I3 },
343{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
344{"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, I3 },
345{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, I3 },
346{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, I3 },
347{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
348{"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, I3 },
349 /* start-sanitize-vr5400 */
350{"dbreak", "", 0x7000003f, 0xffffffff, 0, N5 },
351 /* end-sanitize-vr5400 */
352 /* start-sanitize-vr4320 */
353{"dclz", "d,s", 0x0000003D, 0xfc1f07ff, WR_d|RD_s, N4 },
354 /* end-sanitize-vr4320 */
355/* dctr and dctw are used on the r5000. */
356{"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 },
357{"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 },
358{"deret", "", 0x4200001f, 0xffffffff, 0, G2 },
359/* For ddiv, see the comments about div. */
360{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
361{"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 },
362{"ddiv", "d,v,I", 0, (int) M_DDIV_3I, INSN_MACRO, I3 },
363/* For ddivu, see the comments about div. */
364{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
365{"ddivu", "d,v,t", 0, (int) M_DDIVU_3, INSN_MACRO, I3 },
366{"ddivu", "d,v,I", 0, (int) M_DDIVU_3I, INSN_MACRO, I3 },
367/* The MIPS assembler treats the div opcode with two operands as
368 though the first operand appeared twice (the first operand is both
369 a source and a destination). To get the div machine instruction,
370 you must use an explicit destination of $0. */
371{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
372{"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
373{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO, I1 },
374{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO, I1 },
375 /* start-sanitize-r5900 */
376{"div1", "s,t", 0x7000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
377 /* end-sanitize-r5900 */
378{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
379{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
380/* For divu, see the comments about div. */
381{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
382{"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
383{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO, I1 },
384{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO, I1 },
385 /* start-sanitize-r5900 */
386{"divu1", "s,t", 0x7000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
387 /* end-sanitize-r5900 */
388{"dla", "t,A(b)", 0, (int) M_DLA_AB, INSN_MACRO, I3 },
389{"dli", "t,j", 0x24000000, 0xffe00000, WR_t, I3 }, /* addiu */
390{"dli", "t,i", 0x34000000, 0xffe00000, WR_t, I3 }, /* ori */
391{"dli", "t,I", 0, (int) M_DLI, INSN_MACRO, I3 },
392{"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|WR_LO|RD_LO, V1 },
393{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0, I3 },
394{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I3 },
395{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I3 },
396{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I3 },
397{"dmul", "d,v,t", 0, (int) M_DMUL, INSN_MACRO, I3 },
398{"dmul", "d,v,I", 0, (int) M_DMUL_I, INSN_MACRO, I3 },
399{"dmulo", "d,v,t", 0, (int) M_DMULO, INSN_MACRO, I3 },
400{"dmulo", "d,v,I", 0, (int) M_DMULO_I, INSN_MACRO, I3 },
401{"dmulou", "d,v,t", 0, (int) M_DMULOU, INSN_MACRO, I3 },
402{"dmulou", "d,v,I", 0, (int) M_DMULOU_I, INSN_MACRO, I3 },
403{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
404 /* start-sanitize-tx49 */
405{"dmult", "d,s,t", 0x0000001c, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
406 /* end-sanitize-tx49 */
407{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3},
408 /* start-sanitize-tx49 */
409{"dmultu", "d,s,t", 0x0000001d, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T4},
410 /* end-sanitize-tx49 */
411{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, I3 }, /* dsub 0 */
412{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, I3 }, /* dsubu 0*/
413{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
414{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, I3 },
415{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, I3 },
416{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I3 },
417{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
418{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
419 /* start-sanitize-vr5400 */
420{"dret", "", 0x7000003e, 0xffffffff, 0, N5 },
421{"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
422{"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
423{"dror", "d,w,>", 0x0020003e, 0xffe0003f, WR_d|RD_t, N5 },
424{"dror", "d,w,<", 0x00200036, 0xffe0003f, WR_d|RD_t, N5 },
425 /* end-sanitize-vr5400 */
426{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
427{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
428{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
429{"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 }, /* dsll32 */
430{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t, I3 },
431{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
432{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 },
433{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrav */
434{"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d|RD_t, I3 }, /* dsra32 */
435{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t, I3 },
436{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
437{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 },
438{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsrlv */
439{"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d|RD_t, I3 }, /* dsrl32 */
440{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t, I3 },
441{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
442{"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 },
443{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 },
444{"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 },
445{"eret", "", 0x42000018, 0xffffffff, 0, I3 },
446{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 },
447{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 },
448{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 },
449{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, I2 },
450{"flushi", "", 0xbc010000, 0xffffffff, 0, L1 },
451{"flushd", "", 0xbc020000, 0xffffffff, 0, L1 },
452{"flushid", "", 0xbc030000, 0xffffffff, 0, L1 },
453{"hibernate","", 0x42000023, 0xffffffff, 0, V1 },
454{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 },
455{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */
456/* SVR4 PIC code requires special handling for j, so it must be a
457 macro. */
458{"j", "a", 0, (int) M_J_A, INSN_MACRO, I1 },
459/* This form of j is used by the disassembler and internally by the
460 assembler, but will never match user input (because the line above
461 will match first). */
462{"j", "a", 0x08000000, 0xfc000000, UBD, I1 },
463{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 },
464{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 },
465/* SVR4 PIC code requires special handling for jal, so it must be a
466 macro. */
467{"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 },
468{"jal", "s", 0, (int) M_JAL_1, INSN_MACRO, I1 },
469{"jal", "a", 0, (int) M_JAL_A, INSN_MACRO, I1 },
470/* This form of jal is used by the disassembler and internally by the
471 assembler, but will never match user input (because the line above
472 will match first). */
473{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31, I1 },
474 /* jalx really should only be avaliable if mips16 is available,
475 but for now make it I1. */
476{"jalx", "a", 0x74000000, 0xfc000000, UBD|WR_31, I1 },
477{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO, I1 },
478{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
479{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO, I1 },
480{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
481{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, I1 },
482{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, I3 },
483{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, I1 },
484{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, I1 },
485{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
486{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 },
487{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
488{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, I2 },
489{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, I2 }, /* ldc1 */
490{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, I1 },
491{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, I1 },
492{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
493{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, I2 },
494{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, I2 },
495{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, I2 },
496{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
497{"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, I3 },
498{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, I3 },
499{"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, I3 },
500{"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
501{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
502{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO, I1 },
503{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
504{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO, I1 },
505/* li is at the start of the table. */
506{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO, I1 },
507{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO, I1 },
508{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, I1 },
509{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, I1 },
510{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t, I2 },
511{"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, I2 },
512{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
513{"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, I3 },
514{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t, I1 },
515 /* start-sanitize-r5900 */
516{"lq", "t,o(b)", 0x78000000, 0xfc000000, WR_t|RD_b, T5 },
517 /* end-sanitize-r5900 */
518{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
519{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO, I1 },
520{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
521{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO, I1 },
522{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
523{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 },
524{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
525{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
526{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, I1 }, /* lwc1 */
527{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, I1 },
528{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
529{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, I1 },
530{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, I1 },
531{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, I1 },
532{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
533{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I1 },
534{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
535{"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, I2 }, /* as lwl */
536{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I1 },
537{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I1 },
538{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t, I2 }, /* same */
539{"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, I2 }, /* as lwr */
540{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t, I3 },
541{"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, I3 },
542{"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD|WR_D|RD_t|RD_b, I4 },
543 /* start-sanitize-vr4320 */
544{"mac", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|MOD_HILO, N4},
545{"dmac", "s,t", 0x00000029, 0xfc00ffff, RD_s|RD_t|MOD_LO, N4},
546 /* end-sanitize-vr4320 */
547 /* start-sanitize-vr4320 */
548{"macc", "d,s,t", 0x000000A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
549 /* end-sanitize-vr4320 */
550 /* start-sanitize-vr5400 */
551{"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
552 /* end-sanitize-vr5400 */
553 /* start-sanitize-vr4320 */
554{"maccu", "d,s,t", 0x000000E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
555 /* end-sanitize-vr4320 */
556 /* start-sanitize-vr5400 */
557{"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
558 /* end-sanitize-vr5400 */
559 /* start-sanitize-vr4320 */
560{"macchi", "d,s,t", 0x000002A8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
561 /* end-sanitize-vr4320 */
562 /* start-sanitize-vr5400 */
563{"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
564 /* end-sanitize-vr5400 */
565 /* start-sanitize-vr4320 */
566{"macchiu", "d,s,t", 0x000002E8, 0xfc0007ff, RD_s|RD_t|MOD_HILO|WR_d,N4},
567 /* end-sanitize-vr4320 */
568 /* start-sanitize-vr5400 */
569{"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d,N5},
570 /* end-sanitize-vr5400 */
571{"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
572{"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, P3 },
573{"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
574{"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
575/* start-sanitize-r5900 */
576{"madd.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
577 /* end-sanitize-r5900 */
578{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
579{"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
580{"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
581 /* start-sanitize-r5900 */
582{"madd1", "s,t", 0x70000020, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
583{"madd1", "d,s,t", 0x70000020, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
584 /* end-sanitize-r5900 */
585{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, L1 },
586{"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, G1 },
587{"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1 },
588 /* start-sanitize-r5900 */
589{"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
590{"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 },
591{"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
592{"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
593{"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
594{"min.s", "D,S,T", 0x46000029, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
595{"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
596{"mula.s", "S,T", 0x4600001a, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
597{"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_S|RD_T|FP_S, T5 },
598{"di", "", 0x42000039, 0xffffffff, WR_C0, T5 },
599{"ei", "", 0x42000038, 0xffffffff, WR_C0, T5 },
600{"mfbpc", "t", 0x4000c000, 0xffe0ffff, RD_C0|WR_t, T5 },
601{"mfdab", "t", 0x4000c004, 0xffe0ffff, RD_C0|WR_t, T5 },
602{"mfdabm", "t", 0x4000c005, 0xffe0ffff, RD_C0|WR_t, T5 },
603{"mfdvb", "t", 0x4000c006, 0xffe0ffff, RD_C0|WR_t, T5 },
604{"mfdvbm", "t", 0x4000c007, 0xffe0ffff, RD_C0|WR_t, T5 },
605{"mfiab", "t", 0x4000c002, 0xffe0ffff, RD_C0|WR_t, T5 },
606{"mfiabm", "t", 0x4000c003, 0xffe0ffff, RD_C0|WR_t, T5 },
607{"mtbpc", "t", 0x4080c000, 0xffe0ffff, WR_C0|RD_t, T5 },
608{"mtdab", "t", 0x4080c004, 0xffe0ffff, WR_C0|RD_t, T5 },
609{"mtdabm", "t", 0x4080c005, 0xffe0ffff, WR_C0|RD_t, T5 },
610{"mtdvb", "t", 0x4080c006, 0xffe0ffff, WR_C0|RD_t, T5 },
611{"mtdvbm", "t", 0x4080c007, 0xffe0ffff, WR_C0|RD_t, T5 },
612{"mtiab", "t", 0x4080c002, 0xffe0ffff, WR_C0|RD_t, T5 },
613{"mtiabm", "t", 0x4080c003, 0xffe0ffff, WR_C0|RD_t, T5 },
614 /* end-sanitize-r5900 */
615{"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 },
616 /* start-sanitize-vr5400 */
617{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, N5 },
618 /* end-sanitize-vr5400 */
619 /* start-sanitize-r5900 */
620{"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, RD_C0|WR_t, T5 },
621 /* end-sanitize-r5900 */
622 /* start-sanitize-vr5400 */
623{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, N5 },
624 /* end-sanitize-vr5400 */
625 /* start-sanitize-r5900 */
626{"mfps", "t,P", 0x4000c800, 0xffe0ffc1, RD_C0|WR_t, T5 },
627 /* end-sanitize-r5900 */
628 /* start-sanitize-vr5400 */
629{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, N5 },
630 /* end-sanitize-vr5400 */
631 /* start-sanitize-r5900 */
632{"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, WR_C0|RD_t, T5 },
633 /* end-sanitize-r5900 */
634 /* start-sanitize-vr5400 */
635{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, N5 },
636 /* end-sanitize-vr5400 */
637 /* start-sanitize-r5900 */
638{"mtps", "t,P", 0x4080c800, 0xffe0ffc1, WR_C0|RD_t, T5 },
639 /* end-sanitize-r5900 */
640{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0, I1 },
641{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
642{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 },
643{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 },
644{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 },
645 /* start-sanitize-vr5400 */
646{"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, N5 },
647 /* end-sanitize-vr5400 */
648{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, I1 },
649 /* start-sanitize-r5900 */
650{"mfhi1", "d", 0x70000010, 0xffff07ff, WR_d|RD_HI, T5 },
651 /* end-sanitize-r5900 */
652{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, I1 },
653 /* start-sanitize-r5900 */
654{"mflo1", "d", 0x70000012, 0xffff07ff, WR_d|RD_LO, T5 },
655{"mfsa", "d", 0x00000028, 0xffff07ff, WR_d, T5 },
656 /* end-sanitize-r5900 */
657{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S|FP_D, I1 },
658{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S|FP_S, I1 },
659{"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d|RD_s|RD_CC|FP_D|FP_S, I4 },
660{"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
661{"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
662{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
663 /* start-sanitize-r5900 */
664{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
665 /* end-sanitize-r5900 */
666{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s,L1 },
667{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
668{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
669{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4 },
670{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4 },
671{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4 },
672{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, I4 },
673 /* start-sanitize-r5900 */
674{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
675 /* end-sanitize-r5900 */
676{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s,L1 },
677{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4 },
678{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4 },
679 /* start-sanitize-vr5400 */
680{"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
681{"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
682{"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
683{"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
684 /* end-sanitize-vr5400 */
685/* move is at the top of the table. */
686{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
687{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
688/* start-sanitize-r5900 */
689{"msub.s", "D,S,T", 0x4600001d, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 },
690/* end-sanitize-r5900 */
691{"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
692{"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO,L1 },
693{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC, I1 },
694{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
695{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 },
696{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 },
697{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 },
698 /* start-sanitize-vr5400 */
699{"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, N5 },
700 /* end-sanitize-vr5400 */
701{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, I1 },
702 /* start-sanitize-r5900 */
703{"mthi1", "s", 0x70000011, 0xfc1fffff, RD_s|WR_HI, T5 },
704 /* end-sanitize-r5900 */
705{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, I1 },
706 /* start-sanitize-r5900 */
707{"mtlo1", "s", 0x70000013, 0xfc1fffff, RD_s|WR_LO, T5 },
708{"mtsa", "s", 0x00000029, 0xfc1fffff, RD_s, T5 },
709{"mtsab", "s,j", 0x04180000, 0xfc1f0000, RD_s, T5 },
710{"mtsah", "s,j", 0x04190000, 0xfc1f0000, RD_s, T5 },
711 /* end-sanitize-r5900 */
712{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
713{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
714{"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO,P3},
715 /* start-sanitize-vr4320 */
716{"mul", "d,s,t", 0x00000128, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
717 /* end-sanitize-vr4320 */
718 /* start-sanitize-vr5400 */
719{"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
720 /* end-sanitize-vr5400 */
721{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO, I1 },
722{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO, I1 },
723{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO, I1 },
724{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO, I1 },
725{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO, I1 },
726{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO, I1 },
727 /* start-sanitize-vr4320 */
728{"mulu", "d,s,t", 0x00000168, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
729 /* end-sanitize-vr4320 */
730 /* start-sanitize-vr5400 */
731{"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
732 /* end-sanitize-vr5400 */
733 /* start-sanitize-vr4320 */
734{"mulhi", "d,s,t", 0x00000328, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
735 /* end-sanitize-vr4320 */
736 /* start-sanitize-vr5400 */
737{"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
738 /* end-sanitize-vr5400 */
739 /* start-sanitize-vr4320 */
740{"mulhiu", "d,s,t", 0x00000368, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N4},
741 /* end-sanitize-vr4320 */
742 /* start-sanitize-vr5400 */
743{"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5},
744 /* end-sanitize-vr5400 */
745 /* start-sanitize-vr5400 */
746{"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
747{"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
748{"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
749{"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d, N5 },
750 /* end-sanitize-vr5400 */
751{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
752{"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
753 /* start-sanitize-r5900 */
754{"mult1", "s,t", 0x70000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5},
755{"mult1", "d,s,t", 0x70000018, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
756 /* end-sanitize-r5900 */
757{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1},
758{"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, G1},
759 /* start-sanitize-r5900 */
760{"multu1", "s,t", 0x70000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5},
761{"multu1", "d,s,t", 0x70000019, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5},
762 /* end-sanitize-r5900 */
763{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t, I1 }, /* sub 0 */
764{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t, I1 }, /* subu 0 */
765{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S|FP_D, I1 },
766{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S|FP_S, I1 },
767{"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
768{"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
769{"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
770{"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },
771/* nop is at the start of the table. */
772{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
773{"nor", "t,r,I", 0, (int) M_NOR_I, INSN_MACRO, I1 },
774{"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d|RD_s|RD_t, I1 },/*nor d,s,0*/
775{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
776{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO, I1 },
777{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s, I1 },
778
779 /* start-sanitize-r5900 */
780{"pabsh", "d,t", 0x70000168, 0xffe007ff, WR_d|RD_t, T5 },
781{"pabsw", "d,t", 0x70000068, 0xffe007ff, WR_d|RD_t, T5 },
782{"paddb", "d,v,t", 0x70000208, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
783{"paddh", "d,v,t", 0x70000108, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
784{"paddw", "d,v,t", 0x70000008, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
785{"paddsb", "d,v,t", 0x70000608, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
786{"paddsh", "d,v,t", 0x70000508, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
787{"paddsw", "d,v,t", 0x70000408, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
788{"paddub", "d,v,t", 0x70000628, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
789{"padduh", "d,v,t", 0x70000528, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
790{"padduw", "d,v,t", 0x70000428, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
791{"padsbh", "d,v,t", 0x70000128, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
792{"pand", "d,v,t", 0x70000489, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
793{"pceqb", "d,v,t", 0x700002a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
794{"pceqh", "d,v,t", 0x700001a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
795{"pceqw", "d,v,t", 0x700000a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
796
797{"pcgtb", "d,v,t", 0x70000288, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
798{"pcgth", "d,v,t", 0x70000188, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
799{"pcgtw", "d,v,t", 0x70000088, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
800
801{"pcpyh", "d,t", 0x700006e9, 0xffe007ff, WR_d|RD_t, T5 },
802
803{"pcpyld", "d,v,t", 0x70000389, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
804{"pcpyud", "d,v,t", 0x700003a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
805
806{"pdivbw", "s,t", 0x70000749, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
807{"pdivuw", "s,t", 0x70000369, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
808{"pdivw", "s,t", 0x70000349, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 },
809
810{"pexch", "d,t", 0x700006a9, 0xffe007ff, WR_d|RD_t, T5 },
811{"pexcw", "d,t", 0x700007a9, 0xffe007ff, WR_d|RD_t, T5 },
812{"pexeh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
813{"pexoh", "d,t", 0x70000689, 0xffe007ff, WR_d|RD_t, T5 },
814{"pexew", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
815{"pexow", "d,t", 0x70000789, 0xffe007ff, WR_d|RD_t, T5 },
816
817{"pext5", "d,t", 0x70000788, 0xffe007ff, WR_d|RD_t, T5 },
818
819{"pextlb", "d,v,t", 0x70000688, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
820{"pextlh", "d,v,t", 0x70000588, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
821{"pextlw", "d,v,t", 0x70000488, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
822{"pextub", "d,v,t", 0x700006a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
823{"pextuh", "d,v,t", 0x700005a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
824{"pextuw", "d,v,t", 0x700004a8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
825
826{"phmaddh", "d,v,t", 0x70000449, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
827{"phmsubh", "d,v,t", 0x70000549, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
828
829{"pinth", "d,v,t", 0x70000289, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
830{"pinteh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
831{"pintoh", "d,v,t", 0x700002a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
832
833{"plzcw", "d,v", 0x70000004, 0xfc1f07ff, WR_d|RD_s, T5 },
834
835{"pmaddh", "d,v,t", 0x70000409, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
836{"pmadduw", "d,v,t", 0x70000029, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
837{"pmaddw", "d,v,t", 0x70000009, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
838
839{"pmaxh", "d,v,t", 0x700001c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
840{"pmaxw", "d,v,t", 0x700000c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
841
842{"pmfhi", "d", 0x70000209, 0xffff07ff, WR_d|RD_HI, T5 },
843{"pmflo", "d", 0x70000249, 0xffff07ff, WR_d|RD_LO, T5 },
844
845{"pmfhl.lw", "d", 0x70000030, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
846{"pmfhl.uw", "d", 0x70000070, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
847{"pmfhl.slw","d", 0x700000b0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
848{"pmfhl.lh", "d", 0x700000f0, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
849{"pmfhl.sh", "d", 0x70000130, 0xffff07ff, WR_d|RD_LO|RD_HI, T5 },
850
851{"pminh", "d,v,t", 0x700001e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
852{"pminw", "d,v,t", 0x700000e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
853
854{"pmsubh", "d,v,t", 0x70000509, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
855{"pmsubw", "d,v,t", 0x70000109, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
856
857{"pmthi", "v", 0x70000229, 0xfc1fffff, WR_HI|RD_s, T5 },
858{"pmtlo", "v", 0x70000269, 0xfc1fffff, WR_LO|RD_s, T5 },
859
860{"pmthl.lw", "v", 0x70000031, 0xfc1fffff, WR_HI|WR_LO|RD_s, T5 },
861
862{"pmulth", "d,v,t", 0x70000709, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
863{"pmultuw", "d,v,t", 0x70000329, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
864{"pmultw", "d,v,t", 0x70000309, 0xfc0007ff, WR_d|RD_s|RD_t|WR_HI|WR_LO, T5 },
865
866{"pnor", "d,v,t", 0x700004e9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
867{"por", "d,v,t", 0x700004a9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
868
869{"ppac5", "d,t", 0x700007c8, 0xffe007ff, WR_d|RD_t, T5 },
870
871{"ppacb", "d,v,t", 0x700006c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
872{"ppach", "d,v,t", 0x700005c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
873{"ppacw", "d,v,t", 0x700004c8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
874
875{"prevh", "d,t", 0x700006c9, 0xffe007ff, WR_d|RD_t, T5 },
876{"prot3w", "d,t", 0x700007c9, 0xffe007ff, WR_d|RD_t, T5 },
877
878{"psllh", "d,t,<", 0x70000034, 0xffe0003f, WR_d|RD_t, T5 },
879{"psllvw", "d,t,s", 0x70000089, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
880{"psllw", "d,t,<", 0x7000003c, 0xffe0003f, WR_d|RD_t, T5 },
881
882{"psrah", "d,t,<", 0x70000037, 0xffe0003f, WR_d|RD_t, T5 },
883{"psravw", "d,t,s", 0x700000e9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
884{"psraw", "d,t,<", 0x7000003f, 0xffe0003f, WR_d|RD_t, T5 },
885
886{"psrlh", "d,t,<", 0x70000036, 0xffe0003f, WR_d|RD_t, T5 },
887{"psrlvw", "d,t,s", 0x700000c9, 0xfc0007ff, WR_d|RD_t|RD_s, T5 },
888{"psrlw", "d,t,<", 0x7000003e, 0xffe0003f, WR_d|RD_t, T5 },
889
890{"psubb", "d,v,t", 0x70000248, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
891{"psubh", "d,v,t", 0x70000148, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
892{"psubsb", "d,v,t", 0x70000648, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
893{"psubsh", "d,v,t", 0x70000548, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
894{"psubsw", "d,v,t", 0x70000448, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
895{"psubub", "d,v,t", 0x70000668, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
896{"psubuh", "d,v,t", 0x70000568, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
897{"psubuw", "d,v,t", 0x70000468, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
898{"psubw", "d,v,t", 0x70000048, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
899
900{"pxor", "d,v,t", 0x700004c9, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
901 /* end-sanitize-r5900 */
902
903{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, G3 },
904{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
905
906 /* start-sanitize-r5900 */
907{"qfsrv", "d,v,t", 0x700006e8, 0xfc0007ff, WR_d|RD_s|RD_t, T5 },
908 /* end-sanitize-r5900 */
909
910{"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D|RD_S|FP_D, I4 },
911{"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D|RD_S|FP_S, I4 },
912{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
913{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO, I1 },
914{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO, I1 },
915{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, I1 },
916{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 },
917{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 },
918{"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 },
919{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I1 },
920{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 },
921 /* start-sanitize-vr5400 */
922{"ror", "d,t,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 },
923 /* end-sanitize-vr5400 */
924{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 },
925{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 },
926 /* start-sanitize-vr5400 */
927{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 },
928 /* end-sanitize-vr5400 */
929{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 },
930{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 },
931{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 },
932{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|FP_S, I2 },
933{"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D|RD_S|FP_D, I4 },
934{"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D|RD_S|FP_S, I4 },
935/* start-sanitize-r5900 */
936{"rsqrt.s", "D,S,T", 0x46000016, 0xffe0003f, WR_D|RD_S|FP_S, T5 },
937/* end-sanitize-r5900 */
938{"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, I1 },
939{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, I1 },
940{"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I2 },
941{"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, I2 },
942{"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, I3 },
943{"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, I3 },
944{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, I3 },
945{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, I1 },
946{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, I1 },
947{"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, G2 },
948{"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, G2 },
949{"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, G2 },
950{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
951{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
952{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
953{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, I2 },
954{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, I2 },
955{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 },
956{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 },
957{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 },
958{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 },
959{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 },
960{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 },
961{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 },
962{"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, I3 },
963{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 },
964{"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 },
965{"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
966{"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
967{"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t,L1 },
968{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 },
969{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, I1 },
970{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, I1 },
971{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, I1 },
972{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, I1 },
973{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO, I1 },
974{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO, I1 },
975{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO, I1 },
976{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO, I1 },
977{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO, I1 },
978{"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM|RD_t|RD_b, I1 },
979{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO, I1 },
980{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO, I1 },
981{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO, I1 },
982{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO, I1 },
983{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO, I1 },
984{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
985{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* sllv */
986{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t, I1 },
987{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
988{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO, I1 },
989{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s, I1 },
990{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s, I1 },
991{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
992{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, I1 },
993{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, I1 },
994{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, I1 },
995 /* start-sanitize-r5900 */
996{"sq", "t,o(b)", 0x7c000000, 0xfc000000, SM|RD_t|RD_b, T5 },
997 /* end-sanitize-r5900 */
998{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, I2 },
999/* start-sanitize-r5900 */
1000{"sqrt.s", "D,T", 0x46000004, 0xffe0f83f, WR_D|RD_S|FP_S, T5 },
1001/* end-sanitize-r5900 */
1002{"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, I2 },
1003{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
1004{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srav */
1005{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t, I1 },
1006{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 },
1007{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s, I1 }, /* srlv */
1008{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t, I1 },
1009{"standby", "", 0x42000021, 0xffffffff, 0, V1 },
1010{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1011{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO, I1 },
1012{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T|FP_D, I1 },
1013{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, I1 },
1014{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1015{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO, I1 },
1016{"suspend", "", 0x42000022, 0xffffffff, 0, V1 },
1017{"sw", "t,o(b)", 0xac000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1018{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO, I1 },
1019{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM|RD_C0|RD_b, I1 },
1020{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, I1 },
1021{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
1022{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 },
1023{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1024{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1025{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, I1 }, /* swc1 */
1026{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, I1 },
1027{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, I1 },
1028{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, I1 },
1029{"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, I1 },
1030{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, I1 },
1031{"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1032{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I1 },
1033{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
1034{"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, I2 }, /* as swl */
1035{"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM|RD_t|RD_b, I1 },
1036{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, I1 },
1037{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b, I2 }, /* same */
1038{"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, I2 }, /* as swr */
1039{"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 },
1040{"sync", "", 0x0000000f, 0xffffffff, 0, I2|T3 },
1041{"sync.p", "", 0x0000000f, 0xffffffff, 0, I2 },
1042{"sync.l", "", 0x0000040f, 0xffffffff, 0, I2 },
1043{"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 },
1044{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 },
1045{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 },
1046{"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1047{"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1048{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* teqi */
1049{"teq", "s,I", 0, (int) M_TEQ_I, INSN_MACRO, I2 },
1050{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 },
1051{"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1052{"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1053{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgei */
1054{"tge", "s,I", 0, (int) M_TGE_I, INSN_MACRO, I2 },
1055{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 },
1056{"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1057{"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1058{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tgeiu */
1059{"tgeu", "s,I", 0, (int) M_TGEU_I, INSN_MACRO, I2 },
1060{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB, I1 },
1061{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB, I1 },
1062{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB, I1 },
1063{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB, I1 },
1064{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 },
1065{"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1066{"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1067{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tlti */
1068{"tlt", "s,I", 0, (int) M_TLT_I, INSN_MACRO, I2 },
1069{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 },
1070{"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1071{"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1072{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tltiu */
1073{"tltu", "s,I", 0, (int) M_TLTU_I, INSN_MACRO, I2 },
1074{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 },
1075{"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s|RD_t|TRAP, I2 },
1076{"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s|RD_t|TRAP, I2 },
1077{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|TRAP, I2 }, /* tnei */
1078{"tne", "s,I", 0, (int) M_TNE_I, INSN_MACRO, I2 },
1079{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|FP_D, I3 },
1080{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|FP_S, I3 },
1081{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
1082{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_D, I2 },
1083{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO, I1 },
1084{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
1085{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, I2 },
1086{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, I1 },
1087{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, I3 },
1088{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, I3 },
1089{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, I1 },
1090{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, I1 },
1091{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, I1 },
1092{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, I1 },
1093{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, I1 },
1094{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, I1 },
1095{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, I3 },
1096{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, I3 },
1097{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, I1 },
1098{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, I1 },
1099{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, I1 },
1100{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, I1 },
1101{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 },
1102{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 },
1103{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s, I1 },
1104{"wait", "", 0x42000020, 0xffffffff, TRAP, I3 },
1105{"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 },
1106{"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 },
1107 /* start-sanitize-vr5400 */
1108{"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1109{"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1110{"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1111{"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D|RD_S|RD_T, N5 },
1112{"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1113{"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1114{"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1115{"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1116{"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1117{"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1118{"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1119{"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1120{"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1121{"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1122{"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1123{"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1124{"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1125{"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1126{"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1127{"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1128{"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1129{"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1130{"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1131{"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1132{"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1133{"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1134{"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1135{"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1136{"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1137{"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1138{"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1139{"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1140{"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1141{"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1142{"mulsl.ob","S,T", 0x4ac00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1143{"mulsl.ob","S,T[e]", 0x48000432, 0xfe2007ff, WR_CC|RD_S|RD_T, N5 },
1144{"mulsl.ob","S,k", 0x4bc00432, 0xffe007ff, WR_CC|RD_S|RD_T, N5 },
1145{"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1146{"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1147{"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1148{"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1149{"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1150{"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1151{"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1152{"pickf.ob", "D,S,T[e]", 0x48000002, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1153{"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1154{"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1155{"pickt.ob", "D,S,T[e]", 0x48000003, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1156{"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1157{"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D, N5 },
1158{"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D, N5 },
1159{"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D, N5 },
1160{"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D|RD_S|RD_T, N5 },
1161{"shfl.mixh.ob","D,S,T",0x4980001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1162{"shfl.mixl.ob","D,S,T",0x49c0001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1163{"shfl.pach.ob","D,S,T",0x4900001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1164{"shfl.pacl.ob","D,S,T",0x4940001f, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1165{"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1166{"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1167{"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1168{"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1169{"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1170{"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1171{"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1172{"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S, N5 },
1173{"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S|RD_T, N5 },
1174{"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1175{"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D|RD_S|RD_T, N5 },
1176{"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D|RD_S|RD_T, N5 },
1177 /* end-sanitize-vr5400 */
1178/* No hazard protection on coprocessor instructions--they shouldn't
1179 change the state of the processor and if they do it's up to the
1180 user to put in nops as necessary. These are at the end so that the
1181 disasembler recognizes more specific versions first. */
1182{"c0", "C", 0x42000000, 0xfe000000, 0, I1 },
1183{"c1", "C", 0x46000000, 0xfe000000, 0, I1 },
1184{"c2", "C", 0x4a000000, 0xfe000000, 0, I1 },
1185{"c3", "C", 0x4e000000, 0xfe000000, 0, I1 },
1186{"cop0", "C", 0, (int) M_COP0, INSN_MACRO, I1 },
1187{"cop1", "C", 0, (int) M_COP1, INSN_MACRO, I1 },
1188{"cop2", "C", 0, (int) M_COP2, INSN_MACRO, I1 },
1189{"cop3", "C", 0, (int) M_COP3, INSN_MACRO, I1 },
1190
1191 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1192 4010 any more, so move this insn out of the way. If the object
1193 format gave us more info, we could do this right. */
1194{"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t|RD_s,L1 },
1195};
1196
1197#define MIPS_NUM_OPCODES \
1198 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1199const int bfd_mips_num_builtin_opcodes = MIPS_NUM_OPCODES;
1200
1201/* const removed from the following to allow for dynamic extensions to the
1202 * built-in instruction set. */
1203struct mips_opcode *mips_opcodes =
1204 (struct mips_opcode *) mips_builtin_opcodes;
1205int bfd_mips_num_opcodes = MIPS_NUM_OPCODES;
1206#undef MIPS_NUM_OPCODES
1207
GDB Binutils - Deliverables
This page took 0.029692 seconds and 4 git commands to generate.