| 1 | /* NDS32-specific support for 32-bit ELF. |
| 2 | Copyright (C) 2012-2013 Free Software Foundation, Inc. |
| 3 | Contributed by Andes Technology Corporation. |
| 4 | |
| 5 | This file is part of BFD, the Binary File Descriptor library. |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 3 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA |
| 20 | 02110-1301, USA.*/ |
| 21 | |
| 22 | |
| 23 | #ifndef NDS32_ASM_H |
| 24 | #define NDS32_ASM_H |
| 25 | |
| 26 | /* Constant values for assembler. */ |
| 27 | enum |
| 28 | { |
| 29 | /* Error code for assembling an instruction. */ |
| 30 | NASM_OK = 0, |
| 31 | NASM_ERR_UNKNOWN_OP, |
| 32 | NASM_ERR_SYNTAX, |
| 33 | NASM_ERR_OPERAND, |
| 34 | NASM_ERR_OUT_OF_RANGE, |
| 35 | NASM_ERR_REG_REDUCED, |
| 36 | NASM_ERR_JUNK_EOL, |
| 37 | |
| 38 | /* Results of parse_operand. */ |
| 39 | NASM_R_CONST, |
| 40 | NASM_R_SYMBOL, |
| 41 | NASM_R_ILLEGAL, |
| 42 | |
| 43 | /* Flags for open description. */ |
| 44 | NASM_OPEN_ARCH_V1 = 0x0, |
| 45 | NASM_OPEN_ARCH_V2 = 0x1, |
| 46 | NASM_OPEN_ARCH_V3 = 0x2, |
| 47 | NASM_OPEN_ARCH_V3M = 0x3, |
| 48 | NASM_OPEN_ARCH_MASK = 0xf, |
| 49 | NASM_OPEN_REDUCED_REG = 0x10, |
| 50 | |
| 51 | /* Common attributes. */ |
| 52 | NASM_ATTR_ISA_V1 = 0x01, |
| 53 | NASM_ATTR_ISA_V2 = 0x02, |
| 54 | NASM_ATTR_ISA_V3 = 0x04, |
| 55 | NASM_ATTR_ISA_V3M = 0x08, |
| 56 | NASM_ATTR_ISA_ALL = 0x0f, |
| 57 | |
| 58 | /* Attributes for instructions. */ |
| 59 | NASM_ATTR_MAC = 0x0000100, |
| 60 | NASM_ATTR_DIV = 0x0000200, |
| 61 | NASM_ATTR_FPU = 0x0000400, |
| 62 | NASM_ATTR_FPU_SP_EXT = 0x0000800, |
| 63 | NASM_ATTR_FPU_DP_EXT = 0x0001000, |
| 64 | NASM_ATTR_STR_EXT = 0x0002000, |
| 65 | NASM_ATTR_PERF_EXT = 0x0004000, |
| 66 | NASM_ATTR_PERF2_EXT = 0x0008000, |
| 67 | NASM_ATTR_AUDIO_ISAEXT = 0x0010000, |
| 68 | NASM_ATTR_IFC_EXT = 0x0020000, |
| 69 | NASM_ATTR_EX9_EXT = 0x0040000, |
| 70 | NASM_ATTR_FPU_FMA = 0x0080000, |
| 71 | NASM_ATTR_DXREG = 0x0100000, |
| 72 | NASM_ATTR_BRANCH = 0x0200000, |
| 73 | NASM_ATTR_RELAXABLE = 0x0400000, |
| 74 | NASM_ATTR_PCREL = 0x0800000, |
| 75 | NASM_ATTR_GPREL = 0x1000000, |
| 76 | |
| 77 | /* Attributes for relocations. */ |
| 78 | NASM_ATTR_HI20 = 0x10000000, |
| 79 | NASM_ATTR_LO12 = 0x20000000, |
| 80 | NASM_ATTR_LO20 = 0x40000000, |
| 81 | |
| 82 | /* Attributes for registers. */ |
| 83 | NASM_ATTR_RDREG = 0x000100 |
| 84 | }; |
| 85 | |
| 86 | /* Macro for instruction attribute. */ |
| 87 | #define ATTR(attr) NASM_ATTR_ ## attr |
| 88 | #define ATTR_NONE 0 |
| 89 | #define ATTR_PCREL (ATTR (PCREL) | ATTR (BRANCH)) |
| 90 | |
| 91 | #define ATTR_ALL (ATTR (ISA_ALL)) |
| 92 | #define ATTR_V2UP (ATTR_ALL & ~(ATTR (ISA_V1))) |
| 93 | #define ATTR_V3MUP (ATTR (ISA_V3) | ATTR (ISA_V3M)) |
| 94 | #define ATTR_V3 (ATTR (ISA_V3)) |
| 95 | #define ATTR_V3MEX_V1 (ATTR_ALL & ~(ATTR (ISA_V3M))) |
| 96 | #define ATTR_V3MEX_V2 (ATTR_V2UP & ~(ATTR (ISA_V3M))) |
| 97 | |
| 98 | /* Lexical element in parsed syntax. */ |
| 99 | typedef int lex_t; |
| 100 | |
| 101 | /* Common header for hash entries. */ |
| 102 | struct nds32_hash_entry |
| 103 | { |
| 104 | const char *name; |
| 105 | }; |
| 106 | |
| 107 | typedef struct nds32_keyword |
| 108 | { |
| 109 | const char *name; |
| 110 | int value; |
| 111 | uint64_t attr; |
| 112 | } keyword_t; |
| 113 | |
| 114 | typedef struct nds32_opcode |
| 115 | { |
| 116 | /* Opcode for the instruction. */ |
| 117 | const char *opcode; |
| 118 | /* Human readable string of this instruction. */ |
| 119 | const char *instruction; |
| 120 | /* Base value of this instruction. */ |
| 121 | uint32_t value; |
| 122 | /* The byte-size of the instruction. */ |
| 123 | int isize; |
| 124 | /* Attributes of this instruction. */ |
| 125 | uint64_t attr; |
| 126 | /* Implicit define/use. */ |
| 127 | uint64_t defuse; |
| 128 | /* Parsed string for assembling. */ |
| 129 | lex_t *syntax; |
| 130 | /* Number of variant. */ |
| 131 | int variant; |
| 132 | /* Next form of the same mnemonic. */ |
| 133 | struct nds32_opcode *next; |
| 134 | /* TODO: Extra constrains and verification. |
| 135 | For example, `mov55 $sp, $sp' is not allowed in v3. */ |
| 136 | } opcode_t; |
| 137 | |
| 138 | typedef struct nds32_asm_insn |
| 139 | { |
| 140 | /* Assembled instruction bytes. */ |
| 141 | uint32_t insn; |
| 142 | /* The opcode structure for this instruction. */ |
| 143 | struct nds32_opcode *opcode; |
| 144 | /* The field need special fix-up, used for relocation. */ |
| 145 | const struct nds32_field *field; |
| 146 | /* Attributes for relocation. */ |
| 147 | uint64_t attr; |
| 148 | /* Application-dependent data, e.g., expression. */ |
| 149 | void *info; |
| 150 | /* Input/output registers. */ |
| 151 | uint64_t defuse; |
| 152 | } nds32_asm_insn_t; |
| 153 | |
| 154 | typedef struct nds32_asm_desc |
| 155 | { |
| 156 | /* The callback provided by assembler user for parse an operand, |
| 157 | e.g., parse integer. */ |
| 158 | int (*parse_operand) (struct nds32_asm_desc *, |
| 159 | struct nds32_asm_insn *, |
| 160 | char **, int64_t *); |
| 161 | |
| 162 | /* Result of assembling. */ |
| 163 | int result; |
| 164 | |
| 165 | /* The mach for this assembling. */ |
| 166 | int mach; |
| 167 | |
| 168 | int flags; |
| 169 | } nds32_asm_desc_t; |
| 170 | |
| 171 | /* The field information for an operand. */ |
| 172 | typedef struct nds32_field |
| 173 | { |
| 174 | /* Name of the field. */ |
| 175 | const char *name; |
| 176 | |
| 177 | int bitpos; |
| 178 | int bitsize; |
| 179 | int shift; |
| 180 | int hw_res; |
| 181 | |
| 182 | int (*parse) (struct nds32_asm_desc *, |
| 183 | struct nds32_asm_insn *, |
| 184 | char **, int64_t *); |
| 185 | } field_t; |
| 186 | |
| 187 | extern void nds32_assemble (nds32_asm_desc_t *, nds32_asm_insn_t *, char *); |
| 188 | extern void nds32_asm_init (nds32_asm_desc_t *, int); |
| 189 | |
| 190 | #endif |