| 1 | /* Altera Nios II opcode list. |
| 2 | Copyright (C) 2012, 2013 Free Software Foundation, Inc. |
| 3 | Contributed by Nigel Gray (ngray@altera.com). |
| 4 | Contributed by Mentor Graphics, Inc. |
| 5 | |
| 6 | This file is part of the GNU opcodes library. |
| 7 | |
| 8 | This library is free software; you can redistribute it and/or modify |
| 9 | it under the terms of the GNU General Public License as published by |
| 10 | the Free Software Foundation; either version 3, or (at your option) |
| 11 | any later version. |
| 12 | |
| 13 | It is distributed in the hope that it will be useful, but WITHOUT |
| 14 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 15 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public |
| 16 | License for more details. |
| 17 | |
| 18 | You should have received a copy of the GNU General Public License |
| 19 | along with this file; see the file COPYING. If not, write to the |
| 20 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
| 21 | MA 02110-1301, USA. */ |
| 22 | |
| 23 | #include "sysdep.h" |
| 24 | #include <stdio.h> |
| 25 | #include "opcode/nios2.h" |
| 26 | |
| 27 | /* Register string table */ |
| 28 | |
| 29 | const struct nios2_reg nios2_builtin_regs[] = { |
| 30 | /* Standard register names. */ |
| 31 | {"zero", 0}, |
| 32 | {"at", 1}, /* assembler temporary */ |
| 33 | {"r2", 2}, |
| 34 | {"r3", 3}, |
| 35 | {"r4", 4}, |
| 36 | {"r5", 5}, |
| 37 | {"r6", 6}, |
| 38 | {"r7", 7}, |
| 39 | {"r8", 8}, |
| 40 | {"r9", 9}, |
| 41 | {"r10", 10}, |
| 42 | {"r11", 11}, |
| 43 | {"r12", 12}, |
| 44 | {"r13", 13}, |
| 45 | {"r14", 14}, |
| 46 | {"r15", 15}, |
| 47 | {"r16", 16}, |
| 48 | {"r17", 17}, |
| 49 | {"r18", 18}, |
| 50 | {"r19", 19}, |
| 51 | {"r20", 20}, |
| 52 | {"r21", 21}, |
| 53 | {"r22", 22}, |
| 54 | {"r23", 23}, |
| 55 | {"et", 24}, |
| 56 | {"bt", 25}, |
| 57 | {"gp", 26}, /* global pointer */ |
| 58 | {"sp", 27}, /* stack pointer */ |
| 59 | {"fp", 28}, /* frame pointer */ |
| 60 | {"ea", 29}, /* exception return address */ |
| 61 | {"sstatus", 30}, /* saved processor status */ |
| 62 | {"ra", 31}, /* return address */ |
| 63 | |
| 64 | /* Alternative names for special registers. */ |
| 65 | {"r0", 0}, |
| 66 | {"r1", 1}, |
| 67 | {"r24", 24}, |
| 68 | {"r25", 25}, |
| 69 | {"r26", 26}, |
| 70 | {"r27", 27}, |
| 71 | {"r28", 28}, |
| 72 | {"r29", 29}, |
| 73 | {"r30", 30}, |
| 74 | {"ba", 30}, /* breakpoint return address */ |
| 75 | {"r31", 31}, |
| 76 | |
| 77 | /* Control register names. */ |
| 78 | {"status", 0}, |
| 79 | {"estatus", 1}, |
| 80 | {"bstatus", 2}, |
| 81 | {"ienable", 3}, |
| 82 | {"ipending", 4}, |
| 83 | {"cpuid", 5}, |
| 84 | {"ctl6", 6}, |
| 85 | {"exception", 7}, |
| 86 | {"pteaddr", 8}, |
| 87 | {"tlbacc", 9}, |
| 88 | {"tlbmisc", 10}, |
| 89 | {"eccinj", 11}, |
| 90 | {"badaddr", 12}, |
| 91 | {"config", 13}, |
| 92 | {"mpubase", 14}, |
| 93 | {"mpuacc", 15}, |
| 94 | {"ctl16", 16}, |
| 95 | {"ctl17", 17}, |
| 96 | {"ctl18", 18}, |
| 97 | {"ctl19", 19}, |
| 98 | {"ctl20", 20}, |
| 99 | {"ctl21", 21}, |
| 100 | {"ctl22", 22}, |
| 101 | {"ctl23", 23}, |
| 102 | {"ctl24", 24}, |
| 103 | {"ctl25", 25}, |
| 104 | {"ctl26", 26}, |
| 105 | {"ctl27", 27}, |
| 106 | {"ctl28", 28}, |
| 107 | {"ctl29", 29}, |
| 108 | {"ctl30", 30}, |
| 109 | {"ctl31", 31}, |
| 110 | |
| 111 | /* Alternative names for special control registers. */ |
| 112 | {"ctl0", 0}, |
| 113 | {"ctl1", 1}, |
| 114 | {"ctl2", 2}, |
| 115 | {"ctl3", 3}, |
| 116 | {"ctl4", 4}, |
| 117 | {"ctl5", 5}, |
| 118 | {"ctl7", 7}, |
| 119 | {"ctl8", 8}, |
| 120 | {"ctl9", 9}, |
| 121 | {"ctl10", 10}, |
| 122 | {"ctl11", 11}, |
| 123 | {"ctl12", 12}, |
| 124 | {"ctl13", 13}, |
| 125 | {"ctl14", 14}, |
| 126 | {"ctl15", 15}, |
| 127 | |
| 128 | /* Coprocessor register names. */ |
| 129 | {"c0", 0}, |
| 130 | {"c1", 1}, |
| 131 | {"c2", 2}, |
| 132 | {"c3", 3}, |
| 133 | {"c4", 4}, |
| 134 | {"c5", 5}, |
| 135 | {"c6", 6}, |
| 136 | {"c7", 7}, |
| 137 | {"c8", 8}, |
| 138 | {"c9", 9}, |
| 139 | {"c10", 10}, |
| 140 | {"c11", 11}, |
| 141 | {"c12", 12}, |
| 142 | {"c13", 13}, |
| 143 | {"c14", 14}, |
| 144 | {"c15", 15}, |
| 145 | {"c16", 16}, |
| 146 | {"c17", 17}, |
| 147 | {"c18", 18}, |
| 148 | {"c19", 19}, |
| 149 | {"c20", 20}, |
| 150 | {"c21", 21}, |
| 151 | {"c22", 22}, |
| 152 | {"c23", 23}, |
| 153 | {"c24", 24}, |
| 154 | {"c25", 25}, |
| 155 | {"c26", 26}, |
| 156 | {"c27", 27}, |
| 157 | {"c28", 28}, |
| 158 | {"c29", 29}, |
| 159 | {"c30", 30}, |
| 160 | {"c31", 31}, |
| 161 | }; |
| 162 | |
| 163 | #define NIOS2_NUM_REGS \ |
| 164 | ((sizeof nios2_builtin_regs) / (sizeof (nios2_builtin_regs[0]))) |
| 165 | const int nios2_num_builtin_regs = NIOS2_NUM_REGS; |
| 166 | |
| 167 | /* This is not const in order to allow for dynamic extensions to the |
| 168 | built-in instruction set. */ |
| 169 | struct nios2_reg *nios2_regs = (struct nios2_reg *) nios2_builtin_regs; |
| 170 | int nios2_num_regs = NIOS2_NUM_REGS; |
| 171 | #undef NIOS2_NUM_REGS |
| 172 | |
| 173 | /* This is the opcode table used by the Nios II GNU as, disassembler |
| 174 | and GDB. */ |
| 175 | const struct nios2_opcode nios2_builtin_opcodes[] = |
| 176 | { |
| 177 | /* { name, args, args_test, num_args, |
| 178 | match, mask, pinfo, overflow_msg } */ |
| 179 | {"add", "d,s,t", "d,s,t,E", 3, |
| 180 | OP_MATCH_ADD, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 181 | {"addi", "t,s,i", "t,s,i,E", 3, |
| 182 | OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_ADDI, signed_immed16_overflow}, |
| 183 | {"subi", "t,s,i", "t,s,i,E", 3, |
| 184 | OP_MATCH_ADDI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow}, |
| 185 | {"and", "d,s,t", "d,s,t,E", 3, |
| 186 | OP_MATCH_AND, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 187 | {"andhi", "t,s,u", "t,s,u,E", 3, |
| 188 | OP_MATCH_ANDHI, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 189 | {"andi", "t,s,u", "t,s,u,E", 3, |
| 190 | OP_MATCH_ANDI, OP_MASK_IOP, NIOS2_INSN_ANDI, unsigned_immed16_overflow}, |
| 191 | {"beq", "s,t,o", "s,t,o,E", 3, |
| 192 | OP_MATCH_BEQ, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 193 | {"bge", "s,t,o", "s,t,o,E", 3, |
| 194 | OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 195 | {"bgeu", "s,t,o", "s,t,o,E", 3, |
| 196 | OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 197 | {"bgt", "s,t,o", "s,t,o,E", 3, |
| 198 | OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, |
| 199 | branch_target_overflow}, |
| 200 | {"bgtu", "s,t,o", "s,t,o,E", 3, |
| 201 | OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, |
| 202 | branch_target_overflow}, |
| 203 | {"ble", "s,t,o", "s,t,o,E", 3, |
| 204 | OP_MATCH_BGE, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, |
| 205 | branch_target_overflow}, |
| 206 | {"bleu", "s,t,o", "s,t,o,E", 3, |
| 207 | OP_MATCH_BGEU, OP_MASK_IOP, NIOS2_INSN_MACRO|NIOS2_INSN_CBRANCH, |
| 208 | branch_target_overflow}, |
| 209 | {"blt", "s,t,o", "s,t,o,E", 3, |
| 210 | OP_MATCH_BLT, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 211 | {"bltu", "s,t,o", "s,t,o,E", 3, |
| 212 | OP_MATCH_BLTU, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 213 | {"bne", "s,t,o", "s,t,o,E", 3, |
| 214 | OP_MATCH_BNE, OP_MASK_IOP, NIOS2_INSN_CBRANCH, branch_target_overflow}, |
| 215 | {"br", "o", "o,E", 1, |
| 216 | OP_MATCH_BR, OP_MASK_IOP, NIOS2_INSN_UBRANCH, branch_target_overflow}, |
| 217 | {"break", "b", "b,E", 1, |
| 218 | OP_MATCH_BREAK, OP_MASK_BREAK, 0, no_overflow}, |
| 219 | {"bret", "", "E", 0, |
| 220 | OP_MATCH_BRET, OP_MASK, 0, no_overflow}, |
| 221 | {"flushd", "i(s)", "i(s)E", 2, |
| 222 | OP_MATCH_FLUSHD, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 223 | {"flushda", "i(s)", "i(s)E", 2, |
| 224 | OP_MATCH_FLUSHDA, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 225 | {"flushi", "s", "s,E", 1, |
| 226 | OP_MATCH_FLUSHI, OP_MASK_FLUSHI, 0, no_overflow}, |
| 227 | {"flushp", "", "E", 0, |
| 228 | OP_MATCH_FLUSHP, OP_MASK, 0, no_overflow}, |
| 229 | {"initd", "i(s)", "i(s)E", 2, |
| 230 | OP_MATCH_INITD, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 231 | {"initda", "i(s)", "i(s)E", 2, |
| 232 | OP_MATCH_INITDA, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 233 | {"initi", "s", "s,E", 1, |
| 234 | OP_MATCH_INITI, OP_MASK_INITI, 0, no_overflow}, |
| 235 | {"call", "m", "m,E", 1, |
| 236 | OP_MATCH_CALL, OP_MASK_IOP, NIOS2_INSN_CALL, call_target_overflow}, |
| 237 | {"callr", "s", "s,E", 1, |
| 238 | OP_MATCH_CALLR, OP_MASK_CALLR, 0, no_overflow}, |
| 239 | {"cmpeq", "d,s,t", "d,s,t,E", 3, |
| 240 | OP_MATCH_CMPEQ, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 241 | {"cmpeqi", "t,s,i", "t,s,i,E", 3, |
| 242 | OP_MATCH_CMPEQI, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 243 | {"cmpge", "d,s,t", "d,s,t,E", 3, |
| 244 | OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 245 | {"cmpgei", "t,s,i", "t,s,i,E", 3, |
| 246 | OP_MATCH_CMPGEI, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 247 | {"cmpgeu", "d,s,t", "d,s,t,E", 3, |
| 248 | OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 249 | {"cmpgeui", "t,s,u", "t,s,u,E", 3, |
| 250 | OP_MATCH_CMPGEUI, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 251 | {"cmpgt", "d,s,t", "d,s,t,E", 3, |
| 252 | OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow}, |
| 253 | {"cmpgti", "t,s,i", "t,s,i,E", 3, |
| 254 | OP_MATCH_CMPGEI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow}, |
| 255 | {"cmpgtu", "d,s,t", "d,s,t,E", 3, |
| 256 | OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow}, |
| 257 | {"cmpgtui", "t,s,u", "t,s,u,E", 3, |
| 258 | OP_MATCH_CMPGEUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow}, |
| 259 | {"cmple", "d,s,t", "d,s,t,E", 3, |
| 260 | OP_MATCH_CMPGE, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow}, |
| 261 | {"cmplei", "t,s,i", "t,s,i,E", 3, |
| 262 | OP_MATCH_CMPLTI, OP_MASK_IOP, NIOS2_INSN_MACRO, signed_immed16_overflow}, |
| 263 | {"cmpleu", "d,s,t", "d,s,t,E", 3, |
| 264 | OP_MATCH_CMPGEU, OP_MASK_ROPX | OP_MASK_ROP, NIOS2_INSN_MACRO, no_overflow}, |
| 265 | {"cmpleui", "t,s,u", "t,s,u,E", 3, |
| 266 | OP_MATCH_CMPLTUI, OP_MASK_IOP, NIOS2_INSN_MACRO, unsigned_immed16_overflow}, |
| 267 | {"cmplt", "d,s,t", "d,s,t,E", 3, |
| 268 | OP_MATCH_CMPLT, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 269 | {"cmplti", "t,s,i", "t,s,i,E", 3, |
| 270 | OP_MATCH_CMPLTI, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 271 | {"cmpltu", "d,s,t", "d,s,t,E", 3, |
| 272 | OP_MATCH_CMPLTU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 273 | {"cmpltui", "t,s,u", "t,s,u,E", 3, |
| 274 | OP_MATCH_CMPLTUI, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 275 | {"cmpne", "d,s,t", "d,s,t,E", 3, |
| 276 | OP_MATCH_CMPNE, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 277 | {"cmpnei", "t,s,i", "t,s,i,E", 3, |
| 278 | OP_MATCH_CMPNEI, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 279 | {"div", "d,s,t", "d,s,t,E", 3, |
| 280 | OP_MATCH_DIV, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 281 | {"divu", "d,s,t", "d,s,t,E", 3, |
| 282 | OP_MATCH_DIVU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 283 | {"jmp", "s", "s,E", 1, |
| 284 | OP_MATCH_JMP, OP_MASK_JMP, 0, no_overflow}, |
| 285 | {"jmpi", "m", "m,E", 1, |
| 286 | OP_MATCH_JMPI, OP_MASK_IOP, 0, no_overflow}, |
| 287 | {"ldb", "t,i(s)", "t,i(s)E", 3, |
| 288 | OP_MATCH_LDB, OP_MASK_IOP, 0, address_offset_overflow}, |
| 289 | {"ldbio", "t,i(s)", "t,i(s)E", 3, |
| 290 | OP_MATCH_LDBIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 291 | {"ldbu", "t,i(s)", "t,i(s)E", 3, |
| 292 | OP_MATCH_LDBU, OP_MASK_IOP, 0, address_offset_overflow}, |
| 293 | {"ldbuio", "t,i(s)", "t,i(s)E", 3, |
| 294 | OP_MATCH_LDBUIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 295 | {"ldh", "t,i(s)", "t,i(s)E", 3, |
| 296 | OP_MATCH_LDH, OP_MASK_IOP, 0, address_offset_overflow}, |
| 297 | {"ldhio", "t,i(s)", "t,i(s)E", 3, |
| 298 | OP_MATCH_LDHIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 299 | {"ldhu", "t,i(s)", "t,i(s)E", 3, |
| 300 | OP_MATCH_LDHU, OP_MASK_IOP, 0, address_offset_overflow}, |
| 301 | {"ldhuio", "t,i(s)", "t,i(s)E", 3, |
| 302 | OP_MATCH_LDHUIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 303 | {"ldl", "t,i(s)", "t,i(s)E", 3, |
| 304 | OP_MATCH_LDL, OP_MASK_IOP, 0, address_offset_overflow}, |
| 305 | {"ldw", "t,i(s)", "t,i(s)E", 3, |
| 306 | OP_MATCH_LDW, OP_MASK_IOP, 0, address_offset_overflow}, |
| 307 | {"ldwio", "t,i(s)", "t,i(s)E", 3, |
| 308 | OP_MATCH_LDWIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 309 | {"mov", "d,s", "d,s,E", 2, |
| 310 | OP_MATCH_ADD, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, NIOS2_INSN_MACRO_MOV, |
| 311 | no_overflow}, |
| 312 | {"movhi", "t,u", "t,u,E", 2, |
| 313 | OP_MATCH_ORHI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, |
| 314 | unsigned_immed16_overflow}, |
| 315 | {"movui", "t,u", "t,u,E", 2, |
| 316 | OP_MATCH_ORI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, |
| 317 | unsigned_immed16_overflow}, |
| 318 | {"movi", "t,i", "t,i,E", 2, |
| 319 | OP_MATCH_ADDI, OP_MASK_IRS|OP_MASK_IOP, NIOS2_INSN_MACRO_MOVI, |
| 320 | signed_immed16_overflow}, |
| 321 | /* movia expands to two instructions so there is no mask or match */ |
| 322 | {"movia", "t,o", "t,o,E", 2, |
| 323 | OP_MATCH_ORHI, OP_MASK_IOP, NIOS2_INSN_MACRO_MOVIA, no_overflow}, |
| 324 | {"mul", "d,s,t", "d,s,t,E", 3, |
| 325 | OP_MATCH_MUL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 326 | {"muli", "t,s,i", "t,s,i,E", 3, |
| 327 | OP_MATCH_MULI, OP_MASK_IOP, 0, signed_immed16_overflow}, |
| 328 | {"mulxss", "d,s,t", "d,s,t,E", 3, |
| 329 | OP_MATCH_MULXSS, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 330 | {"mulxsu", "d,s,t", "d,s,t,E", 3, |
| 331 | OP_MATCH_MULXSU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 332 | {"mulxuu", "d,s,t", "d,s,t,E", 3, |
| 333 | OP_MATCH_MULXUU, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 334 | {"nextpc", "d", "d,E", 1, |
| 335 | OP_MATCH_NEXTPC, OP_MASK_NEXTPC, 0, no_overflow}, |
| 336 | {"nop", "", "E", 0, |
| 337 | OP_MATCH_ADD, OP_MASK, NIOS2_INSN_MACRO_MOV, no_overflow}, |
| 338 | {"nor", "d,s,t", "d,s,t,E", 3, |
| 339 | OP_MATCH_NOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 340 | {"or", "d,s,t", "d,s,t,E", 3, |
| 341 | OP_MATCH_OR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 342 | {"orhi", "t,s,u", "t,s,u,E", 3, |
| 343 | OP_MATCH_ORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 344 | {"ori", "t,s,u", "t,s,u,E", 3, |
| 345 | OP_MATCH_ORI, OP_MASK_IOP, NIOS2_INSN_ORI, unsigned_immed16_overflow}, |
| 346 | {"rdctl", "d,c", "d,c,E", 2, |
| 347 | OP_MATCH_RDCTL, OP_MASK_RDCTL, 0, no_overflow}, |
| 348 | {"rdprs", "t,s,i", "t,s,i,E", 3, |
| 349 | OP_MATCH_RDPRS, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 350 | {"ret", "", "E", 0, |
| 351 | OP_MATCH_RET, OP_MASK, 0, no_overflow}, |
| 352 | {"rol", "d,s,t", "d,s,t,E", 3, |
| 353 | OP_MATCH_ROL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 354 | {"roli", "d,s,j", "d,s,j,E", 3, |
| 355 | OP_MATCH_ROLI, OP_MASK_ROLI, 0, unsigned_immed5_overflow}, |
| 356 | {"ror", "d,s,t", "d,s,t,E", 3, |
| 357 | OP_MATCH_ROR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 358 | {"sll", "d,s,t", "d,s,t,E", 3, |
| 359 | OP_MATCH_SLL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 360 | {"slli", "d,s,j", "d,s,j,E", 3, |
| 361 | OP_MATCH_SLLI, OP_MASK_SLLI, 0, unsigned_immed5_overflow}, |
| 362 | {"sra", "d,s,t", "d,s,t,E", 3, |
| 363 | OP_MATCH_SRA, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 364 | {"srai", "d,s,j", "d,s,j,E", 3, |
| 365 | OP_MATCH_SRAI, OP_MASK_SRAI, 0, unsigned_immed5_overflow}, |
| 366 | {"srl", "d,s,t", "d,s,t,E", 3, |
| 367 | OP_MATCH_SRL, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 368 | {"srli", "d,s,j", "d,s,j,E", 3, |
| 369 | OP_MATCH_SRLI, OP_MASK_SRLI, 0, unsigned_immed5_overflow}, |
| 370 | {"stb", "t,i(s)", "t,i(s)E", 3, |
| 371 | OP_MATCH_STB, OP_MASK_IOP, 0, address_offset_overflow}, |
| 372 | {"stbio", "t,i(s)", "t,i(s)E", 3, |
| 373 | OP_MATCH_STBIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 374 | {"stc", "t,i(s)", "t,i(s)E", 3, |
| 375 | OP_MATCH_STC, OP_MASK_IOP, 0, address_offset_overflow}, |
| 376 | {"sth", "t,i(s)", "t,i(s)E", 3, |
| 377 | OP_MATCH_STH, OP_MASK_IOP, 0, address_offset_overflow}, |
| 378 | {"sthio", "t,i(s)", "t,i(s)E", 3, |
| 379 | OP_MATCH_STHIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 380 | {"stw", "t,i(s)", "t,i(s)E", 3, |
| 381 | OP_MATCH_STW, OP_MASK_IOP, 0, address_offset_overflow}, |
| 382 | {"stwio", "t,i(s)", "t,i(s)E", 3, |
| 383 | OP_MATCH_STWIO, OP_MASK_IOP, 0, address_offset_overflow}, |
| 384 | {"sub", "d,s,t", "d,s,t,E", 3, |
| 385 | OP_MATCH_SUB, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 386 | {"sync", "", "E", 0, |
| 387 | OP_MATCH_SYNC, OP_MASK_SYNC, 0, no_overflow}, |
| 388 | {"trap", "b", "b,E", 1, |
| 389 | OP_MATCH_TRAP, OP_MASK_TRAP, 0, no_overflow}, |
| 390 | {"eret", "", "E", 0, |
| 391 | OP_MATCH_ERET, OP_MASK, 0, no_overflow}, |
| 392 | {"custom", "l,d,s,t", "l,d,s,t,E", 4, |
| 393 | OP_MATCH_CUSTOM, OP_MASK_ROP, 0, custom_opcode_overflow}, |
| 394 | {"wrctl", "c,s", "c,s,E", 2, |
| 395 | OP_MATCH_WRCTL, OP_MASK_WRCTL, 0, no_overflow}, |
| 396 | {"wrprs", "d,s", "d,s,E", 2, |
| 397 | OP_MATCH_WRPRS, OP_MASK_RRT|OP_MASK_ROPX|OP_MASK_ROP, 0, no_overflow}, |
| 398 | {"xor", "d,s,t", "d,s,t,E", 3, |
| 399 | OP_MATCH_XOR, OP_MASK_ROPX | OP_MASK_ROP, 0, no_overflow}, |
| 400 | {"xorhi", "t,s,u", "t,s,u,E", 3, |
| 401 | OP_MATCH_XORHI, OP_MASK_IOP, 0, unsigned_immed16_overflow}, |
| 402 | {"xori", "t,s,u", "t,s,u,E", 3, |
| 403 | OP_MATCH_XORI, OP_MASK_IOP, NIOS2_INSN_XORI, unsigned_immed16_overflow} |
| 404 | }; |
| 405 | |
| 406 | #define NIOS2_NUM_OPCODES \ |
| 407 | ((sizeof nios2_builtin_opcodes) / (sizeof (nios2_builtin_opcodes[0]))) |
| 408 | const int bfd_nios2_num_builtin_opcodes = NIOS2_NUM_OPCODES; |
| 409 | |
| 410 | /* This is not const to allow for dynamic extensions to the |
| 411 | built-in instruction set. */ |
| 412 | struct nios2_opcode *nios2_opcodes = |
| 413 | (struct nios2_opcode *) nios2_builtin_opcodes; |
| 414 | int bfd_nios2_num_opcodes = NIOS2_NUM_OPCODES; |
| 415 | #undef NIOS2_NUM_OPCODES |